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Lionel Landwerlin [Thu, 29 Nov 2018 13:02:03 +0000 (13:02 +0000)]
anv: flush pipeline before query result copies
Pipeline state pending bits should be taken into account when copying
results.
In the particular bug below, the results of the
vkCmdCopyQueryPoolResults() command was being overwritten by the
preceding vkCmdCopyBuffer() with a same destination buffer. This is
because we copy the buffers using the 3D pipeline whereas we copy the
query results using the command streamer. Those pieces of HW work in
parallel and the results are somewhat undefined.
v2: Unconditionally flush the pipeline before copying the results
(Jason)
v3: Wrap & expressions (Jason)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108894
Cc: mesa-stable@lists.freedesktop.org
Marek Olšák [Thu, 29 Nov 2018 19:45:42 +0000 (14:45 -0500)]
Revert "winsys/amdgpu: overallocate buffers for faster address translation on Gfx9"
I didn't mean to push this. I don't think it makes any difference.
This reverts commit
f737fe00a047ae1ae9ec4e15a4ea8b578389f2f6.
Roland Scheidegger [Fri, 23 Nov 2018 01:31:24 +0000 (02:31 +0100)]
draw: fix infinite loop in line stippling
The calculated length of a line may be infinite, if the coords we
get are bogus. This leads to an infinite loop in line stippling.
To prevent this test for this explicitly (although technically
on at least x86 sse it would actually work without the explicit
test, as long as we use the int-converted length value).
While here also get rid of some always-true condition.
Note this does not actually solve the root cause, which is that
the coords we receive are bogus after clipping. This seems a difficult
problem to solve. One issue is that due to float arithmetic, clip w
may become 0 after clipping if the incoming geometry is
"sufficiently degenerate", hence x/y/z ndc (and window) coords will
be all inf (or nan). Even with w not quite 0, I believe it's possible
we produce values which are actually outside the view volume.
(Also, x=y=z=w=0 coords in clipspace would be not considered subject
to clipping, and similarly result in all NaN coords.) We just hope for
now other draw stages (and rasterizers) can handle those relatively
safely (llvmpipe itself should be sort of robust against this, certainly
converstion to fixed point will produce garbage, it might fail a couple
assertions but should neither hang nor crash otherwise).
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Józef Kucia [Mon, 26 Nov 2018 15:04:30 +0000 (16:04 +0100)]
nir: Fix assert in print_intrinsic_instr().
Signed-off-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Nicolai Hähnle [Mon, 19 Nov 2018 17:53:09 +0000 (18:53 +0100)]
amd/addrlib: update Mesa's copy of addrlib
Update to the internal master as of 2018-11-15.
This has a lot of gratuitous whitespace change, but on the plus
side it's built using the same tooling that's used for AMDVLK,
which should help going forward.
Nicolai Hähnle [Thu, 28 Jun 2018 18:55:38 +0000 (20:55 +0200)]
ac/surface/gfx9: let addrlib choose the preferred swizzle kind
Our choices here are simply redundant as long as sin.flags is set
correctly.
(v2:
- remove unused function parameter)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 19 Nov 2018 17:23:40 +0000 (18:23 +0100)]
radv: remove dependency on addrlib gfx9_enum.h
v2:
- use SI_CONTEXT_REG_OFFSET
Reviewed-by: Dave Airlie <airlied@redhat.com>
Thomas Hellstrom [Mon, 26 Nov 2018 18:05:47 +0000 (19:05 +0100)]
winsys/svga: Fix a memory leak
The ioctl.cap_3d member was never freed.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Thomas Hellstrom [Mon, 26 Nov 2018 18:02:08 +0000 (19:02 +0100)]
st/xa: Fix a memory leak
Free the context after destruction.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Samuel Pitoiset [Thu, 22 Nov 2018 18:10:15 +0000 (19:10 +0100)]
radv: drop few useless state changes when doing color/depth decompressions
Viewport/scissor don't need to be updated for array textures.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 22 Nov 2018 18:10:14 +0000 (19:10 +0100)]
radv: remove unused pending_clears param in the transition path
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 23 Nov 2018 16:04:15 +0000 (17:04 +0100)]
radv: optimize CmdClear{Color,DepthStencil}Image() for layered textures
If all layers are bound we can perform a fast color or depth clear
instead of iterating over all layers. This has the advantage
to avoid trashing the framebuffer for nothing if you we end up by
doing a fast clear when calling radv_clear_image_layer(), and
clearing all layers in one shot is obviously faster.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 23 Nov 2018 16:04:14 +0000 (17:04 +0100)]
radv: refactor the fast clear path for better re-use
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 23 Nov 2018 16:04:13 +0000 (17:04 +0100)]
radv: simplify a check in emit_fast_color_clear()
Currently only true if RADV_PERFTEST=dccmsaa is set.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 23 Nov 2018 16:04:12 +0000 (17:04 +0100)]
radv: add radv_can_fast_clear_{color,depth}() helpers
For further optimisations.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 23 Nov 2018 16:04:11 +0000 (17:04 +0100)]
radv: add radv_image_view_can_fast_clear() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 23 Nov 2018 16:04:10 +0000 (17:04 +0100)]
radv: add radv_image_can_fast_clear() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 23 Nov 2018 16:04:09 +0000 (17:04 +0100)]
radv: remove useless check in emit_fast_color_clear()
The driver doesn't support DCC/CMASK for mipmapped textures.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Vinson Lee [Wed, 28 Nov 2018 21:21:50 +0000 (13:21 -0800)]
freedreno: Fix autotools build.
Fix build error.
CXXLD pipe_msm.la
../../../../src/gallium/drivers/freedreno/.libs/libfreedreno.a(freedreno_batch.o): In function `batch_init':
src/gallium/drivers/freedreno/freedreno_batch.c:54: undefined reference to `fd_device_version'
src/gallium/drivers/freedreno/freedreno_batch.c:59: undefined reference to `fd_submit_new'
src/gallium/drivers/freedreno/freedreno_batch.c:61: undefined reference to `fd_submit_new_ringbuffer'
src/gallium/drivers/freedreno/freedreno_batch.c:64: undefined reference to `fd_submit_new_ringbuffer'
src/gallium/drivers/freedreno/freedreno_batch.c:66: undefined reference to `fd_submit_new_ringbuffer'
src/gallium/drivers/freedreno/freedreno_batch.c:70: undefined reference to `fd_submit_new_ringbuffer'
Fixes:
b4476138d5ad ("freedreno: move drm to common location")
Fixes:
aa0fed10d357 ("freedreno: move ir3 to common location")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Marek Olšák [Tue, 27 Nov 2018 01:55:26 +0000 (20:55 -0500)]
radeonsi: add memory management stress tests for GDS
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Marek Olšák [Tue, 27 Nov 2018 01:52:58 +0000 (20:52 -0500)]
winsys/amdgpu: add support for allocating GDS and OA resources
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Marek Olšák [Sat, 22 Sep 2018 01:01:46 +0000 (21:01 -0400)]
radeonsi: allow si_cp_dma_clear_buffer to clear GDS from any IB
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Marek Olšák [Mon, 26 Nov 2018 22:16:59 +0000 (17:16 -0500)]
winsys/amdgpu: use optimal VM alignment for CPU allocations
Acked-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Mon, 26 Nov 2018 22:13:47 +0000 (17:13 -0500)]
winsys/amdgpu: use optimal VM alignment for imported buffers
Window system buffers didn't use the optimal alignment.
Acked-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Mon, 26 Nov 2018 22:06:20 +0000 (17:06 -0500)]
winsys/amdgpu,radeon: pass vm_alignment to buffer_from_handle
Acked-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Wed, 21 Nov 2018 23:06:54 +0000 (18:06 -0500)]
winsys/amdgpu: overallocate buffers for faster address translation on Gfx9
Sadly, the 3 games I tested (DeusEx:MD, DiRT Rally, DOTA 2) are unaffected
by the overallocation, because I guess their buffers don't fall into
the small range below a power-of-two size.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Marek Olšák [Fri, 23 Nov 2018 23:27:00 +0000 (18:27 -0500)]
winsys/amdgpu: increase the VM alignment to the MSB of the size for Gfx9
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Marek Olšák [Wed, 21 Nov 2018 22:28:13 +0000 (17:28 -0500)]
winsys/amdgpu: use >= instead of > for VM address alignment
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Marek Olšák [Fri, 23 Nov 2018 23:20:49 +0000 (18:20 -0500)]
winsys/amdgpu: clean up code around BO VM alignment
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Marek Olšák [Wed, 21 Nov 2018 07:15:11 +0000 (02:15 -0500)]
winsys/amdgpu: optimize slab allocation for 2 MB amdgpu page tables
- the slab buffer size increased from 128 KB to 2 MB (PTE fragment size)
- the max suballocated buffer size increased from 64 KB to 256 KB,
this increases memory usage because it wastes memory
- the number of suballocators increased from 1 to 3 and they are layered
on top of each other to minimize unused space in slabs
The final increase in memory usage is:
DeusEx:MD: 1.8%
DOTA 2: 1.75%
DiRT Rally: 0.2%
The kernel driver will also receive fewer buffers.
Marek Olšák [Wed, 21 Nov 2018 07:10:14 +0000 (02:10 -0500)]
radeonsi: generalize the slab allocator code to allow layered slab allocators
There is no change in behavior. It just makes it easier to change the number
of slab allocators.
Marek Olšák [Wed, 21 Nov 2018 05:22:48 +0000 (00:22 -0500)]
winsys/amdgpu: always reclaim/release slabs if there is not enough memory
Marek Olšák [Tue, 20 Nov 2018 03:29:00 +0000 (22:29 -0500)]
radeonsi: fix is_oneway_access_only for bindless images
Marek Olšák [Tue, 20 Nov 2018 03:27:49 +0000 (22:27 -0500)]
radeonsi/nir: parse more information about bindless usage
fill more tgsi_shader_info fields.
Marek Olšák [Tue, 20 Nov 2018 03:27:15 +0000 (22:27 -0500)]
tgsi/scan: add more information about bindless usage
radeonsi will use this.
Marek Olšák [Tue, 20 Nov 2018 02:54:37 +0000 (21:54 -0500)]
radeonsi: small cleanup for memory opcodes
Marek Olšák [Tue, 20 Nov 2018 02:53:55 +0000 (21:53 -0500)]
radeonsi: fix is_oneway_access_only for image stores
We need to look at the Dst for image stores.
Marek Olšák [Tue, 20 Nov 2018 01:36:35 +0000 (20:36 -0500)]
radeonsi: use structured buffer intrinsics for image views
to stop using the workaround in si_make_buffer_descriptor.
Marek Olšák [Wed, 21 Nov 2018 01:58:17 +0000 (20:58 -0500)]
radeonsi: clean up primitive binning enablement
no change in behavior.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Dave Airlie [Wed, 28 Nov 2018 23:07:35 +0000 (09:07 +1000)]
virgl: fix undefined shift to use unsigned.
Ported from virglrenderer.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 11 Oct 2018 03:44:02 +0000 (13:44 +1000)]
r600: make suballocator 256-bytes align
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108311
Cc: <mesa-stable@lists.freedesktop.org>
Kenneth Graunke [Mon, 26 Nov 2018 22:58:54 +0000 (14:58 -0800)]
intel/compiler: Use nir's info when checking uses_streams.
Vulkan and Gallium don't use Mesa's gl_program data structure, so they
can't poke at 'prog'. But we can simply use the copy of the shader info
stored with the NIR shader, which is guaranteed to exist.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Jason Ekstrand [Mon, 19 Nov 2018 18:32:16 +0000 (12:32 -0600)]
nir/derefs: Add a nir_derefs_do_not_alias enum value
This makes some of the code more clear.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Gurchetan Singh [Wed, 28 Nov 2018 16:39:34 +0000 (08:39 -0800)]
egl: add missing #include <stddef.h> in egldevice.h
Otherwise, I get this error:
main/egldevice.h:54:13: error: ‘NULL’ undeclared (first use in this function)
dev = NULL;
^~~~
with this config:
./autogen.sh --enable-gles1 --enable-gles2 --with-platforms='surfaceless' --disable-glx
--with-dri-drivers="i965" --with-gallium-drivers="" --enable-gbm
v3: Use stddef.h (Matt)
v4: Modify commit message (Eric)
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Matt Turner [Wed, 21 Nov 2018 20:13:19 +0000 (12:13 -0800)]
gallivm: Use nextafterf(0.5, 0.0) as rounding constant
The common truncf(x + 0.5) fails for the floating-point value just less
than 0.5 (nextafterf(0.5, 0.0)). nextafterf(0.5, 0.0) + 0.5, after
rounding is 1.0, thus truncf does not produce the desired value.
The solution is to add nextafterf(0.5, 0.0) instead of 0.5 before
truncating. This works for all values.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Juan A. Suarez Romero [Wed, 28 Nov 2018 18:19:49 +0000 (19:19 +0100)]
docs: update calendar, add news item and link release notes for 18.2.6
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Juan A. Suarez Romero [Wed, 28 Nov 2018 18:14:21 +0000 (19:14 +0100)]
docs: add sha256 checksums for 18.2.6
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit
cfd1f8b92cae9dde3e5bed42109b5142f50a2ee5)
Juan A. Suarez Romero [Wed, 28 Nov 2018 17:39:26 +0000 (18:39 +0100)]
docs: add release notes for 18.2.6
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit
3e741344d79e3ae67b1ad645e7d56fe6c0fb2ae2)
Nicolai Hähnle [Wed, 28 Nov 2018 17:30:36 +0000 (18:30 +0100)]
egl/wayland: rather obvious build fix
Fixes:
ce74a7bb8de7 ("egl/wayland: plug memory leak in drm_handle_device()")
Fixes:
c59d3aa4b9bc ("egl/wayland: bail out when drmGetMagic fails")
Nicolai Hähnle [Wed, 21 Nov 2018 17:17:02 +0000 (18:17 +0100)]
winsys/amdgpu: explicitly declare whether buffer_map is permanent or not
Introduce a new driver-private transfer flag RADEON_TRANSFER_TEMPORARY
that specifies whether the caller will use buffer_unmap or not. The
default behavior is set to permanent maps, because that's what drivers
do for Gallium buffer maps.
This should eliminate the need for hacks in libdrm. Assertions are added
to catch when the buffer_unmap calls don't match the (temporary)
buffer_map calls.
I did my best to update r600 for consistency (r300 needs no changes
because it never calls buffer_unmap), even though the radeon winsys
ignores the new flag.
As an added bonus, this should actually improve the performance of
the normal fast path, because we no longer call into libdrm at all
after the first map, and there's one less atomic in the winsys itself
(there are now no atomics left in the UNSYNCHRONIZED fast path).
Cc: Leo Liu <leo.liu@amd.com>
v2:
- remove comment about visible VRAM (Marek)
- don't rely on amdgpu_bo_cpu_map doing an atomic write
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 21 Nov 2018 16:34:38 +0000 (17:34 +0100)]
winsys/amdgpu: add amdgpu_winsys_bo::lock
We'll use it in the upcoming mapping change. Sparse buffers have always
had one.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Eric Engestrom [Tue, 20 Nov 2018 17:35:27 +0000 (17:35 +0000)]
vulkan/wsi: fix s/,/;/ typo
Fixes:
59e58c348e6af16a5f2dd "vulkan/wsi: Only wait on semaphores on the first swapchain"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Emil Velikov [Tue, 27 Nov 2018 11:36:01 +0000 (11:36 +0000)]
egl/wayland: plug memory leak in drm_handle_device()
As we fail to open the node, we leak the node/device name.
v2: Log and then free() (Eric)
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Emil Velikov [Fri, 23 Nov 2018 12:55:38 +0000 (12:55 +0000)]
egl/wayland: bail out when drmGetMagic fails
Currently as the function fails, we pass uninitialized data to the
authentication function. Stop doing that and print an warning when
the function fails.
v2: Plug memory leak in error path (Eric)
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Eric Engestrom [Tue, 27 Nov 2018 13:34:37 +0000 (13:34 +0000)]
wsi/display: fix mem leak when freeing swapchains
Fixes:
da997ebec92942193955 "vulkan: Add KHR_display extension using DRM [v10]"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Keith Packard <keithp@keithp.com>
Gert Wollny [Thu, 22 Nov 2018 18:00:03 +0000 (19:00 +0100)]
i965: Set the FBO error state INCOMPLETE_ATTACHMENT only for SRGB_R8
Originally the driver reported GL_FRAMEBUFFER_UNSUPPORTED in all cases,
adding more specific error messages was not correct and broke many tests.
Mostly revert this and only report GL_FRAMEBUFFER_INCOMPLETE_ATTACHMENT
for MESA_FORMAT_R_SRGB8.
Fixes:
ebcde3454552adc6d3fea8af2207aafaba857796
i965: be more specific about FBO completeness errors
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108805
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Gert Wollny [Thu, 22 Nov 2018 18:00:02 +0000 (19:00 +0100)]
i965: Explicitely handle swizzles for MESA_FORMAT_R_SRGB8
The format is emulated by using ISL_FORMAT_L8_SRGB, therefore we need to
force swizzles for the GBA channels. However, doing this only based on the
data type GL_RED breaks other formats, therefore, test specifically for the
format.
Fixes:
c5363869d4971780401b21bb75083ef2518c12be
i965: Force zero swizzles for unused components in GL_RED and GL_RG
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Gert Wollny [Tue, 27 Nov 2018 19:50:44 +0000 (20:50 +0100)]
virgl: Don't try handling server fences when they are not supported
vtest doesn't implement the according API and would segfault:
Program received signal SIGSEGV, Segmentation fault.
#0 0x0000000000000000 in ?? ()
#1 in virgl_fence_server_sync at
src/gallium/drivers/virgl/virgl_context.c:1049
#2 in st_server_wait_sync at
src/mesa/state_tracker/st_cb_syncobj.c:155
so just don't do the call when the function pointers are not set.
Fixes dEQP:
dEQP-GLES3.functional.fence_sync.wait_sync_smalldraw
dEQP-GLES3.functional.fence_sync.wait_sync_largedraw
Fixes:
d1a1c21e7621b5177febf191fcd3d3b8ef69dc96
virgl: native fence fd support
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Gert Wollny [Tue, 27 Nov 2018 19:50:43 +0000 (20:50 +0100)]
virgl,vtest: Initialize return value
Avoids:
Conditional jump or move depends on uninitialised value(s)
at 0x9E2B39F: virgl_vtest_winsys_resource_cache_create (virgl_vtest_winsys.c:379)
by 0x9E2725F: virgl_buffer_create (virgl_buffer.c:169)
by 0x9E246D5: virgl_resource_create (virgl_resource.c:60)
by 0xA0C1B9F: bufferobj_data (st_cb_bufferobjects.c:344)
by 0xA0C1B9F: st_bufferobj_data (st_cb_bufferobjects.c:390)
by 0x9F4ACE3: vbo_use_buffer_objects (vbo_exec_api.c:1136)
by 0xA0C68C3: st_create_context_priv (st_context.c:416)
by 0xA0C707A: st_create_context (st_context.c:598)
by 0x9F81C6B: st_api_create_context (st_manager.c:918)
by 0x9BBE591: dri_create_context (dri_context.c:161)
by 0x9BB6931: driCreateContextAttribs (dri_util.c:473)
by 0x4E97A44: drisw_create_context_attribs (drisw_glx.c:630)
by 0x4E7C591: glXCreateContextAttribsARB (create_context.c:78)
Uninitialised value was created by a stack allocation
at 0x9E2B249: virgl_vtest_winsys_resource_cache_create (virgl_vtest_winsys.c:342)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Iago Toral Quiroga [Tue, 27 Nov 2018 07:57:13 +0000 (08:57 +0100)]
intel/compiler: fix register allocation in opt_peephole_sel
This wasn't handling 64-bit cases properly. Found by inspection.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Tue, 30 Oct 2018 12:36:02 +0000 (05:36 -0700)]
glsl: Remove unused member variable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Matt Turner [Mon, 26 Nov 2018 19:29:41 +0000 (11:29 -0800)]
nir: Call fflush() at the end of nir_print_shader()
We normally call with stderr which is unbuffered, so this won't affect
that, but it does let me call nir_print_shader(nir, fopen("log", "w+"))
from gdb and actually get the whole shader in my file.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Eric Anholt [Sat, 27 Oct 2018 01:02:20 +0000 (18:02 -0700)]
v3d: Add renderonly support.
I've been using this with the kmsro series to test v3d on VKMS without my
old KMS hack in the v3d kernel driver. KMSRO still needs some cleanup,
but v3d RO support seems reasonable.
Eric Anholt [Tue, 27 Nov 2018 19:25:09 +0000 (11:25 -0800)]
gallium: Remove unused variable in u_tests.
Fixes:
0d17b685b1ff ("gallium/u_tests: add a compute shader test that clears an image")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bas Nieuwenhuizen [Mon, 26 Nov 2018 02:28:05 +0000 (03:28 +0100)]
radv: Align large buffers to the fragment size.
Improves performance in Talos by about 15% (and significant improvements
in RotR and possibly other but did not bench with final patch) on
kernel 4.19 and earlier.
On 4.20+ a similar effect comes from
433ca054949a "drm/amdgpu: try allocating VRAM as power of two"
v2: Do not impact the alignment of the physical memory.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
Hyunjun Ko [Wed, 7 Nov 2018 02:30:31 +0000 (11:30 +0900)]
freedreno: implements get_sample_position
Since
1285f71d3e landed, it needs to provide apps with proper sample
position for MSAA.
Currently no way to query this to hw, these are taken from blob driver.
Fixes: dEQP-GLES31.functional.texture.multisample.samples_#.sample_position
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 23 Nov 2018 16:30:34 +0000 (11:30 -0500)]
freedreno/a3xx: also set FSSUPERTHREADENABLE
We set equiv bit in SP_FS_CTRL_REG0. Somehow the hw doesn't hang with
this mismatched config, but does run slower. It is faster with either
neither bit set, or both bits set, but both is the fastest of the three
configurations. Worth a bit over 10% gain in glmark2.
Spotted-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jonathan Marek [Mon, 19 Nov 2018 21:02:15 +0000 (16:02 -0500)]
freedreno: use MSM_BO_SCANOUT with scanout buffers
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Jonathan Marek [Tue, 13 Nov 2018 16:42:33 +0000 (11:42 -0500)]
freedreno: use GENERIC instead of TEXCOORD for blit program
blip_fp uses GENERIC as input, so blit_vp should match for linking
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jonathan Marek [Tue, 13 Nov 2018 16:40:03 +0000 (11:40 -0500)]
freedreno: a2xx texture update
Adds all missing texture related logic. For everything to work it also
needs changes to ir2/fd2_program, which are part of the ir2 update patch.
Note: it needs rnndb update
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
[remove stray patch]
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jonathan Marek [Tue, 13 Nov 2018 16:30:31 +0000 (11:30 -0500)]
freedreno/a2xx: Compute depth base in gmem correctly
Note: it needs rnndb update
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jonathan Marek [Tue, 13 Nov 2018 16:26:38 +0000 (11:26 -0500)]
freedreno/a2xx: set VIZ_QUERY_ID on a20x
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jonathan Marek [Tue, 13 Nov 2018 16:19:39 +0000 (11:19 -0500)]
freedreno: add missing a20x ids
200: 256KiB GMEM A200 (imx53)
201: 128KiB GMEM A200 (imx51)
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jonathan Marek [Tue, 13 Nov 2018 16:17:48 +0000 (11:17 -0500)]
freedreno/a2xx: fix POINT_MINMAX_MAX overflow
As it stands, it overflows to zero.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jonathan Marek [Tue, 13 Nov 2018 16:04:32 +0000 (11:04 -0500)]
freedreno: a2xx: fd2_draw update
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jonathan Marek [Mon, 12 Nov 2018 17:49:32 +0000 (12:49 -0500)]
nir: add fceil lowering
lowers ceil(x) as -floor(-x)
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sun, 18 Nov 2018 15:02:47 +0000 (10:02 -0500)]
freedreno: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 19 Nov 2018 15:24:40 +0000 (10:24 -0500)]
freedreno/a6xx: set guardband clip
On older gens, the CLIP_ADJ bitfields were actually 3.6 fixed point.
Which might make more sense. Although this formula comes up with values
pretty close to what blob does for various viewport sizes (for at least
a5xx and a6xx), and seems to work.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 13 Nov 2018 19:49:25 +0000 (14:49 -0500)]
freedreno/a6xx: disable LRZ for z32
f6131d4ec7a had the side effect of enabling LRZ w/ 32b depth buffers.
But there are some bugs with this, which aren't fully understood yet,
so for now just skip LRZ w/ z32..
Fixes:
f6131d4ec7a freedreno/a6xx: Clear z32 and separate stencil with blitter
Signed-off-by: Rob Clark <robdclark@gmail.com>
Kristian H. Kristensen [Fri, 19 Oct 2018 21:29:49 +0000 (14:29 -0700)]
freedreno/a6xx: Clear gmem buffers at flush time
We generate an IB to clear the gmem at flush time and jump to it
before rendering each tile. This lets us get rid of the command stream
patching for gmem offsets.
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Kristian H. Kristensen [Wed, 24 Oct 2018 07:00:50 +0000 (00:00 -0700)]
freedreno/a6xx: Move resolve blits to an IB
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Kristian H. Kristensen [Wed, 24 Oct 2018 06:50:34 +0000 (23:50 -0700)]
freedreno/a6xx: Move restore blits to IB
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 13 Nov 2018 19:19:38 +0000 (14:19 -0500)]
mesa/st: better colormask check for clear fallback
For RGB surfaces (for example) we don't really care that the colormask
is 0x7 instead of 0xf. This should not trigger clear_with_quad()
slowpath.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Rob Clark [Tue, 13 Nov 2018 18:40:58 +0000 (13:40 -0500)]
mesa/st: swap order of clear() and clear_with_quad()
If we can't clear all the buffers with pctx->clear() (say, for example,
because of ColorMask), push the buffers we *can* clear with pctx->clear()
first. Tilers want to see clears coming before draws to enable fast-
paths, and clearing one of the attachments with a quad-draw first
confuses that logic.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Rob Clark [Sat, 10 Nov 2018 17:05:59 +0000 (12:05 -0500)]
freedreno: move ir3 to common location
Move (most of) the ir3 compiler to src/freedreno/ir3 so that it can be
re-used by some future vulkan driver. The parts that are gallium
specific have been refactored out and remain in the gallium driver.
Getting the move done now so that it can happen before further
refactoring to support a6xx specific instructions.
NOTE also removes ir3_cmdline compiler tool from autotools build since
that was easier than fixing it and I normally use meson build. Waiting
patiently for the day that we can remove *everything* from the autotools
build.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 10 Nov 2018 15:32:36 +0000 (10:32 -0500)]
freedreno/ir3: remove u_inlines usage
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 10 Nov 2018 15:11:18 +0000 (10:11 -0500)]
freedreno/ir3: split up ir3_shader
Split the parts that are gallium specific into ir3_gallium so the rest
can move to a common location outside of gallium.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 9 Nov 2018 19:46:28 +0000 (14:46 -0500)]
freedreno/ir3: remove pipe_stream_output_info dependency
A bit annoying to have to copy into our own struct. But this is
something the compiler really needs to know, at least on earlier
generations where streamout is implemented in shader.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 9 Nov 2018 14:40:20 +0000 (09:40 -0500)]
freedreno/ir3: some header file cleanup
Clean up some of the low-hanging-fruit usages of freedreno_util.h
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 9 Nov 2018 18:49:55 +0000 (13:49 -0500)]
freedreno/ir3: use env_var_as_unsigned()
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 9 Nov 2018 18:28:36 +0000 (13:28 -0500)]
util: env_var_as_unsigned() helper
So I can drop env2u() helper from freedreno_util.h and get rid of one
small ir3 dependency on gallium/freedreno
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 9 Nov 2018 16:08:16 +0000 (11:08 -0500)]
freedreno/ir3: move disasm and optmsgs debug flags
Move them to IR3_SHADER_DEBUG so we can remove ir3's dependency on
fd_mesa_debug.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 9 Nov 2018 15:57:18 +0000 (10:57 -0500)]
freedreno: FD_SHADER_DEBUG -> IR3_SHADER_DEBUG
Only used by ir3, so move it into ir3 to be more self contained.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 9 Nov 2018 15:50:48 +0000 (10:50 -0500)]
freedreno: remove shader_stage_name()
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 9 Nov 2018 15:47:14 +0000 (10:47 -0500)]
freedreno: shader_t -> gl_shader_stage
Just massive search/replace for the most part.
Step towards removing ir3 dependency on disasm.h which is shared by
a2xx. One step closer to being able to move ir3 out of gallium.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 9 Nov 2018 14:17:03 +0000 (09:17 -0500)]
freedreno/ir3: standalone compiler updates
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sun, 11 Nov 2018 15:10:46 +0000 (10:10 -0500)]
freedreno: move drm to common location
So that we can re-use at least parts of it for vulkan driver, and so
that we can move ir3 to a common location (which uses fd_bo to allocate
storage for shaders)
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sun, 11 Nov 2018 15:16:30 +0000 (10:16 -0500)]
freedreno/drm: remove dependency on gallium driver
Prep work to move drm to a common location.
Slightly hacky, but the softpin debug flag is only temporary.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Dylan Baker [Fri, 9 Nov 2018 18:40:15 +0000 (10:40 -0800)]
util: promote u_memory to src/util
as well as os_memory*
Reviewed-by: Rob Clark <robdclark@gmail.com>
Eric Anholt [Mon, 26 Nov 2018 21:11:31 +0000 (13:11 -0800)]
gallium: Fix uninitialized variable warning in compute test.
The compiler doesn't know that ny != 0, so x might be uninitialized for
the printf at the end.
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>