OSDN Git Service
Max Kazantsev [Tue, 19 Feb 2019 11:13:58 +0000 (11:13 +0000)]
[NFC] Store loop header in a local to keep it available after the loop is deleted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354313
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Diana Picus [Tue, 19 Feb 2019 10:26:47 +0000 (10:26 +0000)]
[ARM GlobalISel] Support G_PHI for Thumb2
Same as arm mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354310
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Fangrui Song [Tue, 19 Feb 2019 05:16:52 +0000 (05:16 +0000)]
[Dominators] Fix and optimize edge insertion of depth-based search
Summary:
After (x,y) is inserted, depth-based search finds all affected v that satisfies:
depth(nca(x,y))+1 < depth(v) && there exists a path P from y to v where every w on P satisfies depth(v) <= depth(w)
This reduces to a widest path problem (maximizing the depth of the
minimum vertex in the path) which can be solved by a modified version of
Dijkstra with a bucket queue (named depth-based search in the paper).
The algorithm visits vertices in decreasing order of bucket number.
However, the current code misused priority_queue to extract them in
increasing order. I cannot think of a failing scenario but it surely may
process vertices more than once due to the local usage of Processed.
This patch fixes this bug and simplifies/optimizes the code a bit. Also
add more comments.
Reviewers: kuhar
Reviewed By: kuhar
Subscribers: kristina, jdoerfert, llvm-commits, NutshellySima, brzycki
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D58349
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354306
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Craig Topper [Tue, 19 Feb 2019 03:04:14 +0000 (03:04 +0000)]
[X86] Remove command line strings from the ProcIntel* features.
These should always follow the CPU string. There's no reason to control them independently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354304
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Jessica Paquette [Mon, 18 Feb 2019 23:33:24 +0000 (23:33 +0000)]
[GlobalISel][AArch64] Legalize + select some llvm.ctlz.* intrinsics
Legalize/select llvm.ctlz.*
Add select-ctlz to show that we actually select them. Update arm64-clrsb.ll and
arm64-vclz.ll to show that we perform valid transformations in optimized builds,
and document where GISel can improve.
Differential Revision: https://reviews.llvm.org/D58155
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354299
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Sanjay Patel [Mon, 18 Feb 2019 23:33:05 +0000 (23:33 +0000)]
[CGP] form usub with overflow from sub+icmp
The motivating x86 cases for forming the intrinsic are shown in PR31754 and PR40487:
https://bugs.llvm.org/show_bug.cgi?id=31754
https://bugs.llvm.org/show_bug.cgi?id=40487
..and those are shown in the IR test file and x86 codegen file.
Matching the usubo pattern is harder than uaddo because we have 2 independent values rather than a def-use.
This adds a TLI hook that should preserve the existing behavior for uaddo formation, but disables usubo
formation by default. Only x86 overrides that setting for now although other targets will likely benefit
by forming usbuo too.
Differential Revision: https://reviews.llvm.org/D57789
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354298
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Changpeng Fang [Mon, 18 Feb 2019 23:00:26 +0000 (23:00 +0000)]
AMDGPU: Use MachineInstr::mayAlias to replace areMemAccessesTriviallyDisjoint in LoadStoreOptimizer pass.
Summary:
This is to fix a memory dependence bug in LoadStoreOptimizer.
Reviewers:
arsenm, rampitec
Differential Revision:
https://reviews.llvm.org/D58295
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354295
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Matt Arsenault [Mon, 18 Feb 2019 22:39:27 +0000 (22:39 +0000)]
GlobalISel: Implement widenScalar for g_extract scalar results
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354293
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Matt Arsenault [Mon, 18 Feb 2019 22:39:22 +0000 (22:39 +0000)]
GlobalISel: Make buildExtract use DstOp/SrcOp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354292
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Matt Arsenault [Mon, 18 Feb 2019 17:01:09 +0000 (17:01 +0000)]
GlobalISel: Fix double count of offset for irregular vector breakdowns
Fixes cases with odd vectors that break into multiple requested size
pieces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354280
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Sanjay Patel [Mon, 18 Feb 2019 16:46:12 +0000 (16:46 +0000)]
[x86] split more v8f32/v8i32 shuffles in lowering
Similar to D57867 - this is a small patch with lots of test diffs.
With half-vector-width narrowing potential, using an extract + 128-bit vshufps
is a win because it replaces a 256-bit shuffle with a 128-bit shufle.
This seems like it should be a win even for targets with 'fast-variable-shuffle',
but we are intentionally deferring that to an independent change to make sure
that is true.
Differential Revision: https://reviews.llvm.org/D58181
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354279
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Sanjay Patel [Mon, 18 Feb 2019 16:04:22 +0000 (16:04 +0000)]
Revert "[InstCombine] reduce even more unsigned saturated add with 'not' op"
This reverts commit
079b610c29b4a428b3ae7b64dbac0378facf6632.
Bots are failing after this change on a stage 2 compile of clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354277
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Sanjay Patel [Mon, 18 Feb 2019 15:21:39 +0000 (15:21 +0000)]
[InstCombine] reduce even more unsigned saturated add with 'not' op
We want to use the sum in the icmp to allow matching with
m_UAddWithOverflow and eliminate the 'not'. This is discussed
in D51929 and is another step towards solving PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
Name: uaddsat, -1 fval
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ugt i32 %notx, %y
%r = select i1 %c, i32 %a, i32 -1
=>
%a = add i32 %x, %y
%c2 = icmp ugt i32 %y, %a
%r = select i1 %c2, i32 -1, i32 %a
Name: uaddsat, -1 fval + ult
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ult i32 %y, %notx
%r = select i1 %c, i32 %a, i32 -1
=>
%a = add i32 %x, %y
%c2 = icmp ugt i32 %y, %a
%r = select i1 %c2, i32 -1, i32 %a
https://rise4fun.com/Alive/nTp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354276
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Andrea Di Biagio [Mon, 18 Feb 2019 14:15:25 +0000 (14:15 +0000)]
[MCA] Correctly update register definitions in the PRF after move elimination.
This patch fixes a bug where register writes performed by optimizable register
moves were sometimes wrongly treated like partial register updates. Before this
patch, llvm-mca wrongly predicted a 1.50 IPC for test reg-move-elimination-6.s
(added by this patch). With this patch, llvm-mca correctly updates the register
defintions in the PRF, and the IPC for that test is now correctly reported as 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354271
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George Rimar [Mon, 18 Feb 2019 13:58:12 +0000 (13:58 +0000)]
[llvm-readobj] - Simplify .gnu.version_d dumping.
This is similar to D58048.
Instead of scanning the dynamic table to read the
DT_VERDEFNUM, we could take it from the sh_info field.
(https://docs.oracle.com/cd/E19683-01/816-1386/chapter6-94076/index.html)
The patch does this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354270
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Serge Guelton [Mon, 18 Feb 2019 12:07:12 +0000 (12:07 +0000)]
[NFC] Make Optional<T> trivially copyable when T is trivially copyable
This is a follow-up to r354246 and a reimplementation of https://reviews.llvm.org/D57097?id=186600
that should not trigger any UB thanks to the use of an union.
This may still be subject to the problem solved by std::launder, but I'm unsure how it interacts whith union.
/me plans to revert if this triggers any relevant bot failure. At least this validates in Release mode with
clang 6.0.1 and gcc 4.8.5.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354264
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Andrea Di Biagio [Mon, 18 Feb 2019 11:27:11 +0000 (11:27 +0000)]
[MCA] Slightly refactor method writeStartEvent in WriteState and ReadState. NFCI
This is another change in preparation for PR37494.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354261
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Guillaume Chatelet [Mon, 18 Feb 2019 10:08:20 +0000 (10:08 +0000)]
[llvm-exegesis] [NFC] Fixing typo.
Reviewers: courbet, gchatelet
Reviewed By: courbet, gchatelet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D54895
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354250
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Serge Guelton [Mon, 18 Feb 2019 08:46:32 +0000 (08:46 +0000)]
Recommit [NFC] Better encapsulation of llvm::Optional Storage
Second attempt, trying to navigate out of the UB zone using
union for storage instead of raw bytes.
I'm prepared to revert that commit as soon as validation breaks,
which is likely to happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354246
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Clement Courbet [Mon, 18 Feb 2019 08:24:29 +0000 (08:24 +0000)]
Revert r354244 "[DAGCombiner] Eliminate dead stores to stack."
Breaks some bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354245
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Clement Courbet [Mon, 18 Feb 2019 07:59:01 +0000 (07:59 +0000)]
[DAGCombiner] Eliminate dead stores to stack.
Summary:
A store to an object whose lifetime is about to end can be removed.
See PR40550 for motivation.
Reviewers: niravd
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D57541
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354244
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Craig Topper [Mon, 18 Feb 2019 06:46:17 +0000 (06:46 +0000)]
[MC] Make SubtargetFeatureKV only store one FeatureBitset and use an 'unsigned' to hold the value.
This class is used for two difference tablegen generated tables. For one of the tables the Value FeatureBitset only has one bit set. For the other usage the Implies field was unused.
This patch changes the Value field to just be an unsigned. For the usage that put a real vector in bitset, we now use the previously unused Implies field and leave the Value field unused instead.
This is good for a 16K reduction in the size of llc on my local build with all targets enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354243
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Nico Weber [Mon, 18 Feb 2019 01:36:52 +0000 (01:36 +0000)]
gn build: Merge r354156
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354242
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Serge Guelton [Sun, 17 Feb 2019 23:01:41 +0000 (23:01 +0000)]
Revert [NFC] Better encapsulation of llvm::Optional Storage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354240
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Serge Guelton [Sun, 17 Feb 2019 22:54:23 +0000 (22:54 +0000)]
[NFC] Better encapsulation of llvm::Optional Storage, part II
Fix for better Windows support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354239
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Serge Guelton [Sun, 17 Feb 2019 22:41:14 +0000 (22:41 +0000)]
[NFC] Better encapsulation of llvm::Optional Storage
Second attempt, trying to navigate out of the UB zone using
union for storage instead of raw bytes.
I'm prepared to revert that commit as soon as validation breaks,
which is likely to happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354238
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Robert Widmann [Sun, 17 Feb 2019 21:25:47 +0000 (21:25 +0000)]
[LLVM-C] Add bindings to create enumerators
Summary: The C API don't have the bindings to create enumerators, needed to create an enumeration.
Reviewers: whitequark, CodaFi, harlanhaskins, deadalnix
Reviewed By: whitequark, CodaFi, harlanhaskins
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D58323
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354237
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Sanjay Patel [Sun, 17 Feb 2019 20:01:59 +0000 (20:01 +0000)]
[InstCombine] add even more tests for unsigned saturated add; NFC
The pattern-matching from rL354221 / rL354224 doesn't cover
these, so we're up to 8 different commuted possibilities.
There may still be 1 more variant of this pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354236
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Craig Topper [Sun, 17 Feb 2019 19:23:49 +0000 (19:23 +0000)]
[X86] In FP_TO_INTHelper, when moving data from SSE register to X87 register file via the stack, use the same stack slot we use for the integer conversion.
No need for a separate stack slot. The lifetimes don't overlap.
Also fix the MachinePointerInfo for the final load after the integer conversion to indicate it came from the stack slot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354234
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Max Kazantsev [Sun, 17 Feb 2019 18:22:00 +0000 (18:22 +0000)]
[TEST] Remove 2>&1 from tests
Avoid confusing CHECKS with debug dumps of sets that can be printed differently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354229
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Max Kazantsev [Sun, 17 Feb 2019 18:21:51 +0000 (18:21 +0000)]
[NFC] Teach getInnermostLoopFor walk up the loop trees
This should be NFC in current use case of this method, but it will
help to use it for solving more compex tasks in follow-up patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354227
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Nikita Popov [Sun, 17 Feb 2019 17:40:47 +0000 (17:40 +0000)]
[SelectionDAG] Extract [US]MULO expansion into TL method; NFC
In preparation for supporting vector expansion.
Add an isPostTypeLegalization flag to makeLibCall(), because this
expansion relies on the legalized form using MERGE_VALUES. Drop
the corresponding variant of ExpandLibCall, which is no longer used.
Differential Revision: https://reviews.llvm.org/D58006
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354226
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Sanjay Patel [Sun, 17 Feb 2019 16:48:50 +0000 (16:48 +0000)]
[InstCombine] reduce more unsigned saturated add with 'not' op
We want to use the sum in the icmp to allow matching with
m_UAddWithOverflow and eliminate the 'not'. This is discussed
in D51929 and is another step towards solving PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
Name: not op
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ult i32 %notx, %y
%r = select i1 %c, i32 -1, i32 %a
=>
%a = add i32 %x, %y
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a
Name: not op ugt
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ugt i32 %y, %notx
%r = select i1 %c, i32 -1, i32 %a
=>
%a = add i32 %x, %y
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a
https://rise4fun.com/Alive/niom
(The matching here is still incomplete.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354224
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Sanjay Patel [Sun, 17 Feb 2019 16:44:11 +0000 (16:44 +0000)]
[InstCombine] add more tests for unsigned saturated add; NFC
Extend the pattern-matching from rL354219 / rL354221.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354223
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Sanjay Patel [Sun, 17 Feb 2019 15:58:48 +0000 (15:58 +0000)]
[InstCombine] reduce unsigned saturated add with 'not' op
We want to use the sum in the icmp to allow matching with
m_UAddWithOverflow and eliminate the 'not'. This is discussed
in D51929 and is another step towards solving PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
(The matching here is incomplete. Trying to take minimal steps
to make sure we don't induce infinite looping from existing
canonicalizations of the 'select'.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354221
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Max Kazantsev [Sun, 17 Feb 2019 15:22:48 +0000 (15:22 +0000)]
[NFC] Fix name and clarifying comment for factored-out function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354220
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Sanjay Patel [Sun, 17 Feb 2019 15:09:41 +0000 (15:09 +0000)]
[InstCombine] add tests for unsigned saturated add; NFC
We're missing IR canonicalizations for this op as shown in D51929.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354219
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Max Kazantsev [Sun, 17 Feb 2019 15:04:09 +0000 (15:04 +0000)]
[NFC] Factor out a function for future reuse
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354218
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Serge Guelton [Sun, 17 Feb 2019 14:59:21 +0000 (14:59 +0000)]
Revert [NFC] Better encapsulation of llvm::Optional Storage
I'm getting the feealing that current Optional implementation is full of UB :-/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354217
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Serge Guelton [Sun, 17 Feb 2019 13:12:42 +0000 (13:12 +0000)]
[NFC] Better encapsulation of llvm::Optional Storage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354214
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Kristina Brooks [Sun, 17 Feb 2019 01:52:18 +0000 (01:52 +0000)]
[LLVMSupport]: Remove a severely outdated README.
The LLVM Support library implementation has resided in
//llvm/lib/Support for a significant amount of time now,
with documentation having been updated with all references
to the "System library" being replaced with "Support library".
Since this file mirrors already existing documentation available
for Support library, includes dead links to documentation and
still refers to it as "System library", having it there is
confusing and updating it has very little point as it duplicates
information in documentation, except documentation is a lot more
up to date while this file has not been maintained.
Up to date documentation concerning this can be found here:
http://llvm.org/docs/SupportLibrary.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354209
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whitequark [Sat, 16 Feb 2019 22:33:10 +0000 (22:33 +0000)]
[bindings/go] Fix building on 32-bit systems (ARM etc.)
Summary:
The patch in https://reviews.llvm.org/D53883 (by me) fails to build on 32-bit systems like ARM. Fix the array size to be less ridiculously large. 2<<20 should still be enough for all practical purposes.
Bug: https://bugs.llvm.org/show_bug.cgi?id=40426
Reviewers: whitequark, pcc
Reviewed By: whitequark
Subscribers: javed.absar, kristof.beyls, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D58030
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354207
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Wilfred Hughes [Sat, 16 Feb 2019 18:37:55 +0000 (18:37 +0000)]
Fixed code snippet in Kaleidoscope tutorial to reflect final full code listing
Patch by Frank He.
Differential Revision: https://reviews.llvm.org/D52166
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354205
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Dmitri Gribenko [Sat, 16 Feb 2019 14:51:44 +0000 (14:51 +0000)]
Fix typo in docs
Patch by Alex Yursha.
Differential Revision: https://reviews.llvm.org/D45903
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354203
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Serge Guelton [Sat, 16 Feb 2019 09:47:23 +0000 (09:47 +0000)]
Revert r354199: Make Optional<T> Trivially Copyable when T is trivially copyable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354200
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Serge Guelton [Sat, 16 Feb 2019 09:19:58 +0000 (09:19 +0000)]
Make Optional<T> Trivially Copyable when T is trivially copyable
This is another attempt in the process, works nicely on my setup,
let's check how it behaves on other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354199
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Craig Topper [Sat, 16 Feb 2019 08:25:42 +0000 (08:25 +0000)]
[X86] When type legalizing the result of a i64 fp_to_uint on 32-bit targets. Generate all of the ops as i64 and let them be legalized.
No need to manually split everything. We can let the type legalizer work for us.
The test change seems to be caused by some DAG ordering issue that was previously circumventing a one use check in LowerSELECT where FP selects are turned into blends if the setcc has one use. But it was running after an integer select and the same setcc had been legalized to cmov and X86SISD::CMP. This dropped the use count of the setcc, but wasn't what was intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354197
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Dave Lee [Sat, 16 Feb 2019 06:59:49 +0000 (06:59 +0000)]
llvm-nm: Observe -no-llvm-bc for archive members
Summary:
This change fixes the `-no-llvm-bc` flag to work with object files within
archives. Currently the `-no-llvm-bc` flag works for regular object files, but
not static libraries, where it continues to show bitcode symbol info.
Original support was added in D4371.
Reviewers: compnerd, smeenai, pcc
Reviewed By: compnerd
Subscribers: rupprecht, keith, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D48798
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354196
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Petr Hosek [Sat, 16 Feb 2019 03:57:35 +0000 (03:57 +0000)]
[CMake] Use variables rather than ":" delimiters
This is a follow up to D37644, this block was missed in that change.
Differential Revision: https://reviews.llvm.org/D58093
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354194
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Craig Topper [Sat, 16 Feb 2019 03:34:54 +0000 (03:34 +0000)]
[X86] Don't prevent load folding for cvtsi2ss/cvtsi2sd based on hasPartialRegUpdate.
Preventing the load fold won't fix the partial register update since the
input we can fold is a GPR. So it will do nothing to prevent a false dependency
on an XMM register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354193
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Julian Lettner [Sat, 16 Feb 2019 00:44:00 +0000 (00:44 +0000)]
[lit] Remove LitTestCase
From the docs: `class LitTestCase(unittest.TestCase)`
LitTestCase is an adaptor for providing a 'unittest' compatible
interface to 'lit' tests so that we can run lit tests with standard
python test runners.
It does not seem to be used anywhere.
Differential Revision: https://reviews.llvm.org/D58264
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354188
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Julian Lettner [Sat, 16 Feb 2019 00:40:40 +0000 (00:40 +0000)]
[lit][NFC] Cleanup lit worker process handling
Move code that is executed on worker process to separate file. This
makes the use of the pickled arguments stored in global variables in the
worker a bit clearer. (Still not pretty though.)
Extract handling of parallelism groups to it's own function.
Use BoundedSemaphore instead of Semaphore. BoundedSemaphore raises for
unmatched release() calls.
Cleanup imports.
Differential Revision: https://reviews.llvm.org/D58196
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354187
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Alina Sbirlea [Fri, 15 Feb 2019 22:47:54 +0000 (22:47 +0000)]
[EarlyCSE & MSSA] Cap the clobbering calls in EarlyCSE.
Summary:
Unlimitted number of calls to getClobberingAccess can lead to high
compile times in pathological cases.
Limitting getClobberingAccess to a fairly high number. Can be adjusted
based on users/need.
Note: this is the only user of MemorySSA currently enabled by default.
The same handling exists in LICM (disabled atm). As MemorySSA gains more
users, this logic of capping will need to move inside MemorySSA.
Reviewers: george.burgess.iv
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D58248
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354182
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Craig Topper [Fri, 15 Feb 2019 21:59:33 +0000 (21:59 +0000)]
[X86] Don't set exception mask bits when modifying FPCW to change rounding mode for fp->int conversion
When we need to do an fp->int conversion using x87 instructions, we need to temporarily change the rounding mode to 0b11 and perform a store. To do this we save the old value of the fpcw to the stack, then set the fpcw to 0xc7f, do the store, then restore fpcw. But the 0xc7f value forces the exception mask bits 1. While this is what they would be in the default FP environment, as we move to support changing the FP environments, we shouldn't make this assumption.
This patch changes the code to explicitly OR 0xc00 with the old value so that only the rounding mode is changed. Unfortunately, this requires two stack temporaries instead of one. One to hold the old value and one to hold the new value. Without two stack temporaries we would need an additional GPR. We already need one to do the OR operation in. This is similar to what gcc and icc do for this operation. Though they are both better at reusing the stack temporaries when there are multiple truncates in a function(or at least in a basic block)
Differential Revision: https://reviews.llvm.org/D57788
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354178
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Philip Reames [Fri, 15 Feb 2019 21:31:39 +0000 (21:31 +0000)]
[InstCombine] Address a couple stylistic issues pointed out by reviewer [NFC]
Better addressing comments from https://reviews.llvm.org/D58290.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354171
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Philip Reames [Fri, 15 Feb 2019 21:23:51 +0000 (21:23 +0000)]
[InstCombine] Convert atomicrmws to xchg or store where legal
Implement two more transforms of atomicrmw:
1) We can convert an atomicrmw which produces a known value in memory into an xchg instead.
2) We can convert an atomicrmw xchg w/o users into a store for some orderings.
Differential Revision: https://reviews.llvm.org/D58290
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354170
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Shoaib Meenai [Fri, 15 Feb 2019 20:40:26 +0000 (20:40 +0000)]
[docs] Document LLVM_ENABLE_IDE
Use some of the wording and the motivating example from r344555. The
lack of documentation was pointed out by Roman Lebedev.
Differential Revision: https://reviews.llvm.org/D58286
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354167
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Nirav Dave [Fri, 15 Feb 2019 20:01:55 +0000 (20:01 +0000)]
[X86] Fix LowerAsmOutputForConstraint.
Summary:
Update Flag when generating cc output.
Fixes PR40737.
Reviewers: rnk, nickdesaulniers, craig.topper, spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D58283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354163
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Craig Topper [Fri, 15 Feb 2019 19:21:39 +0000 (19:21 +0000)]
[X86] Move all the SSE legality checks out of FP_TO_INTHelper and up to LowerFP_TO_INT. NFCI
These checks aren't needed on the call to FP_TO_INTHelper from the type legalizer for splitting i64. We always want to use X87 FIST/FISTT to memory there.
Moving up the SSE checks will allow this routine to focus on what it cares about and makes its return semantics cleaner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354161
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Jonas Paulsson [Fri, 15 Feb 2019 19:13:55 +0000 (19:13 +0000)]
Recommit "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support."
It seems there were some problem with using a .mir test. For some reason
doing '-stop-before=codegenprepare' and then '-start-before=codegenprepare'
on the output .mir file results in the NoVRegs Property after instruction
selection.
Recommitting the same test as an .ll file instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354160
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Vedant Kumar [Fri, 15 Feb 2019 18:46:58 +0000 (18:46 +0000)]
[CodeExtractor] Do not lift lifetime.end markers for region inputs
If a lifetime.end marker occurs along one path through the extraction
region, but not another, then it's still incorrect to lift the marker,
because there is some path through the extracted function which would
ordinarily not reach the marker. If the call to the extracted function
is in a loop, unrolling can cause inputs to the function to become
optimized out as undef after the first iteration.
To prevent incorrect stack slot merging in the calling function, it
should be sufficient to lift lifetime.start markers for region inputs.
I've tested this theory out by doing a stage2 check-all with randomized
splitting enabled.
This is a follow-up to r353973, and there's additional context for this
change in https://reviews.llvm.org/D57834.
rdar://
47896986
Differential Revision: https://reviews.llvm.org/D58253
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354159
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Vedant Kumar [Fri, 15 Feb 2019 18:46:44 +0000 (18:46 +0000)]
[HotColdSplit] Schedule splitting late to fix perf regression
With or without PGO data applied, splitting early in the pipeline
(either before the inliner or shortly after it) regresses performance
across SPEC variants. The cause appears to be that splitting hides
context for subsequent optimizations.
Schedule splitting late again, in effect reversing r352080, which
scheduled the splitting pass early for code size benefits (documented in
https://reviews.llvm.org/D57082).
Differential Revision: https://reviews.llvm.org/D58258
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354158
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Andrea Di Biagio [Fri, 15 Feb 2019 18:28:11 +0000 (18:28 +0000)]
[MCA] Improved code comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354154
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Simon Pilgrim [Fri, 15 Feb 2019 18:15:58 +0000 (18:15 +0000)]
Fix 80-column limit in SimplifyDemandedBits/SimplifyDemandedVectorElts. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354152
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Andrea Di Biagio [Fri, 15 Feb 2019 18:05:59 +0000 (18:05 +0000)]
[MCA][LSUnit] Return the ID of the dependent memory operation from method
isReady(). NFCI
This is yet another change in preparation for a fix for PR37494.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354150
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Philip Reames [Fri, 15 Feb 2019 17:11:30 +0000 (17:11 +0000)]
[Tests] Demonstrate more missing atomicrmw transforms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354146
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Sanjay Patel [Fri, 15 Feb 2019 16:31:55 +0000 (16:31 +0000)]
[InstCombine] fix crash while trying to narrow a binop of shuffles (PR40734)
https://bugs.llvm.org/show_bug.cgi?id=40734
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354144
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Serge Guelton [Fri, 15 Feb 2019 16:12:46 +0000 (16:12 +0000)]
Revert r354137 - OptionalStorage implementation for trivial type, take III
This still fails on some random platform, and I fail to reproduce the issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354142
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Matt Arsenault [Fri, 15 Feb 2019 15:24:34 +0000 (15:24 +0000)]
GlobalISel: Fix inadequate verification of g_build_vector
Testing based on the total size of the elements failed to catch a few
invalid scenarios, so explicitly check the number of elements/operands
and types.
This failed to catch situations like
<4 x s16> = G_BUILD_VECTOR s32, s32 since the total size added
up. This also would fail to catch an implicit conversion between
pointers and scalars.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354139
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Matt Arsenault [Fri, 15 Feb 2019 15:24:31 +0000 (15:24 +0000)]
Try to organize MachineVerifier tests
The Verifier is separate from the MachineVerifier, so move it to a
different directory. Some other verifier tests were scattered in
target codegen tests as well (although I'm sure I missed some). Work
towards using a more consistent naming scheme to make it clearer where
the gaps still are for generic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354138
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Serge Guelton [Fri, 15 Feb 2019 15:17:29 +0000 (15:17 +0000)]
OptionalStorage implementation for trivial type, take III
This is another attempt at implementating optional storage
for trivially copyable type, using an union instead of a
raw buffer to hold the actual storage. This make it possible
to get rid of the reinterpret_cast, and hopefully to fix the UB
of the previous attempts.
This validates fine on my laptop for gcc 8.2 and gcc 4.8, I'll
revert if it breaks the validation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354137
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Clement Courbet [Fri, 15 Feb 2019 14:17:17 +0000 (14:17 +0000)]
[MergeICmps] Make base ordering really deterministic.
Summary:
The idea is that we now manipulate bases through a `unsigned BaseID` based on
order of appearance in the comparison chain rather than through the `Value*`.
Fixes 40714.
Reviewers: gchatelet
Subscribers: mgrang, jfb, jdoerfert, llvm-commits, hans
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D58274
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354131
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Clement Courbet [Fri, 15 Feb 2019 12:58:06 +0000 (12:58 +0000)]
[MergeICmps][NFC] Improve doc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354128
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Hans Wennborg [Fri, 15 Feb 2019 12:20:33 +0000 (12:20 +0000)]
Speculatively revert r354051 "Recommit Optional specialization for trivially copyable types"
and
r354055 "Optional specialization for trivially copyable types, part2"
These are suspected to cause Clang to get miscompiled on Ubuntu 14.04
(Trusty) which uses GCC 4.8.4. Reverting for an hour to see if this
helps. See llvm-commits thread.
> Recommit Optional specialization for trivially copyable types
>
> Unfortunately the original code gets misscompiled by GCC (at least 8.1),
> this is a tentative workaround using std::memcpy instead of inplace new
> for trivially copyable types. I'll revert if it breaks.
>
> Original revision: https://reviews.llvm.org/D57097
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354126
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Max Kazantsev [Fri, 15 Feb 2019 12:18:10 +0000 (12:18 +0000)]
[NFCI] Factor out block removal from stack of nested loops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354124
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Simon Pilgrim [Fri, 15 Feb 2019 12:13:16 +0000 (12:13 +0000)]
Fix "field 'DFS' will be initialized after field 'DTU'" warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354123
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Sam Parker [Fri, 15 Feb 2019 11:50:21 +0000 (11:50 +0000)]
[BPI] Look through bitcasts in calcZeroHeuristic
Constant hoisting may have hidden a constant behind a bitcast so that
it isn't folded into its users. However, this prevents BPI from
calculating some of its heuristics that are based upon constant
values. So, I've added a simple helper function to look through these
casts.
Differential Revision: https://reviews.llvm.org/D58166
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354119
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Max Kazantsev [Fri, 15 Feb 2019 11:39:35 +0000 (11:39 +0000)]
[NFC] Promote DFS to field for further use
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354118
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Simon Pilgrim [Fri, 15 Feb 2019 11:39:21 +0000 (11:39 +0000)]
[X86][AVX] lowerShuffleAsLanePermuteAndPermute - fully populate the lane shuffle mask (PR40730)
As detailed on PR40730, we are not correctly filling in the lane shuffle mask (D53148/rL344446) - we fill in for the correct src lane but don't add it to the correct mask element, so any reference to the correct element is likely to see an UNDEF mask index.
This allows constant folding to propagate UNDEFs prior to the lane mask being (correctly) lowered to vperm2f128.
This patch fixes the issue by fully populating the lane shuffle mask - this is more than is necessary (if we only filled in the required mask elements we might be able to match other shuffle instructions - broadcasts etc.), but its the most cautious approach as this needs to be cherrypicked into the 8.0.0 release branch.
Differential Revision: https://reviews.llvm.org/D58237
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354117
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Diana Picus [Fri, 15 Feb 2019 10:50:02 +0000 (10:50 +0000)]
[ARM GlobalISel] Style fix. NFCI
Add the opcode for ADDrr / t2ADDrr to the Opcode cache, as we did for
all other opcodes where the handling is otherwise the same between arm
mode and thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354115
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Diana Picus [Fri, 15 Feb 2019 10:24:03 +0000 (10:24 +0000)]
[ARM GlobalISel] Support branches for Thumb2
Just like arm mode, but with different opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354113
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Alex Bradbury [Fri, 15 Feb 2019 09:53:32 +0000 (09:53 +0000)]
[RISCV] Add assembler support for LA pseudo-instruction
This patch also introduces the emitAuipcInstPair helper, which is then used
for both emitLoadAddress and emitLoadLocalAddress.
Differential Revision: https://reviews.llvm.org/D55325
Patch by James Clarke.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354111
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Alex Bradbury [Fri, 15 Feb 2019 09:43:46 +0000 (09:43 +0000)]
[RISCV] Support assembling %got_pcrel_hi operator
Differential Revision: https://reviews.llvm.org/D55279
Patch by James Clarke.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354110
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Sam Parker [Fri, 15 Feb 2019 09:04:39 +0000 (09:04 +0000)]
[ARM CGP] Fix ConvertTruncs
ConvertTruncs is used to replace a trunc for an AND mask, however
this function wasn't working as expected. By performing the change
later, we can create a wide type integer mask instead of a narrow -1
value, which could then be simply removed (incorrectly). Because we
now perform this action later, it's necessary to cache the trunc type
before we perform the promotion.
Differential Revision: https://reviews.llvm.org/D57686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354108
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Max Kazantsev [Fri, 15 Feb 2019 08:18:00 +0000 (08:18 +0000)]
[NFC] Tweak SplitBlockAndInsertIfThen to use existing ThenBlock
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354107
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Max Kazantsev [Fri, 15 Feb 2019 07:06:52 +0000 (07:06 +0000)]
[TEST] Update test comments, refactor checks with update_test_checks.py
This patch changes messages in guards-related tests to adequately reflect
reality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354101
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Matt Arsenault [Fri, 15 Feb 2019 04:01:39 +0000 (04:01 +0000)]
X86: Replace isSafeToClobberEFLAGS implementation
Also use modifiesRegister instead of looping over operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354098
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Francis Visoiu Mistrih [Fri, 15 Feb 2019 03:01:09 +0000 (03:01 +0000)]
Revert "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support."
This reverts commit
aa0b77d3395dc6ab91647138139c1a15a3aa088d.
This fails to pass the machine verifier:
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-expensive/13579/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354096
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Julian Lettner [Fri, 15 Feb 2019 02:44:52 +0000 (02:44 +0000)]
[lit][NFC] Cleanup copy&paste naming mistake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354095
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Matt Davis [Fri, 15 Feb 2019 02:43:14 +0000 (02:43 +0000)]
[llvm-cxxfilt] Fix a comment typo. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354094
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Aditya Nandakumar [Fri, 15 Feb 2019 01:37:54 +0000 (01:37 +0000)]
[GISel][NFC]: Add methods to speed up insertion into GISelWorklist
https://reviews.llvm.org/D58073
Speed up insertion during the initial populating phase into the
GISelWorkList by deferring repeatedly resizing the DenseMap.
This results in ~10% improvement in the combiner passes, and
~3% speedup in the Legalizer.
reviewed by: aemerson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354093
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Konstantin Zhuravlyov [Thu, 14 Feb 2019 23:56:04 +0000 (23:56 +0000)]
AMDGPU: Set ABI version to 1 for code object v3
Differential Revision: https://reviews.llvm.org/D57811
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354085
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Matt Davis [Thu, 14 Feb 2019 23:50:35 +0000 (23:50 +0000)]
[symbolizer] Avoid collecting symbols belonging to invalid sections.
Summary:
llvm-symbolizer would originally report symbols that belonged to an invalid object file section.
Specifically the case where: `*Symbol.getSection() == ObjFile.section_end()`
This patch prevents the Symbolizer from collecting symbols that belong to invalid sections.
The test (from PR40591) introduces a case where two symbols have address 0,
one symbol is defined, 'foo', and the other is not defined, 'bar'. This patch will cause
the Symbolizer to keep 'foo' and ignore 'bar'.
As a side note, the logic for adding symbols to the Symbolizer's store
(`SymbolizableObjectFile::addSymbol`) replaces symbols with the
same <address, size> pair. At some point that logic should be revisited as in the
aforementioned case, 'bar' was overwriting 'foo' in the Symbolizer's store,
and 'foo' was forgotten.
This fixes PR40591
Reviewers: jhenderson, rupprecht
Reviewed By: rupprecht
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D58146
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354083
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Nick Desaulniers [Thu, 14 Feb 2019 23:42:21 +0000 (23:42 +0000)]
Revert "[INLINER] allow inlining of address taken blocks"
This reverts commit
19e95fe61182945b7b68ad15348f144fb996633f.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354082
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Nick Desaulniers [Thu, 14 Feb 2019 23:35:53 +0000 (23:35 +0000)]
[INLINER] allow inlining of address taken blocks
as long as their uses does not contain calls to functions that capture
the argument (potentially allowing the blockaddress to "escape" the
lifetime of the caller).
TODO:
- add more tests
- fix crash in llvm::updateCGAndAnalysisManagerForFunctionPass when
invoking Transforms/Inline/blockaddress.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354079
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Sanjay Patel [Thu, 14 Feb 2019 23:17:22 +0000 (23:17 +0000)]
[x86] add tests for extractelement of FP; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354077
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Julian Lettner [Thu, 14 Feb 2019 22:46:56 +0000 (22:46 +0000)]
[lit] Remove --single-process option (use -j1 instead)
Remove `--single-process` command line option. Use `-j1` instead.
Also see commit:
96adb78b120b6aa9739eb714534dc8e819f7bc52
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354073
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Konstantin Zhuravlyov [Thu, 14 Feb 2019 22:42:09 +0000 (22:42 +0000)]
MC/ELF: Allow targets to set ABI version
Tests are in the follow up change
Differential Revision: https://reviews.llvm.org/D57810
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354072
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Matt Arsenault [Thu, 14 Feb 2019 22:41:09 +0000 (22:41 +0000)]
GlobalISel: Add alignment to LegalityQuery MMOs
This allows targets to specify the minimum alignment required for the
load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354071
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Matt Arsenault [Thu, 14 Feb 2019 22:41:01 +0000 (22:41 +0000)]
Replace gcroot verifier tests
These haven't been checking anything useful and have been testing the
wrong failure reason for many years. Replace them with something which
stresses what is actually implemented in the verifier now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354070
91177308-0d34-0410-b5e6-
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