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5 years ago[IndVars] Extend diagnostic -replexitval flag w/ability to bypass hard use hueristic
Philip Reames [Wed, 12 Jun 2019 19:52:05 +0000 (19:52 +0000)]
[IndVars] Extend diagnostic -replexitval flag w/ability to bypass hard use hueristic

Note: This does mean that "always" is now more powerful than it was.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363196 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll
Cameron McInally [Wed, 12 Jun 2019 19:39:42 +0000 (19:39 +0000)]
[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll

Patch 2 of 3 for X86/avx512vl-intrinsics-fast-isel.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363194 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Tests] Autogen RLEV test and add tests for a future enhancement
Philip Reames [Wed, 12 Jun 2019 19:23:10 +0000 (19:23 +0000)]
[Tests] Autogen RLEV test and add tests for a future enhancement

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363193 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Tests] Add tests to highlight sibling loop optimization order issue for exit rewriting
Philip Reames [Wed, 12 Jun 2019 19:04:51 +0000 (19:04 +0000)]
[Tests] Add tests to highlight sibling loop optimization order issue for exit rewriting

The issue addressed in r363180 is more broadly relevant.  For the moment, we don't actually get any of these cases because we a) restrict SCEV formation due to SCEExpander needing to preserve LCSSA, and b) don't iterate between loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363192 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] more gfx1010 tests. NFC.
Stanislav Mekhanoshin [Wed, 12 Jun 2019 18:44:11 +0000 (18:44 +0000)]
[AMDGPU] more gfx1010 tests. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363190 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-ar][test] Relax lit directory assumptions in thin-archive.test
Jordan Rupprecht [Wed, 12 Jun 2019 18:41:27 +0000 (18:41 +0000)]
[llvm-ar][test] Relax lit directory assumptions in thin-archive.test

Summary: thin-archive.test assumes the Output/<testname> structure that lit creates. Rewrite the test in a way that still tests the same thing (creating via relative path and adding via absolute path) but doesn't assume this specific lit structure, making it possible to run in a lit emulator.

Reviewers: gbreynoo

Reviewed By: gbreynoo

Subscribers: llvm-commits, bkramer

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62930

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363189 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] gfx1010 dpp16 and dpp8
Stanislav Mekhanoshin [Wed, 12 Jun 2019 18:02:41 +0000 (18:02 +0000)]
[AMDGPU] gfx1010 dpp16 and dpp8

Differential Revision: https://reviews.llvm.org/D63203

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363186 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] gfx1010 premlane instructions
Stanislav Mekhanoshin [Wed, 12 Jun 2019 17:52:51 +0000 (17:52 +0000)]
[AMDGPU] gfx1010 premlane instructions

Differential Revision: https://reviews.llvm.org/D63202

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363185 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Mips] Add s.d instruction alias for Mips1
Simon Atanasyan [Wed, 12 Jun 2019 17:52:05 +0000 (17:52 +0000)]
[Mips] Add s.d instruction alias for Mips1

Add support for s.d instruction for Mips1 which expands into two swc1
instructions.

Patch by Mirko Brkusanin.

Differential Revision: https://reviews.llvm.org/D63199

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363184 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-lipo] Update llvm-lipo docs for -archs flag
Shoaib Meenai [Wed, 12 Jun 2019 17:37:01 +0000 (17:37 +0000)]
[llvm-lipo] Update llvm-lipo docs for -archs flag

The information for -archs flag is added to llvm-lipo.rst.

Patch by Anusha Basana <anusha.basana@gmail.com>

Differential Revision: https://reviews.llvm.org/D63100

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363182 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Avoid unnecessary stack codegen in NT merge-consecutive-stores codegen...
Simon Pilgrim [Wed, 12 Jun 2019 17:28:48 +0000 (17:28 +0000)]
[X86][SSE] Avoid unnecessary stack codegen in NT merge-consecutive-stores codegen tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363181 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SCEV] Teach computeSCEVAtScope benefit from one-input Phi. PR39673
Philip Reames [Wed, 12 Jun 2019 17:21:47 +0000 (17:21 +0000)]
[SCEV] Teach computeSCEVAtScope benefit from one-input Phi. PR39673

SCEV does not propagate arguments through one-input Phis so as to make it easy for the SCEV expander (and related code) to preserve LCSSA.  It's not entirely clear this restriction is neccessary, but for the moment it exists.   For this reason, we don't analyze single-entry phi inputs.  However it is possible that when an this input leaves the loop through LCSSA Phi, it is a provable constant.  Missing that results in an order of optimization issue in loop exit value rewriting where we miss some oppurtunities based on order in which we visit sibling loops.

This patch teaches computeSCEVAtScope about this case. We can generalize it later, but so far we can only replace LCSSA Phis with their constant loop-exiting values.  We should probably also add similiar logic directly in the SCEV construction path itself.

Patch by: mkazantsev (with revised commit message by me)
Differential Revision: https://reviews.llvm.org/D58113

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363180 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests (PR42123)
Simon Pilgrim [Wed, 12 Jun 2019 17:14:03 +0000 (17:14 +0000)]
[TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests (PR42123)

As discussed on D62910, we need to check whether particular types of memory access are allowed, not just their alignment/address-space.

This NFC patch adds a MachineMemOperand::Flags argument to allowsMemoryAccess and allowsMisalignedMemoryAccesses, and wires up calls to pass the relevant flags to them.

If people are happy with this approach I can then update X86TargetLowering::allowsMisalignedMemoryAccesses to handle misaligned NT load/stores.

Differential Revision: https://reviews.llvm.org/D63075

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363179 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][AVX] Fold concat(vpermilps(x,c),vpermilps(y,c)) -> vpermilps(concat(x,y),c)
Simon Pilgrim [Wed, 12 Jun 2019 16:38:20 +0000 (16:38 +0000)]
[X86][AVX] Fold concat(vpermilps(x,c),vpermilps(y,c)) -> vpermilps(concat(x,y),c)

Handles PSHUFD/PSHUFLW/PSHUFHW (AVX2) + VPERMILPS (AVX1).

An extra AVX1 PSHUFD->VPERMILPS combine will be added in a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363178 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add tests for fmin/fmax libcalls; NFC
Sanjay Patel [Wed, 12 Jun 2019 15:29:40 +0000 (15:29 +0000)]
[InstCombine] add tests for fmin/fmax libcalls; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363175 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert rL363156.
Sam Parker [Wed, 12 Jun 2019 15:28:00 +0000 (15:28 +0000)]
Revert rL363156.

The patch was to fix buildbots, but rL363157 should now be fixing it
in a cleaner way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363174 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC[ Updated tests for D54411
David Bolvansky [Wed, 12 Jun 2019 15:01:36 +0000 (15:01 +0000)]
[NFC[ Updated tests for D54411

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363173 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Add SystemZ target
Nico Weber [Wed, 12 Jun 2019 14:24:43 +0000 (14:24 +0000)]
gn build: Add SystemZ target

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363170 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoStackProtector: Use PointerMayBeCaptured
Matt Arsenault [Wed, 12 Jun 2019 14:23:33 +0000 (14:23 +0000)]
StackProtector: Use PointerMayBeCaptured

This was using its own, outdated list of possible captures. This was
at minimum not catching cmpxchg and addrspacecast captures.

One change is now any volatile access is treated as capturing. The
test coverage for this pass is quite inadequate, but this required
removing volatile in the lifetime capture test.

Also fixes some infrastructure issues to allow running just the IR
pass.

Fixes bug 42238.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363169 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU/GlobalISel: Fix using illegal situations in tests
Matt Arsenault [Wed, 12 Jun 2019 14:23:28 +0000 (14:23 +0000)]
AMDGPU/GlobalISel: Fix using illegal situations in tests

These were using illegal copies as the side effecting use, so make
them legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363168 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Fix compiler warning
Mikael Holmen [Wed, 12 Jun 2019 14:19:22 +0000 (14:19 +0000)]
[ARM] Fix compiler warning

Without this fix clang 3.6 complains with:

../lib/Target/ARM/ARMAsmPrinter.cpp:1473:18: error: variable 'BranchTarget' is used uninitialized whenever 'if' condition is false [-Werror,-Wsometimes-uninitialized]
      } else if (MI->getOperand(1).isSymbol()) {
                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
../lib/Target/ARM/ARMAsmPrinter.cpp:1479:22: note: uninitialized use occurs here
      MCInst.addExpr(BranchTarget);
                     ^~~~~~~~~~~~
../lib/Target/ARM/ARMAsmPrinter.cpp:1473:14: note: remove the 'if' if its condition is always true
      } else if (MI->getOperand(1).isSymbol()) {
             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../lib/Target/ARM/ARMAsmPrinter.cpp:1465:33: note: initialize the variable 'BranchTarget' to silence this warning
      const MCExpr *BranchTarget;
                                ^
                                 = nullptr
1 error generated.

Discussed here:
 http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20190610/661417.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363166 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoLoopVersioning: Respect convergent
Matt Arsenault [Wed, 12 Jun 2019 14:05:58 +0000 (14:05 +0000)]
LoopVersioning: Respect convergent

This changes the standalone pass only. Arguably the utility class
itself should assert there are no convergent calls. However, a target
pass with additional context may still be able to version a loop if
all of the dynamic conditions are sufficiently uniform.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363165 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MIR] Skip hoisting to basic block which may throw exception or return
Anton Afanasyev [Wed, 12 Jun 2019 13:51:44 +0000 (13:51 +0000)]
[MIR] Skip hoisting to basic block which may throw exception or return

Summary:
Fix hoisting to basic block which are not legal for hoisting cause
it can be terminated by exception or it is return block.

Reviewers: john.brawn, RKSimon, MatzeB

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63148

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363164 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add tests for fcmp+select with FMF (minnum/maxnum); NFC
Sanjay Patel [Wed, 12 Jun 2019 13:51:33 +0000 (13:51 +0000)]
[InstCombine] add tests for fcmp+select with FMF (minnum/maxnum); NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363163 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoLoopLoadElim: Respect convergent
Matt Arsenault [Wed, 12 Jun 2019 13:50:47 +0000 (13:50 +0000)]
LoopLoadElim: Respect convergent

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363162 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DebugInfo] Add a test that fell out of an earlier commit
Jeremy Morse [Wed, 12 Jun 2019 13:41:56 +0000 (13:41 +0000)]
[DebugInfo] Add a test that fell out of an earlier commit

r362951 was supposed to contain this test, however it didn't get committed
due to operator error. This was originally part of D59431.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363161 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoLoopDistribute/LAA: Respect convergent
Matt Arsenault [Wed, 12 Jun 2019 13:34:19 +0000 (13:34 +0000)]
LoopDistribute/LAA: Respect convergent

This case is slightly tricky, because loop distribution should be
allowed in some cases, and not others. As long as runtime dependency
checks don't need to be introduced, this should be OK. This is further
complicated by the fact that LoopDistribute partially ignores if LAA
says that vectorization is safe, and then does its own runtime pointer
legality checks.

Note this pass still does not handle noduplicate correctly, as this
should always be forbidden with it. I'm not going to bother trying to
fix it, as it would require more effort and I think noduplicate should
be removed.

https://reviews.llvm.org/D62607

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363160 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Add Mips target
Nico Weber [Wed, 12 Jun 2019 13:25:58 +0000 (13:25 +0000)]
gn build: Add Mips target

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363159 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoLoopDistribute/LAA: Add tests to catch regressions
Matt Arsenault [Wed, 12 Jun 2019 13:15:59 +0000 (13:15 +0000)]
LoopDistribute/LAA: Add tests to catch regressions

I broke 2 of these with a patch, but were not covered by existing
tests.

https://reviews.llvm.org/D63035

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363158 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Add HardwareLoops lit.local.cfg file
Sam Parker [Wed, 12 Jun 2019 12:54:19 +0000 (12:54 +0000)]
[NFC] Add HardwareLoops lit.local.cfg file

Set Transforms/HardwareLoops/ARM/ tests as unsupported if there isn't
an arm target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363157 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAttempt to fix non-Arm buildbots
Sam Parker [Wed, 12 Jun 2019 12:47:35 +0000 (12:47 +0000)]
Attempt to fix non-Arm buildbots

Adding REQUIRES: arm to failing tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363156 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix a Wunused-lambda-capture warning.
Nico Weber [Wed, 12 Jun 2019 12:46:46 +0000 (12:46 +0000)]
Fix a Wunused-lambda-capture warning.

The capture was added in the first commit of https://reviews.llvm.org/D61934
when it was used. In the reland, the use was removed but the capture
wasn't removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363155 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: add RISCV target
Nico Weber [Wed, 12 Jun 2019 12:41:03 +0000 (12:41 +0000)]
gn build: add RISCV target

Patch from David L. Jones <dlj@google.com>, with minor tweaks by me.

Differential Revision: https://reviews.llvm.org/D61821

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363154 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][AVX] Tests showing missing concat(shuffle,shuffle) -> shuffle(concat) folds...
Simon Pilgrim [Wed, 12 Jun 2019 12:40:03 +0000 (12:40 +0000)]
[X86][AVX] Tests showing missing concat(shuffle,shuffle) -> shuffle(concat) folds. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363153 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Merge r363122
Nico Weber [Wed, 12 Jun 2019 12:27:04 +0000 (12:27 +0000)]
gn build: Merge r363122

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363152 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Legacy LTO] Fix build bots: r363140: Fix export name
Ben Dunbobbin [Wed, 12 Jun 2019 12:17:49 +0000 (12:17 +0000)]
[Legacy LTO] Fix build bots: r363140: Fix export name

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363151 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Implement TTI::isHardwareLoopProfitable
Sam Parker [Wed, 12 Jun 2019 12:00:42 +0000 (12:00 +0000)]
[ARM] Implement TTI::isHardwareLoopProfitable

Implement the backend target hook to drive the HardwareLoops pass.
The low-overhead branch extension for Arm M-class cores is flexible
enough that we don't have to ensure correctness at this point, except
checking that the loop counter variable can be stored in LR - a
32-bit register. For it to be profitable, we want to avoid loops that
contain function calls, or any other instruction that alters the PC.

This implementation uses TargetLoweringInfo, to query type and
operation actions, looks at intrinsic calls and also performs some
manual checks for remainder/division and FP operations.

I think this should be a good base to start and extra details can be
filled out later.

Differential Revision: https://reviews.llvm.org/D62907

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363149 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[bindings/go][NFC] Format code with go fmt
Ayke van Laethem [Wed, 12 Jun 2019 11:59:09 +0000 (11:59 +0000)]
[bindings/go][NFC] Format code with go fmt

Run go fmt (version 1.12) over the Go bindings. This cleans up lots of
inconsistencies in the code, it does not change the code in a functional
way.

Differential Revision: https://reviews.llvm.org/D63057

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363148 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][SCEV] Add NoWrapFlag argument to InsertBinOp
Sam Parker [Wed, 12 Jun 2019 11:53:55 +0000 (11:53 +0000)]
[NFC][SCEV] Add NoWrapFlag argument to InsertBinOp

'Use wrap flags in InsertBinop' (rL362687) was reverted due to
miscompiles. This patch introduces the previous change to pass
no-wrap flags but now only FlagAnyWrap is passed.

Differential Revision: https://reviews.llvm.org/D61934

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363147 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[docs][llvm-symbolizer] Fix typo and grammar error
James Henderson [Wed, 12 Jun 2019 11:41:43 +0000 (11:41 +0000)]
[docs][llvm-symbolizer] Fix typo and grammar error

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363145 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoShare /machine: handling code with llvm-cvtres too
Nico Weber [Wed, 12 Jun 2019 11:32:43 +0000 (11:32 +0000)]
Share /machine: handling code with llvm-cvtres too

r363016 let lld-link and llvm-lib share the /machine: parsing code.
This lets llvm-cvtres share it as well.

Making llvm-cvtres depend on llvm-lib seemed a bit strange (it doesn't
need llvm-lib's dependencies on BinaryFormat and BitReader) and I
couldn't find a good place to put this code. Since it's just a few
lines, put it in lib/Object for now.

Differential Revision: https://reviews.llvm.org/D63120

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363144 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DOC] Fix `load` instructions' syntax, function definition.
Xing GUO [Wed, 12 Jun 2019 11:24:22 +0000 (11:24 +0000)]
[DOC] Fix `load` instructions' syntax, function definition.

Summary: In this patch, I updated `load` instruction syntax and fixed function definition. Besides, I re-named some variables to make them obey SSA rule.

Reviewers: MaskRay

Reviewed By: MaskRay

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63186

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363142 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[XCore] CombineSTORE - Use allowsMemoryAccess wrapper. NFCI.
Simon Pilgrim [Wed, 12 Jun 2019 11:08:29 +0000 (11:08 +0000)]
[XCore] CombineSTORE - Use allowsMemoryAccess wrapper. NFCI.

Noticed in D63075 - there was a allowsMisalignedMemoryAccesses call to check for unaligned loads and a check for aligned legal type loads - which is exactly what allowsMemoryAccess does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363141 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ThinLTO]LTO]Legacy] Fix dependent libraries support by adding querying of the IRSymtab
Ben Dunbobbin [Wed, 12 Jun 2019 11:07:56 +0000 (11:07 +0000)]
[ThinLTO]LTO]Legacy] Fix dependent libraries support by adding querying of the IRSymtab

Dependent libraries support for the legacy api was committed in a
broken state (see: https://reviews.llvm.org/D60274). This was missed
due to the painful nature of having to integrate the changes into a
linker in order to test. This change implements support for dependent
libraries in the legacy LTO api:

- I have removed the current api function, which returns a single
string, and   added functions to access each dependent library
specifier individually.

- To reduce the testing pain, I have made the api functions as thin as
possible to   maximize coverage from llvm-lto.

- When doing ThinLTO the system linker will load the modules lazily
when scanning   the input files. Unfortunately, when modules are
lazily loaded there is no access   to module level named metadata. To
fix this I have added api functions that allow   querying the IRSymtab
for the dependent libraries. I hope to expand the api in the   future
so that, eventually, all the information needed by a client linker
during   scan can be retrieved from the IRSymtab.

Differential Revision: https://reviews.llvm.org/D62935

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363140 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[docs] Fix typo
James Henderson [Wed, 12 Jun 2019 10:48:33 +0000 (10:48 +0000)]
[docs] Fix typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363138 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[XCore] LowerLOAD/LowerSTORE - Use allowsMemoryAccess wrapper. NFCI.
Simon Pilgrim [Wed, 12 Jun 2019 10:46:50 +0000 (10:46 +0000)]
[XCore] LowerLOAD/LowerSTORE - Use allowsMemoryAccess wrapper. NFCI.

Noticed in D63075 - there was a allowsMisalignedMemoryAccesses call to check for unaligned loads and a check for aligned legal type loads - which is exactly what allowsMemoryAccess does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363137 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-nm] Fix docs and help text for --print-size
James Henderson [Wed, 12 Jun 2019 10:44:41 +0000 (10:44 +0000)]
[llvm-nm] Fix docs and help text for --print-size

The --print-size help text and documentation claimed that the size was
printed instead of the address, but this is incorrect. It is printed as
well as the address. This patch fixes this issue.

Reviewed by: MaskRay, mtrent, ruiu

Differential Revision: https://reviews.llvm.org/D63142

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363136 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[DebugInfo@O2][LoopVectorize] pr39024: Vectorized code linenos step through...
Orlando Cazalet-Hyams [Wed, 12 Jun 2019 08:34:51 +0000 (08:34 +0000)]
Revert "[DebugInfo@O2][LoopVectorize] pr39024: Vectorized code linenos step through loop even after completion"

This reverts commit 1a0f7a2077b70c9864faa476e15b048686cf1ca7.
See phabricator thread for D60831.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363132 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AVR] Fix the 'avr-tiny.ll' and 'avr25.ll' subtarget feature tests
Dylan McKay [Wed, 12 Jun 2019 08:31:07 +0000 (08:31 +0000)]
[AVR] Fix the 'avr-tiny.ll' and 'avr25.ll' subtarget feature tests

When these tests were originally written, the middle end would introduce
an unnecessary copy from r24:r23->GPR16->r24:r23, and these tests
mistakenly relied on it.

The most optimal codegen for the functions in the test cases before this patch
would be NOPs. This is because the first i16 argument always gets the same register
allocation as an i16 return value in the AVR calling convention.

These tests broke in r362963 when the codegen was improved and the
redundant copy was eliminated. After this, the test functions
were lowered to their optimal form - a 'ret' and nothing else.

This patch prepends an extra i16 operand to each of the test functions
so that a 16-bit copy must be inserted for the program to be correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363131 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Merge globals when optimising for size
Sjoerd Meijer [Wed, 12 Jun 2019 08:28:35 +0000 (08:28 +0000)]
[AArch64] Merge globals when optimising for size

Extern global merging is good for code-size. There's definitely potential for
performance too, but there's one regression in a benchmark that needs
investigating, so that's why we enable it only when we optimise for size for
now.

Patch by Ramakota Reddy and Sjoerd Meijer.

Differential Revision: https://reviews.llvm.org/D61947

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363130 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogitignore: Ignore Qt Creator project configuration files. NFC
Nikolai Kosjar [Wed, 12 Jun 2019 08:28:31 +0000 (08:28 +0000)]
gitignore: Ignore Qt Creator project configuration files. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363129 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add VCMPSSZrr_Intk and VCMPSDZrr_Intk to isNonFoldablePartialRegisterLoad.
Craig Topper [Wed, 12 Jun 2019 06:29:53 +0000 (06:29 +0000)]
[X86] Add VCMPSSZrr_Intk and VCMPSDZrr_Intk to isNonFoldablePartialRegisterLoad.

The non-masked versions are already in there. I'm having some
trouble coming up with a way to test this right now. Most load
folding should happen during isel so I'm not sure how to get
peephole pass to do it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363125 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[RISCV] Fix inline-asm.ll test by adding nounwind attribute
Alex Bradbury [Wed, 12 Jun 2019 05:32:30 +0000 (05:32 +0000)]
[RISCV] Fix inline-asm.ll test by adding nounwind attribute

This test failed since CFI directive support was added in r361320.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363123 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[RISCV] Add CFI directives for RISCV prologue/epilog.
Hsiangkai Wang [Wed, 12 Jun 2019 03:04:22 +0000 (03:04 +0000)]
[RISCV] Add CFI directives for RISCV prologue/epilog.

In order to generate correct debug frame information, it needs to
generate CFI information in prologue and epilog.

Differential Revision: https://reviews.llvm.org/D61773

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363120 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Correct comments in RegisterCoalescer.
Hsiangkai Wang [Wed, 12 Jun 2019 02:58:04 +0000 (02:58 +0000)]
[NFC] Correct comments in RegisterCoalescer.

Differential Revision: https://reviews.llvm.org/D63124

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363119 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC][NFC] Added test for sext/shl combination after isel.
Kai Luo [Wed, 12 Jun 2019 02:45:27 +0000 (02:45 +0000)]
[PowerPC][NFC] Added test for sext/shl combination after isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363118 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll X86/combi...
Cameron McInally [Wed, 12 Jun 2019 00:18:54 +0000 (00:18 +0000)]
[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll X86/combine-fabs.ll

X86/avx512vl-intrinsics-fast-isel.ll is only partially complete.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363114 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix a bug in getSCEVAtScope w.r.t. non-canonical loops
Philip Reames [Tue, 11 Jun 2019 23:21:24 +0000 (23:21 +0000)]
Fix a bug in getSCEVAtScope w.r.t. non-canonical loops

The issue is that if we have a loop with multiple predecessors outside the loop, the code was expecting to merge them and only return if equal, but instead returned the first one seen.

I have no idea if this actually tripped anywhere.  I noticed it by accident when reading the code and have no idea how to go about constructing a test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363112 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGeneralize icmp matching in IndVars' eliminateTrunc
Philip Reames [Tue, 11 Jun 2019 22:43:25 +0000 (22:43 +0000)]
Generalize icmp matching in IndVars' eliminateTrunc

We were only matching RHS being a loop invariant value, not the inverse. Since there's nothing which appears to canonicalize loop invariant values to RHS, this means we missed cases.

Differential Revision: https://reviews.llvm.org/D63112

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363108 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Analysis] add isSplatValue() for vectors in IR
Sanjay Patel [Tue, 11 Jun 2019 22:25:18 +0000 (22:25 +0000)]
[Analysis] add isSplatValue() for vectors in IR

We have the related getSplatValue() already in IR (see code just above the proposed addition).
But sometimes we only need to know that the value is a splat rather than capture the splatted
scalar value. Also, we have an isSplatValue() function already in SDAG.

Motivation - recent bugs that would potentially benefit from improved splat analysis in IR:
https://bugs.llvm.org/show_bug.cgi?id=37428
https://bugs.llvm.org/show_bug.cgi?id=42174

Differential Revision: https://reviews.llvm.org/D63138

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363106 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC][NFC]Remove sms-simple.ll test temporarily.
Jinsong Ji [Tue, 11 Jun 2019 22:09:33 +0000 (22:09 +0000)]
[PowerPC][NFC]Remove sms-simple.ll test temporarily.

Looks like a MachinePipeliner algorithm problem found by
sanitizer-x86_64-linux-fast.
I will backout this test first while investigating the problem to
unblock buildbot.

==49637==ERROR: AddressSanitizer: heap-buffer-overflow on address
0x614000002e08 at pc 0x000004364350 bp 0x7ffe228a3bd0 sp 0x7ffe228a3bc8
READ of size 4 at 0x614000002e08 thread T0
    #0 0x436434f in
llvm::SwingSchedulerDAG::checkValidNodeOrder(llvm::SmallVector<llvm::NodeSet,
8u> const&) const
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachinePipeliner.cpp:3736:11
    #1 0x4342cd0 in llvm::SwingSchedulerDAG::schedule()
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachinePipeliner.cpp:486:3
    #2 0x434042d in
llvm::MachinePipeliner::swingModuloScheduler(llvm::MachineLoop&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachinePipeliner.cpp:385:7
    #3 0x433eb90 in
llvm::MachinePipeliner::runOnMachineFunction(llvm::MachineFunction&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachinePipeliner.cpp:207:5
    #4 0x428b7ea in
llvm::MachineFunctionPass::runOnFunction(llvm::Function&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/CodeGen/MachineFunctionPass.cpp:73:13
    #5 0x4d1a913 in llvm::FPPassManager::runOnFunction(llvm::Function&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/LegacyPassManager.cpp:1648:27
    #6 0x4d1b192 in llvm::FPPassManager::runOnModule(llvm::Module&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/LegacyPassManager.cpp:1685:16
    #7 0x4d1c06d in runOnModule
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/LegacyPassManager.cpp:1752:27
    #8 0x4d1c06d in llvm::legacy::PassManagerImpl::run(llvm::Module&)
/b/sanitizer-x86_64-linux-fast/build/llvm/lib/IR/LegacyPassManager.cpp:1865
    #9 0xa48ca3 in compileModule(char**, llvm::LLVMContext&)
/b/sanitizer-x86_64-linux-fast/build/llvm/tools/llc/llc.cpp:611:8
    #10 0xa4270f in main
/b/sanitizer-x86_64-linux-fast/build/llvm/tools/llc/llc.cpp:365:22
    #11 0x7fec902572e0 in __libc_start_main
(/lib/x86_64-linux-gnu/libc.so.6+0x202e0)
    #12 0x971b69 in _start
(/b/sanitizer-x86_64-linux-fast/build/llvm_build_asan/bin/llc+0x971b69)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363105 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[docs] Add "GNU binutils Replacements" section to command guide
Jordan Rupprecht [Tue, 11 Jun 2019 21:13:01 +0000 (21:13 +0000)]
[docs] Add "GNU binutils Replacements" section to command guide

Summary:
This splits out a section in the command guide for llvm tools that can be used as replacements for GNU tools. For pages that didn't exist, I added stub pages that can be individually filled in by followup patches.

Tested by running `ninja docs-llvm-html` and inspecting locally.

Reviewers: jhenderson, MaskRay, grimar, alexshap

Reviewed By: jhenderson, MaskRay, grimar

Subscribers: smeenai, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63014

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363100 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GlobalISel] Add a G_JUMP_TABLE opcode.
Amara Emerson [Tue, 11 Jun 2019 19:58:06 +0000 (19:58 +0000)]
[GlobalISel] Add a G_JUMP_TABLE opcode.

This opcode generates a pointer to the address of the jump table
specified by the source operand, which is a jump table index.

It will be used in conjunction with an upcoming G_BRJT opcode to support
jump table codegen with GlobalISel.

Differential Revision: https://reviews.llvm.org/D63111

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363096 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MemorySSA] When applying updates, clean unnecessary Phis.
Alina Sbirlea [Tue, 11 Jun 2019 19:09:34 +0000 (19:09 +0000)]
[MemorySSA] When applying updates, clean unnecessary Phis.

Summary: After applying a set of insert updates, there may be trivial Phis left over. Clean them up.

Reviewers: george.burgess.iv

Subscribers: jlebar, Prazek, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63033

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363094 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll...
Cameron McInally [Tue, 11 Jun 2019 18:55:13 +0000 (18:55 +0000)]
[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363093 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoOnly passes that preserve MemorySSA must mark it as preserved.
Alina Sbirlea [Tue, 11 Jun 2019 18:27:49 +0000 (18:27 +0000)]
Only passes that preserve MemorySSA must mark it as preserved.

Summary:
The method `getLoopPassPreservedAnalyses` should not mark MemorySSA as
preserved, because it's being called in a lot of passes that do not
preserve MemorySSA.
Instead, mark the MemorySSA analysis as preserved by each pass that does
preserve it.
These changes only affect the new pass mananger.

Reviewers: chandlerc

Subscribers: mehdi_amini, jlebar, Prazek, george.burgess.iv, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62536

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363091 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDeduplicate S_CONSTANTs in LLD.
Amy Huang [Tue, 11 Jun 2019 18:02:39 +0000 (18:02 +0000)]
Deduplicate S_CONSTANTs in LLD.

Summary: Deduplicate S_CONSTANTS when linking, if they have the same value.

Reviewers: rnk

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63151

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363089 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC] Enable MachinePipeliner for P9 with -ppc-enable-pipeliner
Jinsong Ji [Tue, 11 Jun 2019 17:40:39 +0000 (17:40 +0000)]
[PowerPC] Enable MachinePipeliner for P9 with -ppc-enable-pipeliner

Implement necessary target hooks to enable MachinePipeliner for P9 only.
The pass is off by default, can be enabled with -ppc-enable-pipeliner for P9.

Differential Revision: https://reviews.llvm.org/D62164

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363085 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][CodeGen] Add unary fneg tests to X86/fma-fneg-combine.ll
Cameron McInally [Tue, 11 Jun 2019 17:05:36 +0000 (17:05 +0000)]
[NFC][CodeGen] Add unary fneg tests to X86/fma-fneg-combine.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363084 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Path] Set FD to -1 in moved-from TempFile
Jonas Devlieghere [Tue, 11 Jun 2019 16:42:42 +0000 (16:42 +0000)]
[Path] Set FD to -1 in moved-from TempFile

When moving a temp file, explicitly set the file descriptor to -1 so we
can never accidentally close the moved-from TempFile.

Differential revision: https://reviews.llvm.org/D63087

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363083 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Handle -(X-Y) --> (Y-X) for unary fneg when NSZ
Cameron McInally [Tue, 11 Jun 2019 16:21:21 +0000 (16:21 +0000)]
[InstCombine] Handle -(X-Y) --> (Y-X) for unary fneg when NSZ

Differential Revision: https://reviews.llvm.org/D62612

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363082 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[docs][llvm-nm] Add darwin as --format option
James Henderson [Tue, 11 Jun 2019 15:58:10 +0000 (15:58 +0000)]
[docs][llvm-nm] Add darwin as --format option

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363081 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Update fptrunc (fneg x)) -> (fneg (fptrunc x) for unary FNeg
Cameron McInally [Tue, 11 Jun 2019 15:45:41 +0000 (15:45 +0000)]
[InstCombine] Update fptrunc (fneg x)) -> (fneg (fptrunc x) for unary FNeg

Differential Revision: https://reviews.llvm.org/D62629

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363080 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix docs build issue introduced by r363035
Sander de Smalen [Tue, 11 Jun 2019 15:28:13 +0000 (15:28 +0000)]
Fix docs build issue introduced by r363035

Replacing '.. code-block:: llvm' by '::' is a quick fix to the
build warning/error: Could not lex literal_block as "llvm".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363079 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agolld-link: Reject more than one resource .obj file
Nico Weber [Tue, 11 Jun 2019 15:22:28 +0000 (15:22 +0000)]
lld-link: Reject more than one resource .obj file

Users are exepcted to pass all .res files to the linker, which then
merges all the resource in all .res files into a tree structure and then
converts the final tree structure to a .obj file with .rsrc$01 and
.rsrc$02 sections and then links that.

If the user instead passes several .obj files containing such resources,
the correct thing to do would be to have custom code to merge the trees
in the resource sections instead of doing normal section merging -- but
link.exe rejects if multiple resource obj files are passed in with
LNK4078, so let lld-link do that too instead of silently writing broken
.rsrc sections in that case.

The only real way to run into this is if users manually convert .res
files to .obj files by running cvtres and then handing the resulting
.obj files to lld-link instead, which in practice likely never happens.

(lld-link is slightly stricter than link.exe now: If link.exe is passed
one .obj file created by cvtres, and a .res file, for some reason it
just emits a warning instead of an error and outputs strange looking
data. lld-link now errors out on mixed input like this.)

One way users could accidentally run into this is the following
scenario: If a .res file is passed to lib.exe, then lib.exe calls
cvtres.exe on the .res file before putting it in the output .lib.
(llvm-lib currently doesn't do this.)
link.exe's /wholearchive seems to only add obj files referenced from the
static library index, but lld-link current really adds all files in the
archive. So if lld-link /wholearchive is used with .lib files produced
by lib.exe and .res files were among the files handed to lib.exe, we
previously silently produced invalid output, but now we error out.

link.exe's /wholearchive semantics on the other hand mean that it
wouldn't load the resource object files from the .lib file at all.
Since this scenario is probably still an unlikely corner case,
the difference in behavior here seems fine -- and lld-link might have to
change to use link.exe's /wholearchive semantics in the future anyways.

Vaguely related to PR42180.

Differential Revision: https://reviews.llvm.org/D63109

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363078 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Regenerate CmpISel test for future patch
Simon Pilgrim [Tue, 11 Jun 2019 15:13:11 +0000 (15:13 +0000)]
[X86] Regenerate CmpISel test for future patch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363077 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[docs][llvm-nm] Make --help help text consistent with other options
James Henderson [Tue, 11 Jun 2019 14:55:31 +0000 (14:55 +0000)]
[docs][llvm-nm] Make --help help text consistent with other options

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363073 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-dwarfdump] Simplify --ignore-case help text and documentation
James Henderson [Tue, 11 Jun 2019 13:51:18 +0000 (13:51 +0000)]
[llvm-dwarfdump] Simplify --ignore-case help text and documentation

There was a typo in the --ignore-case help text that was copied into the
llvm-dwarfdump command-guide. Additionally, this patch simplifies the
wording, since it was unnecessarily verbose: the switch applies for
searching in general and doesn't need explicitly stating different
search modes (which might go out-of-date as options are added or
removed).

Reviwed by: JDevlieghere

Differential Revision: https://reviews.llvm.org/D63133

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363066 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[docs][llvm-nm] Fix documentation regarding llvm-nm reading stdin
James Henderson [Tue, 11 Jun 2019 13:46:52 +0000 (13:46 +0000)]
[docs][llvm-nm] Fix documentation regarding llvm-nm reading stdin

llvm-nm reads a.out NOT stdin when no input file is specified. This
patch fixes the doc accordingly, and rephrases the surrounding sentence
slightly.

Reviewed by: grimar

Differential Revision: https://reviews.llvm.org/D63135

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363065 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Fix a typo in the test from r363039
Ilya Biryukov [Tue, 11 Jun 2019 13:36:06 +0000 (13:36 +0000)]
[ARM] Fix a typo in the test from r363039

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363063 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[RISCV] Add lowering of addressing sequences for PIC
Lewis Revill [Tue, 11 Jun 2019 12:57:47 +0000 (12:57 +0000)]
[RISCV] Add lowering of addressing sequences for PIC

This patch allows lowering of PIC addresses by using PC-relative
addressing for DSO-local symbols and accessing the address through the
global offset table for non-DSO-local symbols.

Differential Revision: https://reviews.llvm.org/D55303

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363058 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[RISCV][NFC] Add missing test file for D54093
Lewis Revill [Tue, 11 Jun 2019 12:52:05 +0000 (12:52 +0000)]
[RISCV][NFC] Add missing test file for D54093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363057 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[RISCV] Lower inline asm constraints I, J & K for RISC-V
Lewis Revill [Tue, 11 Jun 2019 12:42:13 +0000 (12:42 +0000)]
[RISCV] Lower inline asm constraints I, J & K for RISC-V

This validates and lowers arguments to inline asm nodes which have the
constraints I, J & K, with the following semantics (equivalent to GCC):

I: Any 12-bit signed immediate.
J: Immediate integer zero only.
K: Any 5-bit unsigned immediate.

Differential Revision: https://reviews.llvm.org/D54093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363054 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] First MVE instructions: scalar shifts.
Mikhail Maltsev [Tue, 11 Jun 2019 12:04:32 +0000 (12:04 +0000)]
[ARM] First MVE instructions: scalar shifts.

This introduces a new decoding table for MVE instructions, and starts
by adding the family of scalar shift instructions that are part of the
MVE architecture extension: saturating shifts within a single GPR, and
long shifts across a pair of GPRs (both saturating and normal).

Some of these shift instructions have only 3-bit register fields in
the encoding, with the low bit fixed. So they can only address an odd
or even numbered GPR (depending on the operand), and therefore I add
two new register classes, GPREven and GPROdd.

Differential Revision: https://reviews.llvm.org/D62668

Change-Id: Iad95d5f83d26aef70c674027a184a6b1e0098d33

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363051 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoLet writeWindowsResourceCOFF() take a TimeStamp parameter
Nico Weber [Tue, 11 Jun 2019 11:26:50 +0000 (11:26 +0000)]
Let writeWindowsResourceCOFF() take a TimeStamp parameter

For lld, pass in Config->Timestamp (which is set based on lld's
/timestamp: and /Brepro flags). Since the writeWindowsResourceCOFF()
data is only used in-memory by LLD and the obj's timestamp isn't used
for anything in the output, this doesn't change behavior.

For llvm-cvtres, add an optional /timestamp: parameter, and use the
current behavior of calling time() if the parameter is not passed in.

This doesn't really change observable behavior (unless someone passes
/timestamp: to llvm-cvtres, which wasn't possible before), but it
removes the last unqualified call to time() from llvm/lib, which seems
like a good thing.

Differential Revision: https://reviews.llvm.org/D63116

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363050 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Fixed arm/aarch64 test
David Bolvansky [Tue, 11 Jun 2019 11:09:25 +0000 (11:09 +0000)]
[NFC] Fixed arm/aarch64 test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363049 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[TargetLowering] Add allowsMemoryAccess(MachineMemOperand) helper wrapper. NFCI.
Simon Pilgrim [Tue, 11 Jun 2019 11:00:23 +0000 (11:00 +0000)]
[TargetLowering] Add allowsMemoryAccess(MachineMemOperand) helper wrapper. NFCI.

As suggested by @arsenm on D63075 - this adds a TargetLowering::allowsMemoryAccess wrapper that takes a Load/Store node's MachineMemOperand to handle the AddressSpace/Alignment arguments and will also implicitly handle the MachineMemOperand::Flags change in D63075.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363048 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DebugInfo@O2][LoopVectorize] pr39024: Vectorized code linenos step through loop...
Orlando Cazalet-Hyams [Tue, 11 Jun 2019 10:37:20 +0000 (10:37 +0000)]
[DebugInfo@O2][LoopVectorize] pr39024: Vectorized code linenos step through loop even after completion

Summary:
Bug: https://bugs.llvm.org/show_bug.cgi?id=39024

The bug reports that a vectorized loop is stepped through 4 times and each step through the loop seemed to show a different path. I found two problems here:

A) An incorrect line number on a preheader block (for.body.preheader) instruction causes a step into the loop before it begins.
B) Instructions in the middle block have different line numbers which give the impression of another iteration.

In this patch I give all of the middle block instructions the line number of the scalar loop latch terminator branch. This seems to provide the smoothest debugging experience because the vectorized loops will always end on this line before dropping into the scalar loop. To solve problem A I have altered llvm::SplitBlockPredecessors to accommodate loop header blocks.

I have set up a separate review D61933 for a fix which is required for this patch.

Reviewers: samsonov, vsk, aprantl, probinson, anemet, hfinkel, jmorse

Reviewed By: hfinkel, jmorse

Subscribers: jmorse, javed.absar, eraman, kcc, bjope, jmellorcrummey, hfinkel, gbedwell, hiraditya, zzheng, llvm-commits

Tags: #llvm, #debug-info

Differential Revision: https://reviews.llvm.org/D60831

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363046 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-readobj] - Do not use precompiled binary in elf-broken-dynsym-link.test
George Rimar [Tue, 11 Jun 2019 10:28:15 +0000 (10:28 +0000)]
[llvm-readobj] - Do not use precompiled binary in elf-broken-dynsym-link.test

Now we can remove the "TODO" since https://bugs.llvm.org/show_bug.cgi?id=42216
was fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363045 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-dwarfdump] Add -o to help text and remove --out-file from doc
James Henderson [Tue, 11 Jun 2019 10:20:07 +0000 (10:20 +0000)]
[llvm-dwarfdump] Add -o to help text and remove --out-file from doc

-o is in the documentation, but not in the llvm-dwarfdump help text.
This patch adds it by inverting the -o and --out-file aliasing. It also
removes --out-file from the documentation, since we don't really want
people to be using this switch in practice.

Reviewed by: aprantl, JDevlieghere, dblaikie

Differential Revision: https://reviews.llvm.org/D63013

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363044 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Fix unused-variable warning in rL363039.
Simon Tatham [Tue, 11 Jun 2019 10:09:12 +0000 (10:09 +0000)]
[ARM] Fix unused-variable warning in rL363039.

The variable `OffsetMask` is currently only used in an assertion, so
if assertions are compiled out and -Werror is enabled, it becomes a
build failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363043 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[yaml2elf] - Check we are able to set custom sh_link for .symtab/.dynsym
George Rimar [Tue, 11 Jun 2019 10:00:51 +0000 (10:00 +0000)]
[yaml2elf] - Check we are able to set custom sh_link for .symtab/.dynsym

Allow using both custom numeric and string values for Link field of the
dynamic and regular symbol tables.

Differential revision: https://reviews.llvm.org/D63077

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363042 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombine] GetNegatedExpression - constant float vector support (PR42105)
Simon Pilgrim [Tue, 11 Jun 2019 09:44:33 +0000 (09:44 +0000)]
[DAGCombine] GetNegatedExpression - constant float vector support (PR42105)

Add support for negation of constant build vectors.

Differential Revision: https://reviews.llvm.org/D62963

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363040 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Add the non-MVE instructions in Arm v8.1-M.
Simon Tatham [Tue, 11 Jun 2019 09:29:18 +0000 (09:29 +0000)]
[ARM] Add the non-MVE instructions in Arm v8.1-M.

This adds support for the new family of conditional selection /
increment / negation instructions; the low-overhead branch
instructions (e.g. BF, WLS, DLS); the CLRM instruction to zero a whole
list of registers at once; the new VMRS/VMSR and VLDR/VSTR
instructions to get data in and out of 8.1-M system registers,
particularly including the new VPR register used by MVE vector
predication.

To support this, we also add a register name 'zr' (used by the CSEL
family to force one of the inputs to the constant 0), and operand
types for lists of registers that are also allowed to include APSR or
VPR (used by CLRM). The VLDR/VSTR instructions also need a new
addressing mode.

The low-overhead branch instructions exist in their own separate
architecture extension, which we treat as enabled by default, but you
can say -mattr=-lob or equivalent to turn it off.

Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover

Reviewed By: samparker

Subscribers: miyuki, javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62667

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363039 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoChange semantics of fadd/fmul vector reductions.
Sander de Smalen [Tue, 11 Jun 2019 08:22:10 +0000 (08:22 +0000)]
Change semantics of fadd/fmul vector reductions.

This patch changes how LLVM handles the accumulator/start value
in the reduction, by never ignoring it regardless of the presence of
fast-math flags on callsites. This change introduces the following
new intrinsics to replace the existing ones:

  llvm.experimental.vector.reduce.fadd -> llvm.experimental.vector.reduce.v2.fadd
  llvm.experimental.vector.reduce.fmul -> llvm.experimental.vector.reduce.v2.fmul

and adds functionality to auto-upgrade existing LLVM IR and bitcode.

Reviewers: RKSimon, greened, dmgreen, nikic, simoll, aemerson

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D60261

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363035 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_f...
Craig Topper [Tue, 11 Jun 2019 04:30:53 +0000 (04:30 +0000)]
[X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns.

Also add a FIXME for the peephole pass not being able to handle this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363032 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert CMake: Make most target symbols hidden by default
Tom Stellard [Tue, 11 Jun 2019 03:21:13 +0000 (03:21 +0000)]
Revert CMake: Make most target symbols hidden by default

This reverts r362990 (git commit 374571301dc8e9bc9fdd1d70f86015de198673bd)

This was causing linker warnings on Darwin:

ld: warning: direct access in function 'llvm::initializeEvexToVexInstPassPass(llvm::PassRegistry&)'
from file '../../lib/libLLVMX86CodeGen.a(X86EvexToVex.cpp.o)' to global weak symbol
'void std::__1::__call_once_proxy<std::__1::tuple<void* (&)(llvm::PassRegistry&),
std::__1::reference_wrapper<llvm::PassRegistry>&&> >(void*)' from file '../../lib/libLLVMCore.a(Verifier.cpp.o)'
means the weak symbol cannot be overridden at runtime. This was likely caused by different translation
units being compiled with different visibility settings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363028 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoSymbolize: Make DWPName a symbolizer option instead of an argument to symbolize{...
Peter Collingbourne [Tue, 11 Jun 2019 02:32:27 +0000 (02:32 +0000)]
Symbolize: Make DWPName a symbolizer option instead of an argument to symbolize{,Inlined}Code.

This makes the interface simpler and more consistent with the interface for
.dSYM files and fixes a bug where llvm-symbolizer would not read the dwp if
it was asked to symbolize data before symbolizing code.

Differential Revision: https://reviews.llvm.org/D63114

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363025 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoSymbolize: Replace the Options constructor with in-class initialization. NFCI.
Peter Collingbourne [Tue, 11 Jun 2019 02:31:54 +0000 (02:31 +0000)]
Symbolize: Replace the Options constructor with in-class initialization. NFCI.

This is not only less code but also clearer at the use site.

Differential Revision: https://reviews.llvm.org/D63113

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363024 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAtomicExpand: Don't crash on non-0 alloca
Matt Arsenault [Tue, 11 Jun 2019 01:35:07 +0000 (01:35 +0000)]
AtomicExpand: Don't crash on non-0 alloca

This now produces garbage on AMDGPU with a call to an nonexistent,
anonymous libcall but won't assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363022 91177308-0d34-0410-b5e6-96231b3b80d8