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5 years ago[DAGCombiner] try to convert pow(x, 0.25) to sqrt(sqrt(x))
Sanjay Patel [Wed, 5 Sep 2018 17:01:56 +0000 (17:01 +0000)]
[DAGCombiner] try to convert pow(x, 0.25) to sqrt(sqrt(x))

This was proposed as an IR transform in D49306, but it was not clearly justifiable as a canonicalization.
Here, we only do the transform when the target tells us that sqrt can be lowered with inline code.

This is the basic case. Some potential enhancements are in the TODO comments:

1. Generalize the transform for other exponents (allow more than 2 sqrt calcs if that's really cheaper).
2. If we have less fast-math-flags, generate code to avoid -0.0 and/or INF.
3. Allow the transform when optimizing/minimizing size (might require a target hook to get that right).

Note that by default, x86 converts single-precision sqrt calcs into sqrt reciprocal estimate with
refinement. That codegen is controlled by CPU attributes and can be manually overridden. We have plenty
of test coverage for that already, so I didn't bother to include extra testing for that here. AArch uses
its full-precision ops in all cases (not sure if that's the intended behavior or not, but that should
also be covered by existing tests).

Differential Revision: https://reviews.llvm.org/D51630

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341481 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[XRay] Use a function to return a constant
Dean Michael Berris [Wed, 5 Sep 2018 16:03:21 +0000 (16:03 +0000)]
[XRay] Use a function to return a constant

We do this instead of using static constexpr char arrays because MSVC
2015 cannot handle the constant initialisation of those along with the
out-of-line storage declaration.

This is a follow-up to D51672.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341479 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Hexagon] Ignore unnamed globals in HexagonConstExtenders
Krzysztof Parzyszek [Wed, 5 Sep 2018 15:54:44 +0000 (15:54 +0000)]
[Hexagon] Ignore unnamed globals in HexagonConstExtenders

This replaces r337723. The global list in the module can be huge with LTO,
plus the module can change between different invocations of the pass, so
there is no easy way to deterministically cache the ordering (especially
in the presence of multiple threads).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341478 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[XRay] Use `const` instead of `constexpr` in storage declaration
Dean Michael Berris [Wed, 5 Sep 2018 15:19:43 +0000 (15:19 +0000)]
[XRay] Use `const` instead of `constexpr` in storage declaration

This should make MSVC happy with the storage provided for static
constexpr character arrays out-of-line.

Follow-up to D51672.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341477 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[benchmark] Fix 32-bit build failure
Kirill Bobyrev [Wed, 5 Sep 2018 14:15:39 +0000 (14:15 +0000)]
[benchmark] Fix 32-bit build failure

This patch applies upstream commit:
https://github.com/google/benchmark/commit/f0901417c89d123474e6b91365029cfe32cf89dc

Tim Northover pointed out that benchmark build might be broken on 32-bit
macOS. This commit by Roman Lebedev (lebedev.ri) resolves the issue.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D51677

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341469 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ControlHeightReduction] Remove unused includes
Benjamin Kramer [Wed, 5 Sep 2018 13:51:05 +0000 (13:51 +0000)]
[ControlHeightReduction] Remove unused includes

Also clang-format them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341468 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-strip] Support stripping multiple input files
Jordan Rupprecht [Wed, 5 Sep 2018 13:10:03 +0000 (13:10 +0000)]
[llvm-strip] Support stripping multiple input files

Summary:
Allow strip to be called on multiple input files, which is interpreted as stripping N files in place. Using multiple input files is incompatible with -o.

To allow this, create a `DriverConfig` struct which just wraps a list of `CopyConfigs`. objcopy will only ever have a single `CopyConfig`, but strip will have N (where N >= 1) CopyConfigs.

Reviewers: alexshap, jakehehrlich

Reviewed By: alexshap, jakehehrlich

Subscribers: MaskRay, jakehehrlich, llvm-commits

Differential Revision: https://reviews.llvm.org/D51660

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341464 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Aggressive InstCombine] Move C bindings to their own header file.
Benjamin Kramer [Wed, 5 Sep 2018 11:41:12 +0000 (11:41 +0000)]
[Aggressive InstCombine] Move C bindings to their own header file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341461 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DebugInfo] Normalize common kinds of DWARF sub-expressions.
Jonas Devlieghere [Wed, 5 Sep 2018 10:18:36 +0000 (10:18 +0000)]
[DebugInfo] Normalize common kinds of DWARF sub-expressions.

Normalize common kinds of DWARF sub-expressions to make debug info
encoding a bit more compact:

  DW_OP_constu [X < 32] -> DW_OP_litX
  DW_OP_constu [all ones] -> DW_OP_lit0, DW_OP_not (64-bit only)

Differential revision: https://reviews.llvm.org/D51640

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341457 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Add test on full IV widening
Max Kazantsev [Wed, 5 Sep 2018 10:10:59 +0000 (10:10 +0000)]
[NFC] Add test on full IV widening

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341456 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRemove FrameAccess struct from hasLoadFromStackSlot
Sander de Smalen [Wed, 5 Sep 2018 08:59:50 +0000 (08:59 +0000)]
Remove FrameAccess struct from hasLoadFromStackSlot

This removes the FrameAccess struct that was added to the interface
in D51537, since the PseudoValue from the MachineMemoryOperand
can be safely casted to a FixedStackPseudoSourceValue.

Reviewers: MatzeB, thegameg, javed.absar

Reviewed By: thegameg

Differential Revision: https://reviews.llvm.org/D51617

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341454 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[XRay] Add a RecordPrinter visitor for FDR Records
Dean Michael Berris [Wed, 5 Sep 2018 06:57:23 +0000 (06:57 +0000)]
[XRay] Add a RecordPrinter visitor for FDR Records

Summary:
This change adds a `RecordPrinter` type which does some basic text
serialization of the FDR record instances. This is one component of the
tool we're building to dump the records from an FDR mode log as-is.

This is a small part of D50441.

Reviewers: eizan, kpw

Subscribers: mgorny, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D51672

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341447 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DebugInfo] Fix bug in LiveDebugVariables.
Hsiangkai Wang [Wed, 5 Sep 2018 05:58:53 +0000 (05:58 +0000)]
[DebugInfo] Fix bug in LiveDebugVariables.

In lib/CodeGen/LiveDebugVariables.cpp, it uses std::prev(MBBI) to
get DebugValue's SlotIndex. However, the previous instruction may be
also a debug instruction. It could not use a debug instruction to query
SlotIndex in mi2iMap.

Scan all debug instructions and use the first debug instruction to query
SlotIndex for following debug instructions. Only handle DBG_VALUE in
handleDebugValue().

Differential Revision: https://reviews.llvm.org/D50621

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341446 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoPrevent unsigned overflow.
Richard Trieu [Wed, 5 Sep 2018 04:19:15 +0000 (04:19 +0000)]
Prevent unsigned overflow.

The sum of the weights is caculated in an APInt, which has a width smaller than
64.  In certain cases, the sum of the widths would overflow when calculations
are done inside an APInt, but would not if done with uint64_t.  Since the
values will be passed as uint64_t in the function call anyways, do all the math
in 64 bits.  Also added an assert in case the probabilities overflow 64 bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341444 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix -Wunused-function in release build after rL341386
Fangrui Song [Wed, 5 Sep 2018 03:10:20 +0000 (03:10 +0000)]
Fix -Wunused-function in release build after rL341386

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341443 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] clang-format (NFC)
Heejin Ahn [Wed, 5 Sep 2018 01:27:38 +0000 (01:27 +0000)]
[WebAssembly] clang-format (NFC)

Summary: This patch runs clang-format on all wasm-only files.

Reviewers: aardappel, dschuff, sunfish, tlively

Subscribers: MatzeB, sbc100, jgravelle-google, llvm-commits

Differential Revision: https://reviews.llvm.org/D51447

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341439 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix -Wunused-private-variable on non-Windows
Reid Kleckner [Wed, 5 Sep 2018 00:18:05 +0000 (00:18 +0000)]
Fix -Wunused-private-variable on non-Windows

I didn't want to use ifdefs in headers, but I'll do it to pacify a
warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341436 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Windows] Convert from UTF-8 to UTF-16 when writing to a Windows console
Reid Kleckner [Wed, 5 Sep 2018 00:08:56 +0000 (00:08 +0000)]
[Windows] Convert from UTF-8 to UTF-16 when writing to a Windows console

Summary:
Calling WriteConsoleW is the most reliable way to print Unicode
characters to a Windows console.

If binary data gets printed to the console, attempting to re-encode it
shouldn't be a problem, since garbage in can produce garbage out.

This breaks printing strings in the local codepage, which WriteConsoleA
knows how to handle. For example, this can happen when user source code
is encoded with the local codepage, and an LLVM tool quotes it while
emitting a caret diagnostic. This is unfortunate, but well-behaved tools
should validate that their input is UTF-8 and escape non-UTF-8
characters before sending them to raw_fd_ostream. Clang already does
this, but not all LLVM tools do this.

One drawback to the current implementation is printing a string a byte
at a time doesn't work. Consider this LLVM code:
  for (char C : MyStr) outs() << C;

Because outs() is now unbuffered, we wil try to convert each byte to
UTF-16, which will fail. However, this already didn't work, so I think
we may as well update callers that do that as we find them to print
complete portions of strings. You can see a real example of this in my
patch to SourceMgr.cpp

Fixes PR38669 and PR36267.

Reviewers: zturner, efriedma

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D51558

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341433 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] fix xor-or-xor fold to check uses and handle commutes
Sanjay Patel [Tue, 4 Sep 2018 23:22:13 +0000 (23:22 +0000)]
[InstCombine] fix xor-or-xor fold to check uses and handle commutes

I'm probably missing some way to use m_Deferred to remove the code
duplication, but that can be a follow-up.

The improvement in demand_shrink_nsw.ll is an example of missing
the fold because the pattern matching was deficient. I didn't try
to follow the bits in that test, but Alive says it's correct:
https://rise4fun.com/Alive/ugc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341426 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] update tests checks; NFC
Sanjay Patel [Tue, 4 Sep 2018 23:08:23 +0000 (23:08 +0000)]
[InstCombine] update tests checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341424 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Fixed stale assert message in WebAssemblyMCInstLower
Wouter van Oortmerssen [Tue, 4 Sep 2018 22:59:05 +0000 (22:59 +0000)]
[WebAssembly] Fixed stale assert message in WebAssemblyMCInstLower

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341423 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ThinLTO] Fix memory corruption in ThinLTOCodeGenerator when CodeGenOnly was specified
Steven Wu [Tue, 4 Sep 2018 22:54:17 +0000 (22:54 +0000)]
[ThinLTO] Fix memory corruption in ThinLTOCodeGenerator when CodeGenOnly was specified

Summary:
Issue occurs when doing ThinLTO with CodeGenOnly flag.
TMBuilder.TheTriple is assigned to by multiple threads in an unsafe way resulting in double-free of std::string memory.

Pseudocode:
if (CodeGenOnly) {
  // Perform only parallel codegen and return.
  ThreadPool Pool;
  int count = 0;
  for (auto &ModuleBuffer : Modules) {
    Pool.async([&](int count) {
    ...
      /// Now call OutputBuffer = codegen(*TheModule);
      /// Which turns into initTMBuilder(moduleTMBuilder, Triple(TheModule.getTargetTriple()));
      /// Which turns into

      TMBuilder.TheTriple = std::move(TheTriple);   // std::string = "....."
      /// So, basically std::string assignment to same string on multiple threads = memory corruption

  }

  return;
}

Patch by Alex Borcan

Reviewers: llvm-commits, steven_wu

Reviewed By: steven_wu

Subscribers: mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D51651

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341422 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-strip] Allow copying relocation sections without symbol tables.
Jordan Rupprecht [Tue, 4 Sep 2018 22:28:49 +0000 (22:28 +0000)]
[llvm-strip] Allow copying relocation sections without symbol tables.

Summary:
Fixes the error "Link field value 0 in section .rela.plt is invalid" when copying/stripping certain binaries. Minimal repro:

```
$ cat /tmp/a.c
int main() { return 0; }
$ clang -static /tmp/a.c -o /tmp/a
$ llvm-strip /tmp/a -o /tmp/b
llvm-strip: error: Link field value 0 in section .rela.plt is invalid.
```

Reviewers: jakehehrlich, alexshap

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51493

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341419 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "Revert r341269: [Constant Hoisting] Hoisting Constant GEP Expressions"
Zhaoshi Zheng [Tue, 4 Sep 2018 22:17:03 +0000 (22:17 +0000)]
Revert "Revert r341269: [Constant Hoisting] Hoisting Constant GEP Expressions"

Reland r341269. Use std::stable_sort when sorting constant condidates.

Reverting commit, r341365:

  Revert r341269: [Constant Hoisting] Hoisting Constant GEP Expressions

  One of the tests is failing 50% of the time when expensive checks are
  enabled. Not sure how deep the problem is so just reverting while the
  author can investigate so that the bots stop repeatedly failing and
  blaming things incorrectly. Will respond with details on the original
  commit.

Original commit, r341269:

  [Constant Hoisting] Hoisting Constant GEP Expressions

  Leverage existing logic in constant hoisting pass to transform constant GEP
  expressions sharing the same base global variable. Multi-dimensional GEPs are
  rewritten into single-dimensional GEPs.

  https://reviews.llvm.org/D51396

Differential Revision: https://reviews.llvm.org/D51654

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341417 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LV] First order recurrence phis should not be treated as uniform
Anna Thomas [Tue, 4 Sep 2018 22:12:23 +0000 (22:12 +0000)]
[LV] First order recurrence phis should not be treated as uniform

This is fix for PR38786.
First order recurrence phis were incorrectly treated as uniform,
which caused them to be vectorized as uniform instructions.

Patch by Ayal Zaks and Orivej Desh!

Reviewed by: Anna

Differential Revision: https://reviews.llvm.org/D51639

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341416 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add tests for xor-or-xor fold; NFC
Sanjay Patel [Tue, 4 Sep 2018 22:10:23 +0000 (22:10 +0000)]
[InstCombine] add tests for xor-or-xor fold; NFC

There are 2 bugs shown here that were untested before:
1. We fail to perform the fold in 1/2 the possible commuted variants.
2. When the fold is done, it disregards extra uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341415 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly][NFC] Add colon to label in test
Thomas Lively [Tue, 4 Sep 2018 21:51:32 +0000 (21:51 +0000)]
[WebAssembly][NFC] Add colon to label in test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341414 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructions
Scott Linder [Tue, 4 Sep 2018 21:50:47 +0000 (21:50 +0000)]
[AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructions

Emit a waterfall loop in the general case for a potentially-divergent Rsrc
operand. When practical, avoid this by using Addr64 instructions.

Differential Revision: https://reviews.llvm.org/D50982

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341413 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix a memory leak after rL341386.
Hiroshi Yamauchi [Tue, 4 Sep 2018 21:28:22 +0000 (21:28 +0000)]
Fix a memory leak after rL341386.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51658

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341412 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly][NFC] Fix formatting and tests
Thomas Lively [Tue, 4 Sep 2018 21:26:17 +0000 (21:26 +0000)]
[WebAssembly][NFC] Fix formatting and tests

Summary: Small fixes

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D51656

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341411 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] make ((X & C) ^ C) form consistent for vectors
Sanjay Patel [Tue, 4 Sep 2018 21:17:14 +0000 (21:17 +0000)]
[InstCombine] make ((X & C) ^ C) form consistent for vectors

It would be better to create a 'not' here, but that's not possible yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341410 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Hexagon] Don't packetize new-value stores with any other stores
Krzysztof Parzyszek [Tue, 4 Sep 2018 21:07:27 +0000 (21:07 +0000)]
[Hexagon] Don't packetize new-value stores with any other stores

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341409 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Improve clarity in emitInstrCountChangedRemark
Jessica Paquette [Tue, 4 Sep 2018 21:03:43 +0000 (21:03 +0000)]
[NFC] Improve clarity in emitInstrCountChangedRemark

Add a "CouldOnlyImpactOneFunction" bool that's true when we pass in a function.

Just cleaning up a little bit, since I'm going to add in the per-function
remarks soon from D51467.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341407 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoNFC: expand memset inline arm64 coverage
JF Bastien [Tue, 4 Sep 2018 21:02:00 +0000 (21:02 +0000)]
NFC: expand memset inline arm64 coverage

I'm looking at some codegen optimization in this area and want to make sure I understand the current codegen and don't regress it. This patch simply expands the two existing tests to capture more of the current code generation when it comes to heap-based and stack-based small memset on arm64. The tested code is already pretty good, notably when it comes to using STP, FP stores, FP immediate generation, and folding one of the stores into a stack spill when possible. The uses of STUR could be improved, and some more pairing could occur. Straying from bzero patterns currently yield suboptimal code, and I expect a variety of small changes could make things way better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341406 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] simplify code for xor folds; NFCI
Sanjay Patel [Tue, 4 Sep 2018 21:00:13 +0000 (21:00 +0000)]
[InstCombine] simplify code for xor folds; NFCI

This is just a cleanup step. The TODO comments show
what is wrong with the 'and' version of the fold.
Fixing this should be part of recommitting:
rL300977

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341405 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MinGW] Move code for indicating "potentially not DSO local" into shouldAssumeDSOLoca...
Martin Storsjo [Tue, 4 Sep 2018 20:56:28 +0000 (20:56 +0000)]
[MinGW] Move code for indicating "potentially not DSO local" into shouldAssumeDSOLocal. NFC.

On Windows, if shouldAssumeDSOLocal returns false, it's either a
dllimport reference, or a reference that we should treat as non-local
and create a stub for.

Clean up AArch64Subtarget::ClassifyGlobalReference a little while
touching the flag handling relating to dllimport.

Differential Revision: https://reviews.llvm.org/D51590

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341402 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MinGW] [AArch64] Add stubs for potential automatic dllimported variables
Martin Storsjo [Tue, 4 Sep 2018 20:56:21 +0000 (20:56 +0000)]
[MinGW] [AArch64] Add stubs for potential automatic dllimported variables

The runtime pseudo relocations can't handle the AArch64 format PC
relative addressing in adrp+add/ldr pairs. By using stubs, the potentially
dllimported addresses can be touched up by the runtime pseudo relocation
framework.

Differential Revision: https://reviews.llvm.org/D51452

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341401 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix unused variable warning
Reid Kleckner [Tue, 4 Sep 2018 20:34:47 +0000 (20:34 +0000)]
Fix unused variable warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341400 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SimpleLoopUnswitch] remove a chain of dead blocks at once
Fedor Sergeev [Tue, 4 Sep 2018 20:19:41 +0000 (20:19 +0000)]
[SimpleLoopUnswitch] remove a chain of dead blocks at once

Recent change to deleteDeadBlocksFromLoop was not enough to
fix all the problems related to dead blocks after nontrivial
unswitching of switches.

We need to delete all the dead blocks that were created during
unswitching, otherwise we will keep having problems with phi's
or dead blocks.

This change removes all the dead blocks that are reachable from the loop,
not trying to track whether these blocks are newly created by unswitching
or not. While not completely correct, we are unlikely to get loose but
reachable dead blocks that do not belong to our loop nest.

It does fix all the failures currently known, in particular PR38778.

Reviewed By: asbirlea
Differential Revision: https://reviews.llvm.org/D51519

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341398 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Codegen] Fix test added in rL341380: AArch64SelectionDAGTest needs to link against...
Jordan Rupprecht [Tue, 4 Sep 2018 20:19:17 +0000 (20:19 +0000)]
[Codegen] Fix test added in rL341380: AArch64SelectionDAGTest needs to link against Analysis lib.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341397 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoSet console mode when -fansi-escape-codes is enabled
David Bolvansky [Tue, 4 Sep 2018 19:23:05 +0000 (19:23 +0000)]
Set console mode when -fansi-escape-codes is enabled

Summary:
Windows console now supports supports ANSI escape codes, but we need to enable it using SetConsoleMode with ENABLE_VIRTUAL_TERMINAL_PROCESSING flag.

Fixes https://bugs.llvm.org/show_bug.cgi?id=38817

Tested on Windows 10, screenshot:
https://i.imgur.com/bqYq0Uy.png

Reviewers: zturner, chandlerc

Reviewed By: zturner

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51611

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341396 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CMake] Provide a custom target to install LLVM libraries
Petr Hosek [Tue, 4 Sep 2018 19:10:37 +0000 (19:10 +0000)]
[CMake] Provide a custom target to install LLVM libraries

This simplifies installing all LLVM libraries when doing component
build; now you can include llvm-libraries in distribution components.

Differential Revision: https://reviews.llvm.org/D51603

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341395 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] improve xor+and/or tests
Sanjay Patel [Tue, 4 Sep 2018 19:06:46 +0000 (19:06 +0000)]
[InstCombine] improve xor+and/or tests

The tests attempted to check for commuted variants
of these folds, but complexity-based canonicalization
meant we had no coverage for at least 1/2 of the cases.

Also, the folds correctly check hasOneUse(), but there
was no coverage for that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341394 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Fix DAG divergence not reporting flat loads
Matt Arsenault [Tue, 4 Sep 2018 18:58:19 +0000 (18:58 +0000)]
AMDGPU: Fix DAG divergence not reporting flat loads

Match behavior in DAG of r340343

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341393 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDAG: Factor out helper function for odd vector sizes
Matt Arsenault [Tue, 4 Sep 2018 18:47:43 +0000 (18:47 +0000)]
DAG: Factor out helper function for odd vector sizes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341392 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix build failures after rL341386.
Hiroshi Yamauchi [Tue, 4 Sep 2018 18:10:54 +0000 (18:10 +0000)]
Fix build failures after rL341386.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51647

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341391 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Fix operand rewriting in inline asm lowering.
Dan Gohman [Tue, 4 Sep 2018 17:46:12 +0000 (17:46 +0000)]
[WebAssembly] Fix operand rewriting in inline asm lowering.

Use MachineOperand::ChangeToImmediate rather than reassigning
MachineOperands to new values created from MachineOperand::CreateImm,
so that their parent pointers are preserved.

This fixes "Instruction has operand with wrong parent set" errors
reported by the MachineVerifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341389 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PGO] Control Height Reduction
Hiroshi Yamauchi [Tue, 4 Sep 2018 17:19:13 +0000 (17:19 +0000)]
[PGO] Control Height Reduction

Summary:
Control height reduction merges conditional blocks of code and reduces the
number of conditional branches in the hot path based on profiles.

if (hot_cond1) { // Likely true.
  do_stg_hot1();
}
if (hot_cond2) { // Likely true.
  do_stg_hot2();
}

->

if (hot_cond1 && hot_cond2) { // Hot path.
  do_stg_hot1();
  do_stg_hot2();
} else { // Cold path.
  if (hot_cond1) {
    do_stg_hot1();
  }
  if (hot_cond2) {
    do_stg_hot2();
  }
}

This speeds up some internal benchmarks up to ~30%.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: xbolva00, dmgreen, mehdi_amini, llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D50591

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341386 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CodeGen] Fix remaining zext() assertions in SelectionDAG
Scott Linder [Tue, 4 Sep 2018 16:33:34 +0000 (16:33 +0000)]
[CodeGen] Fix remaining zext() assertions in SelectionDAG

Fix remaining cases not committed in https://reviews.llvm.org/D49574

Differential Revision: https://reviews.llvm.org/D50659

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341380 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MachO] Fix inconsistency between error messages when validating LC_DYSYMTAB
Francis Visoiu Mistrih [Tue, 4 Sep 2018 16:31:53 +0000 (16:31 +0000)]
[MachO] Fix inconsistency between error messages when validating LC_DYSYMTAB

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341379 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MachO] Fix LC_DYSYMTAB validation for external symbols
Francis Visoiu Mistrih [Tue, 4 Sep 2018 16:31:48 +0000 (16:31 +0000)]
[MachO] Fix LC_DYSYMTAB validation for external symbols

We were validating the same index (ilocalsym) twice, while iextdefsym
was never validated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341378 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[dwarfdump] Improve -diff option by hiding more data.
Jonas Devlieghere [Tue, 4 Sep 2018 16:21:37 +0000 (16:21 +0000)]
[dwarfdump] Improve -diff option by hiding more data.

The -diff option makes it easy to diff dwarf by hiding addresses and
offsets. However not all of them were hidden, which should be fixed by
this patch.

Differential revision: https://reviews.llvm.org/D51593

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341377 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r341269: [Constant Hoisting] Hoisting Constant GEP Expressions
Chandler Carruth [Tue, 4 Sep 2018 13:36:44 +0000 (13:36 +0000)]
Revert r341269: [Constant Hoisting] Hoisting Constant GEP Expressions

One of the tests is failing 50% of the time when expensive checks are
enabled. Not sure how deep the problem is so just reverting while the
author can investigate so that the bots stop repeatedly failing and
blaming things incorrectly. Will respond with details on the original
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341365 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix some Wundef warnings in Compiler.h
Sven van Haastregt [Tue, 4 Sep 2018 12:46:21 +0000 (12:46 +0000)]
Fix some Wundef warnings in Compiler.h

Check for definedness of the __cpp_sized_deallocation and
__cpp_aligned_new feature test macros.  These will not be defined
when the feature is not available, and that prevents any code that
includes this header from compiling with -Wundef -Werror.

Differential Revision: https://reviews.llvm.org/D51171

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341364 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
Chandler Carruth [Tue, 4 Sep 2018 12:38:00 +0000 (12:38 +0000)]
[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
Load Hardening.

Wires up the existing pass to work with a proper IR attribute rather
than just a hidden/internal flag. The internal flag continues to work
for now, but I'll likely remove it soon.

Most of the churn here is adding the IR attribute. I talked about this
Kristof Beyls and he seemed at least initially OK with this direction.
The idea of using a full attribute here is that we *do* expect at least
some forms of this for other architectures. There isn't anything
*inherently* x86-specific about this technique, just that we only have
an implementation for x86 at the moment.

While we could potentially expose this as a Clang-level attribute as
well, that seems like a good question to defer for the moment as it
isn't 100% clear whether that or some other programmer interface (or
both?) would be best. We'll defer the programmer interface side of this
for now, but at least get to the point where the feature can be enabled
without relying on implementation details.

This also allows us to do something that was really hard before: we can
enable *just* the indirect call retpolines when using SLH. For x86, we
don't have any other way to mitigate indirect calls. Other architectures
may take a different approach of course, and none of this is surfaced to
user-level flags.

Differential Revision: https://reviews.llvm.org/D51157

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341363 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDisable -Wnoexcept-type due to false positives with GCC.
Aaron Ballman [Tue, 4 Sep 2018 12:03:49 +0000 (12:03 +0000)]
Disable -Wnoexcept-type due to false positives with GCC.

GCC triggers false positives if a nothrow function is called through a template argument. See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80985 for details. The LLVM libraries have no stable C++ API, so the warning is not useful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341361 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r341342: Dwarf .debug section compression support (zlib, zlib-gnu).
Chandler Carruth [Tue, 4 Sep 2018 11:55:57 +0000 (11:55 +0000)]
Revert r341342: Dwarf .debug section compression support (zlib, zlib-gnu).

Also reverts follow-up commits r341343 and r341344.

The primary commit continues to break some build bots even after the
fixes in r341343 for UBSan issues:
http://lab.llvm.org:8011/builders/clang-cmake-aarch64-full/builds/5823

It is also failing for me locally (linux, x86-64).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341360 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[x86/SLH] Teach SLH to harden against the "ret2spec" attack by
Chandler Carruth [Tue, 4 Sep 2018 10:59:10 +0000 (10:59 +0000)]
[x86/SLH] Teach SLH to harden against the "ret2spec" attack by
implementing the proposed mitigation technique described in the original
design document.

The idea is to check after calls that the return address used to arrive
at that location is in fact the correct address. In the event of
a mis-predicted return which reaches a *valid* return but not the
*correct* return, this will detect the mismatch much like it would
a mispredicted conditional branch.

This is the last published attack vector that I am aware of in the
Spectre v1 space which is not mitigated by SLH+retpolines. However,
don't read *too* much into that: this is an area of ongoing research
where we expect more issues to be discovered in the future, and it also
makes no attempt to mitigate Spectre v4. Still, this is an important
completeness bar for SLH.

The change here is of course delightfully simple. It was predicated on
cutting support for post-instruction symbols into LLVM which was not at
all simple. Many thanks to Hal Finkel, Reid Kleckner, and Justin Bogner
who helped me figure out how to do a bunch of the complex changes
involved there.

Differential Revision: https://reviews.llvm.org/D50837

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341358 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDo not leak the Mach host port in sys::getHostCPUName()
Kristina Brooks [Tue, 4 Sep 2018 10:54:09 +0000 (10:54 +0000)]
Do not leak the Mach host port in sys::getHostCPUName()

Patch by rsesek (Robert Sesek)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341357 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[x86/SLH] Teach SLH to harden indirect branches and switches without
Chandler Carruth [Tue, 4 Sep 2018 10:44:21 +0000 (10:44 +0000)]
[x86/SLH] Teach SLH to harden indirect branches and switches without
retpolines.

This implements the core design of tracing the intended target into the
target, checking it, and using that to update the predicate state. It
takes advantage of a few interesting aspects of SLH to make it a bit
easier to implement:
- We already split critical edges with conditional branches, so we can
assume those are gone.
- We already unfolded any memory access in the indirect branch
instruction itself.

I've left hard errors in place to catch if any of these somewhat subtle
invariants get violated.

There is some code that I can factor out and share with D50837 when it
lands, but I didn't want to couple landing the two patches, so I'll do
that in a follow-up cleanup commit if alright.

Factoring out the code to handle different scenarios of materializing an
address remains frustratingly hard. In a bunch of cases you want to fold
one of the cases into an immediate operand of some other instruction,
and you also have both symbols and basic blocks being used which require
different methods on the MI builder (and different operand kinds).
Still, I'll take a stab at sharing at least some of this code in
a follow-up if I can figure out how.

Differential Revision: https://reviews.llvm.org/D51083

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341356 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Fold icmp ugt/ult (add nuw X, C2), C --> icmp ugt/ult X, (C - C2)
Nicola Zaghen [Tue, 4 Sep 2018 10:29:48 +0000 (10:29 +0000)]
[InstCombine] Fold icmp ugt/ult (add nuw X, C2), C --> icmp ugt/ult X, (C - C2)

Support for sgt/slt was added in rL294898, this adds the same cases also for unsigned compares.

This is the Alive proof: https://rise4fun.com/Alive/nyY

Differential Revision: https://reviews.llvm.org/D50972

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341353 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] correcting patterns in time-passes test to fix buildbot
Fedor Sergeev [Tue, 4 Sep 2018 08:21:37 +0000 (08:21 +0000)]
[NFC] correcting patterns in time-passes test to fix buildbot

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341348 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Add assert to detect LCSSA breaches early
Max Kazantsev [Tue, 4 Sep 2018 06:34:40 +0000 (06:34 +0000)]
[NFC] Add assert to detect LCSSA breaches early

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341347 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PassTiming] reporting time-passes separately for multiple pass instances of the...
Fedor Sergeev [Tue, 4 Sep 2018 06:12:28 +0000 (06:12 +0000)]
[PassTiming] reporting time-passes separately for multiple pass instances of the same pass

Summary:
Refactoring done by rL340872 accidentally appeared to be non-NFC, changing the way how
multiple instances of the same pass are handled - aggregation of results by PassName
forced data for multiple instances to be merged together and reported as one line.

Getting back to creating/reporting timers per pass instance.
Reporting was a bit enhanced by counting pass instances and adding #<num> suffix
to the pass description. Note that it is instances that are being counted,
not invocations of them.

time-passes test updated to account for multiple passes being run.

Reviewers: paquette, jhenderson, MatzeB, skatkov

Reviewed By: skatkov

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51535

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341346 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IndVars] Fix usage of SCEVExpander to not mess with SCEVConstant. PR38674
Max Kazantsev [Tue, 4 Sep 2018 05:01:35 +0000 (05:01 +0000)]
[IndVars] Fix usage of SCEVExpander to not mess with SCEVConstant. PR38674

This patch removes the function `expandSCEVIfNeeded` which behaves not as
it was intended. This function tries to make a lookup for exact existing expansion
and only goes to normal expansion via `expandCodeFor` if this lookup hasn't found
anything. As a result of this, if some instruction above the loop has a `SCEVConstant`
SCEV, this logic will return this instruction when asked for this `SCEVConstant` rather
than return a constant value. This is both non-profitable and in some cases leads to
breach of LCSSA form (as in PR38674).

Whether or not it is possible to break LCSSA with this algorithm and with some
non-constant SCEVs is still in question, this is still being investigated. I wasn't
able to construct such a test so far, so maybe this situation is impossible. If it is,
it will go as a separate fix.

Rather than do it, it is always correct to just invoke `expandCodeFor` unconditionally:
it behaves smarter about insertion points, and as side effect of this it will choose a
constant value for SCEVConstants. For other SCEVs it may end up finding a better insertion
point. So it should not be worse in any case.

NOTE: So far the only known case for which this transform may break LCSSA is mapping
of SCEVConstant to an instruction. However there is a suspicion that the entire algorithm
can compromise LCSSA form for other cases as well (yet not proved).

Differential Revision: https://reviews.llvm.org/D51286
Reviewed By: etherzhhb

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341345 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][llvm-objcopy] clang-formating Object.cpp
Puyan Lotfi [Tue, 4 Sep 2018 01:58:32 +0000 (01:58 +0000)]
[NFC][llvm-objcopy] clang-formating Object.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341344 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][llvm-objcopy] Fixing a ubi-san problem with unaligned memory writes.
Puyan Lotfi [Tue, 4 Sep 2018 01:57:30 +0000 (01:57 +0000)]
[NFC][llvm-objcopy] Fixing a ubi-san problem with unaligned memory writes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341343 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy] Dwarf .debug section compression support (zlib, zlib-gnu).
Puyan Lotfi [Mon, 3 Sep 2018 22:25:56 +0000 (22:25 +0000)]
[llvm-objcopy] Dwarf .debug section compression support (zlib, zlib-gnu).

  Usage:

  llvm-objcopy --compress-debug-sections=zlib foo.o
  llvm-objcopy --compress-debug-sections=zlib-gnu foo.o

  In both cases the debug section contents is compressed with zlib. In the GNU
  style case the header is the "ZLIB" magic string followed by the uint64 big-
  endian decompressed size. In the non-GNU mode the header is the
  Elf(32|64)_Chdr.

  Decompression support is coming soon.

  Differential Revision: https://reviews.llvm.org/D49678

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341342 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][x86] add tests for pow(x, 0.25); NFC
Sanjay Patel [Mon, 3 Sep 2018 22:11:47 +0000 (22:11 +0000)]
[AArch64][x86] add tests for pow(x, 0.25); NFC

Folds for this were proposed in D49306, but we
decided the transform is better suited for the backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341341 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[mips] Disable the selection of mixed microMIPS/MIPS code
Simon Atanasyan [Mon, 3 Sep 2018 20:48:55 +0000 (20:48 +0000)]
[mips] Disable the selection of mixed microMIPS/MIPS code

This patch modifies hasStandardEncoding() / inMicroMipsMode() /
inMips16Mode() methods of the MipsSubtarget class so only one can be
true at any one time. That prevents the selection of microMIPS and MIPS
instructions and patterns that are defined in TableGen files at the same
time. A few new patterns and instruction definitions hae been added to
keep test cases passed.

Differential revision: https://reviews.llvm.org/D51483

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341338 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] simplify xor/not folds; NFCI
Sanjay Patel [Mon, 3 Sep 2018 18:40:56 +0000 (18:40 +0000)]
[InstCombine] simplify xor/not folds; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341336 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] allow add+not --> sub for arbitrary vector constants.
Sanjay Patel [Mon, 3 Sep 2018 18:21:59 +0000 (18:21 +0000)]
[InstCombine] allow add+not --> sub for arbitrary vector constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341335 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r341329 due to MSAN error
Brian Gesiak [Mon, 3 Sep 2018 18:13:46 +0000 (18:13 +0000)]
Revert r341329 due to MSAN error

Pushing https://reviews.llvm.org/rL341329 revealed an MSAN error. Revert it
so that we can fix the error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341333 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] consolidate tests for ~(X+C); NFC
Sanjay Patel [Mon, 3 Sep 2018 18:04:21 +0000 (18:04 +0000)]
[InstCombine] consolidate tests for ~(X+C); NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341332 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert [Hexagon] Add support for getRegisterByName.
Sid Manning [Mon, 3 Sep 2018 17:59:10 +0000 (17:59 +0000)]
Revert [Hexagon] Add support for getRegisterByName.

Support required to build the Hexagon Linux kernel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341331 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SLC] Support expanding pow(x, n+0.5) to x * x * ... * sqrt(x)
Florian Hahn [Mon, 3 Sep 2018 17:37:39 +0000 (17:37 +0000)]
[SLC] Support expanding pow(x, n+0.5) to x * x * ... * sqrt(x)

Reviewers: evandro, efriedma, spatel

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D51435

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341330 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRe-push "[Option] Fix PR37006 prefix choice in findNearest"
Brian Gesiak [Mon, 3 Sep 2018 17:30:57 +0000 (17:30 +0000)]
Re-push "[Option] Fix PR37006 prefix choice in findNearest"

Summary:
Original changeset (https://reviews.llvm.org/D46776) by @modocache. It was
reverted after the PS4 bot failed.

The issue has been determined to be with the way the PS4 SDK handles this
particular option. https://reviews.llvm.org/D50410 removes this test, so we
can push this again.

Patch by Arnaud Coomans!

Reviewers: cfe-commits, modocache

Reviewed By: modocache

Differential Revision: https://reviews.llvm.org/D50515

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341329 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Remove wrong ReadAdvance from multiclass sse_fp_unop_s.
Andrea Di Biagio [Mon, 3 Sep 2018 16:47:34 +0000 (16:47 +0000)]
[X86] Remove wrong ReadAdvance from multiclass sse_fp_unop_s.

A ReadAdvance was incorrectly added to the SchedReadWrite list associated with
the following SSE instructions:

sqrtss
sqrtsd
rsqrtss
rcpss

As a consequence, a wrong operand latency was computed for the register operand
used as the base address of the folded load operand.

This patch removes the wrong ReadAdvance, and updates the llvm-mca test cases.
There is still a problem with correctly modeling partial register writes on XMM
registers This other problem is currently tracked here:
https://bugs.llvm.org/show_bug.cgi?id=38813

Differential Revision: https://reviews.llvm.org/D51542

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341326 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd header guards to some headers that are missing them
Argyrios Kyrtzidis [Mon, 3 Sep 2018 16:22:05 +0000 (16:22 +0000)]
Add header guards to some headers that are missing them

Also adjust some of dsymutil's headers to put the header guards at the top,
otherwise the compiler will not recognize them as header guards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341323 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDAG: Handle extract_vector_elt in isKnownNeverNaN
Matt Arsenault [Mon, 3 Sep 2018 14:01:03 +0000 (14:01 +0000)]
DAG: Handle extract_vector_elt in isKnownNeverNaN

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341317 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRename a few unittests/.../Foo.cpp files to FooTest.cpp
Nico Weber [Mon, 3 Sep 2018 12:43:26 +0000 (12:43 +0000)]
Rename a few unittests/.../Foo.cpp files to FooTest.cpp

The convention for unit test sources is that they're called FooTest.cpp.

No behavior change.
https://reviews.llvm.org/D51579

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341313 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DebugInfo] Have the verifier accept missing linkage names.
Jonas Devlieghere [Mon, 3 Sep 2018 12:12:17 +0000 (12:12 +0000)]
[DebugInfo] Have the verifier accept missing linkage names.

According to the standard, for the .debug_names (the "dwarf accelerator
tables"):

> If a subprogram or inlined subroutine is included, and has a
> DW_AT_linkage_name attribute, there will be an additional index entry
> for the linkage name.

For Swift we generate DW_structure_types with a linkage name and the
verifier was incorrectly rejecting this. This patch fixes that by only
considering the linkage name in those particular cases. The test is the
"reduced" debug info of the failing swift test on swift.org.

Differential revision: https://reviews.llvm.org/D51420

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341311 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Simplify code in LowerGlobalAddress. NFCI.
Martin Storsjo [Mon, 3 Sep 2018 11:59:23 +0000 (11:59 +0000)]
[AArch64] Simplify code in LowerGlobalAddress. NFCI.

When initial support for dllimport was added for aarch64 in
SVN r316555, ClassifyGlobalReference didn't set the MO_DLLIMPORT
flag - that was only completed in SVN r323810. Reuse the return
value from ClassifyGlobalReference for this purpose as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341310 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Sparc] allow tls_add/tls_call syntax in assembler parser
Daniel Cederman [Mon, 3 Sep 2018 10:38:12 +0000 (10:38 +0000)]
[Sparc] allow tls_add/tls_call syntax in assembler parser

Summary: Removing unneeded isCodeGenOnly from tls-specific
instructions - TLS_ADD/TLS_LD/TLS_LDX/TLS_CALL.

Author: fedor.sergeev

Reviewers: jyknight, fedor.sergeev

Reviewed By: jyknight

Subscribers: dcederman, brad, llvm-commits

Differential Revision: https://reviews.llvm.org/D36463

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341308 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix issue introduced by r341301 that broke buildbot.
Sander de Smalen [Mon, 3 Sep 2018 10:23:34 +0000 (10:23 +0000)]
Fix issue introduced by r341301 that broke buildbot.

A condition in isSpillInstruction() updates a small vector rather
than the 'FI' by-ref parameter, which was used in a subsequent
call to 'isSpillSlotObjectIndex()'. This patch fixes the condition
to check the FIs in the vector instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341305 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRemove unnecessary semicolon to silence -Wpedantic warning. NFCI.
Simon Pilgrim [Mon, 3 Sep 2018 10:17:25 +0000 (10:17 +0000)]
Remove unnecessary semicolon to silence -Wpedantic warning. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341303 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTest commit.
Carlos Alberto Enciso [Mon, 3 Sep 2018 09:41:43 +0000 (09:41 +0000)]
Test commit.

Revert change done in r341297. NFC.

Differential Revision: https://reviews.llvm.org/D51583

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341302 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoExtend hasStoreToStackSlot with list of FI accesses.
Sander de Smalen [Mon, 3 Sep 2018 09:15:58 +0000 (09:15 +0000)]
Extend hasStoreToStackSlot with list of FI accesses.

For instructions that spill/fill to and from multiple frame-indices
in a single instruction, hasStoreToStackSlot and hasLoadFromStackSlot
should return an array of accesses, rather than just the first encounter
of such an access.

This better describes FI accesses for AArch64 (paired) LDP/STP
instructions.

Reviewers: t.p.northover, gberry, thegameg, rengolin, javed.absar, MatzeB

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D51537

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341301 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTest commit - adding a new line.
Carlos Alberto Enciso [Mon, 3 Sep 2018 08:26:37 +0000 (08:26 +0000)]
Test commit - adding a new line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341297 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MC] - ConstantPools.cpp: Style consistency, remove redundant braces. NFC.
Kristina Brooks [Mon, 3 Sep 2018 03:48:39 +0000 (03:48 +0000)]
[MC] - ConstantPools.cpp: Style consistency, remove redundant braces. NFC.

Remove braces around two, single statement "if" blocks in line with rest
of the file and the general LLVM code style. NFC, testing commit access.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341294 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8
QingShan Zhang [Mon, 3 Sep 2018 03:14:29 +0000 (03:14 +0000)]
[PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8
When doing some instruction scheduling work, we noticed some missing itineraries.
Before we switch to machine scheduler, those missing itineraries might not have impact to actually scheduling,
because we can still get same latency due to default values.

With machine scheduler, however, itineraries will have impact to scheduling.
eg: NumMicroOps will default to be 0 if there is NO itineraries for specific instruction class.
And most of the instruction class with itineraries will have NumMicroOps default to 1.

This will has impact on the count of RetiredMOps, affects the Pending/Available Queue,
then causing different scheduling or suboptimal scheduling further.

Patch by jsji (Jinsong Ji)
Differential Revision: https://reviews.llvm.org/D51506

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341293 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] allow not+sub fold for arbitrary vector constants
Sanjay Patel [Sun, 2 Sep 2018 19:31:45 +0000 (19:31 +0000)]
[InstCombine] allow not+sub fold for arbitrary vector constants

The fold was implemented for the general case but use-limitation,
but the later constant version which didn't check uses was only
matching splat constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341292 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] move/add tests for not+sub; NFC
Sanjay Patel [Sun, 2 Sep 2018 19:18:13 +0000 (19:18 +0000)]
[InstCombine] move/add tests for not+sub; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341291 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[DebugInfo] Fix bug in LiveDebugVariables."
Hsiangkai Wang [Sun, 2 Sep 2018 16:35:42 +0000 (16:35 +0000)]
Revert "[DebugInfo] Fix bug in LiveDebugVariables."

This reverts commit 8f548ff2a1819e1bc051e8218584f1a3d2cf178a.

buildbot failure in LLVM on clang-ppc64be-linux
http://lab.llvm.org:8011/builders/clang-ppc64le-linux/builds/19765

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341290 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DebugInfo] Fix bug in LiveDebugVariables.
Hsiangkai Wang [Sun, 2 Sep 2018 15:57:22 +0000 (15:57 +0000)]
[DebugInfo] Fix bug in LiveDebugVariables.

In lib/CodeGen/LiveDebugVariables.cpp, it uses std::prev(MBBI) to
get DebugValue's SlotIndex. However, the previous instruction may be
also a debug instruction. It could not use a debug instruction to query
SlotIndex in mi2iMap.

Scan all debug instructions and use the first debug instruction to query
SlotIndex for following debug instructions. Only handle DBG_VALUE in
handleDebugValue().

Differential Revision: https://reviews.llvm.org/D50621

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341289 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Reassociate] swap binop operands to increase factoring potential
Sanjay Patel [Sun, 2 Sep 2018 14:22:54 +0000 (14:22 +0000)]
[Reassociate] swap binop operands to increase factoring potential

If we have a pair of binops feeding another pair of binops, rearrange the operands so
the matching pair are together because that allows easy factorization folds to happen
in instcombine:
((X << S) & Y) & (Z << S) --> ((X << S) & (Z << S)) & Y (reassociation)

--> ((X & Z) << S) & Y (factorize shift from 'and' ops optimization)

This is part of solving PR37098:
https://bugs.llvm.org/show_bug.cgi?id=37098

Note that there's an instcombine version of this patch attached there, but we're trying
to make instcombine have less responsibility to improve compile-time efficiency.

For reasons I still don't completely understand, reassociate does this kind of transform
sometimes, but misses everything in my motivating cases.

This patch on its own is gluing an independent cleanup chunk to the end of the existing
RewriteExprTree() loop. We can build on it and do something stronger to better order the
full expression tree like D40049. That might be an alternative to the proposal to add a
separate reassociation pass like D41574.

Differential Revision: https://reviews.llvm.org/D45842

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341288 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern
Roman Lebedev [Sun, 2 Sep 2018 13:56:22 +0000 (13:56 +0000)]
[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern

Summary:
A follow-up for D49266 / rL337166 + D49497 / rL338044.

This is still the same pattern to check for the [lack of]
signed truncation, but in this case the constants and the predicate
are negated.

https://rise4fun.com/Alive/BDV
https://rise4fun.com/Alive/n7Z

Reviewers: spatel, craig.topper, RKSimon, javed.absar, efriedma, dmgreen

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51532

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341287 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoclang-format r341282.
Lang Hames [Sun, 2 Sep 2018 01:29:29 +0000 (01:29 +0000)]
clang-format r341282.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341283 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ORC] Tidy up JITSymbolFlags to remove the need for some explicit static_casts.
Lang Hames [Sun, 2 Sep 2018 01:28:26 +0000 (01:28 +0000)]
[ORC] Tidy up JITSymbolFlags to remove the need for some explicit static_casts.

Removes the implicit conversion to the underlying type for
JITSymbolFlags::FlagNames and replaces it with some bitwise and comparison
operators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341282 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-mca] Fix typo in debug output. NFC.
Matt Davis [Sat, 1 Sep 2018 18:32:33 +0000 (18:32 +0000)]
[llvm-mca] Fix typo in debug output. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341281 91177308-0d34-0410-b5e6-96231b3b80d8