OSDN Git Service
Tao [Thu, 8 Feb 2018 21:04:25 +0000 (16:04 -0500)]
drm/amd/display: Set vsc pack revision when DPCD revision is >= 1.2
Brightness couldn't change when booting up in DC mode.
It was because "psr_enabled" flag was not set to true before
setting vsc packet revision, causing packet rev setup was skipped.
Now instead of checking the psr flag, it checks if the DPCD_REV >= 1.2
and set the vsc packet revision.
Signed-off-by: Tao <xtao@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Thu, 8 Feb 2018 04:25:43 +0000 (23:25 -0500)]
drm/amd/display: provide an interface to query firmware version
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 1 Feb 2018 16:29:58 +0000 (11:29 -0500)]
drm/amd/display: Add missing Vega defines to dal_asic_id
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Thu, 8 Feb 2018 19:05:14 +0000 (14:05 -0500)]
drm/amd/display: Treat bad EDID as no EDID
We have an mst dock firmware that will emulate an EDID with bad
checksum.
v2: Tread -> Treat
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Chalmers [Wed, 7 Feb 2018 19:58:53 +0000 (14:58 -0500)]
drm/amd/display: Remove duplicate entries from BIOS function table
Identical to the two entries above them.
Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Tue, 6 Feb 2018 23:47:26 +0000 (18:47 -0500)]
drm/amd/display: Make FBC work without fbdev emulation
Previously, FBC dynamic allocation relied on connector modes
populated during dm init. This is only the case if
DRM_FBDEV_EMULATION config flag is enabled.
Moving fbc allocation from dm_late_init() to
amdgpu_dm_connector_get_modes() where actual modes init happens.
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Shirish Shankarappa <Shirish.S@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
John Barberiz [Tue, 6 Feb 2018 17:25:17 +0000 (12:25 -0500)]
drm/amd/display: Remove delay on disconnect patch
HDMI HPD's generic solution makes the monitor
patch code unnecessary so anything related has
been removed.
Signed-off-by: John Barberiz <jbarberi@amd.com>
Reviewed-by: John Barberiz <jbarberi@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 6 Feb 2018 15:20:46 +0000 (10:20 -0500)]
drm/amd/display: Skip 2 frames when first reading CRC
Skipping the first frame will prevent uncoooked values most of the time.
However, in some unlikely cases, the second frame will be uncooked as
well.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Mon, 5 Feb 2018 21:11:19 +0000 (16:11 -0500)]
drm/amd/display: Expose DCE110 CRC functions for DCE8
Implement CRC for DCE8. Registers remain the same, so call DCE110 code
directly.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 6 Feb 2018 21:35:21 +0000 (16:35 -0500)]
drm/amd/display: Rework DCE transform bit depth reduction programming.
Clear up the logic, and enable programming truncation as a bit reduction
mode.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 23 Jan 2018 22:43:37 +0000 (17:43 -0500)]
drm/amd/display: When enabling CRC, disable dither & enable truncation
When user-mode is using 8bpc, the hardware represents it internally
using a higher bit depth. This causes problems when comparing CRCs for
color managment tests.
We need to disable dithering as well, since it makes CRC values
non-deterministic.
It's easy to see why dithering needs to be disabled, The reason why
truncation also needs to be enabled is better described with an example.
Consider the folowing which tests the color transform matrix (CTM):
Expected CRC = FB_A -> Degamma (Bypassed) -> CTM (Bypassed)
|
v
Obtain CRC <- Regamma(Bypassed)
Actual CRC = FB_B -> Degamma (Bypassed) -> CTM (0.5*Identity)
|
v
Obtain CRC <- Regamma(Bypassed)
FB_A contains a solid red color at half intensity (127 @ 8bpc)
FB_B contains a solid red color at full intensity (255 @ 8bpc)
We expect that Expected CRC = Actual CRC, but that's not the case. When
the CTM is applied, the output is at half intensity, but also at a
higher bit depth within hardware. i.e. 255/2 = 127.5: not representable
in 8bpc, but can be at 10bpc. This causes the two CRC's to be different.
The solution is to truncate the output bit depth to the same as input
when enabling CRC capture. Since Linux only supports 8bpc, hard code
that for now.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 6 Feb 2018 14:50:49 +0000 (09:50 -0500)]
drm/amd/display: Expose dither setting functionality to Linux
We will need this to disable dither for CRC capture.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 30 Jan 2018 16:14:27 +0000 (11:14 -0500)]
drm/amd/display: Refactor max color lut entries into a macro.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Fri, 2 Feb 2018 15:18:56 +0000 (10:18 -0500)]
drm/amd/display: Hookup color management functions
Hookup new color management functions into amdgpu_dm:
- Notify DRM that we support CRTC color management during CRTC init
- Call color management functions within atomic check to update dc
states in preparation for a commit
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Fri, 2 Feb 2018 15:18:05 +0000 (10:18 -0500)]
drm/amd/display: Implement color management
Implement color management functionalities within amdgpu_dm_color, and
expose functions within amdgpu_dm.h.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Mon, 5 Feb 2018 19:29:57 +0000 (14:29 -0500)]
drm/amd/display: Add color module's gamma helpers to Linux build
Also guard includes that we don't need.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Fri, 2 Feb 2018 14:46:41 +0000 (09:46 -0500)]
drm/amd/display: Use hardware max low point when sampling OTF
The MAX_LOW_POINT macro should reflect the maximum low point within
hardware. Otherwise, sampling for the hardware points from the output
transfer function (OTF) will be incorrect.
Also, fix usage of MAX_LOW_POINT accordingly.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 24 Jan 2018 16:23:28 +0000 (11:23 -0500)]
drm/amd/display: Make couple functions in DCE80 TG static
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 24 Jan 2018 16:16:49 +0000 (11:16 -0500)]
drm/amd/display: Re-use DCE100 display_power_gating for DCE80
Both functions are the same
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 24 Jan 2018 15:47:37 +0000 (10:47 -0500)]
drm/amd/display: Remove unused DCE80 compressor
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 2 Feb 2018 22:35:00 +0000 (17:35 -0500)]
drm/amd/display: Keep eDP stream enabled during boot.
This path fixed specific eDP panel cold boot black screen
due to unnecessary enable link.
Change:
In case of boot up with eDP, if OS is going to set mode
on eDP, keep eDP light up, do not disable and reset corresponding
HW.
This change may affect dce asics and S3/S4 Resume with multi-monitor.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Fri, 2 Feb 2018 06:16:47 +0000 (01:16 -0500)]
drm/amd/display: dal 3.1.34
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Mon, 29 Jan 2018 21:34:16 +0000 (16:34 -0500)]
drm/amd/display: disable seamless vp adjustment for mirrored surface
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Martin Tsai [Thu, 1 Feb 2018 12:03:17 +0000 (20:03 +0800)]
drm/amd/display: add monitor patch for delay after DP receive power up
Signed-off-by: Martin Tsai <martin.tsai@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 30 Jan 2018 19:58:42 +0000 (14:58 -0500)]
drm/amd/display: Change blackout time to 0 on CZ/ST
These should only be non-0 if big hammer w/a is implemented. Currently
DC doesn't implement it, so leave them 0.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Thu, 1 Feb 2018 20:16:20 +0000 (15:16 -0500)]
drm/amd/display: add force_trigger even to static screen control
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Thu, 1 Feb 2018 20:32:55 +0000 (15:32 -0500)]
drm/amd/display: dal 3.1.33
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Wed, 31 Jan 2018 21:45:26 +0000 (16:45 -0500)]
drm/amd/display: boot up/S4 fix mainlink off before BL.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hersen Wu [Tue, 30 Jan 2018 16:46:16 +0000 (11:46 -0500)]
drm/amd/display: VGA black screen from s3 when attached to hook
[Description] For MST, DC already notify MST sink for MST mode, DC stll
check DP SINK DPCD register to see if MST enabled. DP RX firmware may
not handle this properly.
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
John Barberiz [Fri, 26 Jan 2018 22:39:19 +0000 (17:39 -0500)]
drm/amd/display: Rearchitecture HDMI HPD
- Disabled HPD filter and used HPD software timer instead
- Allows DM to disable HPD filtering
Signed-off-by: John Barberiz <jbarberi@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Fri, 9 Feb 2018 17:15:45 +0000 (12:15 -0500)]
drm/amdgpu: Fix potential uninitialized use of 'idle' in amdgpu_ids.c
v2: Use NULL and reverse christmas tree ordering
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mikita Lipski [Sat, 3 Feb 2018 20:19:20 +0000 (15:19 -0500)]
drm/amdgpu: Unify the dm resume calls into one
amdgpu_dm_display_resume is now called from dm_resume to
unify DAL resume call into a single function call
There is no more need to separately call 2 resume functions
for DM.
Initially they were separated to resume display state after
cursor is pinned. But because there is no longer any corruption
with the cursor - the calls can be merged into one function hook.
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mikita Lipski [Fri, 19 Jan 2018 16:21:04 +0000 (11:21 -0500)]
drm/amdgpu: Add a missing lock for drm_mm_takedown
Inside amdgpu_gtt_mgr_fini add a missing lock to maintain
locking balance
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 7 Feb 2018 19:48:22 +0000 (20:48 +0100)]
drm/amdgpu: cleanup VCN IB generation
Start to use amdgpu_bo_create_reserved v2.
v2:
Fix missing pointer init to NULL.
Remove extra new lines.
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Tested-and-Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 7 Feb 2018 19:48:21 +0000 (20:48 +0100)]
drm/amdgpu: fix and cleanup UVD IB generation
We didn't synced the BO after validating it. Also sart to use
amdgpu_bo_create_reserved to simplify things.
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 8 Feb 2018 21:46:30 +0000 (16:46 -0500)]
drm/amd/display: Remove unused CFLAGS entry in DML Makefile
Missed that with a previous change that removed unused files.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 1 Feb 2018 13:41:37 +0000 (14:41 +0100)]
drm/radeon: remove extra TT unpopulated check
The subsystem should check that, not the driver.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 1 Feb 2018 13:40:35 +0000 (14:40 +0100)]
drm/amdgpu: remove extra TT unpopulated check
The subsystem should check that, not the driver.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 1 Feb 2018 13:39:29 +0000 (14:39 +0100)]
drm/ttm: add ttm_tt_populate wrapper
Stop calling the driver callback directly.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Matthias Kaehlcke [Thu, 8 Feb 2018 20:53:16 +0000 (12:53 -0800)]
amdgpu/dc/calcs: Support clang option for stack alignment
calcs uses the compiler option -mpreferred-stack-boundary=4 to configure
a stack alignment of 16 bytes. Clang uses the option -mstack-alignment
instead, which expects as parameter the alignment in bytes, and not a
power of two like -mpreferred-stack-boundary.
Probe for both compiler options and use the correct one, similar to
what is done in arch/x86/Makefile.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Matthias Kaehlcke [Thu, 8 Feb 2018 20:53:15 +0000 (12:53 -0800)]
amdgpu/dc/dml: Support clang option for stack alignment
DML uses the compiler option -mpreferred-stack-boundary=4 to configure
a stack alignment of 16 bytes. Clang uses the option -mstack-alignment
instead, which expects as parameter the alignment in bytes, and not a
power of two like -mpreferred-stack-boundary.
Probe for both compiler options and use the correct one, similar to
what is done in arch/x86/Makefile.
Reported-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Matthias Kaehlcke [Thu, 8 Feb 2018 20:53:14 +0000 (12:53 -0800)]
amdgpu/dc/calcs: Consolidate redundant CFLAGS
Use a variable for common CFLAGS instead of specifying the same flags
for every source file.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Matthias Kaehlcke [Thu, 8 Feb 2018 20:53:13 +0000 (12:53 -0800)]
amdgpu/dc/dml: Consolidate redundant CFLAGS
Use a variable for common CFLAGS instead of specifying the same flags
for every source file.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shaoyun Liu [Thu, 1 Feb 2018 23:13:23 +0000 (18:13 -0500)]
drm/amdgpu: Add place holder for soc15 asic init on emulation
Add common smu_soc_asic_init function to emulate the sillicon post sequence
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shaoyun Liu [Wed, 7 Feb 2018 19:43:13 +0000 (14:43 -0500)]
drm/amdgpu: Double the timeout count on emulation mode
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shaoyun Liu [Tue, 6 Feb 2018 22:29:35 +0000 (17:29 -0500)]
drm/amdgpu: Avoid get vram info from atom bios on emulation mode
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shaoyun Liu [Mon, 5 Feb 2018 21:41:33 +0000 (16:41 -0500)]
drm/amdgpu: Fix none-powerplay issue when load driver on emulation mode
On emulation mode , driver will be loaded with powerplay disabled
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shaoyun Liu [Thu, 1 Feb 2018 22:37:50 +0000 (17:37 -0500)]
drm/amdgpu: Basic emulation support
Add amdgpu_emu_mode module parameter to control the emulation mode
Avoid vbios operation on emulation since there is no vbios post duirng emulation,
use the common hw_init to simulate the post
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Acked-By: Alex Deucher <alexander.deucher@amd.com>
Acked-By: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kai-Heng Feng [Thu, 8 Feb 2018 09:46:01 +0000 (17:46 +0800)]
drm/amdgpu: add new device to use atpx quirk
The affected system (0x0813) is pretty similar to another one (0x0812),
it also needs to use ATPX power control.
Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Rex Zhu [Fri, 2 Feb 2018 09:13:02 +0000 (17:13 +0800)]
drm/amd/pp: Restore power profile mode in auto dpm level on Vega10
As auto power profile mode still not support on vega10, so
just restore default profile mode in auto dpm level.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 29 Jan 2018 10:07:01 +0000 (18:07 +0800)]
drm/amdgpu: Get/set dgpu power cap via hwmon API
v2: change power unit to microWatt
Adust power limit through power1_cap
Get min/max power limit through power1_cap_min/power1_cap_max
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 29 Jan 2018 10:04:18 +0000 (18:04 +0800)]
drm/amd/pp: Expose set/get_power_limit for DGPU
User can change power limit between
[0, 1] * max power limit.
Set power limit to 0, restore to max power limit.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Matthias Kaehlcke [Wed, 7 Feb 2018 21:43:52 +0000 (13:43 -0800)]
amdgpu/dc: Fix enum mismatch in calls to program_color_matrix()
The driver passes GRAPHICS_CSC_ADJUST_TYPE_SW of type enum
graphics_csc_adjust_type to program_color_matrix(), however the function
expects a parameter of type enum grph_color_adjust_option. Supposedly
the intention was to pass GRPH_COLOR_MATRIX_SW, which has the same value
as GRAPHICS_CSC_ADJUST_TYPE_SW, so the mismatch didn't cause any trouble.
Pass GRPH_COLOR_MATRIX_SW to program_color_matrix() instead of
GRAPHICS_CSC_ADJUST_TYPE_SW, this also fixes the following warning when
building the kernel with clang:
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.c:1129:24:
error: implicit conversion from enumeration type
'enum graphics_csc_adjust_type' to different enumeration type
'enum grph_color_adjust_option' [-Werror,-Wenum-conversion]
xfm_dce, tbl_entry, GRAPHICS_CSC_ADJUST_TYPE_SW);
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Matthias Kaehlcke [Wed, 7 Feb 2018 19:49:28 +0000 (11:49 -0800)]
drm/amd/display: Remove extra pairs of parentheses in dce_calcs.c
The double parentheses are not needed. Removing them fixes multiple
warnings like this when building with clang:
drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:617:42:
error: equality comparison with extraneous parentheses
[-Werror,-Wparentheses-equality]
if ((data->graphics_micro_tile_mode == bw_def_rotated_micro_tiling)) {
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shaoyun Liu [Thu, 1 Feb 2018 21:45:26 +0000 (16:45 -0500)]
drm/amdgpu: Enable ip block bit mask print out info by default
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Matthias Kaehlcke [Wed, 7 Feb 2018 19:10:17 +0000 (11:10 -0800)]
drm/amd/powerplay: Remove extra pair of parentheses
The double parentheses are not needed. Removing them fixes the following
warning when building with clang:
drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c:419:29:
error: equality comparison with extraneous parentheses
[-Werror,-Wparentheses-equality]
if ((data->vdd_gfx_control == SMU7_VOLTAGE_CONTROL_BY_SVID2)) {
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Matthias Kaehlcke [Wed, 7 Feb 2018 18:58:43 +0000 (10:58 -0800)]
drm/amd/powerplay: Fix enum mismatch
In several locations the driver uses AMD_CG_STATE_UNGATE (type enum
amd_clockgating_state) instead of AMD_PG_STATE_UNGATE (type enum
amd_powergating_stat) and vice versa. Both constants have the same
value, so this doesn't cause any problems, but we still want to pass
the correct type.
Fixing the mismatch resolves multiple warnings like this when building
with clang:
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_clockpowergating.c:169:7:
error: implicit conversion from enumeration type 'enum
amd_powergating_state' to different enumeration type 'enum
amd_clockgating_state' [-Werror,-Wenum-conversion]
AMD_PG_STATE_UNGATE);
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 6 Feb 2018 21:21:05 +0000 (16:21 -0500)]
drm/amdgpu: add mmhub powergating set by smu
PSP will disable legacy mmhub PG setting that is programming
registers, and drive will use SMC message to
set it up.
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 6 Feb 2018 19:38:38 +0000 (14:38 -0500)]
drm/amd/powerplay: add mmhub powergating by smu in powerplay
new generic interface is added in powerplay.
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 6 Feb 2018 19:42:04 +0000 (14:42 -0500)]
drm/amd/powerplay: implement set_mmhub_powergating_by_smu for Raven
mmhub PG is enabled by SMU FW only for Raven.
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 6 Feb 2018 21:19:24 +0000 (16:19 -0500)]
drm/amdgpu: add an interface of amdgpu_dpm_set_mmhub_powergating_by_smu
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dan Carpenter [Tue, 6 Feb 2018 12:35:00 +0000 (15:35 +0300)]
drm/amd/powerplay: delete some dead code
We deleted some code in
e154162ef75d ("drm/amd/powerplay: refine pp code
for raven") but there were a few related bits that were missed. Let's
delete them as well.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 6 Feb 2018 19:00:01 +0000 (14:00 -0500)]
drm/amd/powerplay: Zero out power data in AMDGPU_PP_SENSOR_GPU_POWER readout
Since 12 of the 16 bytes are not initialized with anything let's ensure they're
sensibly zeroed out otherwise debugfs callers will read back garbage
(because they assume debugfs wrote sensible data back...)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Tue, 23 Jan 2018 22:21:43 +0000 (17:21 -0500)]
drm/amd/display: Add primary tmz_c and meta tmz tmz_c.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Mon, 29 Jan 2018 17:44:33 +0000 (12:44 -0500)]
drm/amd/display: enable #PME code path for RV.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Thu, 25 Jan 2018 06:06:31 +0000 (01:06 -0500)]
drm/amd/display: dal 3.1.32
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Krunoslav Kovac [Fri, 19 Jan 2018 22:55:26 +0000 (17:55 -0500)]
drm/amd/display: Optimize regamma calculations
There are several optimizations:
1) Use predefined SRGB, don't calculate. This is the most common case.
2) Precompute HW X points at boot since they're fixed in ColModule
3) Precompute PQ - it never changes and is very CPU intensive in fixed pt.
4) Reduce number of points in ColModule to 512 (32x16) from 1024. This also
requires reducing some regions for legacy DCEs to 16 pts at most.
Performance
1) is super-fast, build_output_tf is 1-2us, down from 25000-30000.
Programming also fast since only one reg write.
2)+3) gives build_output_tf for PQ in ~100us range, down from ~80000-110000
2) + 4) results in slightly over 50% improvement. It gives an idea of the
savings when we can't use SRGB or PQ table (e.g. sdr white level > 80).
There's also a bit of refactoring: renaming some stuff that was misleading
and removing a lot of magic numbers that novices might not be able to
understand where they come from and what they mean.
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Wed, 24 Jan 2018 18:18:57 +0000 (13:18 -0500)]
drm/amd/display: resume from S3 bypass power down HW block.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Fri, 19 Jan 2018 00:09:06 +0000 (19:09 -0500)]
drm/amd/display: add eDP 1.2+ polling for T7
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Wed, 24 Jan 2018 08:22:22 +0000 (03:22 -0500)]
drm/amd/display: dal 3.1.31
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
John Barberiz [Tue, 23 Jan 2018 16:47:15 +0000 (11:47 -0500)]
drm/amd/display: Fixed if statement parameters to add a delay on disconnect
Signed-off-by: John Barberiz <jbarberi@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Tue, 23 Jan 2018 16:39:09 +0000 (11:39 -0500)]
drm/amd/display: Add return value for detect dp.
System soft hang when hotplug specific 4K DP panel
due to link caps read error and incorrect link setting
parmas to enable dp.
Add status check for DPCD read and add return value
for detect dp, in case of false, return from caller,
avoid further false operation.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Tue, 23 Jan 2018 16:12:27 +0000 (11:12 -0500)]
drm/amd/display: fix boot-up on vega10
Fixing null-deref on Vega10 due to regression after
'fix cursor related Pstate hang' change.
Added null checks in setting cursor position.
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nikola Cornij [Thu, 11 Jan 2018 17:51:14 +0000 (12:51 -0500)]
drm/amd/display: Remove couple of unused OPTC registers
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Fri, 19 Jan 2018 23:10:00 +0000 (18:10 -0500)]
drm/amd/display: turn off cursor when disconnect plane
As a precaution to prevent cases where cursor is enabled on a pipe
that is disabled, always turn off cursor when disconnecting plane.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Bernstein [Mon, 15 Jan 2018 21:23:59 +0000 (16:23 -0500)]
drm/amd/display: Expose is_rgb_cspace function in hw_sequencer
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Chalmers [Wed, 17 Jan 2018 19:17:40 +0000 (14:17 -0500)]
drm/amd/display: WBSCL filter init calculation fixes
* Previous code did some calculations with a mix of normal integers and
integers aligned as U2.24 fixed-point values.
* There were bugs in the conversion of the final result into the
S4.19 values required for the registers.
Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Fri, 19 Jan 2018 00:24:27 +0000 (19:24 -0500)]
drm/amd/display: remove unused function prototypes
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Fri, 19 Jan 2018 00:07:54 +0000 (19:07 -0500)]
drm/amd/display: fix cursor related Pstate hang
Move cursor programming to inside the OTG_MASTER_UPDATE_LOCK
If graphics plane go from 1 pipe to hsplit, the cursor updates
after mpc programming and unlock. Which means there is a window
of time where cursor is enabled on the wrong pipe if it's on
the right side of the screen (i.e. case where cursor need to
move from pipe 0 to pipe 3 post split). This will cause pstate hang.
Solution is to program the cursor while still locked.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mikita Lipski [Thu, 18 Jan 2018 19:53:57 +0000 (14:53 -0500)]
drm/amd/display: Set irq state only on existing crtcs
Because AMDGPU_CRTC_IRQ_VLINE1 = 6, it expected 6 more crtcs to be
programed with disabled irq state in amdgpu_irq_disable_all. That caused errors and accessed
the wrong memory location.
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 19 Jan 2018 16:59:16 +0000 (11:59 -0500)]
drm/amd/display: Null check for gamma correction.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Thu, 18 Jan 2018 19:51:28 +0000 (14:51 -0500)]
drm/amd/display: Check hubp in pipe_ctx not in res_pool.
When disable plane, check power gate flag in hubp with pipe_ctx,
not with res_pool.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Sun, 4 Feb 2018 18:36:52 +0000 (19:36 +0100)]
drm/amdgpu: sync the VM PD/PT before clearing it
Otherwise we might overwrite stuff which is still in use.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Thu, 18 Jan 2018 19:55:35 +0000 (14:55 -0500)]
drm/amd/display: dal 3.1.30
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
John Barberiz [Thu, 18 Jan 2018 17:22:11 +0000 (12:22 -0500)]
drm/amd/display: Bypass gamma set if not standard type
If non-standard gamma type detected set identity matrix flag
so that we can bypass the gamma mode.
Signed-off-by: John Barberiz <jbarberi@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Thu, 18 Jan 2018 17:53:04 +0000 (12:53 -0500)]
drm/amd/display: wait for T9 after backlight off mainlink blank.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Fri, 12 Jan 2018 18:13:11 +0000 (13:13 -0500)]
drm/amd/display: Fix multiple definitions of handle_crc_irq
If CONFIG_DEBUG_FS is disabled, then CRC should also be disabled.
Therefore, amdgpu_dm_crtc_handle_crc_irq was redefined as a no-op
function within amdgpu_dm.h.
However, since amdgpu_dm.h is included in multiple files, this caused
conflicts when linking during compile. Therefore, Use a macro to
define the function as a no-op instead.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jerry (Fangzhi) Zuo [Wed, 17 Jan 2018 18:24:28 +0000 (13:24 -0500)]
drm/amd/display: Fixed non-native modes not lighting up
There is no need to call drm_mode_set_crtcinfo() again once
crtc timing is decided. Otherwise non-native/unsupported timing
might get overwritten.
Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Martin Tsai [Wed, 17 Jan 2018 05:55:26 +0000 (13:55 +0800)]
drm/amd/display: Remove return when no EDID read.
Signed-off-by: Martin Tsai <martin.tsai@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Tue, 16 Jan 2018 04:22:51 +0000 (23:22 -0500)]
drm/amd/display: BL setting save/restore
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 25 Jan 2018 21:06:41 +0000 (16:06 -0500)]
drm/amd/display: Adding missing TMZ sh/mask entries for DCN1 SURFACE_CONTROL
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <tony.cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 2 Feb 2018 20:05:40 +0000 (21:05 +0100)]
drm/amdgpu: clear the shadow fence as well
It also needs to be initialized.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 2 Feb 2018 20:00:44 +0000 (21:00 +0100)]
drm/amdgpu: release the VM shadow in the error path as well
Without it we run into a memory leak.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 2 Feb 2018 17:31:27 +0000 (12:31 -0500)]
drm/amdgpu: remove unused display_vblank_wait interface
No longer used since we changed the MC programming sequence.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 2 Feb 2018 17:24:23 +0000 (12:24 -0500)]
drm/amdgpu/dce: fix mask in dce_v*_0_is_in_vblank
Using the wrong mask.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Noticed-by: Hans de Ruiter <hans@keasigmadelta.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arnd Bergmann [Fri, 2 Feb 2018 12:31:26 +0000 (13:31 +0100)]
drm/amd/display: fix incompatible structure layouts
Building the amd display driver with link-time optimizations revealed a bug
that caused dal_cmd_tbl_helper_dce80_get_table() and
dal_cmd_tbl_helper_dce110_get_table() get called with an incompatible
return type between the two callers in command_table_helper.c and
command_table_helper2.c:
drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce80/command_table_helper_dce80.h:31: error: type of 'dal_cmd_tbl_helper_dce80_get_table' does not match original declaration [-Werror=lto-type-mismatch]
const struct command_table_helper *dal_cmd_tbl_helper_dce80_get_table(void);
drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce80/command_table_helper_dce80.c:351: note: 'dal_cmd_tbl_helper_dce80_get_table' was previously declared here
const struct command_table_helper *dal_cmd_tbl_helper_dce80_get_table(void)
drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce110/command_table_helper_dce110.h:32: error: type of 'dal_cmd_tbl_helper_dce110_get_table' does not match original declaration [-Werror=lto-type-mismatch]
const struct command_table_helper *dal_cmd_tbl_helper_dce110_get_table(void);
drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce110/command_table_helper_dce110.c:361: note: 'dal_cmd_tbl_helper_dce110_get_table' was previously declared here
const struct command_table_helper *dal_cmd_tbl_helper_dce110_get_table(void)
The two versions of the structure are obviously derived from the same
one, but have diverged over time, before they got added to the kernel.
This moves the structure to a new shared header file and uses the superset
of the members, to ensure the interfaces are all compatible.
Fixes:
ae79c310b1a6 ("drm/amd/display: Add DCE12 bios parser support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 31 Jan 2018 15:03:19 +0000 (16:03 +0100)]
drm/amdgpu: cache the fence to wait for a VMID
Beneficial when a lot of processes are waiting for VMIDs.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 31 Jan 2018 13:24:45 +0000 (14:24 +0100)]
drm/amdgpu: restructure amdgpu_vmid_grab
Now that we have the different cases for grabbing a VMID in separate
functions, restructure the top level function to only have one place
where VMIDs are assigned to jobs.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 31 Jan 2018 12:35:25 +0000 (13:35 +0100)]
drm/amdgpu: move reusing VMIDs into separate function
Let's try this once more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 31 Jan 2018 10:56:53 +0000 (11:56 +0100)]
drm/amdgpu: cleanup and simplify amdgpu_vmid_grab_reserved
Drop the "_locked" from the name, cleanup and simplify the logic a bit.
Add missing comments.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>