Merge branch 'clk-ralink' into clk-next

 - Proper clk driver for Mediatek MT7621 SoCs

* clk-ralink:
  MAINTAINERS: add MT7621 CLOCK maintainer
  staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk'
  staging: mt7621-dts: make use of new 'mt7621-clk'
  clk: ralink: add clock driver for mt7621 SoC
  dt: bindings: add mt7621-sysc device tree binding documentation
  dt-bindings: clock: add dt binding header for mt7621 clocks

Merge branches 'clk-imx', 'clk-samsung', 'clk-zynq', 'clk-rockchip' and 'clk-uniphier' into clk-next

 - Simplify Zynq Kconfig dependencies

* clk-imx:
  clk: imx: Reference preceded by free
  clk: imx8mq: Correct the pcie1 sels
  clk: imx8mp: Remove the none exist pcie clocks
  clk: imx: Fix reparenting of UARTs not associated with stdout

* clk-samsung:
  clk: samsung: Remove redundant dev_err calls
  clk: exynos7: Mark aclk_fsys1_200 as critical

* clk-zynq:
  clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable
  clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback
  clk: zynqmp: Drop dependency on ARCH_ZYNQMP
  clk: zynqmp: Enable the driver if ZYNQMP_FIRMWARE is selected

* clk-rockchip:
  clk: rockchip: drop MODULE_ALIAS from rk3399 clock controller
  clk: rockchip: drop parenthesis from ARM || COMPILE_TEST depends
  clk: rockchip: add clock controller for rk3568
  clk: rockchip: support more core div setting
  dt-binding: clock: Document rockchip, rk3568-cru bindings
  clk: rockchip: add dt-binding header for rk3568

* clk-uniphier:
  clk: uniphier: Fix potential infinite loop

Merge branches 'clk-cleanup', 'clk-renesas', 'clk-socfpga', 'clk-allwinner' and 'clk-qcom' into clk-next

 - Use clk_hw pointers in socfpga driver
 - Cleanup parent data in qcom clk drivers

* clk-cleanup:
  clk: Drop double "if" in clk_core_determine_round_nolock() comment
  clk: at91: Trivial typo fixes in the file sama7g5.c
  clk: use clk_core_enable_lock() a bit more

* clk-renesas:
  clk: renesas: Zero init clk_init_data
  clk: renesas: Couple of spelling fixes
  clk: renesas: r8a779a0: Add CMT clocks
  clk: renesas: r8a7795: Add TMU clocks
  clk: renesas: r8a779a0: Add TSC clock
  clk: renesas: r8a779a0: Add TMU clocks
  clk: renesas: r8a77965: Add DAB clock
  clk: renesas: r8a77990: Add DAB clock

* clk-socfpga:
  clk: socfpga: remove redundant initialization of variable div
  clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return
  clk: socfpga: Fix code formatting
  clk: socfpga: Convert to s10/agilex/n5x to use clk_hw
  clk: socfpga: arria10: convert to use clk_hw
  clk: socfpga: use clk_hw_register for a5/c5

* clk-allwinner:
  clk: sunxi: Demote non-conformant kernel-doc headers
  clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll

* clk-qcom: (45 commits)
  clk: qcom: rpmh: add support for SDX55 rpmh IPA clock
  clk: qcom: gcc-sdm845: get rid of the test clock
  clk: qcom: convert SDM845 Global Clock Controller to parent_data
  dt-bindings: clock: separate SDM845 GCC clock bindings
  clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLE
  clk: qcom: gcc-sm8350: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sm8250: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sm8150: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sc8180x: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-sc7180: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: videocc-sm8250: use parent_hws where possible
  clk: qcom: videocc-sm8150: use parent_hws where possible
  clk: qcom: gpucc-sm8250: use parent_hws where possible
  clk: qcom: gpucc-sm8150: use parent_hws where possible
  clk: qcom: gcc-sm8350: use parent_hws where possible
  clk: qcom: gcc-sm8250: use parent_hws where possible
  clk: qcom: gcc-sm8150: use parent_hws where possible
  clk: qcom: gcc-sdx55: use parent_hws where possible
  ...

MAINTAINERS: add MT7621 CLOCK maintainer

Adding myself as maintainer for mt7621 clock driver.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210410055059.13518-5-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk'

Vendor listed for mediatek in kernel vendor file 'vendor-prefixes.yaml'
contains 'mediatek' as a valid vendor string. Some nodes in the device
tree are using an invalid vendor string vfor 'mtk' instead. Fix all of
them in dts file. Update also ralink mt7621 related code to properly
match new strings. Even there are used in the device tree there are
some strings that are not referred anywhere but have been also updated
with new vendor name. These are 'mtk,mt7621-wdt', 'mtk,mt7621-nand',
'mtk,mt7621-mc', and 'mtk,mt7621-cpc'.

Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210410055059.13518-4-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

staging: mt7621-dts: make use of new 'mt7621-clk'

Clocks for SoC mt7621 have been properly integrated so there is
no need to declare fixed clocks at all in the device tree. Remove
all of them, add new device tree nodes for mt7621-clk and update
the rest of the nodes to use them.

Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210410055059.13518-3-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: ralink: add clock driver for mt7621 SoC

The documentation for this SOC only talks about two
registers regarding to the clocks:
* SYSC_REG_CPLL_CLKCFG0 - provides some information about
boostrapped refclock. PLL and dividers used for CPU and some
sort of BUS.
* SYSC_REG_CPLL_CLKCFG1 - a banch of gates to enable/disable
clocks for all or some ip cores.

Looking into driver code, and some openWRT patched there are
another frequencies which are used in some drivers (uart, sd...).
According to all of this information the clock plan for this
SoC is set as follows:
- Main top clock "xtal" from where all the rest of the world is
derived.
- CPU clock "cpu" derived from "xtal" frequencies and a bunch of
register reads and predividers.
- BUS clock "bus" derived from "cpu" and with (cpu / 4) MHz.
- Fixed clocks from "xtal":
    * "50m": 50 MHz.
    * "125m": 125 MHz.
    * "150m": 150 MHz.
    * "250m": 250 MHz.
    * "270m": 270 MHz.

We also have a buch of gate clocks with their parents:
  * "hsdma": "150m"
  * "fe": "250m"
  * "sp_divtx": "270m"
  * "timer": "50m"
  * "pcm": "270m"
  * "pio": "50m"
  * "gdma": "bus"
  * "nand": "125m"
  * "i2c": "50m"
  * "i2s": "270m"
  * "spi": "bus"
  * "uart1": "50m"
  * "uart2": "50m"
  * "uart3": "50m"
  * "eth": "50m"
  * "pcie0": "125m"
  * "pcie1": "125m"
  * "pcie2": "125m"
  * "crypto": "250m"
  * "shxc": "50m"

With this information the clk driver will provide clock and gates
functionality from a a set of hardcoded clocks allowing to define
a nice device tree without fixed clocks.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210410055059.13518-2-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: uniphier: Fix potential infinite loop

The for-loop iterates with a u8 loop counter i and compares this
with the loop upper limit of num_parents that is an int type.
There is a potential infinite loop if num_parents is larger than
the u8 loop counter. Fix this by making the loop counter the same
type as num_parents.  Also make num_parents an unsigned int to
match the return type of the call to clk_hw_get_num_parents.

Addresses-Coverity: ("Infinite loop")
Fixes: 734d82f4a678 ("clk: uniphier: add core support code for UniPhier clock driver")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
Link: https://lore.kernel.org/r/20210409090104.629722-1-colin.king@canonical.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: rpmh: add support for SDX55 rpmh IPA clock

The IPA core clock is required for SDX55.  Define it.

Signed-off-by: Alex Elder <elder@linaro.org>
Link: https://lore.kernel.org/r/20210409134407.841137-1-elder@linaro.org
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

Merge tag 'v5.13-rockchip-clocks' of git://git./linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull Rockchip clk driver updates from Heiko Stuebner:

 - Support for the clock controller on the new rk3568
 - Some cleanups for rk3399 modularization

* tag 'v5.13-rockchip-clocks' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: drop MODULE_ALIAS from rk3399 clock controller
  clk: rockchip: drop parenthesis from ARM || COMPILE_TEST depends
  clk: rockchip: add clock controller for rk3568
  clk: rockchip: support more core div setting
  dt-binding: clock: Document rockchip, rk3568-cru bindings
  clk: rockchip: add dt-binding header for rk3568

Merge tag 'clk-v5.13-samsung' of https://git./linux/kernel/git/snawrocki/clk into clk-samsung

Pull Samsung clk driver updates from Sylwester Nawrocki:

 - clean up of redundant dev_err() calls after dev_ioremap_resource()
 - fix for the clk-exynos7 driver (part of upcoming Galaxy S6 device
   support)

* tag 'clk-v5.13-samsung' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
  clk: samsung: Remove redundant dev_err calls
  clk: exynos7: Mark aclk_fsys1_200 as critical

clk: qcom: gcc-sdm845: get rid of the test clock

The test clock isn't in the bindings and apparently it's not used by
anyone upstream.  Remove it.

Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210409183004.1617777-4-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: convert SDM845 Global Clock Controller to parent_data

Convert the clock driver to specify parent data rather than parent
names, to actually bind using 'clock-names' specified in the DTS rather
than global clock names.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210409183004.1617777-3-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

dt-bindings: clock: separate SDM845 GCC clock bindings

Separate qcom,gcc-sdm845 clock bindings from the clock-less
qcom,gcc.yaml, so that we can add required clocks and clock-names
properties.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210409183004.1617777-2-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE

CONFIG_IPQ_APSS_PLL is tristate option and therefore this driver can
be compiled as a module. This patch adds missing MODULE_DEVICE_TABLE
definition which generates correct modalias for automatic loading of
this driver when it is built as an external module.

Fixes: ecd2bacfbbc4 ("clk: qcom: Add ipq apss pll driver")
Signed-off-by: Chen Hui <clare.chenhui@huawei.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210409082352.233810-4-clare.chenhui@huawei.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE

CONFIG_QCOM_A53PLL is tristate option and therefore this driver can be
compiled as a module. This patch adds missing MODULE_DEVICE_TABLE
definition which generates correct modalias for automatic loading of
this driver when it is built as an external module.

Fixes: 0c6ab1b8f894 ("clk: qcom: Add A53 PLL support")
Signed-off-by: Chen Hui <clare.chenhui@huawei.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210409082352.233810-3-clare.chenhui@huawei.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLE

CONFIG_QCOM_A7PLL is tristate option and therefore this driver can be
compiled as a module. This patch adds missing MODULE_DEVICE_TABLE
definition which generates correct modalias for automatic loading of
this driver when it is built as an external module.

Fixes: 5a5223ffd7ef ("clk: qcom: Add A7 PLL support")
Signed-off-by: Chen Hui <clare.chenhui@huawei.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210409082352.233810-2-clare.chenhui@huawei.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

dt: bindings: add mt7621-sysc device tree binding documentation

Adds device tree binding documentation for clocks in the
MT7621 SOC.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210309052226.29531-3-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

dt-bindings: clock: add dt binding header for mt7621 clocks

Adds dt binding header for 'mediatek,mt7621-clk' clocks.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210309052226.29531-2-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

Merge tag 'clk-imx-5.13' of https://git./linux/kernel/git/abelvesa/linux into clk-imx

Pull i.MX clk driver updates from Abel Vesa:

 - Fix reparenting of UART clocks by initializing only the ones
   associated to stdout
 - Correct the PCIE clocks for i.MX8MP and i.MX8MQ
 - Make LPCG and SCU clocks return on registering failure

* tag 'clk-imx-5.13' of https://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux:
  clk: imx: Reference preceded by free
  clk: imx8mq: Correct the pcie1 sels
  clk: imx8mp: Remove the none exist pcie clocks
  clk: imx: Fix reparenting of UARTs not associated with stdout

clk: samsung: Remove redundant dev_err calls

There is error message within devm_ioremap_resource
already, so remove the dev_err calls to avoid redundant
error messages.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Chen Hui <clare.chenhui@huawei.com>
Link: https://lore.kernel.org/linux-clk/20210408134856.207305-1-clare.chenhui@huawei.com
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable

If there is a IOCTL_SET_PLL_FRAC_MODE request sent to ATF ever,
we shouldn't skip invoking PM_CLOCK_ENABLE fn even though this
pll has been enabled. In ATF implementation, it will only assign
the mode to the variable (struct pm_pll *)pll->mode when handling
IOCTL_SET_PLL_FRAC_MODE call. Invoking PM_CLOCK_ENABLE can force
ATF send request to PWU to set the pll mode to PLL's register.

There is a scenario that happens in enabling VPLL_INT(clk_id:96):
1) VPLL_INT has been enabled during booting.
2) A driver calls clk_set_rate and according to the rate, the VPLL_INT
   should be set to FRAC mode. Then zynqmp_pll_set_mode is called
   to pass IOCTL_SET_PLL_FRAC_MODE to ATF. Note that at this point
   ATF just stores the mode to a variable.
3) This driver calls clk_prepare_enable and zynqmp_pll_enable is
   called to try to enable VPLL_INT pll. Because of 1), the function
   zynqmp_pll_enable just returns without doing anything after checking
   that this pll has been enabled.

In the scenario above, the pll mode of VPLL_INT will never be set
successfully. So adding set_pll_mode to check condition to fix it.

Fixes: 3fde0e16d016 ("drivers: clk: Add ZynqMP clock driver")
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210406153131.601701-1-quanyang.wang@windriver.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback

The round_rate callback should only perform rate calculation and not
involve calling zynqmp_pll_set_mode to change the pll mode. So let's
move zynqmp_pll_set_mode out of round_rate and to set_rate callback.

Fixes: 3fde0e16d016 ("drivers: clk: Add ZynqMP clock driver")
Reported-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Link: https://lore.kernel.org/r/20210406154015.602779-1-quanyang.wang@windriver.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: zynqmp: Drop dependency on ARCH_ZYNQMP

The clock driver depends on ZYNQMP_FIRMWARE which in turn depends on
ARCH_ZYNQMP. Simplify the Kconfig by dropping the redundant dependency
on ARCH_ZYNQMP as it'll be applied transitively via ZYNQMP_FIRMWARE.

Signed-off-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Link: https://lore.kernel.org/r/20210322061754.1065367-3-punit1.agrawal@toshiba.co.jp
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: zynqmp: Enable the driver if ZYNQMP_FIRMWARE is selected

When booting the kernel on zynqmp based platforms such as Ultra96v2,
peripheral drivers such as that for the sdcard depend on the presence
of clocks.

Enable the clock driver if it's dependencies are compiled to avoid
building an unbootable kernel.

Signed-off-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Link: https://lore.kernel.org/r/20210322061754.1065367-2-punit1.agrawal@toshiba.co.jp
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sm8350: use ARRAY_SIZE instead of specifying num_parents

Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
adding/removing entries to/from parent_data easy and errorproof.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-34-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sm8250: use ARRAY_SIZE instead of specifying num_parents

Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
adding/removing entries to/from parent_data easy and errorproof.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-33-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sm8150: use ARRAY_SIZE instead of specifying num_parents

Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
adding/removing entries to/from parent_data easy and errorproof.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-32-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sc8180x: use ARRAY_SIZE instead of specifying num_parents

Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
adding/removing entries to/from parent_data easy and errorproof.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-31-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sc7180: use ARRAY_SIZE instead of specifying num_parents

Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
adding/removing entries to/from parent_data easy and errorproof.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-30-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: videocc-sm8250: use parent_hws where possible

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-29-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: videocc-sm8150: use parent_hws where possible

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-28-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gpucc-sm8250: use parent_hws where possible

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-27-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gpucc-sm8150: use parent_hws where possible

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-26-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sm8350: use parent_hws where possible

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-25-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sm8250: use parent_hws where possible

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-24-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sm8150: use parent_hws where possible

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-23-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sdx55: use parent_hws where possible

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-22-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sc7280: use parent_hws where possible

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-21-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sc7180: use parent_hws where possible

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-20-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: dispcc-sm8250: use parent_hws where possible

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-19-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: dispcc-sc7180: use parent_hws where possible

Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-18-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: videocc-sdm845: get rid of the test clock

The test clock isn't in the bindings and apparently it's not used by
anyone upstream.  Remove it.

Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-17-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: dispcc-sdm845: get rid of the test clock

The test clock isn't in the bindings and apparently it's not used by
anyone upstream.  Remove it.

Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-16-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gpucc-sdm845: get rid of the test clock

The test clock isn't in the bindings and apparently it's not used by
anyone upstream.  Remove it.

Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-15-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: videocc-sdm845: convert to parent data

Convert the clock driver to specify parent data rather than parent
names, to actually bind using 'clock-names' specified in the DTS rather
than global clock names.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-14-dmitry.baryshkov@linaro.org
[sboyd@kernel.org: Silence checkpatch block comments]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gpucc-sdm845: convert to parent data

Convert the clock driver to specify parent data rather than parent
names, to actually bind using 'clock-names' specified in the DTS rather
than global clock names.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-13-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: dispcc-sdm845: convert to parent data

Convert the clock driver to specify parent data rather than parent
names, to actually bind using 'clock-names' specified in the DTS rather
than global clock names.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-12-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: videocc-sm8250: drop unused enum entries

Drop unused enum entries from the list of parent enums.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-11-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: videocc-sm8150: drop unused enum entries

Drop unused enum entries from the list of parent enums.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-10-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: videocc-sc7180: drop unused enum entries

Drop unused enum entries from the list of parent enums.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/20210405224743.590029-9-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gpucc-sm8250: drop unused enum entries

Drop unused enum entries from the list of parent enums.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/20210405224743.590029-8-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gpucc-sm8150: drop unused enum entries

Drop unused enum entries from the list of parent enums.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-7-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gpucc-sdm845: drop unused enum entries

Drop unused enum entries from the list of parent enums.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-6-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gpucc-sc7180: drop unused enum entries

Drop unused enum entries from the list of parent enums.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-5-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sm8250: drop unused enum entries

Drop unused enum entries from the list of parent enums.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-4-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: dispcc-sm8250: drop unused enum entries

Drop unused enum entries from the list of parent enums.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-3-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: dispcc-sc7180: drop unused enum entries

Drop unused enum entries from the list of parent enums.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/20210405224743.590029-2-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: socfpga: remove redundant initialization of variable div

The variable div is being initialized with a value that is
never read and it is being updated later with a new value.  The
initialization is redundant and can be removed.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20210406182746.432861-1-colin.king@canonical.com
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return

There is an error return path that is not kfree'ing socfpga_clk leading
to a memory leak. Fix this by adding in the missing kfree call.

Addresses-Coverity: ("Resource leak")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20210406170115.430990-1-colin.king@canonical.com
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: exynos7: Mark aclk_fsys1_200 as critical

This clock must be always enabled to allow access to any registers in
fsys1 CMU. Until proper solution based on runtime PM is applied
(similar to what was done for Exynos5433), mark that clock as critical
so it won't be disabled.

It was observed on Samsung Galaxy S6 device (based on Exynos7420), where
UFS module is probed before pmic used to power that device.
In this case defer probe was happening and that clock was disabled by
UFS driver, causing whole boot to hang on next CMU access.

Fixes: 753195a749a6 ("clk: samsung: exynos7: Correct CMU_FSYS1 clocks names")
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/linux-clk/20201024154346.9589-1-pawel.mikolaj.chmiel@gmail.com
[s.nawrocki: Added comment in the code]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

clk: imx: Reference preceded by free

When register failed, clk will be freed, it will generate dangling pointer
problem in later reference. it should return directly.

Signed-off-by: Jian Dong <dongjian@yulong.com>
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>

clk: imx8mq: Correct the pcie1 sels

- The sys2_pll_50m should be one of the clock sels of PCIE_AUX clock.
Change the sys2_pll_500m to sys2_pll_50m.
- Correct one misspell of the imx8mq_pcie1_ctrl_sels definition, from
"sys2_pll_250m" to "sys2_pll_333m".

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>

clk: imx8mp: Remove the none exist pcie clocks

In the i.MX8MP PCIe design, the PCIe PHY REF clock comes from external
OSC or internal system PLL. It is configured in the IOMUX_GPR14 register
directly, and can't be contolled by CCM at all.
Remove the PCIE PHY clock from clock driver to clean up codes.
There is only one PCIe in i.MX8MP, remove the none exist second PCIe
related clocks.
Remove the none exsits clocks IDs together.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>

clk: imx: Fix reparenting of UARTs not associated with stdout

Most if not all i.MX SoC's call a function which enables all UARTS.
This is a problem for users who need to re-parent the clock source,
because any attempt to change the parent results in an busy error
due to the fact that the clocks have been enabled already.

  clk: failed to reparent uart1 to sys_pll1_80m: -16

Instead of pre-initializing all UARTS, scan the device tree to see
which UART clocks are associated to stdout, and only enable those
UART clocks if it's needed early.  This will move initialization of
the remaining clocks until after the parenting of the clocks.

When the clocks are shutdown, this mechanism will also disable any
clocks that were pre-initialized.

Fixes: 9461f7b33d11c ("clk: fix CLK_SET_RATE_GATE with clock rate protection")
Suggested-by: Aisheng Dong <aisheng.dong@nxp.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Tested-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>

Merge tag 'sunxi-clk-for-5.13-1' of https://git./linux/kernel/git/sunxi/linux into clk-allwinner

Pull Allwinner clk driver updates from Maxime Ripard:

"Our usual PR for the Allwinner SoCs, this time adding support for sigma-delta
modulation on the V3s Audio PLL, and fixing a kernel doc header."

* tag 'sunxi-clk-for-5.13-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi: Demote non-conformant kernel-doc headers
  clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll

Merge tag 'renesas-clk-for-v5.13-tag2' of git://git./linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

 - Spelling fixes
 - Zero init clk_init_data

* tag 'renesas-clk-for-v5.13-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: Zero init clk_init_data
  clk: renesas: Couple of spelling fixes

clk: socfpga: Fix code formatting

This function's parameters are oddly formatted. Looks like a newline was
missed or something. Fix it.

Cc: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210331023119.3294893-1-sboyd@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: socfpga: Convert to s10/agilex/n5x to use clk_hw

As recommended by Stephen Boyd, convert the Agilex/Stratix10/n5x clock
driver to use the clk_hw registration method.

Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210302214151.1333447-3-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: socfpga: arria10: convert to use clk_hw

As recommended by Stephen Boyd, convert the Arria10 clock driver to use
the clk_hw registration method.

Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210302214151.1333447-2-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: socfpga: use clk_hw_register for a5/c5

As recommended by Stephen Boyd, convert the cyclone5/arria5 clock driver
to use the clk_hw registration method.

Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210302214151.1333447-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: renesas: Zero init clk_init_data

As clk_core_populate_parent_map() checks clk_init_data.num_parents
first, and checks clk_init_data.parent_names[] before
clk_init_data.parent_data[] and clk_init_data.parent_hws[], leaving the
latter uninitialized doesn't do harm for now.  However, it is better to
play it safe, and initialize all clk_init_data structures to zeroes, to
avoid any current and future members containing uninitialized data.

Remove a few explicit zero initializers, which are now superfluous.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20210326105434.1574796-1-geert+renesas@glider.be

clk: qcom: camcc: Update the clock ops for the SC7180

Some of the RCGs could be always ON from the XO source and could be used
as the clock on signal for the GDSC to be operational. In the cases where
the GDSCs are parked at different source with the source clock disabled,
it could lead to the GDSC to be stuck at ON/OFF during gdsc disable/enable.
Thus park the RCGs at XO during clock disable and update the rcg_ops to
use the shared_ops.

Fixes: 15d09e830bbc ("clk: qcom: camcc: Add camera clock controller driver for SC7180")
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1616809265-11912-1-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

Merge tag 'renesas-clk-for-v5.13-tag1' of git://git./linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

 - Add DAB hardware accelerator clocks on R-Car E3 and M3-N
 - Add timer (TMU) clocks on R-Car H3 ES1.0
 - Add Timer (TMU & CMT) and thermal sensor (TSC) clocks on R-Car V3U

* tag 'renesas-clk-for-v5.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: r8a779a0: Add CMT clocks
  clk: renesas: r8a7795: Add TMU clocks
  clk: renesas: r8a779a0: Add TSC clock
  clk: renesas: r8a779a0: Add TMU clocks
  clk: renesas: r8a77965: Add DAB clock
  clk: renesas: r8a77990: Add DAB clock

clk: socfpga: fix iomem pointer cast on 64-bit

Pointers should be cast with uintptr_t instead of integer.  This fixes
warning when compile testing on ARM64:

  drivers/clk/socfpga/clk-gate.c: In function ‘socfpga_clk_recalc_rate’:
  drivers/clk/socfpga/clk-gate.c:102:7: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]

Fixes: b7cec13f082f ("clk: socfpga: Look for the GPIO_DB_CLK by its offset")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210314110709.32599-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: Drop double "if" in clk_core_determine_round_nolock() comment

The comments for clk_core_determine_round_nolock() contain a double
"if": one at the end of a line, followed by another one at the beginning
of the next line.  Drop the former.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210326120833.1578153-1-geert+renesas@glider.be
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: renesas: Couple of spelling fixes

s/suposed/supposed/
s/concurent/concurrent/

Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20210321075813.9471-1-unixbhaskar@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

clk: rockchip: drop MODULE_ALIAS from rk3399 clock controller

As suggested by Stephen during the rk3568 clock review, the MOUDLE_ALIAS
doesn't serve any meaningful purpose, so drop it from the rk3399 as well.

Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20210315112502.343699-2-heiko@sntech.de

clk: rockchip: drop parenthesis from ARM || COMPILE_TEST depends

As suggested by Stephen in the series adding the rk3568 clock controller
the depends works just as well without the parenthesis around the depends.

So to make everything look the same, drop them from existing entries too.

Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20210315112502.343699-1-heiko@sntech.de

clk: rockchip: add clock controller for rk3568

Add the clock tree definition for the new rk3568 SoC.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20210315085608.16010-5-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: rockchip: support more core div setting

Use arrays to support more core independent div settings.
A55 supports each core to work at different frequencies, and each core
has an independent divider control.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20210315085608.16010-4-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

dt-binding: clock: Document rockchip, rk3568-cru bindings

Document the device tree bindings of the rockchip Rk3568 SoC
clock driver in Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20210315085608.16010-2-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: rockchip: add dt-binding header for rk3568

Add the dt-bindings header for the rk3568, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rk3568.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20210315085608.16010-3-zhangqing@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: at91: Trivial typo fixes in the file sama7g5.c

s/critial/critical/  ......two different places
s/parrent/parent/

Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Link: https://lore.kernel.org/r/20210313053222.14706-1-unixbhaskar@gmail.com
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: gcc-sc7180: Use floor ops for the correct sdcc1 clk

While picking commit a8cd989e1a57 ("mmc: sdhci-msm: Warn about
overclocking SD/MMC") back to my tree I was surprised that it was
reporting warnings.  I thought I fixed those!  Looking closer at the
fix, I see that I totally bungled it (or at least I halfway bungled
it).  The SD card clock got fixed (and that was the one I was really
focused on fixing), but I totally adjusted the wrong clock for eMMC.
Sigh.  Let's fix my dumb mistake.

Now both SD and eMMC have floor for the "apps" clock.

This doesn't matter a lot for the final clock rate for HS400 eMMC but
could matter if someone happens to put some slower eMMC on a sc7180.
We also transition through some of these lower rates sometimes and
having them wrong could cause problems during these transitions.
These were the messages I was seeing at boot:
  mmc1: Card appears overclocked; req 52000000 Hz, actual 100000000 Hz
  mmc1: Card appears overclocked; req 52000000 Hz, actual 100000000 Hz
  mmc1: Card appears overclocked; req 104000000 Hz, actual 192000000 Hz

Fixes: 6d37a8d19283 ("clk: qcom: gcc-sc7180: Use floor ops for sdcc clks")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210224095013.1.I2e2ba4978cfca06520dfb5d757768f9c42140f7c@changeid
Reviewed-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: rcg2: Rectify clk_gfx3d rate rounding without mux division

In case the mux is not divided parent_req was mistakenly not assigned to
leading __clk_determine_rate to determine the best frequency setting for
a requested rate of 0, resulting in the msm8996 platform not booting.
Rectify this by refactoring the logic to unconditionally assign to
parent_req.rate with the clock rate the caller is expecting.

Fixes: 7cbb78a99db6 ("clk: qcom: rcg2: Stop hardcoding gfx3d pingpong parent numbers")
Reported-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/r/20210302234106.3418665-1-marijn.suijten@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: qcom: rpmh: Update the XO clock source for SC7280

The bi_tcxo clock source for SC7280 requires a div 4 to derive 19.2MHz
from the xo_board. Thus update the same.

Fixes: fff2b9a65162 ("clk: qcom: rpmh: Add support for RPMH clocks on SC7280")
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1615400283-20100-1-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: use clk_core_enable_lock() a bit more

Use clk_core_enable_lock() and clk_core_disable_lock() in a few places
rather than open-coding them.

Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Link: https://lore.kernel.org/r/20210305003334.575831-1-linux@rasmusvillemoes.dk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

clk: renesas: r8a779a0: Add CMT clocks

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210311092939.3129-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

clk: renesas: r8a7795: Add TMU clocks

Add TMU{0,1,2,3,4} clocks.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210310104554.3281912-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

clk: renesas: r8a779a0: Add TSC clock

Implement support for the TSC clock on V3U.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210309165538.2682268-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

clk: renesas: r8a779a0: Add TMU clocks

Also add CL16MCK source clock for TMU0.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210305143259.12622-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

clk: sunxi: Demote non-conformant kernel-doc headers

Headers must describe their parameters.

Fixes the following W=1 kernel build warning(s):

 drivers/clk/sunxi/clk-sun9i-core.c:27: warning: Function parameter or member 'req' not described in 'sun9i_a80_get_pll4_factors'
 drivers/clk/sunxi/clk-sun9i-core.c:100: warning: Function parameter or member 'req' not described in 'sun9i_a80_get_gt_factors'
 drivers/clk/sunxi/clk-sun9i-core.c:155: warning: Function parameter or member 'req' not described in 'sun9i_a80_get_ahb_factors'
 drivers/clk/sunxi/clk-sun9i-core.c:235: warning: Function parameter or member 'req' not described in 'sun9i_a80_get_apb1_factors'
 drivers/clk/sunxi/clk-usb.c:22: warning: cannot understand function prototype: 'struct usb_reset_data '
 drivers/clk/sunxi/clk-sun6i-ar100.c:26: warning: Function parameter or member 'req' not described in 'sun6i_get_ar100_factors'

Cc: "Emilio López" <emilio@elopez.com.ar>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Jernej Skrabec <jernej.skrabec@siol.net>
Cc: Boris BREZILLON <boris.brezillon@free-electrons.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210303142430.3168703-1-lee.jones@linaro.org

clk: renesas: r8a77965: Add DAB clock

This patch adds the DAB clock to the R8A77965 SoC.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Link: https://lore.kernel.org/r/20210225225147.29920-3-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

clk: renesas: r8a77990: Add DAB clock

This patch adds the DAB clock to the R8A77990 SoC.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Link: https://lore.kernel.org/r/20210225225147.29920-2-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll

Previously it was not possible to achieve clock rates of 24.576MHz and
22.5792MHz, which are commonly required core clocks for the i2s
peripheral of v3s based SoCs.

Add support for those clock rates through the audio pll's sigma-delta
modulator.

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210218112001.479018-2-t.schramm@manjaro.org

Linux 5.12-rc2

Merge tag 'for-linus' of git://git./linux/kernel/git/rdma/rdma

Pull rdma fixes from Jason Gunthorpe:
 "Nothing special here, though Bob's regression fixes for rxe would have
  made it before the rc cycle had there not been such strong winter
  weather!

   - Fix corner cases in the rxe reference counting cleanup that are
     causing regressions in blktests for SRP

   - Two kdoc fixes so W=1 is clean

   - Missing error return in error unwind for mlx5

   - Wrong lock type nesting in IB CM"

* tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma:
  RDMA/rxe: Fix errant WARN_ONCE in rxe_completer()
  RDMA/rxe: Fix extra deref in rxe_rcv_mcast_pkt()
  RDMA/rxe: Fix missed IB reference counting in loopback
  RDMA/uverbs: Fix kernel-doc warning of _uverbs_alloc
  RDMA/mlx5: Set correct kernel-doc identifier
  IB/mlx5: Add missing error code
  RDMA/rxe: Fix missing kconfig dependency on CRYPTO
  RDMA/cm: Fix IRQ restore in ib_send_cm_sidr_rep

Merge tag 'gcc-plugins-v5.12-rc2' of git://git./linux/kernel/git/kees/linux

Pull gcc-plugins fixes from Kees Cook:
 "Tiny gcc-plugin fixes for v5.12-rc2. These issues are small but have
  been reported a couple times now by static analyzers, so best to get
  them fixed to reduce the noise. :)

   - Fix coding style issues (Jason Yan)"

* tag 'gcc-plugins-v5.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux:
  gcc-plugins: latent_entropy: remove unneeded semicolon
  gcc-plugins: structleak: remove unneeded variable 'ret'

Merge tag 'pstore-v5.12-rc2' of git://git./linux/kernel/git/kees/linux

Pull pstore fixes from Kees Cook:

 - Rate-limit ECC warnings (Dmitry Osipenko)

 - Fix error path check for NULL (Tetsuo Handa)

* tag 'pstore-v5.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux:
  pstore/ram: Rate-limit "uncorrectable error in header" message
  pstore: Fix warning in pstore_kill_sb()