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7 years ago[CostModel][X86] Add AVX512 and 512-bit vector shift cost tests.
Simon Pilgrim [Fri, 6 Jan 2017 19:41:26 +0000 (19:41 +0000)]
[CostModel][X86] Add AVX512 and 512-bit vector shift cost tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291269 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAArch64CollectLOH: Rewrite as block-local analysis.
Matthias Braun [Fri, 6 Jan 2017 19:22:01 +0000 (19:22 +0000)]
AArch64CollectLOH: Rewrite as block-local analysis.

Re-apply r288561: This time with a fix where the ADDs that are part of a
3 instruction LOH would not invalidate the "LastAdrp" state. This fixes
http://llvm.org/PR31361

Previously this pass was using up to 5% compile time in some cases which
is a bit much for what it is doing. The pass featured a full blown
data-flow analysis which in the default configuration was restricted to a
single block.

This rewrites the pass under the assumption that we only ever work on a
single block. This is done in a single pass maintaining a state machine
per general purpose register to catch LOH patterns.

Differential Revision: https://reviews.llvm.org/D27329

This reverts commit 9e6cedb0a4f14364d6511597a9160305e7d34493.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291266 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] add a vector version of a test added in r291262; NFC
Sanjay Patel [Fri, 6 Jan 2017 19:14:05 +0000 (19:14 +0000)]
[InstCombine] add a vector version of a test added in r291262; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291265 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] move and add tests for icmp + shl nsw; NFC
Sanjay Patel [Fri, 6 Jan 2017 18:57:54 +0000 (18:57 +0000)]
[InstCombine] move and add tests for icmp + shl nsw; NFC

As discussed here:
http://lists.llvm.org/pipermail/llvm-dev/2017-January/108749.html
...we should be able to better optimize this pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291262 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DWARF] Null out the debug locs of (loop invariant) instructions hoisted by LICM in
Wolfgang Pieb [Fri, 6 Jan 2017 18:38:57 +0000 (18:38 +0000)]
[DWARF] Null out the debug locs of (loop invariant) instructions hoisted by LICM in
order to avoid jumpy line tables. Calls are left alone because they may be inlined.

Differential Revision: https://reviews.llvm.org/D28390

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291258 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse %z for size_t and avoid deprecated string functions
Reid Kleckner [Fri, 6 Jan 2017 18:22:18 +0000 (18:22 +0000)]
Use %z for size_t and avoid deprecated string functions

This usage of strcpy and snprintf was certainly safe, but using them
sets off various deprecation and lint warnings. Easier to just write the
belt and suspenders version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291256 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Reduce vector insert/extract cost for Falkor.
Chad Rosier [Fri, 6 Jan 2017 18:03:26 +0000 (18:03 +0000)]
[AArch64] Reduce vector insert/extract cost for Falkor.

Differential Revision: https://reviews.llvm.org/D28403

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291254 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Pass float domain flag to shuffle combine match functions. NFCI.
Simon Pilgrim [Fri, 6 Jan 2017 17:34:30 +0000 (17:34 +0000)]
[X86][SSE] Pass float domain flag to shuffle combine match functions. NFCI.

Early step towards ignoring domain above a certain shuffle depth.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291248 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AMDGPU] Remove extra semicolon. NFC
Konstantin Zhuravlyov [Fri, 6 Jan 2017 17:23:21 +0000 (17:23 +0000)]
[AMDGPU] Remove extra semicolon. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291246 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AMDGPU] Do not emit .AMDGPU.config section for amdhsa
Konstantin Zhuravlyov [Fri, 6 Jan 2017 17:02:10 +0000 (17:02 +0000)]
[AMDGPU] Do not emit .AMDGPU.config section for amdhsa

Differential Revision: https://reviews.llvm.org/D27732

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291245 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Simplify float domain requirement in unary shuffle matching.
Simon Pilgrim [Fri, 6 Jan 2017 17:00:59 +0000 (17:00 +0000)]
[X86][SSE] Simplify float domain requirement in unary shuffle matching.

The AVX1-only limit is never actually required in matchUnaryVectorShuffle

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291244 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX] Regenerate shuffle 128-bit tests.
Simon Pilgrim [Fri, 6 Jan 2017 15:56:52 +0000 (15:56 +0000)]
[X86][AVX] Regenerate shuffle 128-bit tests.

The EVEX -> VEX fix means that AVX/AVX512 code is more likely the same now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291242 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX] Regenerate tzcnt tests.
Simon Pilgrim [Fri, 6 Jan 2017 15:54:23 +0000 (15:54 +0000)]
[X86][AVX] Regenerate tzcnt tests.

The EVEX -> VEX fix means that AVX/AVX512 code is more likely the same now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291241 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove trailing whitespace. NFCI.
Simon Pilgrim [Fri, 6 Jan 2017 15:31:52 +0000 (15:31 +0000)]
Remove trailing whitespace. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291240 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add X86Subtarget argument. NFCI.
Simon Pilgrim [Fri, 6 Jan 2017 15:29:17 +0000 (15:29 +0000)]
[X86] Add X86Subtarget argument. NFCI.

All callers of getTargetVShiftNode have access to X86Subtarget already so pass it along instead of re-extracting it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291239 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ASan] Make ASan instrument variable-masked loads and stores
Filipe Cabecinhas [Fri, 6 Jan 2017 15:24:51 +0000 (15:24 +0000)]
[ASan] Make ASan instrument variable-masked loads and stores

Summary: Previously we only supported constant-masked loads and stores.

Reviewers: kcc, RKSimon, pgousseau, gbedwell, vitalybuka

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28370

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291238 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[globalisel] Stop requiring -debug/-debug-only=registerbankinfo for assertions.
Daniel Sanders [Fri, 6 Jan 2017 14:29:34 +0000 (14:29 +0000)]
[globalisel] Stop requiring -debug/-debug-only=registerbankinfo for assertions.

Summary:
I've noticed that these assertions don't trigger when the condition is false.
The problem is that the DEBUG(x) macro only executes x when the pass is
emitting debug output via the -debug and -debug-only=registerbankinfo command
line arguments.

Debug builds should always execute the assertions so use '#ifndef NDEBUG' instead.

Also removed an assertion that is only true the first time it's tested. <Target>RegisterBankInfo's constructor will re-use register banks causing them to be valid on subsequent tests. That
assertion will fail on the first test too in the near future.

Reviewers: t.p.northover, ab, rovka, qcolombet

Subscribers: dberris, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D28358

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291235 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Fix 512-bit SDIV/UDIV 'big' costs.
Simon Pilgrim [Fri, 6 Jan 2017 11:12:53 +0000 (11:12 +0000)]
[CostModel][X86] Fix 512-bit SDIV/UDIV 'big' costs.

Set the costs on the lowest target that supports the type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291229 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Add SDIV/UDIV cost tests for a wider range of targets
Simon Pilgrim [Fri, 6 Jan 2017 11:02:40 +0000 (11:02 +0000)]
[CostModel][X86] Add SDIV/UDIV cost tests for a wider range of targets

Added a test demonstrating bug in AVX512 division costs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291228 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMove test input to directory called Inputs.
Daniel Jasper [Fri, 6 Jan 2017 10:22:15 +0000 (10:22 +0000)]
Move test input to directory called Inputs.

It is a common convention that our internal test runner depends upon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291227 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-config] Add --cmakedir to obtain CMake module location
Michal Gorny [Fri, 6 Jan 2017 08:23:33 +0000 (08:23 +0000)]
[llvm-config] Add --cmakedir to obtain CMake module location

Add a --cmakedir option to llvm-config that returns the correct path to
built/installed CMake modules (i.e. lib/cmake/llvm). This is mostly
intended as a convenience option for stand-alone builds of other LLVM
projects that frequently reconstruct LLVM_CMAKE_PATH after querying
llvm-config.

Differential Revision: https://reviews.llvm.org/D26894

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291218 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Orc][RPC] Fix an obvious locking-order bug in RawByteChannel::startSendMessage.
Lang Hames [Fri, 6 Jan 2017 06:22:31 +0000 (06:22 +0000)]
[Orc][RPC] Fix an obvious locking-order bug in RawByteChannel::startSendMessage.

The lock needs to be acquired before the data is sent, not afterwards. This
think-o slipped in during the refactor in r286620, but went unnoticed as the
resulting bug only manifests in multi-threaded clients (of which there are none
in-tree).

No unit test as the bug depends on thread scheduling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291216 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTarWriter: Emit PAX headers only when needed.
Rui Ueyama [Fri, 6 Jan 2017 05:33:45 +0000 (05:33 +0000)]
TarWriter: Emit PAX headers only when needed.

We use PAX headers to store long filenames (>= 100 bytes).
It is not needed to emit PAX headers if filenames fit in the
Ustar header. This patch implements that optimization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291215 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Add EXTRACT_SUBVECTOR support to combineBitcastForMaskedOp.
Craig Topper [Fri, 6 Jan 2017 05:18:48 +0000 (05:18 +0000)]
[AVX-512] Add EXTRACT_SUBVECTOR support to combineBitcastForMaskedOp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291214 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Add more masked vector extract test cases with and without a bitcast betwee...
Craig Topper [Fri, 6 Jan 2017 05:18:44 +0000 (05:18 +0000)]
[AVX-512] Add more masked vector extract test cases with and without a bitcast between the select.

The ones with the bitcast need additional work to fold the mask operation properly. This will be fixed in a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291213 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SelectionDAG] Rework lowerRangeToAssertZExt
David Majnemer [Fri, 6 Jan 2017 02:43:28 +0000 (02:43 +0000)]
[SelectionDAG] Rework lowerRangeToAssertZExt

Utilize ConstantRange to make it easier to interpret range metadata.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291211 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd a class to create a tar archive file.
Rui Ueyama [Fri, 6 Jan 2017 02:29:48 +0000 (02:29 +0000)]
Add a class to create a tar archive file.

In LLD, we create cpio archive files for --reproduce command.
cpio was not a bad choice because it is very easy to create, but
it was sometimes hard to use because people are not familiar with
cpio command.

I noticed that creating a tar archive isn't as hard as I thought.
So I implemented it in this patch.

Differential Revision: https://reviews.llvm.org/D28091

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291209 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Use _Unwind_Backtrace on Apple platforms."
Bob Wilson [Fri, 6 Jan 2017 02:26:33 +0000 (02:26 +0000)]
Revert "Use _Unwind_Backtrace on Apple platforms."

This reverts commit 63165f6ae3bac1623be36d4b3ce63afa1d51a30a.

After making this change, I discovered that _Unwind_Backtrace is
unable to unwind past a signal handler after an assertion failure.
I filed a bug report about that issue in rdar://29866587 but even if
we get a fix soon, it will be awhile before it get released.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291207 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDisable sigaltstack on Apple platforms
Bob Wilson [Fri, 6 Jan 2017 02:26:30 +0000 (02:26 +0000)]
Disable sigaltstack on Apple platforms

Using sigaltstack on Apple platforms is a bad idea. Darwin's backtrace()
function does not work with sigaltstack, and my change in r286851 was
supposed to solve that by using _Unwind_Backtrace instead. I tested that
_Unwind_Backtrace works for crashes but then discovered that it does not
work for assertion failures when using sigaltstack, at least on macOS.
The stack trace shows only the frames on the alternate stack.
I also saw some reports of this happening for crashes, but it fails
consistently for assertion failures. I tried various things to get it to
work but the problem seems to be in _Unwind_Backtrace itself. Disabling
sigaltstack is unfortunate since it would be nice to get backtraces for
stack overflows, but at least this gets us backtraces for the more common
cases. rdar://problem/29662459

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291206 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLowerTypeTests: Split the pass in two: a resolution phase and a lowering phase.
Peter Collingbourne [Fri, 6 Jan 2017 02:22:47 +0000 (02:22 +0000)]
LowerTypeTests: Split the pass in two: a resolution phase and a lowering phase.

This change separates how type identifiers are resolved from how intrinsic
calls are lowered. All information required to lower an intrinsic call
is stored in a new TypeIdLowering data structure. The idea is that this
data structure can either be initialized using the module itself during
regular LTO, or using the module summary in ThinLTO backends.

Differential Revision: https://reviews.llvm.org/D28341

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291205 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused private fields to fix the clang -Werror build.
David Blaikie [Fri, 6 Jan 2017 00:48:24 +0000 (00:48 +0000)]
Remove unused private fields to fix the clang -Werror build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291201 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings...
Eugene Zelenko [Fri, 6 Jan 2017 00:30:53 +0000 (00:30 +0000)]
[AArch64, Lanai] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291197 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SelectionDAG] Correctly transform range metadata to AssertZExt
David Majnemer [Fri, 6 Jan 2017 00:11:46 +0000 (00:11 +0000)]
[SelectionDAG] Correctly transform range metadata to AssertZExt

We used the logBase2 of the high instead of the ceilLogBase2 resulting
in the wrong result for certain values.  For example, it resulted in an
i1 AssertZExt when the exclusive portion of the range was 3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291196 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] remove dead code, NFC
Kostya Serebryany [Fri, 6 Jan 2017 00:09:40 +0000 (00:09 +0000)]
[libFuzzer] remove dead code, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291195 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd iterator support to DWARFDie to allow child DIE iteration.
Greg Clayton [Thu, 5 Jan 2017 23:47:37 +0000 (23:47 +0000)]
Add iterator support to DWARFDie to allow child DIE iteration.

Differential Revision: https://reviews.llvm.org/D28303

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291194 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCode cleanup: Remove tab indents.
Logan Chien [Thu, 5 Jan 2017 23:41:33 +0000 (23:41 +0000)]
Code cleanup: Remove tab indents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291193 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APFloatTest] Add tests for various operations
Tim Shen [Thu, 5 Jan 2017 22:57:54 +0000 (22:57 +0000)]
[APFloatTest] Add tests for various operations

Differential Revision: https://reviews.llvm.org/D27833

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291189 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Tidyup arithmetic costs code. NFCI.
Simon Pilgrim [Thu, 5 Jan 2017 22:48:02 +0000 (22:48 +0000)]
[CostModel][X86] Tidyup arithmetic costs code. NFCI.

Remove unnecessary braces, remove one use variables and keep LUTs to similar naming convention.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291187 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] improve error handling during the merge (handle various IO failures)
Kostya Serebryany [Thu, 5 Jan 2017 22:05:47 +0000 (22:05 +0000)]
[libFuzzer] improve error handling during the merge (handle various IO failures)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291182 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Fold some filled/spilled subreg COPYs
Geoff Berry [Thu, 5 Jan 2017 21:51:42 +0000 (21:51 +0000)]
[AArch64] Fold some filled/spilled subreg COPYs

Summary:
Extend AArch64 foldMemoryOperandImpl() to handle folding spills of
subreg COPYs with read-undef defs like:

  %vreg0:sub_32<def,read-undef> = COPY %WZR; GPR64:%vreg0

by widening the spilled physical source reg and generating:

  STRXui %XZR <fi#0>

as well as folding fills of similar COPYs like:

  %vreg0:sub_32<def,read-undef> = COPY %vreg1; GPR64:%vreg0, GPR32:%vreg1

by generating:

  %vreg0:sub_32<def,read-undef> = LDRWui <fi#0>

Reviewers: MatzeB, qcolombet

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D27425

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291180 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix typo. NFC
Xin Tong [Thu, 5 Jan 2017 21:40:08 +0000 (21:40 +0000)]
Fix typo. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291178 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThinLTO: add early "dead-stripping" on the Index
Teresa Johnson [Thu, 5 Jan 2017 21:34:18 +0000 (21:34 +0000)]
ThinLTO: add early "dead-stripping" on the Index

Summary:
Using the linker-supplied list of "preserved" symbols, we can compute
the list of "dead" symbols, i.e. the one that are not reachable from
a "preserved" symbol transitively on the reference graph.
Right now we are using this information to mark these functions as
non-eligible for import.

The impact is two folds:
- Reduction of compile time: we don't import these functions anywhere
  or import the function these symbols are calling.
- The limited number of import/export leads to better internalization.

Patch originally by Mehdi Amini.

Reviewers: mehdi_amini, pcc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23488

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291177 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPR 31534: When emitting both DWARF unwind tables and debug information,
Joerg Sonnenberger [Thu, 5 Jan 2017 20:55:28 +0000 (20:55 +0000)]
PR 31534: When emitting both DWARF unwind tables and debug information,
do not use .cfi_sections. This requires checking if any non-declaration
function in the module needs an unwind table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291172 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LICM] Allow promotion of some stores that are not guaranteed to execute.
Michael Kuperstein [Thu, 5 Jan 2017 20:42:06 +0000 (20:42 +0000)]
[LICM] Allow promotion of some stores that are not guaranteed to execute.

Promotion is always legal when a store within the loop is guaranteed to execute.

However, this is not a necessary condition - for promotion to be memory model
semantics-preserving, it is enough to have a store that dominates every exit
block. This is because if the store dominates every exit block, the fact the
exit block was executed implies the original store was executed as well.

Differential Revision: https://reviews.llvm.org/D28147

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291171 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCodeGen: Assert that liveness is up to date when reading block live-ins.
Matthias Braun [Thu, 5 Jan 2017 20:01:19 +0000 (20:01 +0000)]
CodeGen: Assert that liveness is up to date when reading block live-ins.

Add an assert that checks whether liveins are up to date before they are
used.

- Do not print liveins into .mir files anymore in situations where they
  are out of date anyway.
- The assert in the RegisterScavenger is superseded by the new one in
  livein_begin().
- Skip parts of the liveness updating logic in IfConversion.cpp when
  liveness isn't tracked anymore (just enough to avoid hitting the new
  assert()).

Differential Revision: https://reviews.llvm.org/D27562

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291169 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Reapply r291025 ("AMDGPU: Remove unneccessary intermediate vector")"
Evgeniy Stepanov [Thu, 5 Jan 2017 19:51:13 +0000 (19:51 +0000)]
Revert "Reapply r291025 ("AMDGPU: Remove unneccessary intermediate vector")"

Summary: This reverts commit r291144. It breaks build bots.

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/3270, http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fuzzer/builds/2058

lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp:1638:12: error: could not convert â€˜(const unsigned int*)(& Variants)’ from â€˜const unsigned int*’ to â€˜llvm::ArrayRef<unsigned int>’
     return Variants;

Reviewers: eugenis, tstellarAMD

Patch by Alex Shlyapnikov.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D28372

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291168 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Move vXi32 MUL costs into existing tables. NFCI.
Simon Pilgrim [Thu, 5 Jan 2017 19:42:43 +0000 (19:42 +0000)]
[CostModel][X86] Move vXi32 MUL costs into existing tables. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291165 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove trailing whitespace. NFCI.
Simon Pilgrim [Thu, 5 Jan 2017 19:24:25 +0000 (19:24 +0000)]
Remove trailing whitespace. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291163 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Reordered SSE42 arithmetic cost LUT into descending order. NFCI.
Simon Pilgrim [Thu, 5 Jan 2017 19:19:39 +0000 (19:19 +0000)]
[CostModel][X86] Reordered SSE42 arithmetic cost LUT into descending order. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291162 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Move vXi64 MUL costs into existing tables. NFCI.
Simon Pilgrim [Thu, 5 Jan 2017 19:01:50 +0000 (19:01 +0000)]
[CostModel][X86] Move vXi64 MUL costs into existing tables. NFCI.

Removes need for yet another LUT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291158 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LICM] Small update to note changes made in hoistRegion
Andrew Kaylor [Thu, 5 Jan 2017 18:53:24 +0000 (18:53 +0000)]
[LICM] Small update to note changes made in hoistRegion

Differential Revision: https://reviews.llvm.org/D28363

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291157 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Strip unused 256-bit vector shift costs. NFCI.
Simon Pilgrim [Thu, 5 Jan 2017 18:36:48 +0000 (18:36 +0000)]
[CostModel][X86] Strip unused 256-bit vector shift costs. NFCI.

Remove SSE2 256-bit entries - AVX targets will have used the SSE42 costs instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291152 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] add test to show bug in select lowering; NFC
Sanjay Patel [Thu, 5 Jan 2017 18:35:44 +0000 (18:35 +0000)]
[x86] add test to show bug in select lowering; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291151 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Include the cost of 256-bit upper subvector extract/insertion in...
Simon Pilgrim [Thu, 5 Jan 2017 18:20:25 +0000 (18:20 +0000)]
[CostModel][X86] Include the cost of 256-bit upper subvector extract/insertion in AVX1 v4i64 MUL

Matches other MUL/ADD/SUB 256-bit case on AVX1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291149 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTypo
Joerg Sonnenberger [Thu, 5 Jan 2017 17:59:22 +0000 (17:59 +0000)]
Typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291147 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Merged SK_PermuteSingleSrc/SK_PermuteTwoSrc into common shuffle...
Simon Pilgrim [Thu, 5 Jan 2017 17:56:19 +0000 (17:56 +0000)]
[CostModel][X86] Merged SK_PermuteSingleSrc/SK_PermuteTwoSrc into common shuffle cost LUTs. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291146 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReapply r291025 ("AMDGPU: Remove unneccessary intermediate vector")
Matt Arsenault [Thu, 5 Jan 2017 17:36:11 +0000 (17:36 +0000)]
Reapply r291025 ("AMDGPU: Remove unneccessary intermediate vector")

Arrays are supposed to be static const

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291144 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64][CostModel] Add coverage for bswap intrinsics.
Chad Rosier [Thu, 5 Jan 2017 16:55:32 +0000 (16:55 +0000)]
[AArch64][CostModel] Add coverage for bswap intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291140 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Docs] Update docs to indicate that CUDA compilation is supported on Windows.
Justin Lebar [Thu, 5 Jan 2017 16:54:28 +0000 (16:54 +0000)]
[Docs] Update docs to indicate that CUDA compilation is supported on Windows.

Subscribers: cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D28326

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291139 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove a unnecessary hasLoopInvariantOperands check in loop sink.
Xin Tong [Thu, 5 Jan 2017 16:52:37 +0000 (16:52 +0000)]
Remove a unnecessary hasLoopInvariantOperands check in loop sink.

Summary:
Preheader instruction's operands will always be invariant w.r.t. the loop which its the preheader
for.

Memory aliases are handled in canSinkOrHoistInst.

Reviewers: danielcdh, davidxl

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D28270

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291132 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add test cases that cover pr31551. NFC.
Zvi Rackover [Thu, 5 Jan 2017 16:48:28 +0000 (16:48 +0000)]
[X86] Add test cases that cover pr31551. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291127 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoless braces; NFC
Sanjay Patel [Thu, 5 Jan 2017 16:47:32 +0000 (16:47 +0000)]
less braces; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291126 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Add support for broadcast shuffle costs
Simon Pilgrim [Thu, 5 Jan 2017 15:56:08 +0000 (15:56 +0000)]
[CostModel][X86] Add support for broadcast shuffle costs

Currently only for broadcasts with input and output of the same width.

Differential Revision: https://reviews.llvm.org/D27811

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291122 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Optimize vector shifts with variable but uniform shift amounts
Zvi Rackover [Thu, 5 Jan 2017 15:11:43 +0000 (15:11 +0000)]
[X86] Optimize vector shifts with variable but uniform shift amounts

Summary:
For instructions such as PSLLW/PSLLD/PSLLQ a variable shift amount may be passed in an XMM register.
The lower 64-bits of the register are evaluated to determine the shift amount.
This patch improves the construction of the vector containing the shift amount.

Reviewers: craig.topper, delena, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28353

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291120 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Add parenthesis as per build warning
Teresa Johnson [Thu, 5 Jan 2017 15:10:10 +0000 (15:10 +0000)]
[ThinLTO] Add parenthesis as per build warning

Fixes a warning about "||" and "&&" due to r291108.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291119 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Remove mcpu option as this test is not target specific. NFC.
Chad Rosier [Thu, 5 Jan 2017 15:05:03 +0000 (15:05 +0000)]
[AArch64] Remove mcpu option as this test is not target specific. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291117 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Implement missing ISA 2.06 instructions.
Tony Jiang [Thu, 5 Jan 2017 15:00:45 +0000 (15:00 +0000)]
[PowerPC] Implement missing ISA 2.06 instructions.

Instructions: fctidu[.], fctiwu[.], ftdiv, ftsqrt are not implemented. Implement
them and add corresponding test cases in this patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291116 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Use DenseSet instead of SmallPtrSet for holding GUIDs
Teresa Johnson [Thu, 5 Jan 2017 14:59:56 +0000 (14:59 +0000)]
[ThinLTO] Use DenseSet instead of SmallPtrSet for holding GUIDs

Should fix some more bot failures from r291108.
This should have been a DenseSet, since GUID is not a pointer type.
It caused some bots to fail, but for some reason I wasnt't getting a
build failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291115 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWdocumentation fix
Simon Pilgrim [Thu, 5 Jan 2017 14:58:54 +0000 (14:58 +0000)]
Wdocumentation fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291114 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Remove unused arguments from tests. NFC.
Chad Rosier [Thu, 5 Jan 2017 14:48:53 +0000 (14:48 +0000)]
[AArch64] Remove unused arguments from tests. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291112 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Update new ModuleSummaryIndexYAML.h for r291108
Teresa Johnson [Thu, 5 Jan 2017 14:40:15 +0000 (14:40 +0000)]
[ThinLTO] Update new ModuleSummaryIndexYAML.h for r291108

Should fix bot failures due to r291108 which happened due to a
change required in ModuleSummaryIndexYAML.h which was just added in
r291069.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291111 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Pulled out common type legalization code
Simon Pilgrim [Thu, 5 Jan 2017 14:33:32 +0000 (14:33 +0000)]
[CostModel][X86] Pulled out common type legalization code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291109 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Subsume all importing checks into a single flag
Teresa Johnson [Thu, 5 Jan 2017 14:32:16 +0000 (14:32 +0000)]
[ThinLTO] Subsume all importing checks into a single flag

Summary:
This adds a new summary flag NotEligibleToImport that subsumes
several existing flags (NoRename, HasInlineAsmMaybeReferencingInternal
and IsNotViableToInline). It also subsumes the checking of references
on the summary that was being done during the thin link by
eligibleForImport() for each candidate. It is much more efficient to
do that checking once during the per-module summary build and record
it in the summary.

Reviewers: mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28169

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291108 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCurrently isLikelyComplexAddressComputation tries to figure out if the given stride...
Mohammed Agabaria [Thu, 5 Jan 2017 14:03:41 +0000 (14:03 +0000)]
Currently isLikelyComplexAddressComputation tries to figure out if the given stride seems to be 'complex' and need some extra cost for address computation handling.

This code seems to be target dependent which may not be the same for all targets.
Passed the decision whether the given stride is complex or not to the target by sending stride information via SCEV to getAddressComputationCost instead of 'IsComplex'.

Specifically at X86 targets we dont see any significant address computation cost in case of the strided access in general.

Differential Revision: https://reviews.llvm.org/D27518

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291106 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalISel] Add support for address-taken basic blocks
Kristof Beyls [Thu, 5 Jan 2017 13:27:52 +0000 (13:27 +0000)]
[GlobalISel] Add support for address-taken basic blocks

To make this work, pointers from the MachineBasicBlock to the LLVM-IR-level
basic blocks need to be initialized, as the AsmPrinter uses this link to be
able to print out labels for the basic blocks that are address-taken.

Most of the changes in this commit are about adapting existing tests to include
the basic block name that is now printed out in the MIR format, now that the
name becomes available as the link to the LLVM-IR basic block is initialized.
The relevant test change for the functionality added in this patch are the
added "(address-taken)" strings in
test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll.

Differential Revision: https://reviews.llvm.org/D28123

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291105 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[doc] Fix minor grammatical error in Phabricator.rst
Anmol P. Paralkar [Thu, 5 Jan 2017 13:08:14 +0000 (13:08 +0000)]
[doc] Fix minor grammatical error in Phabricator.rst

Summary: Test commit, fix minor grammatical error in Phabricator.rst

Reviewers: delcypher

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28214

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291101 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalISel] Add support for switch statements
Kristof Beyls [Thu, 5 Jan 2017 11:28:51 +0000 (11:28 +0000)]
[GlobalISel] Add support for switch statements

This commit does this using a trivial chain of conditional branches.  In the
future, we probably want to reuse the optimized switch lowering used in
SelectionDAG.

Differential Revision: https://reviews.llvm.org/D28176

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291099 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalISel] Fix AArch64 ICMP instruction selection
Kristof Beyls [Thu, 5 Jan 2017 10:16:08 +0000 (10:16 +0000)]
[GlobalISel] Fix AArch64 ICMP instruction selection

Differential Revision: https://reviews.llvm.org/D28175

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291097 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Test Commit] fixing some format issue in X86TTI to match clang-format output.
Mohammed Agabaria [Thu, 5 Jan 2017 09:51:02 +0000 (09:51 +0000)]
[Test Commit] fixing some format issue in X86TTI to match clang-format output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291095 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX-512: Optimized pattern for truncate with unsigned saturation.
Elena Demikhovsky [Thu, 5 Jan 2017 08:21:09 +0000 (08:21 +0000)]
AVX-512: Optimized pattern for truncate with unsigned saturation.

DAG patterns optimization: truncate + unsigned saturation supported by VPMOVUS* instructions in AVX-512.
Differential revision: https://reviews.llvm.org/D28216

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291092 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agotest: remove unnecessary triple argument
Saleem Abdulrasool [Thu, 5 Jan 2017 06:30:12 +0000 (06:30 +0000)]
test: remove unnecessary triple argument

This test is entirely target agnostic.  Avoid the triple to repair the
build bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291088 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add Intel Kaby Lake model numbers to getHostCPUName aliased to "skylake" since...
Craig Topper [Thu, 5 Jan 2017 05:57:27 +0000 (05:57 +0000)]
[X86] Add Intel Kaby Lake model numbers to getHostCPUName aliased to "skylake" since there are no feature differences.

Model numbers found here http://www.sandpile.org/x86/cpuid.htm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291086 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMC: support passing search paths to the IAS
Saleem Abdulrasool [Thu, 5 Jan 2017 05:56:39 +0000 (05:56 +0000)]
MC: support passing search paths to the IAS

This is needed to support inclusion in inline assembly via the
`.include` directive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291085 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Change getHostCPUName to report Intel model 0x4e as "skylake" instead of "skyla...
Craig Topper [Thu, 5 Jan 2017 05:47:29 +0000 (05:47 +0000)]
[X86] Change getHostCPUName to report Intel model 0x4e as "skylake" instead of "skylake-avx512". Add the proper 0x55 model for "skylake-avx512".

Summary:
Intel's i5-6300U CPU is reporting to have a model id of 78 (4e).
The Host detection assumes that to be Skylake Xeon (with AVX512 support),
instead of a normal Skylake machine.

Patch by: Valentin Churavy

Reviewers: nalimilan, craig.topper

Subscribers: hfinkel, tkelman, craig.topper, nalimilan, llvm-commits

Differential Revision: https://reviews.llvm.org/D28221

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291084 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTentative fix for modules build.
Peter Collingbourne [Thu, 5 Jan 2017 04:40:09 +0000 (04:40 +0000)]
Tentative fix for modules build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291079 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] use /tmp (or $TMPDIR, if present) to store temp files during merge
Kostya Serebryany [Thu, 5 Jan 2017 04:32:19 +0000 (04:32 +0000)]
[libFuzzer] use /tmp (or $TMPDIR, if present) to store temp files during merge

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291078 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix build bots.
Peter Collingbourne [Thu, 5 Jan 2017 04:00:09 +0000 (04:00 +0000)]
Fix build bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291073 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIR: Module summary representation for type identifiers; summary test scaffolding...
Peter Collingbourne [Thu, 5 Jan 2017 03:39:00 +0000 (03:39 +0000)]
IR: Module summary representation for type identifiers; summary test scaffolding for lowertypetests.

Set up basic YAML I/O support for module summaries, plumb the summary into
the pass and add a few command line flags to test YAML I/O support. Bitcode
support to come separately, as will the code in LowerTypeTests that actually
uses the summary. Also add a couple of tests that pass by virtue of the pass
doing nothing with the summary (which happens to be the correct thing to do
for those tests).

Differential Revision: https://reviews.llvm.org/D28041

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291069 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r291025 ("AMDGPU: Remove unneccessary intermediate vector")
Richard Smith [Thu, 5 Jan 2017 03:13:10 +0000 (03:13 +0000)]
Revert r291025 ("AMDGPU: Remove unneccessary intermediate vector")

This caused buildbot failures due to returning ArrayRefs referencing local
(temporary) objects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291067 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM] Fix a typo in a comment that Davide spotted in another code review.
Chandler Carruth [Thu, 5 Jan 2017 03:10:26 +0000 (03:10 +0000)]
[PM] Fix a typo in a comment that Davide spotted in another code review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291066 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[gtest] Work around broken installs of libc++ where we don't have
Chandler Carruth [Thu, 5 Jan 2017 01:41:49 +0000 (01:41 +0000)]
[gtest] Work around broken installs of libc++ where we don't have
a cxxabi.h in the include search paths.

This comes up when libc++ is installed with some other abi library. At
some points in time in history we have had CMake hackery to try and get
a cxxabi.h installed that would work, but there are lots of examples
lacking this. Also, the just-built tree with libc++ seems to not quite
get this right.

To let folks make progress, we can easily work around this by detecting
that the header is missing and disabling the relevant parts of gtest.
This should fix the last remainging build bot failures. While these
failures are typically indicative of a questionable install, I don't
think gtest should be the thing that surfaces those issues and I don't
want folks blocked on this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291063 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Update vextract64x4 intrinsic upgrade test cases to use a legal immediate...
Craig Topper [Thu, 5 Jan 2017 01:34:55 +0000 (01:34 +0000)]
[AVX-512] Update vextract64x4 intrinsic upgrade test cases to use a legal immediate so they test the instruction selection correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291061 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMark test that is testing statistics output as requiring Assertions
Mehdi Amini [Thu, 5 Jan 2017 01:08:01 +0000 (01:08 +0000)]
Mark test that is testing statistics output as requiring Assertions

We only enable statistic in an assert build by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291044 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] add tests to show missing select simplifications; NFC
Sanjay Patel [Thu, 5 Jan 2017 00:40:52 +0000 (00:40 +0000)]
[InstSimplify] add tests to show missing select simplifications; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291043 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM] Edit comments in PassManager.h.
Justin Lebar [Thu, 5 Jan 2017 00:12:51 +0000 (00:12 +0000)]
[PM] Edit comments in PassManager.h.

Summary:
This covers most of PassManager.h, up to the introduction of inner/outer
analysis proxies.

If there's a theme to these changes, it's simplifying the language.  For
example:

  * PreservedAnalyses is a "set of analyses", not an "abstract set".
    "Abstract" doesn't have any particular meaning here.

  * "Build types for the concept types" becomes "define the concept types".

  * Instead of "data structures optimized for pointer-like types using
    the alignment-provided low bits", say "data structures that use the
    low bits of pointers."

  * "Clear the map pointing into the results list" becomes
    "Delete the map entries that point into the results list."

This patch also fixes a few places where we referred to "function" and
"module" pass/analysis managers, instead of the more abstract "IRUnitT"
PM/AMs we have now.

Subscribers: mehdi_amini

Differential Revision: https://reviews.llvm.org/D27367

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291040 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPatch gtest to move GTEST_IS_THREADSAFE out of unrelated GTEST_HAS_SEH ifdef
Reid Kleckner [Thu, 5 Jan 2017 00:00:05 +0000 (00:00 +0000)]
Patch gtest to move GTEST_IS_THREADSAFE out of unrelated GTEST_HAS_SEH ifdef

Fixes the sanitizer Windows build, which happens to set
-DGTEST_HAS_SEH=0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291038 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DWARF] Null out the debug locs of load instructions that have been moved by GVN
Wolfgang Pieb [Wed, 4 Jan 2017 23:58:26 +0000 (23:58 +0000)]
[DWARF] Null out the debug locs of load instructions that have been moved by GVN
performing partial redundancy elimination (PRE). Not doing so can cause jumpy line
tables and confusing (though correct) source attributions.

Differential Revision: https://reviews.llvm.org/D27857

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291037 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[gtest] Fix the way we disable a warning for unittests.
Chandler Carruth [Wed, 4 Jan 2017 23:40:06 +0000 (23:40 +0000)]
[gtest] Fix the way we disable a warning for unittests.

I somehow wrote this fix and then lost it prior to commit. Really sorry
about the noise. This should fix some issues with hacking add_definition
to do things with warning flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291033 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[gtest] Upgrade googletest to version 1.8.0, minimizing local changes.
Chandler Carruth [Wed, 4 Jan 2017 23:06:03 +0000 (23:06 +0000)]
[gtest] Upgrade googletest to version 1.8.0, minimizing local changes.

This required re-working the streaming support and lit's support for
'--gtest_list_tests' but otherwise seems to be a clean upgrade.

Differential Revision: https://reviews.llvm.org/D28154

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291029 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUse lazy-loading of Metadata in MetadataLoader when importing is enabled (NFC)
Mehdi Amini [Wed, 4 Jan 2017 22:54:33 +0000 (22:54 +0000)]
Use lazy-loading of Metadata in MetadataLoader when importing is enabled (NFC)

Summary:
This is a relatively simple scheme: we use the index emitted in the
bitcode to avoid loading all the global metadata. Instead we load
the index with their position in the bitcode so that we can load each
of them individually. Materializing the global metadata block in this
condition only triggers loading the named metadata, and the ones
referenced from there (transitively). When materializing a function,
metadata from the global block are loaded lazily as they are
referenced.

Two main current limitations are:

1) Global values other than functions are not materialized on demand,
so we need to eagerly load METADATA_GLOBAL_DECL_ATTACHMENT records
(and their transitive dependencies).
2) When we load a single metadata, we don't recurse on the operands,
instead we use a placeholder or a temporary metadata. Unfortunately
tepmorary nodes are very expensive. This is why we don't have it
always enabled and only for importing.

These two limitations can be lifted in a subsequent improvement if
needed.

With this change, the total link time of opt with ThinLTO and Debug
Info enabled is going down from 282s to 224s (~20%).

Reviewers: pcc, tejohnson, dexonsmith

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28113

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291027 91177308-0d34-0410-b5e6-96231b3b80d8