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5 years ago[RegAllocGreedy] Take last chance recoloring into account in split and assign
Mikael Holmen [Wed, 20 Feb 2019 07:14:39 +0000 (07:14 +0000)]
[RegAllocGreedy] Take last chance recoloring into account in split and assign

Summary:
This is a follow-up to r353988 where tryEvict was extended to take last
chance recoloring into account. Now we do the same thing for trySplit and
tryAssign.

Now we always pass a "FixedRegisters" argument to canEvictInterference and
tryEvict so it doesn't need to have a default value anymore.

The need for this was found long ago in an out-of-tree target.
Unfortunately I don't have a reproducer for an in-tree target.

Reviewers: qcolombet, rudkx

Reviewed By: qcolombet, rudkx

Subscribers: rudkx, MatzeB, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58376

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354439 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] add/modify wrapper function for findRegisterDefOperand().
Chen Zheng [Wed, 20 Feb 2019 07:01:04 +0000 (07:01 +0000)]
[NFC] add/modify wrapper function for findRegisterDefOperand().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354438 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DTU] Refine the document of mutation APIs [NFC] (PR40528)
Chijun Sima [Wed, 20 Feb 2019 05:49:01 +0000 (05:49 +0000)]
[DTU] Refine the document of mutation APIs [NFC] (PR40528)

Summary:
It was pointed out in [[ https://bugs.llvm.org/show_bug.cgi?id=40528 | Bug 40528 ]] that it is not clear whether insert/deleteEdge can be used to perform multiple updates and [[ https://reviews.llvm.org/D57316#1388344 | a comment in D57316 ]] reveals that the difference between several ways to update the DominatorTree is confusing.

This patch tries to address issues above.

Reviewers: mkazantsev, kuhar, asbirlea, chandlerc, brzycki

Reviewed By: mkazantsev, kuhar, brzycki

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57881

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354437 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Remove FeatureSlowIncDec from Sandy Bridge and later Intel Core CPUs
Craig Topper [Wed, 20 Feb 2019 05:39:11 +0000 (05:39 +0000)]
[X86] Remove FeatureSlowIncDec from Sandy Bridge and later Intel Core CPUs

Summary:
Inc and Dec were at one point slow on Intel CPUs due to their tendency to cause partial flag stalls on P6 derived CPU cores. This is because these instructions are defined to preserve the carry flag. This partial flag stall issue persisted until Sandy Bridge when flag merging was changed to be handled as a data dependency instead of as a stall until retirement. Sandy Bridge and later CPUs rename the C flag separately from OSPAZ so there is no flag merge needed on INC/DEC to preserve the C flag.

Given these improvements I don't know why INC/DEC was ever considered slow on Sandy Bridge. If anything they should have been disabled on the earlier CPUs instead.

Note after this patch, INC/DEC are still considered slow on Silvermont, Goldmont, Knights Landing and our generic "x86-64" CPU.

Reviewers: spatel, RKSimon, chandlerc

Reviewed By: chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D58412

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354436 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTemporarily Revert "[X86][SLP] Enable SLP vectorization for 128-bit horizontal X86...
Eric Christopher [Wed, 20 Feb 2019 04:42:07 +0000 (04:42 +0000)]
Temporarily Revert "[X86][SLP] Enable SLP vectorization for 128-bit horizontal X86 instructions (add, sub)"

As this has broken the lto bootstrap build for 3 days and is
showing a significant regression on the Dither_benchmark results (from
the LLVM benchmark suite) -- specifically, on the
BENCHMARK_FLOYD_DITHER_128, BENCHMARK_FLOYD_DITHER_256, and
BENCHMARK_FLOYD_DITHER_512; the others are unchanged.  These have
regressed by about 28% on Skylake, 34% on Haswell, and over 40% on
Sandybridge.

This reverts commit r353923.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354434 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Dominators] Simplify and optimize path compression used in link-eval forest.
Fangrui Song [Wed, 20 Feb 2019 04:39:42 +0000 (04:39 +0000)]
[Dominators] Simplify and optimize path compression used in link-eval forest.

Summary:
* NodeToInfo[*] have been allocated so the addresses are stable. We can store them instead of NodePtr to save NumToNode lookups.
* Nodes are traversed twice. Using `Visited` to check the traversal number is expensive and obscure. Just split the two traversals into two loops explicitly.
* The check `VInInfo.DFSNum < LastLinked` is redundant as it is implied by `VInInfo->Parent < LastLinked`
* VLabelInfo PLabelInfo are used to save a NodeToInfo lookup in the second traversal.

Also add some comments explaining eval().

This shows a ~4.5% improvement (9.8444s -> 9.3996s) on

    perf stat -r 10 taskset -c 0 opt -passes=$(printf '%.0srequire<domtree>,invalidate<domtree>,' {1..1000})'require<domtree>' -disable-output sqlite-autoconf-3270100/sqlite3.bc

Reviewers: kuhar, sanjoy, asbirlea

Reviewed By: kuhar

Subscribers: brzycki, NutshellySima, kristina, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58327

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354433 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[RISCV] Implement pseudo instructions for load/store from a symbol address.
Kito Cheng [Wed, 20 Feb 2019 03:31:32 +0000 (03:31 +0000)]
[RISCV] Implement pseudo instructions for load/store from a symbol address.

Summary:
Those pseudo-instructions are making load/store instructions able to
load/store from/to a symbol, and its always using PC-relative addressing
to generating a symbol address.

Reviewers: asb, apazos, rogfer01, jrtc27

Differential Revision: https://reviews.llvm.org/D50496

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354430 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Dominators] Delete UpdateLevelsAfterInsertion in edge insertion of depth-based searc...
Fangrui Song [Wed, 20 Feb 2019 02:35:24 +0000 (02:35 +0000)]
[Dominators] Delete UpdateLevelsAfterInsertion in edge insertion of depth-based search for release builds

Summary:
After insertion of (From, To), v is affected iff
depth(NCD)+1 < depth(v) && path P from To to v exists where every w on P s.t. depth(v) <= depth(w)

All affected vertices change their idom to NCD.

If a vertex u has changed its depth, it must be a descendant of an
affected vertex v. Its depth must have been updated by UpdateLevel()
called by setIDom() of the first affected ancestor.

So UpdateLevelsAfterInsertion and its bookkeeping variable VisitedNotAffectedQueue are redundant.
Run them only in debug builds as a sanity check.

Reviewers: kuhar

Reviewed By: kuhar

Subscribers: kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58369

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354429 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC] exploit P9 instruction maddld.
Chen Zheng [Wed, 20 Feb 2019 02:30:06 +0000 (02:30 +0000)]
[PowerPC] exploit P9 instruction maddld.
Differential Revision: https://reviews.llvm.org/D58364

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354427 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Generalize section ordering constraints
Thomas Lively [Wed, 20 Feb 2019 02:22:36 +0000 (02:22 +0000)]
[WebAssembly] Generalize section ordering constraints

Summary:
Changes from using a total ordering of known sections to using a
dependency graph approach. This allows our tools to accept and process
binaries that are compliant with the spec and tool conventions that
would have been previously rejected. It also means our own tools can
do less work to enforce an artificially imposed ordering. Using a
general mechanism means fewer special cases and exceptions in the
ordering logic.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58312

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354426 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Refactor atomic operation definitions (NFC)
Heejin Ahn [Wed, 20 Feb 2019 01:29:34 +0000 (01:29 +0000)]
[WebAssembly] Refactor atomic operation definitions (NFC)

Summary:
- Make `ATOMIC_I`, `ATOMIC_NRI`, `AtomicLoad`, `AtomicStore` classes and
  make other operations inherit from them
- Factor the common opcode prefix '0xfe' out from the opcodes into the
  common class
- Reorder instructions in the order of increasing opcodes

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58338

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354421 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] regenerate test checks; NFC
Sanjay Patel [Wed, 20 Feb 2019 01:24:59 +0000 (01:24 +0000)]
[InstCombine] regenerate test checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354420 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Fix load/store name detection for atomic instructions
Heejin Ahn [Wed, 20 Feb 2019 01:14:36 +0000 (01:14 +0000)]
[WebAssembly] Fix load/store name detection for atomic instructions

Summary:
Fixed a bug in the routine in AsmParser that determines whether the
current instruction is a load or a store. Atomic instructions' prefixes
are not `atomic_` but `atomic.`, and all atomic instructions are also
memory instructions. Also fixed the printing format of atomic
instructions to match other memory instructions and added encoding tests
for atomic instructions.

Reviewers: aardappel, tlively

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58337

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354419 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoCMake: Fix stand-alone clang builds since r353268
Tom Stellard [Wed, 20 Feb 2019 01:11:05 +0000 (01:11 +0000)]
CMake: Fix stand-alone clang builds since r353268

Summary:
Handle the case where LLVM_MAIN_SRC_DIR is not set and also use
LLVM_CMAKE_DIR for locating installed cmake files rather than
LLVM_CMAKE_PATH.

Reviewers: phosek, andrewrk, smeenai

Reviewed By: phosek, andrewrk, smeenai

Subscribers: mgorny, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D58204

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354417 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Fixed disassembler not knowing about OPERAND_EVENT
Wouter van Oortmerssen [Wed, 20 Feb 2019 00:55:59 +0000 (00:55 +0000)]
[WebAssembly] Fixed disassembler not knowing about OPERAND_EVENT

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58414

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354416 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Merge r354365 more
Nico Weber [Wed, 20 Feb 2019 00:34:19 +0000 (00:34 +0000)]
gn build: Merge r354365 more

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354413 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GVN] Small tweaks to comments, style, and missed vector handling
Philip Reames [Wed, 20 Feb 2019 00:31:28 +0000 (00:31 +0000)]
[GVN] Small tweaks to comments, style, and missed vector handling

Noticed these while doing a final sweep of the code to make sure I hadn't missed anything in my last couple of patches.  The (minor) missed optimization was noticed because of the stylistic fix to avoid an overly specific cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354412 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Merge r354365
Nico Weber [Wed, 20 Feb 2019 00:30:08 +0000 (00:30 +0000)]
gn build: Merge r354365

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354411 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[lld-link] preserve @llvm.used symbols in LTO
Bob Haarman [Wed, 20 Feb 2019 00:26:01 +0000 (00:26 +0000)]
[lld-link] preserve @llvm.used symbols in LTO

Summary:
We translate @llvm.used to COFF by generating /include directives
in the .drectve section. However, in LTO links, this happens after
directives have already been processed, so the new directives do
not take effect. This change marks @llvm.used symbols as GCRoots
so that they are preserved as intended.

Fixes PR40733.

Reviewers: rnk, pcc, ruiu

Reviewed By: ruiu

Subscribers: mehdi_amini, steven_wu, dexonsmith, dang, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58255

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354410 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[BPF] make test case reloc-btf.ll tolerable for old compilers
Yonghong Song [Wed, 20 Feb 2019 00:22:19 +0000 (00:22 +0000)]
[BPF] make test case reloc-btf.ll tolerable for old compilers

The test case reloc-btf.ll is generated with an IR containing
spFlags introduced by https://reviews.llvm.org/rL347806.
In the case of BTF backporting, the old compiler may not
have this patch, so this test will fail during
validation.

This patch removed spFlags from IR in the test case
and used the old way for various flags.

Acked-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354409 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[InstSimplify] use any-zero matcher for fcmp folds"
Sanjay Patel [Wed, 20 Feb 2019 00:20:38 +0000 (00:20 +0000)]
Revert "[InstSimplify] use any-zero matcher for fcmp folds"

This reverts commit 058bb8351351d56d2a4e8a772570231f9e5305e5.
Forgot to update another test affected by this change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354408 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GVN] Fix last crasher w/non-integral pointers
Philip Reames [Wed, 20 Feb 2019 00:15:54 +0000 (00:15 +0000)]
[GVN] Fix last crasher w/non-integral pointers

Same case as for memset and memcpy, but this time for clobbering stores and loads.  We still can't allow coercion to or from non-integrals, regardless of the transform.

Now that I'm done the whole little sequence, it seems apparent that we'd entirely missed reasoning about clobbers in the original GVN support for non-integral pointers.

My appologies, I thought we'd upstreamed all of this, but it turns out we were still carrying a downstream hack which hid all of these issues.  My chanks to Cherry Zhang for helping debug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354407 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] use any-zero matcher for fcmp folds
Sanjay Patel [Wed, 20 Feb 2019 00:09:50 +0000 (00:09 +0000)]
[InstSimplify] use any-zero matcher for fcmp folds

The m_APFloat matcher does not work with anything but strict
splat vector constants, so we could miss these folds and then
trigger an assertion in instcombine:
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=13201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354406 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] add vector tests for fcmp+fabs; NFC
Sanjay Patel [Tue, 19 Feb 2019 23:58:02 +0000 (23:58 +0000)]
[InstSimplify] add vector tests for fcmp+fabs; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354404 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GVN] Fix a crash bug w/non-integral pointers and memtransfers
Philip Reames [Tue, 19 Feb 2019 23:49:38 +0000 (23:49 +0000)]
[GVN] Fix a crash bug w/non-integral pointers and memtransfers

Problem is very similiar to the one fixed for memsets in r354399, we try to coerce a value to non-integral type, and then crash while try to do so.  Since we shouldn't be doing such coercions to start with, easy fix.  From inspection, I see two other cases which look to be similiar and will follow up with most test cases and fixes if confirmed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354403 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GVN] Fix a non-integral pointer bug w/vector types
Philip Reames [Tue, 19 Feb 2019 23:19:51 +0000 (23:19 +0000)]
[GVN] Fix a non-integral pointer bug w/vector types

GVN generally doesn't forward structs or array types, but it *will* forward vector types to non-vectors and vice versa.  As demonstrated in tests, we need to inhibit the same set of transforms for vector of non-integral pointers as for non-integral pointers themselves.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354401 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GVN] Fix a crash bug around non-integral pointers
Philip Reames [Tue, 19 Feb 2019 23:07:15 +0000 (23:07 +0000)]
[GVN] Fix a crash bug around non-integral pointers

If we encountered a location where we tried to forward the value of a memset to a load of a non-integral pointer, we crashed.  Such a forward is not legal in general, but we can forward null pointers.  Test for both cases are included.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354399 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Test] Autogenerate existing tests before adding more
Philip Reames [Tue, 19 Feb 2019 22:57:30 +0000 (22:57 +0000)]
[Test] Autogenerate existing tests before adding more

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354398 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Update MC for bulk memory
Thomas Lively [Tue, 19 Feb 2019 22:56:19 +0000 (22:56 +0000)]
[WebAssembly] Update MC for bulk memory

Summary:
Rename MemoryIndex to InitFlags and implement logic for determining
data segment layout in ObjectYAML and MC. Also adds a "passive" flag
for the .section assembler directive although this cannot be assembled
yet because the assembler does not support data sections.

Reviewers: sbc100, aardappel, aheejin, dschuff

Subscribers: jgravelle-google, hiraditya, sunfish, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57938

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354397 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Mark FP32_TO_INT16_IN_MEM/FP32_TO_INT32_IN_MEM/FP32_TO_INT64_IN_MEM as clobberi...
Craig Topper [Tue, 19 Feb 2019 22:37:00 +0000 (22:37 +0000)]
[X86] Mark FP32_TO_INT16_IN_MEM/FP32_TO_INT32_IN_MEM/FP32_TO_INT64_IN_MEM as clobbering EFLAGS to prevent mis-scheduling during conversion from SelectionDAG to MIR.

After r354178, these instruction expand to a sequence that uses an OR instruction. That OR clobbers EFLAGS so we need to state that to avoid accidentally using the clobbered flags.

Our tests show the bug, but I didn't notice because the SETcc instructions didn't move after r354178 since it used to be safe to do the fp->int conversion first.

We should probably convert this whole sequence to SelectionDAG instead of a custom inserter to avoid mistakes like this.

Fixes PR40779

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354395 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LangRef] add to description of alloca instruction
Sanjay Patel [Tue, 19 Feb 2019 22:35:12 +0000 (22:35 +0000)]
[LangRef] add to description of alloca instruction

As mentioned in D58359, we can explicitly state that the
memory allocated is uninitialized and reading that memory
produces undef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354394 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] reduce even more unsigned saturated add with 'not' op
Sanjay Patel [Tue, 19 Feb 2019 22:14:21 +0000 (22:14 +0000)]
[InstCombine] reduce even more unsigned saturated add with 'not' op

We want to use the sum in the icmp to allow matching with
m_UAddWithOverflow and eliminate the 'not'. This is discussed
in D51929 and is another step towards solving PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613

  Name: uaddsat, -1 fval
  %notx = xor i32 %x, -1
  %a = add i32 %x, %y
  %c = icmp ugt i32 %notx, %y
  %r = select i1 %c, i32 %a, i32 -1
  =>
  %a = add i32 %x, %y
  %c2 = icmp ugt i32 %y, %a
  %r = select i1 %c2, i32 -1, i32 %a

  Name: uaddsat, -1 fval + ult
  %notx = xor i32 %x, -1
  %a = add i32 %x, %y
  %c = icmp ult i32 %y, %notx
  %r = select i1 %c, i32 %a, i32 -1
  =>
  %a = add i32 %x, %y
  %c2 = icmp ugt i32 %y, %a
  %r = select i1 %c2, i32 -1, i32 %a

https://rise4fun.com/Alive/nTp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354393 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[libFuzzer] docs: add a FAQ entry about dlclose
Kostya Serebryany [Tue, 19 Feb 2019 22:11:50 +0000 (22:11 +0000)]
[libFuzzer] docs: add a FAQ entry about dlclose

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354392 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agosecond test on git-llvm-push
Renato Golin [Tue, 19 Feb 2019 22:06:27 +0000 (22:06 +0000)]
second test on git-llvm-push

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354390 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix builds with llvm/runtimes/compiler-rt after r354365
Daniel Sanders [Tue, 19 Feb 2019 22:02:38 +0000 (22:02 +0000)]
Fix builds with llvm/runtimes/compiler-rt after r354365

Compiler-rt doesn't include config-ix which was providing CheckSymbolExists to
the LLVM build. Add it to HandleLLVMOptions to fix this

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354389 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ArgumentPromotion] Add a lit.local.cfg to disable X86 specific tests if the X86...
Craig Topper [Tue, 19 Feb 2019 21:58:23 +0000 (21:58 +0000)]
[ArgumentPromotion] Add a lit.local.cfg to disable X86 specific tests if the X86 target doesn't exist.

Hopefully this fixes some buildbot failure after r354376

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354388 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] rearrange saturated add folds; NFC
Sanjay Patel [Tue, 19 Feb 2019 21:46:13 +0000 (21:46 +0000)]
[InstCombine] rearrange saturated add folds; NFC

This is no-functional-change-intended, but that was also
true when it was part of rL354276, and I managed to lose
2 predicates for the fold with constant...causing much bot
distress. So this time I'm adding a couple of negative tests
to avoid that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354384 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTesting git-llvm-push script
Renato Golin [Tue, 19 Feb 2019 21:32:05 +0000 (21:32 +0000)]
Testing git-llvm-push script

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354383 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoPowerPC: Fix typos in comments
Jinsong Ji [Tue, 19 Feb 2019 21:25:13 +0000 (21:25 +0000)]
PowerPC: Fix typos in comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354382 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ConstantFold] Fix misfolding fcmp of a ConstantExpr NaN with itself.
Andrew Scheidecker [Tue, 19 Feb 2019 21:21:54 +0000 (21:21 +0000)]
[ConstantFold] Fix misfolding fcmp of a ConstantExpr NaN with itself.

The code incorrectly inferred that the relationship of a constant expression
to itself is FCMP_OEQ (ordered and equal), when it's actually FCMP_UEQ
(unordered *or* equal). This change corrects that, and adds some more limited
folds that can be done in this case.

Differential revision: https://reviews.llvm.org/D51216

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354381 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ConstantFold] Fix misfolding of icmp with a bitcast FP second operand.
Andrew Scheidecker [Tue, 19 Feb 2019 21:03:20 +0000 (21:03 +0000)]
[ConstantFold] Fix misfolding of icmp with a bitcast FP second operand.

In the process of trying to eliminate the bitcast, this was producing a
malformed icmp with FP operands.

Differential revision: https://reviews.llvm.org/D51215

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354380 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-cov] Add support for gcov --hash-filenames option
Vedant Kumar [Tue, 19 Feb 2019 20:45:00 +0000 (20:45 +0000)]
[llvm-cov] Add support for gcov --hash-filenames option

The patch adds support for --hash-filenames to llvm-cov. This option adds md5
hash of the source path to the name of the generated .gcov file. The option is
crucial for cases where you have multiple files with the same name but can't
use --preserve-paths as resulting filenames exceed the limit.

from gcov(1):

```
-x
--hash-filenames
    By default, gcov uses the full pathname of the source files to to
    create an output filename.  This can lead to long filenames that
    can overflow filesystem limits.  This option creates names of the
    form source-file##md5.gcov, where the source-file component is
    the final filename part and the md5 component is calculated from
    the full mangled name that would have been used otherwise.
```

Patch by Igor Ignatev!

Differential Revision: https://reviews.llvm.org/D58370

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354379 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTesting commit access
Andrew Scheidecker [Tue, 19 Feb 2019 20:38:51 +0000 (20:38 +0000)]
Testing commit access

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354378 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Don't consider functions ABI compatible for ArgumentPromotion pass if they...
Craig Topper [Tue, 19 Feb 2019 20:12:20 +0000 (20:12 +0000)]
[X86] Don't consider functions ABI compatible for ArgumentPromotion pass if they view 512-bit vectors differently.

The use of the -mprefer-vector-width=256 command line option mixed with functions
using vector intrinsics can create situations where one function thinks 512 vectors
are legal, but another fucntion does not.

If a 512 bit vector is passed between them via a pointer, its possible ArgumentPromotion
might try to pass by value instead. This will result in type legalization for the two
functions handling the 512 bit vector differently leading to runtime failures.

Had the 512 bit vector been passed by value from clang codegen, both functions would
have been tagged with a min-legal-vector-width=512 function attribute. That would
make them be legalized the same way.

I observed this issue in 32-bit mode where a union containing a 512 bit vector was
being passed by a function that used intrinsics to one that did not. The caller
ended up passing in zmm0 and the callee tried to read it from ymm0 and ymm1.

The fix implemented here is just to consider it a mismatch if two functions
would handle 512 bit differently without looking at the types that are being
considered. This is the easist and safest fix, but it can be improved in the future.

Differential Revision: https://reviews.llvm.org/D58390

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354376 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "Revert "[llvm-objdump] Allow short options without arguments to be grouped""
Matthew Voss [Tue, 19 Feb 2019 19:46:08 +0000 (19:46 +0000)]
Revert "Revert "[llvm-objdump] Allow short options without arguments to be grouped""

  - Tests that use multiple short switches now test them grouped and ungrouped.

  - Ensure the output of ungrouped and grouped variants is identical

Differential Revision: https://reviews.llvm.org/D57904

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354375 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix builds for older macOS deployment targets after r354365
Daniel Sanders [Tue, 19 Feb 2019 19:45:03 +0000 (19:45 +0000)]
Fix builds for older macOS deployment targets after r354365

Surprisingly, check_symbol_exists is not sufficient. The macOS linker checks the
called functions against a compatibility list for the given deployment target
and check_symbol_exists doesn't trigger this check as it never calls the
function.

This fixes the GreenDragon bots where the deployment target is 10.9

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354374 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAnnotate timeline in Instruments with passes and other timed regions.
Daniel Sanders [Tue, 19 Feb 2019 18:18:31 +0000 (18:18 +0000)]
Annotate timeline in Instruments with passes and other timed regions.

Summary:
Instruments is a useful tool for finding performance issues in LLVM but it can
be difficult to identify regions of interest on the timeline that we can use
to filter the profiler or allocations instrument. Xcode 10 and the latest
macOS/iOS/etc. added support for the os_signpost() API which allows us to
annotate the timeline with information that's meaningful to LLVM.

This patch causes timer start and end events to emit signposts. When used with
-time-passes, this causes the passes to be annotated on the Instruments timeline.
In addition to visually showing the duration of passes on the timeline, it also
allows us to filter the profile and allocations instrument down to an individual
pass allowing us to find the issues within that pass without being drowned out
by the noise from other parts of the compiler.

Using this in conjunction with the Time Profiler (in high frequency mode) and
the Allocations instrument is how I found the SparseBitVector that should have
been a BitVector and the DenseMap that could be replaced by a sorted vector a
couple months ago. I added NamedRegionTimers to TableGen and used the resulting
annotations to identify the slow portions of the Register Info Emitter. Some of
these were placed according to educated guesses while others were placed
according to hot functions from a previous profile. From there I filtered the
profile to a slow portion and the aforementioned issues stood out in the
profile.

To use this feature enable LLVM_SUPPORT_XCODE_SIGNPOSTS in CMake and run the
compiler under Instruments with -time-passes like so:
  instruments -t 'Time Profiler' bin/llc -time-passes -o - input.ll'
Then open the resulting trace in Instruments.

There was a talk at WWDC 2018 that explained the feature which can be found at
https://developer.apple.com/videos/play/wwdc2018/405/ if you'd like to know
more about it.

Reviewers: bogner

Reviewed By: bogner

Subscribers: jdoerfert, mgorny, kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D52954

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354365 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[libObject][NFC] Use sys::path::convert_to_slash.
Jordan Rupprecht [Tue, 19 Feb 2019 18:14:44 +0000 (18:14 +0000)]
[libObject][NFC] Use sys::path::convert_to_slash.

Summary: As suggested in rL353995

Reviewers: compnerd

Reviewed By: compnerd

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58298

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354364 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Generalize X86ISD::BLENDI support to more value types
Simon Pilgrim [Tue, 19 Feb 2019 18:05:42 +0000 (18:05 +0000)]
[X86][SSE] Generalize X86ISD::BLENDI support to more value types

D42042 introduced the ability for the ExecutionDomainFixPass to more easily change between BLENDPD/BLENDPS/PBLENDW as the domains required.

With this ability, we can avoid most bitcasts/scaling in the DAG that was occurring with X86ISD::BLENDI lowering/combining, blend with the vXi32/vXi64 vectors directly and use isel patterns to lower to the float vector equivalent vectors.

This helps the shuffle combining and SimplifyDemandedVectorElts be more aggressive as we lose track of fewer UNDEF elements than when we go up/down through bitcasts.

I've introduced a basic blend(bitcast(x),bitcast(y)) -> bitcast(blend(x,y)) fold, there are more generalizations I can do there (e.g. widening/scaling and handling the tricky v16i16 repeated mask case).

The vector-reduce-smin/smax regressions will be fixed in a future improvement to SimplifyDemandedBits to peek through bitcasts and support X86ISD::BLENDV.

Reapplied after reversion at rL353699 - AVX2 isel fix was applied at rL354358, additional test at rL354360/rL354361

Differential Revision: https://reviews.llvm.org/D57888

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354363 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Remove unused headers in Optional.h
Serge Guelton [Tue, 19 Feb 2019 18:03:47 +0000 (18:03 +0000)]
[NFC] Remove unused headers in Optional.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354362 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix stupid assembly comment typo
Simon Pilgrim [Tue, 19 Feb 2019 17:57:36 +0000 (17:57 +0000)]
Fix stupid assembly comment typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354361 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Add pblendw commuted load test case
Simon Pilgrim [Tue, 19 Feb 2019 17:56:14 +0000 (17:56 +0000)]
[X86][SSE] Add pblendw commuted load test case

Reduced test case for the regression caused in D57888/rL353610

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354360 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SDAG] Use shift amount type in MULO promotion; NFC
Nikita Popov [Tue, 19 Feb 2019 17:37:55 +0000 (17:37 +0000)]
[SDAG] Use shift amount type in MULO promotion; NFC

Directly use the correct shift amount type if it is possible, and
future-proof the code against vectors. The added test makes sure that
bitwidths that do not fit into the shift amount type do not assert.

Split out from D57997.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354359 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][AVX2] Hide VPBLENDD instructions behind AVX2 predicate
Simon Pilgrim [Tue, 19 Feb 2019 17:23:55 +0000 (17:23 +0000)]
[X86][AVX2] Hide VPBLENDD instructions behind AVX2 predicate

This was the cause of the regression in D57888 - the commuted load pattern wasn't hidden by the predicate so once we enabled v4i32 blends on SSE41+ targets then isel was incorrectly matched against AVX2+ instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354358 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Bugfix for nullptr check by klocwork
Craig Topper [Tue, 19 Feb 2019 17:16:23 +0000 (17:16 +0000)]
[X86] Bugfix for nullptr check by klocwork

klocwork critical issues in CG files:

Patch by Xiang Zhang (xiangzhangllvm)

Differential Revision: https://reviews.llvm.org/D58363

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354357 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoX86AsmParser AVX-512: Return error instead of hitting assert
Craig Topper [Tue, 19 Feb 2019 17:13:40 +0000 (17:13 +0000)]
X86AsmParser AVX-512: Return error instead of hitting assert

When parsing a sequence of tokens beginning with {, it will hit an assert and crash if the token afterwards is not an identifier. Instead of this, return a more verbose error as seen elsewhere in the function.

Patch by Brandon Jones (BrandonTJones)

Differential Revision: https://reviews.llvm.org/D57375

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354356 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Filter out tuning feature flags and a few ISA feature flags when checking for...
Craig Topper [Tue, 19 Feb 2019 17:05:11 +0000 (17:05 +0000)]
[X86] Filter out tuning feature flags and a few ISA feature flags when checking for function inline compatibility.

Tuning flags don't have any effect on the available instructions so aren't a good reason to prevent inlining.

There are also some ISA flags that don't have any intrinsics our ABI requirements that we can exclude. I've put only the most basic ones like cmpxchg16b and lahfsahf. These are interesting because they aren't present in all 64-bit CPUs, but we have codegen workarounds when they aren't present.

Loosening these checks can help with scenarios where a caller has a more specific CPU than a callee. The default tuning flags on our generic 'x86-64' CPU can currently make it inline compatible with other CPUs. I've also added an example test for 'nocona' and 'prescott' where 'nocona' is just a 64-bit capable version of 'prescott' but in 32-bit mode they should be completely compatible.

I've based the implementation here of the similar code in AMDGPU.

Differential Revision: https://reviews.llvm.org/D58371

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354355 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Implement moreElementsVector for select
Matt Arsenault [Tue, 19 Feb 2019 17:03:09 +0000 (17:03 +0000)]
GlobalISel: Implement moreElementsVector for select

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354354 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoindex.rst: Remove bb-chapuni from list of IRC bots
Hans Wennborg [Tue, 19 Feb 2019 17:00:34 +0000 (17:00 +0000)]
index.rst: Remove bb-chapuni from list of IRC bots

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354353 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoindex.rst: Remove Dragonegg link
Hans Wennborg [Tue, 19 Feb 2019 17:00:29 +0000 (17:00 +0000)]
index.rst: Remove Dragonegg link

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354352 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Implement moreElementsVector for G_EXTRACT source
Matt Arsenault [Tue, 19 Feb 2019 16:44:22 +0000 (16:44 +0000)]
GlobalISel: Implement moreElementsVector for G_EXTRACT source

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354348 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][AVX] Update VBROADCAST folds to always use v2i64 X86vzload
Simon Pilgrim [Tue, 19 Feb 2019 16:33:17 +0000 (16:33 +0000)]
[X86][AVX] Update VBROADCAST folds to always use v2i64 X86vzload

The VBROADCAST combines and SimplifyDemandedVectorElts improvements mean that we now more consistently use shorter (128-bit) X86vzload input operands.

Follow up to D58053

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354346 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Implement moreElementsVector for bit ops
Matt Arsenault [Tue, 19 Feb 2019 16:30:19 +0000 (16:30 +0000)]
GlobalISel: Implement moreElementsVector for bit ops

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354345 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[yaml2obj][obj2yaml] Remove section type range markers from allowed mappings and...
James Henderson [Tue, 19 Feb 2019 16:22:21 +0000 (16:22 +0000)]
[yaml2obj][obj2yaml] Remove section type range markers from allowed mappings and support hex values

yaml2obj/obj2yaml previously supported SHT_LOOS, SHT_HIOS, and
SHT_LOPROC for section types. These are simply values that delineate a
range and don't really make sense as valid values. For example if a
section has type value 0x70000000, obj2yaml shouldn't print this value
as SHT_LOPROC. Additionally, this was missing the three other range
markers (SHT_HIPROC, SHT_LOUSER and SHT_HIUSER).

This change removes these three range markers. It also adds support for
specifying the type as an integer, to allow section types that LLVM
doesn't know about.

Reviewed by: grimar

Differential Revision: https://reviews.llvm.org/D58383

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354344 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoCast from SDValue directly instead of superfluous getNode(). NFCI.
Simon Pilgrim [Tue, 19 Feb 2019 16:20:09 +0000 (16:20 +0000)]
Cast from SDValue directly instead of superfluous getNode(). NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354343 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Verify g_insert
Matt Arsenault [Tue, 19 Feb 2019 16:10:16 +0000 (16:10 +0000)]
GlobalISel: Verify g_insert

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354342 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][AVX] EltsFromConsecutiveLoads - Add BROADCAST lowering support
Simon Pilgrim [Tue, 19 Feb 2019 15:57:09 +0000 (15:57 +0000)]
[X86][AVX] EltsFromConsecutiveLoads - Add BROADCAST lowering support

This patch adds scalar/subvector BROADCAST handling to EltsFromConsecutiveLoads.

It mainly shows codegen changes to 32-bit code which failed to handle i64 loads, although 64-bit code is also using this new path to more efficiently combine to a broadcast load.

Differential Revision: https://reviews.llvm.org/D58053

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354340 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[yaml2obj][obj2yaml] - Support SHT_GNU_versym (.gnu.version) section.
George Rimar [Tue, 19 Feb 2019 15:29:07 +0000 (15:29 +0000)]
[yaml2obj][obj2yaml] - Support SHT_GNU_versym (.gnu.version) section.

This patch adds support for parsing dumping the .gnu.version section.
Description of the section is: https://refspecs.linuxfoundation.org/LSB_1.3.0/gLSB/gLSB/symversion.html#SYMVERTBL

Differential revision: https://reviews.llvm.org/D58280

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354338 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRecommit r354328, r354329 "[obj2yaml][yaml2obj] - Add support of parsing/dumping...
George Rimar [Tue, 19 Feb 2019 14:53:48 +0000 (14:53 +0000)]
Recommit r354328, r354329 "[obj2yaml][yaml2obj] - Add support of parsing/dumping of the .gnu.version_r section."

Fix:
Replace
assert(!IO.getContext() && "The IO context is initialized already");
with
assert(IO.getContext() && "The IO context is not initialized");
(this was introduced in r354329, where I tried to quickfix the darwin BB
and seems copypasted the assert from the wrong place).

Original commit message:

The section is described here:
https://refspecs.linuxfoundation.org/LSB_1.3.0/gLSB/gLSB/symverrqmts.html

Patch just teaches obj2yaml/yaml2obj to dump and parse such sections.

We did the finalization of string tables very late,
and I had to move the logic to make it a bit earlier.
That was needed in this patch since .gnu.version_r adds strings to .dynstr.
This might also be useful for implementing other special sections.

Everything else changed in this patch seems to be straightforward.

Differential revision: https://reviews.llvm.org/D58119

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354335 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[RISCV][NFC] Move some std::string to StringRef
Alex Bradbury [Tue, 19 Feb 2019 14:42:00 +0000 (14:42 +0000)]
[RISCV][NFC] Move some std::string to StringRef

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354333 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r354328, r354329 "[obj2yaml][yaml2obj] - Add support of parsing/dumping of...
George Rimar [Tue, 19 Feb 2019 14:38:25 +0000 (14:38 +0000)]
Revert r354328, r354329 "[obj2yaml][yaml2obj] - Add support of parsing/dumping of the .gnu.version_r section."

Something went wrong. Bots are unhappy:
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/44113/steps/test/logs/stdio

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354332 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix BB after r354328.
George Rimar [Tue, 19 Feb 2019 14:22:10 +0000 (14:22 +0000)]
Fix BB after r354328.

Bot:
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/30188/steps/build_Lld/logs/stdio

Error:
/Users/buildslave/as-bldslv9_new/lld-x86_64-darwin13/llvm.src/lib/ObjectYAML/ELFYAML.cpp:1013:15: error: unused variable 'Object' [-Werror,-Wunused-variable]
  const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
              ^
/Users/buildslave/as-bldslv9_new/lld-x86_64-darwin13/llvm.src/lib/ObjectYAML/ELFYAML.cpp:1023:15: error: unused variable 'Object' [-Werror,-Wunused-variable]
  const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());

Fix:
change
  const auto *Object = static_cast<ELFYAML::Object *>(IO.getContext());
  assert(Object && "The IO context is not initialized");
to
  assert(!IO.getContext() && "The IO context is initialized already");

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354329 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[obj2yaml][yaml2obj] - Add support of parsing/dumping of the .gnu.version_r section.
George Rimar [Tue, 19 Feb 2019 14:03:14 +0000 (14:03 +0000)]
[obj2yaml][yaml2obj] - Add support of parsing/dumping of the .gnu.version_r section.

The section is described here:
https://refspecs.linuxfoundation.org/LSB_1.3.0/gLSB/gLSB/symverrqmts.html

Patch just teaches obj2yaml/yaml2obj to dump and parse such sections.

We did the finalization of string tables very late,
and I had to move the logic to make it a bit earlier.
That was needed in this patch since .gnu.version_r adds strings to .dynstr.
This might also be useful for implementing other special sections.

Everything else changed in this patch seems to be straightforward.

Differential revision: https://reviews.llvm.org/D58119

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354328 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[RISCV] Re-organise calling convention tests
Alex Bradbury [Tue, 19 Feb 2019 13:47:19 +0000 (13:47 +0000)]
[RISCV] Re-organise calling convention tests

Re-organise calling convention tests to prepare for ilp32f and ilp32d hard
float ABI tests. It's also clear that we need to introduce similar tests for
lp64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354323 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix BB after r354319 "[yaml2obj] - Do not skip zeroes blocks if there are relocations...
George Rimar [Tue, 19 Feb 2019 13:27:06 +0000 (13:27 +0000)]
Fix BB after r354319 "[yaml2obj] - Do not skip zeroes blocks if there are relocations against them."

Fix: move the test to x86 folder.
Seems it is needed, because llvm-objdump invocation used in test has -D (disasm) flag.

BB: http://lab.llvm.org:8011/builders/clang-hexagon-elf/builds/23016

/local/buildbot/slaves/hexagon-build-02/clang-hexagon-elf/stage1/bin/llvm-objdump:
error: '/local/buildbot/slaves/hexagon-build-02/clang-hexagon-elf/stage1/test/tools/llvm-objdump/Output/disasm-zeroes-relocations.test.tmp':
can't find target: : error: unable to get target for 'x86_64--', see --version and --triple.
.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354322 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[yaml2obj] - Do not skip zeroes blocks if there are relocations against them.
George Rimar [Tue, 19 Feb 2019 12:38:36 +0000 (12:38 +0000)]
[yaml2obj] - Do not skip zeroes blocks if there are relocations against them.

This is for -D -reloc combination.

With this patch, we do not skip the zero bytes that have a relocation against
them when -reloc is used. If -reloc is not used, then the behavior will be the same.

Differential revision: https://reviews.llvm.org/D58174

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354319 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[yaml2obj] - Do not ignore explicit addresses for .dynsym and .dynstr
George Rimar [Tue, 19 Feb 2019 12:15:04 +0000 (12:15 +0000)]
[yaml2obj] - Do not ignore explicit addresses for .dynsym and .dynstr

This fixes https://bugs.llvm.org/show_bug.cgi?id=40339

Previously if the addresses were set in YAML they were ignored for
.dynsym and .dynstr sections. The patch fixes that.

Differential revision: https://reviews.llvm.org/D58168

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354318 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix obsolete comment. NFC
Diana Picus [Tue, 19 Feb 2019 11:34:36 +0000 (11:34 +0000)]
Fix obsolete comment. NFC

Both files mentioned in the comment now include TargetOpcodes.def. Just
mention that directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354316 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] API for signaling that the current loop is being deleted
Max Kazantsev [Tue, 19 Feb 2019 11:14:05 +0000 (11:14 +0000)]
[NFC] API for signaling that the current loop is being deleted

We are planning to be able to delete the current loop in LoopSimplifyCFG
in the future. Add API to notify the loop pass manager that it happened.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354314 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Store loop header in a local to keep it available after the loop is deleted
Max Kazantsev [Tue, 19 Feb 2019 11:13:58 +0000 (11:13 +0000)]
[NFC] Store loop header in a local to keep it available after the loop is deleted

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354313 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM GlobalISel] Support G_PHI for Thumb2
Diana Picus [Tue, 19 Feb 2019 10:26:47 +0000 (10:26 +0000)]
[ARM GlobalISel] Support G_PHI for Thumb2

Same as arm mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354310 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Dominators] Fix and optimize edge insertion of depth-based search
Fangrui Song [Tue, 19 Feb 2019 05:16:52 +0000 (05:16 +0000)]
[Dominators] Fix and optimize edge insertion of depth-based search

Summary:
After (x,y) is inserted, depth-based search finds all affected v that satisfies:

depth(nca(x,y))+1 < depth(v) && there exists a path P from y to v where every w on P satisfies depth(v) <= depth(w)

This reduces to a widest path problem (maximizing the depth of the
minimum vertex in the path) which can be solved by a modified version of
Dijkstra with a bucket queue (named depth-based search in the paper).

The algorithm visits vertices in decreasing order of bucket number.
However, the current code misused priority_queue to extract them in
increasing order. I cannot think of a failing scenario but it surely may
process vertices more than once due to the local usage of Processed.

This patch fixes this bug and simplifies/optimizes the code a bit. Also
add more comments.

Reviewers: kuhar

Reviewed By: kuhar

Subscribers: kristina, jdoerfert, llvm-commits, NutshellySima, brzycki

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58349

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354306 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Remove command line strings from the ProcIntel* features.
Craig Topper [Tue, 19 Feb 2019 03:04:14 +0000 (03:04 +0000)]
[X86] Remove command line strings from the ProcIntel* features.

These should always follow the CPU string. There's no reason to control them independently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354304 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GlobalISel][AArch64] Legalize + select some llvm.ctlz.* intrinsics
Jessica Paquette [Mon, 18 Feb 2019 23:33:24 +0000 (23:33 +0000)]
[GlobalISel][AArch64] Legalize + select some llvm.ctlz.* intrinsics

Legalize/select llvm.ctlz.*

Add select-ctlz to show that we actually select them. Update arm64-clrsb.ll and
arm64-vclz.ll to show that we perform valid transformations in optimized builds,
and document where GISel can improve.

Differential Revision: https://reviews.llvm.org/D58155

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354299 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CGP] form usub with overflow from sub+icmp
Sanjay Patel [Mon, 18 Feb 2019 23:33:05 +0000 (23:33 +0000)]
[CGP] form usub with overflow from sub+icmp

The motivating x86 cases for forming the intrinsic are shown in PR31754 and PR40487:
https://bugs.llvm.org/show_bug.cgi?id=31754
https://bugs.llvm.org/show_bug.cgi?id=40487
..and those are shown in the IR test file and x86 codegen file.

Matching the usubo pattern is harder than uaddo because we have 2 independent values rather than a def-use.

This adds a TLI hook that should preserve the existing behavior for uaddo formation, but disables usubo
formation by default. Only x86 overrides that setting for now although other targets will likely benefit
by forming usbuo too.

Differential Revision: https://reviews.llvm.org/D57789

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354298 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Use MachineInstr::mayAlias to replace areMemAccessesTriviallyDisjoint in...
Changpeng Fang [Mon, 18 Feb 2019 23:00:26 +0000 (23:00 +0000)]
AMDGPU: Use MachineInstr::mayAlias to replace areMemAccessesTriviallyDisjoint in LoadStoreOptimizer pass.

Summary:
  This is to fix a memory dependence bug in LoadStoreOptimizer.

Reviewers:
  arsenm, rampitec

Differential Revision:
  https://reviews.llvm.org/D58295

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354295 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Implement widenScalar for g_extract scalar results
Matt Arsenault [Mon, 18 Feb 2019 22:39:27 +0000 (22:39 +0000)]
GlobalISel: Implement widenScalar for g_extract scalar results

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354293 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Make buildExtract use DstOp/SrcOp
Matt Arsenault [Mon, 18 Feb 2019 22:39:22 +0000 (22:39 +0000)]
GlobalISel: Make buildExtract use DstOp/SrcOp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354292 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Fix double count of offset for irregular vector breakdowns
Matt Arsenault [Mon, 18 Feb 2019 17:01:09 +0000 (17:01 +0000)]
GlobalISel: Fix double count of offset for irregular vector breakdowns

Fixes cases with odd vectors that break into multiple requested size
pieces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354280 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[x86] split more v8f32/v8i32 shuffles in lowering
Sanjay Patel [Mon, 18 Feb 2019 16:46:12 +0000 (16:46 +0000)]
[x86] split more v8f32/v8i32 shuffles in lowering

Similar to D57867 - this is a small patch with lots of test diffs.
With half-vector-width narrowing potential, using an extract + 128-bit vshufps
is a win because it replaces a 256-bit shuffle with a 128-bit shufle.

This seems like it should be a win even for targets with 'fast-variable-shuffle',
but we are intentionally deferring that to an independent change to make sure
that is true.

Differential Revision: https://reviews.llvm.org/D58181

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354279 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[InstCombine] reduce even more unsigned saturated add with 'not' op"
Sanjay Patel [Mon, 18 Feb 2019 16:04:22 +0000 (16:04 +0000)]
Revert "[InstCombine] reduce even more unsigned saturated add with 'not' op"

This reverts commit 079b610c29b4a428b3ae7b64dbac0378facf6632.
Bots are failing after this change on a stage 2 compile of clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354277 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] reduce even more unsigned saturated add with 'not' op
Sanjay Patel [Mon, 18 Feb 2019 15:21:39 +0000 (15:21 +0000)]
[InstCombine] reduce even more unsigned saturated add with 'not' op

We want to use the sum in the icmp to allow matching with
m_UAddWithOverflow and eliminate the 'not'. This is discussed
in D51929 and is another step towards solving PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613

  Name: uaddsat, -1 fval
  %notx = xor i32 %x, -1
  %a = add i32 %x, %y
  %c = icmp ugt i32 %notx, %y
  %r = select i1 %c, i32 %a, i32 -1
  =>
  %a = add i32 %x, %y
  %c2 = icmp ugt i32 %y, %a
  %r = select i1 %c2, i32 -1, i32 %a

  Name: uaddsat, -1 fval + ult
  %notx = xor i32 %x, -1
  %a = add i32 %x, %y
  %c = icmp ult i32 %y, %notx
  %r = select i1 %c, i32 %a, i32 -1
  =>
  %a = add i32 %x, %y
  %c2 = icmp ugt i32 %y, %a
  %r = select i1 %c2, i32 -1, i32 %a

https://rise4fun.com/Alive/nTp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354276 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MCA] Correctly update register definitions in the PRF after move elimination.
Andrea Di Biagio [Mon, 18 Feb 2019 14:15:25 +0000 (14:15 +0000)]
[MCA] Correctly update register definitions in the PRF after move elimination.

This patch fixes a bug where register writes performed by optimizable register
moves were sometimes wrongly treated like partial register updates.  Before this
patch, llvm-mca wrongly predicted a 1.50 IPC for test reg-move-elimination-6.s
(added by this patch).  With this patch, llvm-mca correctly updates the register
defintions in the PRF, and the IPC for that test is now correctly reported as 2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354271 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-readobj] - Simplify .gnu.version_d dumping.
George Rimar [Mon, 18 Feb 2019 13:58:12 +0000 (13:58 +0000)]
[llvm-readobj] - Simplify .gnu.version_d dumping.

This is similar to D58048.

Instead of scanning the dynamic table to read the
DT_VERDEFNUM, we could take it from the sh_info field.
(https://docs.oracle.com/cd/E19683-01/816-1386/chapter6-94076/index.html)

The patch does this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354270 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Make Optional<T> trivially copyable when T is trivially copyable
Serge Guelton [Mon, 18 Feb 2019 12:07:12 +0000 (12:07 +0000)]
[NFC] Make Optional<T> trivially copyable when T is trivially copyable

This is a follow-up to r354246 and a reimplementation of https://reviews.llvm.org/D57097?id=186600
that should not trigger any UB thanks to the use of an union.

This may still be subject to the problem solved by std::launder, but I'm unsure how it interacts whith union.
/me plans to revert if this triggers any relevant bot failure. At least this validates in Release mode with
clang 6.0.1 and gcc 4.8.5.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354264 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MCA] Slightly refactor method writeStartEvent in WriteState and ReadState. NFCI
Andrea Di Biagio [Mon, 18 Feb 2019 11:27:11 +0000 (11:27 +0000)]
[MCA] Slightly refactor method writeStartEvent in WriteState and ReadState. NFCI

This is another change in preparation for PR37494.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354261 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-exegesis] [NFC] Fixing typo.
Guillaume Chatelet [Mon, 18 Feb 2019 10:08:20 +0000 (10:08 +0000)]
[llvm-exegesis] [NFC] Fixing typo.

Reviewers: courbet, gchatelet

Reviewed By: courbet, gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D54895

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354250 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRecommit [NFC] Better encapsulation of llvm::Optional Storage
Serge Guelton [Mon, 18 Feb 2019 08:46:32 +0000 (08:46 +0000)]
Recommit [NFC] Better encapsulation of llvm::Optional Storage

Second attempt, trying to navigate out of the UB zone using
union for storage instead of raw bytes.

I'm prepared to revert that commit as soon as validation breaks,
which is likely to happen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354246 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r354244 "[DAGCombiner] Eliminate dead stores to stack."
Clement Courbet [Mon, 18 Feb 2019 08:24:29 +0000 (08:24 +0000)]
Revert r354244 "[DAGCombiner] Eliminate dead stores to stack."

Breaks some bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354245 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] Eliminate dead stores to stack.
Clement Courbet [Mon, 18 Feb 2019 07:59:01 +0000 (07:59 +0000)]
[DAGCombiner] Eliminate dead stores to stack.

Summary:
A store to an object whose lifetime is about to end can be removed.

See PR40550 for motivation.

Reviewers: niravd

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D57541

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354244 91177308-0d34-0410-b5e6-96231b3b80d8