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Peter Maydell [Tue, 30 Oct 2018 14:09:25 +0000 (14:09 +0000)]
Merge remote-tracking branch 'remotes/jnsnow/tags/bitmaps-pull-request' into staging
Pull request
# gpg: Signature made Mon 29 Oct 2018 21:24:08 GMT
# gpg: using RSA key
7DEF8106AAFC390E
# gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>"
# Primary key fingerprint: FAEB 9711 A12C F475 812F 18F2 88A9 064D 1835 61EB
# Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76 CBD0 7DEF 8106 AAFC 390E
* remotes/jnsnow/tags/bitmaps-pull-request:
iotests: 169: add cases for source vm resuming
iotests: improve 169
dirty-bitmaps: clean-up bitmaps loading and migration logic
bitmap: Update count after a merge
nbd: forbid use of frozen bitmaps
block/backup: prohibit backup from using in use bitmaps
block/dirty-bitmaps: prohibit enable/disable on locked/frozen bitmaps
block/dirty-bitmaps: allow clear on disabled bitmaps
block/dirty-bitmaps: fix merge permissions
block/dirty-bitmaps: add user_locked status checker
bloc/qcow2: drop dirty_bitmaps_loaded state variable
block/qcow2: improve error message in qcow2_inactivate
iotests: 169: drop deprecated 'autoload' parameter
qapi: add transaction support for x-block-dirty-bitmap-merge
blockdev: rename block-dirty-bitmap-clear transaction handlers
dirty-bitmap: make it possible to restore bitmap after merge
dirty-bitmap: rename bdrv_undo_clear_dirty_bitmap
dirty-bitmap: switch assert-fails to errors in bdrv_merge_dirty_bitmap
blockdev-backup: add bitmap argument
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 30 Oct 2018 13:32:38 +0000 (13:32 +0000)]
Merge remote-tracking branch 'remotes/kraxel/tags/usb-
20181029-pull-request' into staging
usb: fixes for ohci and smart card emulation.
# gpg: Signature made Mon 29 Oct 2018 20:02:34 GMT
# gpg: using RSA key
4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/usb-
20181029-pull-request:
hw: ccid-card-emulated: cleanup resource when realize in error path
hw: ccid-card-emulated: introduce clean_event_notifier
usb: ohci: make num_ports to an unsinged integer
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 30 Oct 2018 10:45:49 +0000 (10:45 +0000)]
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-october-2018-part-4' into staging
MIPS queue for October 2018, part 4
# gpg: Signature made Mon 29 Oct 2018 15:11:32 GMT
# gpg: using RSA key
D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65
* remotes/amarkovic/tags/mips-queue-october-2018-part-4: (27 commits)
linux-user: Add prctl() PR_SET_FP_MODE and PR_GET_FP_MODE implementations
linux-user: Determine the desired FPU mode from MIPS.abiflags
linux-user: Read and set FP ABI value from MIPS abiflags
linux-user: Extract MIPS abiflags from ELF file
linux-user: Extend image_info struct with MIPS fp_abi and interp_fp_abi fields
elf: Define MIPS_ABI_FP_UNKNOWN macro
target/mips: Amend MXU ASE overview note
target/mips: Move MXU_EN check one level higher
target/mips: Add emulation of MXU instructions S32LDD and S32LDDR
target/mips: Add emulation of MXU instructions Q8MUL and Q8MULSU
target/mips: Add emulation of MXU instruction D16MAC
target/mips: Add emulation of MXU instruction D16MUL
target/mips: Add emulation of MXU instruction S8LDD
target/mips: Move MUL, S32M2I, S32I2M handling out of main MXU switch
target/mips: Add emulation of MXU instructions S32I2M and S32M2I
target/mips: Add emulation of non-MXU MULL within MXU decoding engine
target/mips: Add bit encoding for MXU operand getting pattern 'optn3'
target/mips: Add bit encoding for MXU operand getting pattern 'optn2'
target/mips: Add bit encoding for MXU execute add/sub pattern 'eptn2'
target/mips: Add bit encoding for MXU accumulate add/sub 2-bit pattern 'aptn2'
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Vladimir Sementsov-Ogievskiy [Mon, 29 Oct 2018 20:23:17 +0000 (16:23 -0400)]
iotests: 169: add cases for source vm resuming
Test that we can resume source vm after [failed] migration, and bitmaps
are ok.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Signed-off-by: John Snow <jsnow@redhat.com>
Vladimir Sementsov-Ogievskiy [Mon, 29 Oct 2018 20:23:17 +0000 (16:23 -0400)]
iotests: improve 169
Before previous patch, iotest 169 was actually broken for the case
test_persistent__not_migbitmap__offline_shared, while formally
passing.
After migration log of vm_b had message:
qemu-system-x86_64: Could not reopen qcow2 layer: Bitmap already
exists: bitmap0
which means that invalidation failed and bs->drv = NULL.
It was because we've loaded bitmap twice: on open and on invalidation.
Add code to 169, to catch such fails.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Signed-off-by: John Snow <jsnow@redhat.com>
Vladimir Sementsov-Ogievskiy [Mon, 29 Oct 2018 20:23:17 +0000 (16:23 -0400)]
dirty-bitmaps: clean-up bitmaps loading and migration logic
This patch aims to bring the following behavior:
1. We don't load bitmaps, when started in inactive mode. It's the case
of incoming migration. In this case we wait for bitmaps migration
through migration channel (if 'dirty-bitmaps' capability is enabled) or
for invalidation (to load bitmaps from the image).
2. We don't remove persistent bitmaps on inactivation. Instead, we only
remove bitmaps after storing. This is the only way to restore bitmaps,
if we decided to resume source after [failed] migration with
'dirty-bitmaps' capability enabled (which means, that bitmaps were not
stored).
3. We load bitmaps on open and any invalidation, it's ok for all cases:
- normal open
- migration target invalidation with dirty-bitmaps capability
(bitmaps are migrating through migration channel, the are not
stored, so they should have IN_USE flag set and will be skipped
when loading. However, it would fail if bitmaps are read-only[1])
- migration target invalidation without dirty-bitmaps capability
(normal load of the bitmaps, if migrated with shared storage)
- source invalidation with dirty-bitmaps capability
(skip because IN_USE)
- source invalidation without dirty-bitmaps capability
(bitmaps were dropped, reload them)
[1]: to accurately handle this, migration of read-only bitmaps is
explicitly forbidden in this patch.
New mechanism for not storing bitmaps when migrate with dirty-bitmaps
capability is introduced: migration filed in BdrvDirtyBitmap.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Signed-off-by: John Snow <jsnow@redhat.com>
Eric Blake [Mon, 29 Oct 2018 20:23:17 +0000 (16:23 -0400)]
bitmap: Update count after a merge
We need an accurate count of the number of bits set in a bitmap
after a merge. In particular, since the merge operation short-circuits
a merge from an empty source, if you have bitmaps A, B, and C where
B started empty, then merge C into B, and B into A, an inaccurate
count meant that A did not get the contents of C.
In the worst case, we may falsely regard the bitmap as empty when
it has had new writes merged into it.
Fixes:
be58721db
CC: qemu-stable@nongnu.org
Signed-off-by: Eric Blake <eblake@redhat.com>
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-id:
20181002233314.30159-1-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
John Snow [Mon, 29 Oct 2018 20:23:16 +0000 (16:23 -0400)]
nbd: forbid use of frozen bitmaps
Whether it's "locked" or "frozen", it's in use and should
not be allowed for the purposes of this operation.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-id:
20181002230218.13949-7-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
John Snow [Mon, 29 Oct 2018 20:23:16 +0000 (16:23 -0400)]
block/backup: prohibit backup from using in use bitmaps
If the bitmap is frozen, we shouldn't touch it.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-id:
20181002230218.13949-6-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
John Snow [Mon, 29 Oct 2018 20:23:16 +0000 (16:23 -0400)]
block/dirty-bitmaps: prohibit enable/disable on locked/frozen bitmaps
We're not being consistent about this. If it's in use by an operation,
the user should not be able to change the behavior of that bitmap.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-id:
20181002230218.13949-5-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
John Snow [Mon, 29 Oct 2018 20:23:16 +0000 (16:23 -0400)]
block/dirty-bitmaps: allow clear on disabled bitmaps
Similarly to merge, it's OK to allow clear operations on disabled
bitmaps, as this condition only means that they are not recording
new writes. We are free to clear it if the user requests it.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-id:
20181002230218.13949-4-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
John Snow [Mon, 29 Oct 2018 20:23:16 +0000 (16:23 -0400)]
block/dirty-bitmaps: fix merge permissions
In prior commits that made merge transactionable, we removed the
assertion that merge cannot operate on disabled bitmaps. In addition,
we want to make sure that we are prohibiting merges to "locked" bitmaps.
Use the new user_locked function to check.
Reported-by: Eric Blake <eblake@redhat.com>
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-id:
20181002230218.13949-3-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
John Snow [Mon, 29 Oct 2018 20:23:16 +0000 (16:23 -0400)]
block/dirty-bitmaps: add user_locked status checker
Instead of both frozen and qmp_locked checks, wrap it into one check.
frozen implies the bitmap is split in two (for backup), and shouldn't
be modified. qmp_locked implies it's being used by another operation,
like being exported over NBD. In both cases it means we shouldn't allow
the user to modify it in any meaningful way.
Replace any usages where we check both frozen and qmp_locked with the
new check.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id:
20181002230218.13949-2-jsnow@redhat.com
[w/edits Suggested-By: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>]
Signed-off-by: John Snow <jsnow@redhat.com>
Vladimir Sementsov-Ogievskiy [Mon, 29 Oct 2018 20:23:15 +0000 (16:23 -0400)]
bloc/qcow2: drop dirty_bitmaps_loaded state variable
This variable doesn't work as it should, because it is actually cleared
in qcow2_co_invalidate_cache() by memset(). Drop it, as the following
patch will introduce new behavior.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: John Snow <jsnow@redhat.com>
Signed-off-by: John Snow <jsnow@redhat.com>
Vladimir Sementsov-Ogievskiy [Mon, 29 Oct 2018 20:23:15 +0000 (16:23 -0400)]
block/qcow2: improve error message in qcow2_inactivate
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
[Maintainer edit -- touched up error message. --js]
Reviewed-by: John Snow <jsnow@redhat.com>
Signed-off-by: John Snow <jsnow@redhat.com>
Vladimir Sementsov-Ogievskiy [Mon, 29 Oct 2018 20:23:15 +0000 (16:23 -0400)]
iotests: 169: drop deprecated 'autoload' parameter
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: John Snow <jsnow@redhat.com>
Signed-off-by: John Snow <jsnow@redhat.com>
Vladimir Sementsov-Ogievskiy [Mon, 29 Oct 2018 20:23:15 +0000 (16:23 -0400)]
qapi: add transaction support for x-block-dirty-bitmap-merge
New action is like clean action: do the whole thing in .prepare and
undo in .abort. This behavior for bitmap-changing actions is needed
because backup job actions use bitmap in .prepare.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: John Snow <jsnow@redhat.com>
Vladimir Sementsov-Ogievskiy [Mon, 29 Oct 2018 20:23:15 +0000 (16:23 -0400)]
blockdev: rename block-dirty-bitmap-clear transaction handlers
Rename block-dirty-bitmap-clear transaction handlers to reuse them for
x-block-dirty-bitmap-merge transaction in the following patch.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: John Snow <jsnow@redhat.com>
Vladimir Sementsov-Ogievskiy [Mon, 29 Oct 2018 20:23:15 +0000 (16:23 -0400)]
dirty-bitmap: make it possible to restore bitmap after merge
Add backup parameter to bdrv_merge_dirty_bitmap() to be used then with
bdrv_restore_dirty_bitmap() if it needed to restore the bitmap after
merge operation.
This is needed to implement bitmap merge transaction action in further
commit.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: John Snow <jsnow@redhat.com>
Vladimir Sementsov-Ogievskiy [Mon, 29 Oct 2018 20:23:14 +0000 (16:23 -0400)]
dirty-bitmap: rename bdrv_undo_clear_dirty_bitmap
Use more generic names to reuse the function for bitmap merge in the
following commit.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: John Snow <jsnow@redhat.com>
Vladimir Sementsov-Ogievskiy [Mon, 29 Oct 2018 20:23:14 +0000 (16:23 -0400)]
dirty-bitmap: switch assert-fails to errors in bdrv_merge_dirty_bitmap
Move checks from qmp_x_block_dirty_bitmap_merge() to
bdrv_merge_dirty_bitmap(), to share them with dirty bitmap merge
transaction action in future commit.
Note: for now, only qmp_x_block_dirty_bitmap_merge() calls
bdrv_merge_dirty_bitmap().
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: John Snow <jsnow@redhat.com>
John Snow [Mon, 29 Oct 2018 20:23:14 +0000 (16:23 -0400)]
blockdev-backup: add bitmap argument
It is only an oversight that we don't allow incremental backup with
blockdev-backup. Add the bitmap argument which enables this.
Signed-off-by: John Snow <jsnow@redhat.com>
Message-id:
20180830211605.13683-2-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
Peter Maydell [Mon, 29 Oct 2018 18:24:11 +0000 (18:24 +0000)]
Merge remote-tracking branch 'remotes/kraxel/tags/ui-
20181029-pull-request' into staging
ui: sdl+spice tweaks.
# gpg: Signature made Mon 29 Oct 2018 14:18:21 GMT
# gpg: using RSA key
4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/ui-
20181029-pull-request:
spice: prepare for upcoming spice-server change
SDL: set a hint to not bypass the window compositor
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 29 Oct 2018 17:03:27 +0000 (17:03 +0000)]
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging
Pull request
No changelog-worthy entries, just small tweaks.
# gpg: Signature made Mon 29 Oct 2018 13:55:54 GMT
# gpg: using RSA key
9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/block-pull-request:
nvdimm: Add docs hint for Linux driver name
util: aio-posix: fix a typo
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 29 Oct 2018 15:15:14 +0000 (15:15 +0000)]
Merge remote-tracking branch 'remotes/kraxel/tags/audio-
20181029-pull-request' into staging
audio: qom cleanups.
# gpg: Signature made Mon 29 Oct 2018 13:37:09 GMT
# gpg: using RSA key
4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/audio-
20181029-pull-request:
audio: use TYPE_MV88W8618_AUDIO instead of hardcoded string
audio: use object link instead of qdev property to pass wm8750 reference
audio: use TYPE_WM8750 instead of a hardcoded string
hw: AC97: make it more QOMconventional
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Stefan Markovic [Fri, 26 Oct 2018 11:17:43 +0000 (13:17 +0200)]
linux-user: Add prctl() PR_SET_FP_MODE and PR_GET_FP_MODE implementations
Implement MIPS specific prctl() PR_SET_FP_MODE and PR_GET_FP_MODE emulation.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Stefan Markovic [Tue, 23 Oct 2018 09:44:36 +0000 (11:44 +0200)]
linux-user: Determine the desired FPU mode from MIPS.abiflags
Floating-point mode is calculated from MIPS.abiflags FP ABI value
(based on kernel implementation). Illegal combinations are rejected.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Stefan Markovic [Tue, 23 Oct 2018 07:19:10 +0000 (09:19 +0200)]
linux-user: Read and set FP ABI value from MIPS abiflags
Set fp_abi and interp_fp_abi values to current fp_abi value read from
MIPS.abiflags.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Stefan Markovic [Mon, 22 Oct 2018 14:42:27 +0000 (16:42 +0200)]
linux-user: Extract MIPS abiflags from ELF file
Read MIPS.abiflags section from ELF file into Mips_elf_abiflags_v0 struct.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Stefan Markovic [Mon, 22 Oct 2018 14:43:40 +0000 (16:43 +0200)]
linux-user: Extend image_info struct with MIPS fp_abi and interp_fp_abi fields
Add MIPS specific image_info struct fields fp_abi and interp_fp_abi
to store executable and interpreter fp_abi values (based on kernel
struct arch_elf_state in mips/include/asm/elf.h).
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Stefan Markovic [Fri, 26 Oct 2018 13:28:07 +0000 (15:28 +0200)]
elf: Define MIPS_ABI_FP_UNKNOWN macro
Add MIPS_ABI_FP_UNKNOWN as QEMU internal value to represent
unknown fp_abi (based on kernel mips/include/asm/elf.h definition)
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Gerd Hoffmann [Fri, 12 Oct 2018 11:45:51 +0000 (13:45 +0200)]
spice: prepare for upcoming spice-server change
Future spice-server versions will call the client_monitors_config
callback with the monitors list filtered to only include the monitors
of the given display channel (aka QXLInstance). Luckily this is easily
detectable at runtime, so we can prepare for that in advance and also
make qemu compatible with both old and new spice-server versions.
While being at it also use the console index instead of head number as
array index. The later doesn't work correctly in case multiple display
devices are present.
Cc: spice-devel@lists.freedesktop.org
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Lukáš Hrázký <lhrazky@redhat.com>
Message-id:
20181012114551.28809-1-kraxel@redhat.com
Sebastian Krzyszkowiak [Wed, 24 Oct 2018 14:37:48 +0000 (16:37 +0200)]
SDL: set a hint to not bypass the window compositor
Without that, window effects in KWin get suspended as soon as any
qemu-sdl window becomes visible. While the SDL default makes sense
for games, it's not really suitable for QEMU.
Signed-off-by: Sebastian Krzyszkowiak <dos@dosowisko.net>
Message-id:
20181024143748.4425-1-dos@dosowisko.net
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Kees Cook [Thu, 18 Oct 2018 20:13:51 +0000 (13:13 -0700)]
nvdimm: Add docs hint for Linux driver name
I spent way too much time trying to figure out why the emulated NVDIMM
was missing under Linux. In an effort to help others who might be looking
for these kinds of things in the future, include a hint.
Signed-off-by: Kees Cook <keescook@chromium.org>
Message-id:
20181018201351.GA25286@beast
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Li Qiang [Mon, 8 Oct 2018 02:16:12 +0000 (19:16 -0700)]
util: aio-posix: fix a typo
Cc: qemu-trivial@nongnu.org
Signed-off-by: Li Qiang <liq3ea@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Fam Zheng <famz@redhat.com>
Message-id:
1538964972-3223-1-git-send-email-liq3ea@gmail.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Aleksandar Markovic [Wed, 24 Oct 2018 12:12:34 +0000 (14:12 +0200)]
target/mips: Amend MXU ASE overview note
Add prefix, suffix, operation descriptions, and other corrections
and amendments to the comment that describes MXU ASE.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Wed, 24 Oct 2018 11:06:36 +0000 (13:06 +0200)]
target/mips: Move MXU_EN check one level higher
Move MXU_EN check to the main MXU decoding function, to avoid code
repetition.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Craig Janeczek [Thu, 18 Oct 2018 20:45:39 +0000 (22:45 +0200)]
target/mips: Add emulation of MXU instructions S32LDD and S32LDDR
Add support for emulating the S32LDD and S32LDDR MXU instructions.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Craig Janeczek [Thu, 18 Oct 2018 20:38:25 +0000 (22:38 +0200)]
target/mips: Add emulation of MXU instructions Q8MUL and Q8MULSU
Adds support for emulating the Q8MUL and Q8MULSU MXU instructions.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Craig Janeczek [Thu, 18 Oct 2018 20:18:03 +0000 (22:18 +0200)]
target/mips: Add emulation of MXU instruction D16MAC
Add support for emulating the D16MAC MXU instruction.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Craig Janeczek [Thu, 18 Oct 2018 20:03:06 +0000 (22:03 +0200)]
target/mips: Add emulation of MXU instruction D16MUL
Add support for emulating the D16MUL MXU instruction.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Craig Janeczek [Thu, 18 Oct 2018 19:45:26 +0000 (21:45 +0200)]
target/mips: Add emulation of MXU instruction S8LDD
Add support for emulating the S8LDD MXU instruction.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 23 Oct 2018 15:50:49 +0000 (17:50 +0200)]
target/mips: Move MUL, S32M2I, S32I2M handling out of main MXU switch
Move MUL, S32M2I, S32I2M handling out of switch. These are all
instructions that do not depend on MXU_EN flag of MXU_CR.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Craig Janeczek [Thu, 18 Oct 2018 19:32:20 +0000 (21:32 +0200)]
target/mips: Add emulation of MXU instructions S32I2M and S32M2I
Add support for emulating the S32I2M and S32M2I MXU instructions.
This commit also contains utility functions for reading/writing
to MXU registers. This is required for overall MXU instruction
support.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Craig Janeczek [Fri, 19 Oct 2018 15:49:19 +0000 (17:49 +0200)]
target/mips: Add emulation of non-MXU MULL within MXU decoding engine
Add emulation of non-MXU MULL within MXU decoding engine.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Craig Janeczek [Fri, 19 Oct 2018 15:34:28 +0000 (17:34 +0200)]
target/mips: Add bit encoding for MXU operand getting pattern 'optn3'
Add bit encoding for MXU operand getting pattern 'optn3'.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Craig Janeczek [Fri, 19 Oct 2018 15:33:36 +0000 (17:33 +0200)]
target/mips: Add bit encoding for MXU operand getting pattern 'optn2'
Add bit encoding for MXU operand getting pattern 'optn2'.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 23 Oct 2018 14:42:40 +0000 (16:42 +0200)]
target/mips: Add bit encoding for MXU execute add/sub pattern 'eptn2'
Add bit encoding for MXU execute 2-bit add/subtract pattern 'eptn2'.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Craig Janeczek [Fri, 19 Oct 2018 15:25:26 +0000 (17:25 +0200)]
target/mips: Add bit encoding for MXU accumulate add/sub 2-bit pattern 'aptn2'
Add bit encoding for MXU accumulate add/subtract 2-bit pattern
'aptn2'.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 23 Oct 2018 14:47:58 +0000 (16:47 +0200)]
target/mips: Add bit encoding for MXU accumulate add/sub 1-bit pattern 'aptn1'
Add bit encoding for MXU accumulate add/subtract 1-bit pattern
'aptn1'.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Thu, 18 Oct 2018 15:54:48 +0000 (17:54 +0200)]
target/mips: Add MXU decoding engine
Add MXU decoding engine: add handlers for all instruction pools,
and main decode handler. The handlers, for now, for the purpose
of this patch, contain only sceleton in the form of a single
switch statement.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Thu, 18 Oct 2018 12:40:20 +0000 (14:40 +0200)]
target/mips: Add and integrate MXU decoding engine placeholder
Provide the placeholder and add the invocation logic for MXU
decoding engine.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 23 Oct 2018 15:26:58 +0000 (17:26 +0200)]
target/mips: Amend MXU instruction opcodes
Amend MXU instruction opcodes. Pool04 is actually only instruction
OPC_MXU_S16MAD. Two cases within S16MAD are recognized by 1-bit
subfield 'aptn1'.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Craig Janeczek [Thu, 18 Oct 2018 12:36:57 +0000 (14:36 +0200)]
target/mips: Define a bit for MXU in insn_flags
Define a bit for MXU in insn_flags. This is the first non-MIPS
(third party) ASE supported in QEMU for MIPS, so it is placed in
the section "bits 56-63: vendor-specific ASEs".
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Craig Janeczek [Thu, 18 Oct 2018 12:06:20 +0000 (14:06 +0200)]
target/mips: Introduce MXU registers
Define and initialize the 16 MXU registers - 15 general computational
register, and 1 control register). There is also a zero register, but
it does not have any corresponding variable.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Craig Janeczek <jancraig@amazon.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 29 Oct 2018 11:09:26 +0000 (12:09 +0100)]
target/mips: Add two missing breaks for NM_LLWPE and NM_SCWPE decoder cases
Coverity found two fallthroughs that miss break statement. Fix them.
Revieved-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Peter Maydell [Mon, 29 Oct 2018 12:59:15 +0000 (12:59 +0000)]
Merge remote-tracking branch 'remotes/kraxel/tags/vga-
20181029-pull-request' into staging
vga: two fixes.
# gpg: Signature made Mon 29 Oct 2018 12:46:20 GMT
# gpg: using RSA key
4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/vga-
20181029-pull-request:
vga_int: remove unused function protype
qxl: store channel id in qxl->id
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Mao Zhongyi [Mon, 22 Oct 2018 07:40:50 +0000 (15:40 +0800)]
audio: use TYPE_MV88W8618_AUDIO instead of hardcoded string
Cc: Jan Kiszka <jan.kiszka@web.de>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
20181022074050.19638-4-maozhongyi@cmss.chinamobile.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Mao Zhongyi [Mon, 22 Oct 2018 07:40:49 +0000 (15:40 +0800)]
audio: use object link instead of qdev property to pass wm8750 reference
According to qdev-properties.h, properties of pointer type should
be avoided, it seems a link type property is a good substitution.
Cc: Jan Kiszka <jan.kiszka@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
20181022074050.19638-3-maozhongyi@cmss.chinamobile.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Mao Zhongyi [Mon, 22 Oct 2018 07:40:48 +0000 (15:40 +0800)]
audio: use TYPE_WM8750 instead of a hardcoded string
Cc: Jan Kiszka <jan.kiszka@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
20181022074050.19638-2-maozhongyi@cmss.chinamobile.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Li Qiang [Sat, 13 Oct 2018 06:08:09 +0000 (23:08 -0700)]
hw: AC97: make it more QOMconventional
Signed-off-by: Li Qiang <liq3ea@163.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20181013060809.52496-1-liq3ea@163.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Li Qiang [Fri, 19 Oct 2018 10:50:36 +0000 (03:50 -0700)]
hw: ccid-card-emulated: cleanup resource when realize in error path
Signed-off-by: Li Qiang <liq3ea@gmail.com>
Message-id:
1539946236-18028-3-git-send-email-liq3ea@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Li Qiang [Fri, 19 Oct 2018 10:50:35 +0000 (03:50 -0700)]
hw: ccid-card-emulated: introduce clean_event_notifier
Call it in device unrealize function.
Signed-off-by: Li Qiang <liq3ea@gmail.com>
Message-id:
1539946236-18028-2-git-send-email-liq3ea@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
yuchenlin [Mon, 22 Oct 2018 08:00:53 +0000 (16:00 +0800)]
vga_int: remove unused function protype
Signed-off-by: yuchenlin <yuchenlin@synology.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
20181022080053.9379-1-yuchenlin@synology.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Fri, 12 Oct 2018 11:45:40 +0000 (13:45 +0200)]
qxl: store channel id in qxl->id
See qemu_spice_add_display_interface(), the console index is also used
as channel id. So put that into the qxl->id field too.
In typical use cases (one primary qxl-vga device, optionally one or more
secondary qxl devices, no non-qxl display devices) this doesn't change
anything.
With this in place the qxl->id can not be used any more to figure
whenever a given device is primary (with vga compat mode) or secondary.
So add a bool to track this.
Cc: spice-devel@lists.freedesktop.org
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20181012114540.27829-1-kraxel@redhat.com
Li Qiang [Tue, 23 Oct 2018 03:00:18 +0000 (20:00 -0700)]
usb: ohci: make num_ports to an unsinged integer
This can avoid setting OCHIState.num_ports to a negative num.
Signed-off-by: Li Qiang <liq3ea@gmail.com>
Message-id:
1540263618-18344-1-git-send-email-liq3ea@gmail.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Peter Maydell [Sat, 27 Oct 2018 18:55:08 +0000 (19:55 +0100)]
Merge remote-tracking branch 'remotes/famz/tags/testing-pull-request' into staging
Testing patches
One fix for mingw build and some improvements in VM based testing, many thanks
to Paolo and Phil.
# gpg: Signature made Fri 26 Oct 2018 15:15:13 BST
# gpg: using RSA key
CA35624C6A9171C6
# gpg: Good signature from "Fam Zheng <famz@redhat.com>"
# Primary key fingerprint: 5003 7CB7 9706 0F76 F021 AD56 CA35 624C 6A91 71C6
* remotes/famz/tags/testing-pull-request:
tests/vm: Do not abuse parallelism when HOST != TARGET architecture
tests/vm: Do not use -enable-kvm if HOST != TARGET architecture
tests/vm: Let kvm_available() work in cross environments
tests/vm: Add a BaseVM::arch property
tests/vm: Display remaining seconds to wait for a VM to start
tests/vm: Do not use the -smp option with a single cpu
tests/vm: Do not abuse parallelism when KVM is not available
tests/vm: Extract the kvm_available() handy function
tests: docker: update test-mingw for GTK+ 2.0 removal
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 26 Oct 2018 19:16:38 +0000 (20:16 +0100)]
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-oct-2018-part-3' into staging
MIPS queue for October 2018 - part 3
# gpg: Signature made Thu 25 Oct 2018 21:14:02 BST
# gpg: using RSA key
D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65
* remotes/amarkovic/tags/mips-queue-oct-2018-part-3:
target/mips: Add disassembler support for nanoMIPS
target/mips: Implement emulation of nanoMIPS EVA instructions
target/mips: Add nanoMIPS CRC32 instruction pool
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Sat, 13 Oct 2018 00:40:33 +0000 (02:40 +0200)]
tests/vm: Do not abuse parallelism when HOST != TARGET architecture
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20181013004034.6968-9-f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Fam Zheng <famz@redhat.com>
Philippe Mathieu-Daudé [Sat, 13 Oct 2018 00:40:32 +0000 (02:40 +0200)]
tests/vm: Do not use -enable-kvm if HOST != TARGET architecture
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20181013004034.6968-8-f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Fam Zheng <famz@redhat.com>
Philippe Mathieu-Daudé [Sat, 13 Oct 2018 00:40:31 +0000 (02:40 +0200)]
tests/vm: Let kvm_available() work in cross environments
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20181013004034.6968-7-f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Fam Zheng <famz@redhat.com>
Philippe Mathieu-Daudé [Sat, 13 Oct 2018 00:40:30 +0000 (02:40 +0200)]
tests/vm: Add a BaseVM::arch property
The 'arch' property gives a hint on which architecture the guest image runs.
This can be use to select the correct QEMU binary path.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20181013004034.6968-6-f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Fam Zheng <famz@redhat.com>
Philippe Mathieu-Daudé [Sat, 13 Oct 2018 00:40:29 +0000 (02:40 +0200)]
tests/vm: Display remaining seconds to wait for a VM to start
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20181013004034.6968-5-f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Fam Zheng <famz@redhat.com>
Philippe Mathieu-Daudé [Sat, 13 Oct 2018 00:40:28 +0000 (02:40 +0200)]
tests/vm: Do not use the -smp option with a single cpu
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20181013004034.6968-4-f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Fam Zheng <famz@redhat.com>
Philippe Mathieu-Daudé [Sat, 13 Oct 2018 00:40:27 +0000 (02:40 +0200)]
tests/vm: Do not abuse parallelism when KVM is not available
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20181013004034.6968-3-f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Fam Zheng <famz@redhat.com>
Philippe Mathieu-Daudé [Sat, 13 Oct 2018 00:40:26 +0000 (02:40 +0200)]
tests/vm: Extract the kvm_available() handy function
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20181013004034.6968-2-f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Fam Zheng <famz@redhat.com>
Paolo Bonzini [Thu, 18 Oct 2018 18:10:03 +0000 (20:10 +0200)]
tests: docker: update test-mingw for GTK+ 2.0 removal
--with-gtkabi does not exist anymore; remove it from the configure invocation.
Fixes:
89d85cde75143325205e332dd97bf1bb8402d7c1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
1539886203-33670-1-git-send-email-pbonzini@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Fam Zheng <famz@redhat.com>
Aleksandar Markovic [Wed, 24 Oct 2018 15:41:49 +0000 (17:41 +0200)]
target/mips: Add disassembler support for nanoMIPS
Add disassembler support for nanoMIPS.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Matthew Fortune <matthew.fortune@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Dimitrije Nikolic [Wed, 24 Oct 2018 16:51:04 +0000 (18:51 +0200)]
target/mips: Implement emulation of nanoMIPS EVA instructions
Implement emulation of nanoMIPS EVA instructions. They are all
part of P.LS.E0 instruction pool, or one of its subpools.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Dimitrije Nikolic <dnikolic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Wed, 24 Oct 2018 16:58:42 +0000 (18:58 +0200)]
target/mips: Add nanoMIPS CRC32 instruction pool
Add nanoMIPS CRC32 instruction pool.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Peter Maydell [Thu, 25 Oct 2018 19:17:12 +0000 (20:17 +0100)]
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
Machine queue, 2018-10-25
* sysbus init/realize cleanups
(Cédric Le Goater, Philippe Mathieu-Daudé)
* memory-device refactoring (David Hildenbrand)
* -smp: deprecate incorrect CPUs topology (Igor Mammedov)
* -numa parsing cleanups (Markus Armbruster)
* Fix hostmem-file memory leak (Zhang Yi)
* Typo fix (Li Qiang)
# gpg: Signature made Thu 25 Oct 2018 14:31:46 BST
# gpg: using RSA key
2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/machine-next-pull-request: (43 commits)
net: xgmac: convert SysBus init method to a realize method
net: stellaris_enet: add a reset method
net: stellaris_enet: convert SysBus init method to a realize method
net: smc91c111: convert SysBus init method to a realize method
net: opencores_eth: convert SysBus init method to a realize method
net: mipsnet: convert SysBus init method to a realize method
net: milkymist_minimac2: convert SysBus init method to a realize method
net: lance: convert SysBus init method to a realize method
net: lan9118: convert SysBus init method to a realize method
net: etraxfs_eth: add a reset method
net: etraxfs_eth: convert SysBus init method to a realize method
memory-device: trace when pre_plugging/plugging/unplugging
memory-device: complete factoring out unplug handling
memory-device: complete factoring out plug handling
memory-device: complete factoring out pre_plug handling
memory-device: add device class function set_addr()
memory-device: drop get_region_size()
memory-device: factor out get_memory_region() from pc-dimm
memory-device: add and use memory_device_get_region_size()
memory-device: document MemoryDeviceClass
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 25 Oct 2018 16:41:03 +0000 (17:41 +0100)]
Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf0' into staging
First RISC-V Patch Set for the 3.1 Soft Freeze
This pull request contains a handful of patches that have been floating
around various trees for a while but haven't made it upstream. These
patches all appear quite safe. They're all somewhat independent from
each other:
* One refactors our IRQ management function to allow multiple interrupts
to be raised an once. This patch has no functional difference.
* Cleaning up the op_helper/cpu_helper split. This patch has no
functional difference.
* Updates to various constants to keep them in sync with the latest ISA
specification and to remove some non-standard bits that snuck in.
* A fix for a memory leak in the PLIC driver.
* A fix to our device tree handling to avoid provinging a NULL string.
I've given this my standard test: building the port, booting a Fedora
root filesytem on the latest Linux tag, and then shutting down that
image. Essentially I'm just following the QEMU RISC-V wiki page's
instructions. Everything looks fine here.
We have a lot more outstanding patches so I'll definately be submitting
another PR for the soft freeze.
# gpg: Signature made Wed 17 Oct 2018 21:17:52 BST
# gpg: using RSA key
EF4CA1502CCBAB41
# gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>"
# gpg: aka "Palmer Dabbelt <palmer@sifive.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41
* remotes/riscv/tags/riscv-for-master-3.1-sf0:
RISC-V: Don't add NULL bootargs to device-tree
RISC-V: Add missing free for plic_hart_config
RISC-V: Update CSR and interrupt definitions
RISC-V: Move non-ops from op_helper to cpu_helper
RISC-V: Allow setting and clearing multiple irqs
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Wed, 24 Oct 2018 21:08:42 +0000 (22:08 +0100)]
Merge remote-tracking branch 'remotes/berrange/tags/qcrypto-next-pull-request' into staging
Improve performance of XTS cipher mode impl
The XTS cipher mode performance is approximately doubled and test
coverage is improved.
# gpg: Signature made Wed 24 Oct 2018 19:05:08 BST
# gpg: using RSA key
BE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>"
# gpg: aka "Daniel P. Berrange <berrange@redhat.com>"
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF
* remotes/berrange/tags/qcrypto-next-pull-request:
crypto: add testing for unaligned buffers with XTS cipher mode
crypto: refactor XTS cipher mode test suite
crypto: annotate xts_tweak_encdec as inlineable
crypto: convert xts_mult_x to use xts_uint128 type
crypto: convert xts_tweak_encdec to use xts_uint128 type
crypto: introduce a xts_uint128 data type
crypto: remove code duplication in tweak encrypt/decrypt
crypto: expand algorithm coverage for cipher benchmark
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Daniel P. Berrangé [Tue, 16 Oct 2018 09:17:12 +0000 (10:17 +0100)]
crypto: add testing for unaligned buffers with XTS cipher mode
Validate that the XTS cipher mode will correctly operate with plain
text, cipher text and IV buffers that are not 64-bit aligned.
Reviewed-by: Alberto Garcia <berto@igalia.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Daniel P. Berrangé [Mon, 15 Oct 2018 17:03:41 +0000 (18:03 +0100)]
crypto: refactor XTS cipher mode test suite
The current XTS test overloads two different tests in a single function
making the code a little hard to follow. Split it into distinct test
cases.
Reviewed-by: Alberto Garcia <berto@igalia.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Daniel P. Berrangé [Tue, 9 Oct 2018 09:50:43 +0000 (10:50 +0100)]
crypto: annotate xts_tweak_encdec as inlineable
Encouraging the compiler to inline xts_tweak_encdec increases the
performance for xts-aes-128 when built with gcrypt:
Encrypt: 545 MB/s -> 580 MB/s
Decrypt: 568 MB/s -> 602 MB/s
Reviewed-by: Alberto Garcia <berto@igalia.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Daniel P. Berrangé [Tue, 9 Oct 2018 09:55:14 +0000 (10:55 +0100)]
crypto: convert xts_mult_x to use xts_uint128 type
Using 64-bit arithmetic increases the performance for xts-aes-128
when built with gcrypt:
Encrypt: 355 MB/s -> 545 MB/s
Decrypt: 362 MB/s -> 568 MB/s
Reviewed-by: Alberto Garcia <berto@igalia.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Daniel P. Berrangé [Tue, 9 Oct 2018 09:50:43 +0000 (10:50 +0100)]
crypto: convert xts_tweak_encdec to use xts_uint128 type
Using 64-bit arithmetic increases the performance for xts-aes-128
when built with gcrypt:
Encrypt: 272 MB/s -> 355 MB/s
Decrypt: 275 MB/s -> 362 MB/s
Reviewed-by: Alberto Garcia <berto@igalia.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Daniel P. Berrangé [Tue, 9 Oct 2018 09:45:41 +0000 (10:45 +0100)]
crypto: introduce a xts_uint128 data type
The new type is designed to allow use of 64-bit arithmetic instead
of operating 1-byte at a time. The following patches will use this to
improve performance.
Reviewed-by: Alberto Garcia <berto@igalia.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Daniel P. Berrangé [Mon, 8 Oct 2018 13:13:28 +0000 (14:13 +0100)]
crypto: remove code duplication in tweak encrypt/decrypt
The tweak encrypt/decrypt functions are identical except for the
comments, so can be merged. Profiling data shows that the compiler is
in fact already merging the two merges in the object files.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Alberto Garcia <berto@igalia.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Daniel P. Berrangé [Mon, 8 Oct 2018 13:12:04 +0000 (14:12 +0100)]
crypto: expand algorithm coverage for cipher benchmark
Add testing coverage for AES with XTS, ECB and CTR modes
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Alberto Garcia <berto@igalia.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Peter Maydell [Wed, 24 Oct 2018 15:31:40 +0000 (16:31 +0100)]
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-oct-2018-part-2-v2' into staging
MIPS queue for October 2018 - part 2 - v2
# gpg: Signature made Wed 24 Oct 2018 14:22:54 BST
# gpg: using RSA key
D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65
* remotes/amarkovic/tags/mips-queue-oct-2018-part-2-v2: (33 commits)
target/mips: Fix decoding of ALIGN and DALIGN instructions
target/mips: Fix the title of translate.c
linux-user/mips: Recognize the R5900 CPU model
target/mips: Define the R5900 CPU
tests/tcg/mips: Add tests for R5900 DIVU1
tests/tcg/mips: Add tests for R5900 DIV1
tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1
tests/tcg/mips: Add tests for R5900 MFLO1 and MFHI1
tests/tcg/mips: Add tests for R5900 three-operand MULTU1
tests/tcg/mips: Add tests for R5900 three-operand MULT1
tests/tcg/mips: Add tests for R5900 three-operand MULTU
tests/tcg/mips: Add tests for R5900 three-operand MULT
target/mips: Make R5900 DMULT[U], DDIV[U], LL[D] and SC[D] user only
target/mips: Support R5900 MOVN, MOVZ and PREF instructions from MIPS IV
target/mips: Support R5900 DIV1 and DIVU1 instructions
target/mips: Support R5900 MFLO1, MTLO1, MFHI1 and MTHI1 instructions
target/mips: Support R5900 three-operand MULT1 and MULTU1 instructions
target/mips: Support R5900 three-operand MULT and MULTU instructions
target/mips: Add a placeholder for R5900 MMI3 instruction subclass
target/mips: Add a placeholder for R5900 MMI2 instruction subclass
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Wed, 24 Oct 2018 15:01:05 +0000 (16:01 +0100)]
Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2018-10-24' into staging
- Disable migration-test with TCG on s390x (since there are known problems)
- Small Makefile improvements
- More modern shell scripting changes (use $() instead of ``)
- Add a configure option to disable AVX2
# gpg: Signature made Wed 24 Oct 2018 08:04:33 BST
# gpg: using RSA key
2ED9D774FE702DB5
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>"
# gpg: aka "Thomas Huth <thuth@redhat.com>"
# gpg: aka "Thomas Huth <huth@tuxfamily.org>"
# gpg: aka "Thomas Huth <th.huth@posteo.de>"
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* remotes/huth-gitlab/tags/pull-request-2018-10-24:
configure: Provide option to explicitly disable AVX2
po/Makefile: Modern shell scripting (use $() instead of ``)
debian-bootstrap.pre: Modern shell scripting (use $() instead of ``)
configs: Add a CONFIG_SMC37C669 switch for the "smc37c669-superio" device
hw/core: Move null-machine into the common-obj list
tests/migration-test: Disable s390x test when running with TCG
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Aleksandar Markovic [Mon, 22 Oct 2018 11:19:25 +0000 (13:19 +0200)]
target/mips: Fix decoding of ALIGN and DALIGN instructions
Opcode for ALIGN and DALIGN must be in fact ranges of opcodes, to
allow paremeter 'bp' to occupy two and three bits, respectively.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 22 Oct 2018 11:09:35 +0000 (13:09 +0200)]
target/mips: Fix the title of translate.c
Replace MIPS32 with MIPS, since the file covers all generations
of MIPS architectures.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Fredrik Noring [Sun, 21 Oct 2018 15:44:58 +0000 (17:44 +0200)]
linux-user/mips: Recognize the R5900 CPU model
This kind of ELF for the R5900 relies on an IEEE 754-1985 compliant FPU.
The R5900 FPU hardware is noncompliant and it is therefore emulated in
software by the Linux kernel. QEMU emulates a compliant FPU accordingly.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Fredrik Noring [Sun, 21 Oct 2018 15:44:46 +0000 (17:44 +0200)]
target/mips: Define the R5900 CPU
The primary purpose of this change is to support programs compiled by
GCC for the R5900 target and thereby run R5900 Linux distributions, for
example Gentoo.
GCC in version 7.3, by itself, by inspection of the GCC source code
and inspection of the generated machine code, for the R5900 target,
only emits two instructions that are specific to the R5900: the three-
operand MULT and MULTU. GCC and libc also emit certain MIPS III
instructions that are not part of the R5900 ISA. They are normally
trapped and emulated by the Linux kernel, and therefore need to be
treated accordingly by QEMU.
A program compiled by GCC is taken to mean source code compiled by GCC
under the restrictions above. One can, with the apparent limitations,
with a bit of effort obtain a fully functioning operating system such
as R5900 Gentoo. Strictly speaking, programs need not be compiled by
GCC to make use of this change.
Instructions and other facilities of the R5900 not implemented by this
change are intended to signal provisional exceptions. One such example
is the FPU that is not compliant with IEEE 754-1985 in system mode. It
is therefore provisionally disabled. In user space the FPU is trapped
and emulated by IEEE 754-1985 compliant software in the kernel, and
this is handled accordingly by QEMU. Another example is the 93
multimedia instructions specific to the R5900 that generate provisional
reserved instruction exception signals.
One of the benefits of running a Linux distribution under QEMU is that
programs can be compiled with a native compiler, where the host and
target are the same, as opposed to a cross-compiler, where they are
not the same. This is especially important in cases where the target
hardware does not have the resources to run a native compiler.
Problems with cross-compilation are often related to host and target
differences in integer sizes, pointer sizes, endianness, machine code,
ABI, etc. Sometimes cross-compilation is not even supported by the
build script for a given package. One effective way to avoid those
problems is to replace the cross-compiler with a native compiler. This
change of compilation methods does not resolve the inherent problems
with cross-compilation.
The native compiler naturally replaces the cross-compiler, because one
typically uses one or the other, and preferably the native compiler
when the circumstances admit this. The native compiler is also a good
test case for the R5900 QEMU user mode. Additionally, Gentoo is well-
known for compiling and installing its packages from sources.
This change has been tested with Gentoo compiled for R5900, including
native compilation of several packages under QEMU.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Fredrik Noring [Sun, 21 Oct 2018 15:42:19 +0000 (17:42 +0200)]
tests/tcg/mips: Add tests for R5900 DIVU1
Add a test for DIVU1.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Fredrik Noring [Sun, 21 Oct 2018 15:42:08 +0000 (17:42 +0200)]
tests/tcg/mips: Add tests for R5900 DIV1
Add a test for DIV1.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Fredrik Noring [Sun, 21 Oct 2018 15:41:58 +0000 (17:41 +0200)]
tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1
Add a test for MTLO1 and MTHI1.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>