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Andreas Gampe [Thu, 19 Feb 2015 18:36:59 +0000 (18:36 +0000)]
Merge "ART: Ensure order of field gaps"
Andreas Gampe [Wed, 18 Feb 2015 23:38:57 +0000 (15:38 -0800)]
ART: Ensure order of field gaps
Disambiguate field gaps of same size by starting offset. That will
make the priority queue stable.
Bug:
19413180
Change-Id: I6302a8bbdc590af7e9ec4f332c386c375fa8d8cd
Mathieu Chartier [Thu, 19 Feb 2015 18:00:29 +0000 (18:00 +0000)]
Merge "Move arenas into runtime"
Mathieu Chartier [Wed, 18 Feb 2015 22:33:14 +0000 (14:33 -0800)]
Move arenas into runtime
Moved arena pool into the runtime.
Motivation:
Allow GC to use arena allocators, recycle arena pool for linear alloc.
Bug:
19264997
Change-Id: I8ddbb6d55ee923a980b28fb656c758c5d7697c2f
Vladimir Marko [Thu, 19 Feb 2015 17:42:06 +0000 (17:42 +0000)]
Merge "Add suspend checks to special methods."
Vladimir Marko [Mon, 16 Feb 2015 13:05:59 +0000 (13:05 +0000)]
Add suspend checks to special methods.
Generate suspend checks at the beginning of special methods.
If we need to call to runtime, go to the slow path where we
create a simplified but valid frame, spill all arguments,
call art_quick_test_suspend, restore necessary arguments and
return back to the fast path. This keeps the fast path
overhead to a minimum.
Bug:
19245639
Change-Id: I3de5aee783943941322a49c4cf2c4c94411dbaa2
Nicolas Geoffray [Thu, 19 Feb 2015 14:01:59 +0000 (14:01 +0000)]
Merge "Ensure the graph is correctly typed."
Nicolas Geoffray [Wed, 18 Feb 2015 14:48:53 +0000 (14:48 +0000)]
Ensure the graph is correctly typed.
We used to be forgiving because of HIntConstant(0) also being
used for null. We now create a special HNullConstant for such uses.
Also, we need to run the dead phi elimination twice during ssa
building to ensure the correctness.
Change-Id: If479efa3680d3358800aebb1cca692fa2d94f6e5
Roland Levillain [Thu, 19 Feb 2015 12:15:55 +0000 (12:15 +0000)]
Merge "Have the opt. compiler set the size of "empty" frames to zero."
Roland Levillain [Tue, 17 Feb 2015 15:40:09 +0000 (15:40 +0000)]
Have the opt. compiler set the size of "empty" frames to zero.
This is to mimic Quick's behavior and honor stack frame
alignment constraints after changes introduced by Change-Id
I0fdb31e8c631e99091b818874a558c9aa04b1628.
This issue use to make oatdump crash on oat files produced by
the optimized compiler (e.g.
out/host/linux-x86/framework/x86_64/core-optimizing.oat).
Change-Id: I8ba52601edb0a0993eaf8923eba55aafdce5043e
Sebastien Hertz [Thu, 19 Feb 2015 09:59:54 +0000 (09:59 +0000)]
Merge "Fix art_quick_instrumentation_entry for x86"
Sebastien Hertz [Thu, 19 Feb 2015 09:30:48 +0000 (10:30 +0100)]
Fix art_quick_instrumentation_entry for x86
Fixes the stack offset used to restore edx.
Bug:
19402798
Change-Id: Ic3636cd362684564196997c4a3b3bebdc1be9a4e
Andreas Gampe [Thu, 19 Feb 2015 04:54:59 +0000 (04:54 +0000)]
Merge "ART: Fix run-test 099-vmdebug for device"
Andreas Gampe [Thu, 19 Feb 2015 02:30:05 +0000 (18:30 -0800)]
ART: Fix run-test 099-vmdebug for device
We can't expect logcat errors on device. So just swallow them whole.
Bug:
18713034
Change-Id: I58d8595e86f112442a5a1c4c6ef0d614871d890f
Andreas Gampe [Thu, 19 Feb 2015 01:20:33 +0000 (01:20 +0000)]
Merge "ART: Blacklist run-test 802 for tracing"
Andreas Gampe [Thu, 19 Feb 2015 01:18:01 +0000 (01:18 +0000)]
Merge "ART: Templatize IsInt & IsUint"
Andreas Gampe [Thu, 19 Feb 2015 01:08:27 +0000 (17:08 -0800)]
ART: Blacklist run-test 802 for tracing
When in tracing mode, the test is meaningless as it won't force
deoptimization.
Bug:
18713034
Change-Id: I8bf2861c2937c5da73e3d7642e638818d2544fa8
Andreas Gampe [Sat, 14 Feb 2015 03:23:55 +0000 (19:23 -0800)]
ART: Templatize IsInt & IsUint
Ensure that things are used correctly.
Change-Id: I76f082b32dcee28bbfb4c519daa401ac595873b3
Jeff Hao [Wed, 18 Feb 2015 21:41:11 +0000 (21:41 +0000)]
Merge "Default to 64-bit for tests of methods with varying ISAs for valgrind."
Andreas Gampe [Wed, 18 Feb 2015 21:41:10 +0000 (21:41 +0000)]
Merge "ART: Make run-tests more verbose"
Vladimir Marko [Wed, 18 Feb 2015 18:54:15 +0000 (18:54 +0000)]
Merge "Distinguish FP and integral constants in LVN."
Bill Buzbee [Wed, 18 Feb 2015 17:54:10 +0000 (17:54 +0000)]
Merge "ART: Fix InsertCaseLabel to return boundary_lir always"
Bill Buzbee [Wed, 18 Feb 2015 17:54:00 +0000 (17:54 +0000)]
Merge "ART: Promoted register may be wrong after the load of zero fp constant"
Vladimir Marko [Wed, 18 Feb 2015 17:52:39 +0000 (17:52 +0000)]
Distinguish FP and integral constants in LVN.
Change-Id: I31a58ff19fb95a2f56420359e50332c1dce6cbc7
Vladimir Marko [Wed, 18 Feb 2015 14:36:59 +0000 (14:36 +0000)]
Merge "Quick: Disable DCE until we fix FP/Core reg mismatches."
Vladimir Marko [Wed, 18 Feb 2015 14:06:43 +0000 (14:06 +0000)]
Quick: Disable DCE until we fix FP/Core reg mismatches.
GVN and TypeInference can miss some FP/Core register
mismatch:
const v0, #X ; marked as float
invoke-virtual v0, void foo(float)
const v0, #X ; marked as core
aput v0, v1, v2 ; float[] not used
The second const is eliminated by the DCE because it writes
the same value to the same dalvik reg. We replace the SSA
register name defined by the first const and used by the
invoke-virtual with the one defined by the second const.
When we generate code for the invoke-virtual, we get a core
location and may need a temporary to set up the FP argument
and we may not have an available temporary.
This may affect the bug below (more investigation needed).
Bug:
19419671
Change-Id: I44abd390706b980c346b36c9828a3bcb4e96726d
Nicolas Geoffray [Wed, 18 Feb 2015 09:54:39 +0000 (09:54 +0000)]
Merge "Avoid generating jmp +0."
Nicolas Geoffray [Mon, 16 Feb 2015 11:15:43 +0000 (11:15 +0000)]
Avoid generating jmp +0.
When a block branches to a non-following block, but blocks
in-between do branch to it, we can avoid doing the branch.
Change-Id: I9b343f662a4efc718cd4b58168f93162a24e1219
Sebastien Hertz [Wed, 18 Feb 2015 08:28:34 +0000 (08:28 +0000)]
Merge "Follow up 129144"
Vladimir [Wed, 11 Feb 2015 08:11:19 +0000 (14:11 +0600)]
ART: Promoted register may be wrong after the load of zero fp constant
Because of Dalvik byte code's lack of immediate typing,
the same vreg may be used in core, ref and fp operations.
To properly support GC, we must ensure that if a constant zero is loaded
into a fp view of a vreg, it must also be loaded into the core/ref view.
The code that was responsible for ensuring this failed to handle the case
of a vreg having a non-promoted fp view and a promoted core/ref view.
Change-Id: If77295aa93317e749ceacc8c1dd9e582122c368f
Signed-off-by: Vladimir <vladimir.a.ivanov@intel.com>
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Andreas Gampe [Wed, 18 Feb 2015 03:25:29 +0000 (19:25 -0800)]
ART: Make run-tests more verbose
Make run-tests log ERROR level on host. Adjust some internal LOG(ERROR)
to LOG(WARNING). Add check scripts to adjust for other LOG(ERROR)
messages.
Bug:
18713034
Change-Id: I2a3e055baa6a0e31f106364c300c20963a59ed94
Jeff Hao [Wed, 18 Feb 2015 02:01:00 +0000 (18:01 -0800)]
Default to 64-bit for tests of methods with varying ISAs for valgrind.
The size of the created methods will technically not be correct, but
they will be larger than necessary when the target is changed to 32-bit,
so valgrind will not complain.
Bug:
19368740
Change-Id: Ic78867b4700248ec6d70f5d7f6d87ce9447ac448
Vladimir Marko [Tue, 17 Feb 2015 22:25:06 +0000 (22:25 +0000)]
Merge "Dead code elimination based on GVN results."
Sebastien Hertz [Fri, 6 Feb 2015 08:16:32 +0000 (09:16 +0100)]
Follow up 129144
Passes JDWP options to debugger on runtime init so we no longer need
to keep them on the heap.
Updates ParseJdwpOption to return Result for consistency.
Bug:
19275792
Change-Id: I68b7e58908164d3e4cf9e3fbcc3dfab6ce0579a5
Vladimir Marko [Fri, 2 Jan 2015 17:00:44 +0000 (17:00 +0000)]
Dead code elimination based on GVN results.
Change-Id: I5b77411a8f088f0b561da14b123cf6b0501c9db5
Igor Murashkin [Tue, 17 Feb 2015 19:05:04 +0000 (19:05 +0000)]
Merge "art: Fix bug in VariantMap::Set"
Igor Murashkin [Sat, 7 Feb 2015 01:59:39 +0000 (17:59 -0800)]
art: Fix bug in VariantMap::Set
Bug:
19295410
Change-Id: I7827583846d710698c0e7bc0ec1a2c3bf901bd50
Nicolas Geoffray [Mon, 16 Feb 2015 11:32:47 +0000 (11:32 +0000)]
Merge "Opt compiler: ARM64: Fix blocking fp registers."
Zheng Xu [Sun, 15 Feb 2015 10:39:46 +0000 (18:39 +0800)]
Opt compiler: ARM64: Fix blocking fp registers.
VIXL reserved float point registers has not been blocked correctly.
Change-Id: Ie7131d86bbaff48c431e3e26abd2fa26389ac687
Andreas Gampe [Fri, 13 Feb 2015 23:38:25 +0000 (23:38 +0000)]
Merge "ART: Rewrite ThreadStress for easier extensibility"
Andreas Gampe [Wed, 11 Jun 2014 15:20:47 +0000 (08:20 -0700)]
ART: Rewrite ThreadStress for easier extensibility
Change-Id: Ie29918bef048e9ef44877c6c601de113ca38790e
Andreas Gampe [Fri, 13 Feb 2015 23:29:33 +0000 (23:29 +0000)]
Merge "ART: Add more details to LinkageError"
Andreas Gampe [Fri, 13 Feb 2015 23:23:18 +0000 (15:23 -0800)]
ART: Add more details to LinkageError
Add the classes or method details that fail during linking to enable
better diagnosis of problems.
Bug:
19294695
Change-Id: Ifab48bc182cd801d44d3aead2168028f27043be0
Andreas Gampe [Fri, 13 Feb 2015 22:06:58 +0000 (22:06 +0000)]
Merge "ART: Allow class-loading during deopt"
Andreas Gampe [Tue, 10 Feb 2015 23:37:27 +0000 (15:37 -0800)]
ART: Allow class-loading during deopt
When deoptimizing, we might touch code that uses unloaded classes.
Bug:
19290147
(cherry picked from commit
44fb719e5f0f5ee7dcf4b1eae703593f1043a169)
Change-Id: I5776f08ba366e9742336caba0d6af85f00629afc
Vladimir Marko [Fri, 13 Feb 2015 20:24:50 +0000 (20:24 +0000)]
Merge "Add tests for wide constants in LVN."
Vladimir Marko [Fri, 13 Feb 2015 19:47:13 +0000 (19:47 +0000)]
Add tests for wide constants in LVN.
Follow up to
https://android-review.googlesource.com/132210
Change-Id: I4e29483fb9931ae5670539954b69cdb078843e72
Vladimir Marko [Fri, 13 Feb 2015 18:09:07 +0000 (18:09 +0000)]
Merge "Clean up Scoped-/ArenaAlocator array allocations."
Nicolas Geoffray [Fri, 13 Feb 2015 15:46:21 +0000 (15:46 +0000)]
Merge "Optimize double/float immediate loading on arm."
Nicolas Geoffray [Wed, 11 Feb 2015 01:10:39 +0000 (01:10 +0000)]
Optimize double/float immediate loading on arm.
Also reserve a D register for temp.
Change-Id: I6584d9005b0f5685c3afcd8e9153b4c87b56aa8e
Vladimir Marko [Fri, 13 Feb 2015 11:53:08 +0000 (11:53 +0000)]
Merge "LVN handles const-wide/32 incorrectly"
Vladimir Marko [Fri, 13 Feb 2015 10:28:29 +0000 (10:28 +0000)]
Clean up Scoped-/ArenaAlocator array allocations.
Change-Id: Id718f8a4450adf1608306286fa4e6b9194022532
Serguei Katkov [Fri, 6 Feb 2015 11:15:36 +0000 (17:15 +0600)]
LVN handles const-wide/32 incorrectly
Redundant shift to 16 bit should be eliminated otherwise any
32 bit shift of 32 bit constant will result in 0.
Change-Id: I4969b54357bc2d9a836e89dd7919199fff966684
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Nicolas Geoffray [Fri, 13 Feb 2015 05:44:19 +0000 (05:44 +0000)]
Merge "Support hints for register pairs."
Nicolas Geoffray [Wed, 11 Feb 2015 02:29:42 +0000 (02:29 +0000)]
Support hints for register pairs.
Change-Id: Ia49dc5bf3e9a2bd481425bfe7fbeea9feb66c8e6
Chao-ying Fu [Thu, 12 Feb 2015 22:56:18 +0000 (14:56 -0800)]
ART: Fix InsertCaseLabel to return boundary_lir always
This patch doesn't return new_label when cu_->verbose, because
we will not assign offsets to new_label at this stage.
Change-Id: Ie7f625848b0cf7cabfbba694b5c20b0784bc8501
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Narayan Kamath [Thu, 12 Feb 2015 13:39:05 +0000 (13:39 +0000)]
Merge "Be more lenient with 4 byte UTF-8 sequences."
Narayan Kamath [Thu, 29 Jan 2015 20:06:46 +0000 (20:06 +0000)]
Be more lenient with 4 byte UTF-8 sequences.
Accept 4 byte sequences and convert them into surrogate
pairs instead of expecting 2 separate 3 byte sequences
each encoding one half of a surrogate pair.
Note that in addition to supporting 4 byte sequences in
strings from JNI, we also tolerate them in dex files. This
is mainly for consistency, and there's no need to claim any
sort of official support.
bug:
18848397
bug: https://code.google.com/p/android/issues/detail?id=81341
Change-Id: Ibc98d29e59d98803e640f2489ea4c56912a59b29
Vladimir Marko [Wed, 11 Feb 2015 10:06:21 +0000 (10:06 +0000)]
Merge "Fix ImageWriter::ComputeEagerResolvedStringsCallback()."
Vladimir Marko [Wed, 3 Dec 2014 17:53:53 +0000 (17:53 +0000)]
Fix ImageWriter::ComputeEagerResolvedStringsCallback().
Change-Id: I1a2abd6d78dd7067d9bdbadbd81dd2fd7711fbc5
Vladimir Marko [Tue, 10 Feb 2015 20:19:51 +0000 (20:19 +0000)]
Merge "Quick: Rewrite Phi node insertion."
Nicolas Geoffray [Tue, 10 Feb 2015 19:33:22 +0000 (19:33 +0000)]
Merge "Improve ParallelMoveResolver to work with pairs."
Vladimir Marko [Tue, 10 Feb 2015 19:25:13 +0000 (19:25 +0000)]
Merge "Fix HasSameSignatureWithDifferentClassLoaders()."
Nicolas Geoffray [Tue, 10 Feb 2015 17:08:47 +0000 (17:08 +0000)]
Improve ParallelMoveResolver to work with pairs.
Change-Id: Ie2a540ffdb78f7f15d69c16a08ca2d3e794f65b9
Jeff Hao [Tue, 10 Feb 2015 18:47:42 +0000 (18:47 +0000)]
Merge "Handle variable size of methods properly between 32 and 64 bit."
Jeff Hao [Tue, 10 Feb 2015 18:47:32 +0000 (18:47 +0000)]
Merge "Revert "Revert "Allow preopted apps to have sharpened calls for non-x86 architectures."""
Vladimir Marko [Tue, 10 Feb 2015 18:22:57 +0000 (18:22 +0000)]
Fix HasSameSignatureWithDifferentClassLoaders().
Add a missing handle and make sure that the handle's
Get() is sequenced after the call that can cause GC.
Change-Id: I3c0479650c40ceb803bfbf658238aeea8e4b0a1a
Vladimir Marko [Mon, 9 Feb 2015 12:35:05 +0000 (12:35 +0000)]
Quick: Rewrite Phi node insertion.
Delay Phi node insertion to the SSAConversion pass to allow
updating the vreg_to_ssa_map_ with INVALID_SREG when we omit
a Phi in the pruned SSA form.
Change-Id: I450dee21f7dc4353d25fc66f4d0ee01671de6e0e
Vladimir Marko [Tue, 10 Feb 2015 12:09:55 +0000 (12:09 +0000)]
Merge "ART: Remove MIRGraph::dex_pc_to_block_map_"
Nicolas Geoffray [Tue, 10 Feb 2015 01:48:25 +0000 (01:48 +0000)]
Merge "Fix a compilation error for Mips64."
Douglas Leung [Mon, 9 Feb 2015 23:22:26 +0000 (15:22 -0800)]
Fix a compilation error for Mips64.
Change-Id: I4f35750c4b840fce18c467995787e92bc38a7812
Chao-ying Fu [Wed, 12 Nov 2014 00:48:40 +0000 (16:48 -0800)]
ART: Remove MIRGraph::dex_pc_to_block_map_
This patch removes MIRGraph::dex_pc_to_block_map_, adds a local
variable dex_pc_to_block_map inside MIRGraph::InlineMethod(), and
updates several functions to pass dex_pc_to_block_map.
The goal is to limit the scope of dex_pc_to_block_map and
the usage of FindBlock, so that various compiler optimizations
cannot rely on dex pc to look up basic blocks to avoid
duplicated dex pc issues.
Also, this patch changes quick targets to use successor blocks
for switch case target generation at Mir2Lir::InstallSwitchTables().
Change-Id: I9f571efebd2706b4e1606279bd61f3b406ecd1c4
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
Andreas Gampe [Mon, 9 Feb 2015 21:09:41 +0000 (21:09 +0000)]
Merge "ART: Arm intrinsics for Optimizing compiler"
Andreas Gampe [Thu, 29 Jan 2015 17:56:07 +0000 (09:56 -0800)]
ART: Arm intrinsics for Optimizing compiler
Add arm32 intrinsics to the optimizing compiler.
Change-Id: If4aeedbf560862074d8ee08ca4484b666d6b9bf0
Mingyao Yang [Mon, 9 Feb 2015 19:50:25 +0000 (19:50 +0000)]
Merge "Improve bce so that more bounds checks can be eliminated."
Mingyao Yang [Sat, 31 Jan 2015 00:41:29 +0000 (16:41 -0800)]
Improve bce so that more bounds checks can be eliminated.
For pattern like "int[] array = new int[size+1]", we record this range
for size:
[-1, array.length-1]
This can eliminate more bounds checks.
Also simplify overflow/underflow handling and make it more solid.
Enhance instruction simplifier such that if array is a result of
NewArray with a constant size, replace array.length with that constant.
Plan to move all bce gtests to checker in another change.
Change-Id: Ibe7cc7940b68fb6465dc3e0ff3ebdb0fd6487aa9
Calin Juravle [Mon, 9 Feb 2015 18:43:23 +0000 (18:43 +0000)]
Merge "Fix null check tests"
Calin Juravle [Mon, 9 Feb 2015 18:22:09 +0000 (18:22 +0000)]
Fix null check tests
Change-Id: Iafd3b1f58ed7ce45350b4b3aa493bafc63ade179
Nicolas Geoffray [Sun, 8 Feb 2015 11:58:40 +0000 (11:58 +0000)]
Merge "Optimize leaf methods."
Hiroshi Yamauchi [Fri, 6 Feb 2015 23:32:16 +0000 (23:32 +0000)]
Merge "Fix gcstress tests."
Christopher Ferris [Fri, 6 Feb 2015 23:29:10 +0000 (23:29 +0000)]
Merge "Support map data in the backtrace data structure."
Hiroshi Yamauchi [Fri, 6 Feb 2015 23:21:08 +0000 (15:21 -0800)]
Fix gcstress tests.
Bug:
19295410
Change-Id: I15db7c1f9c78b632106beab6a6c97a2b3c37f110
Christopher Ferris [Fri, 6 Feb 2015 21:18:58 +0000 (13:18 -0800)]
Support map data in the backtrace data structure.
The backtrace data structure used to keep a pointer to the map data. Now
the code has the map data embedded in the structure and no pointers.
Bug:
19028453
Change-Id: If7088a73f3c6bf1f3bc8cdd2bb4b62e7cab831c0
Nicolas Geoffray [Fri, 6 Feb 2015 17:41:14 +0000 (17:41 +0000)]
Merge "x64 goodness."
Nicolas Geoffray [Tue, 27 Jan 2015 08:17:54 +0000 (08:17 +0000)]
x64 goodness.
- Use test instead of cmp when comparing against 0.
- Make it possible to use lea for add.
- Use xor instead of mov when loading 0.
Change-Id: Ide95c4e2d9b773e952412892f2df6869600c324e
Nicolas Geoffray [Fri, 6 Feb 2015 14:35:25 +0000 (14:35 +0000)]
Optimize leaf methods.
Avoid suspend checks and stack changes when not needed.
Change-Id: I0fdb31e8c631e99091b818874a558c9aa04b1628
Nicolas Geoffray [Fri, 6 Feb 2015 09:34:47 +0000 (09:34 +0000)]
Merge "Opt Compiler: ARM64: Enable Callee-saved register, as defined by AAPCS64."
Sebastien Hertz [Fri, 6 Feb 2015 06:15:45 +0000 (06:15 +0000)]
Merge "Read JDWP options from runtime"
Jeff Hao [Tue, 3 Feb 2015 23:08:39 +0000 (15:08 -0800)]
Handle variable size of methods properly between 32 and 64 bit.
Bug:
19100762
Change-Id: I62358905fa882284d0201ed3c1e97e1286ccec5f
Igor Murashkin [Thu, 5 Feb 2015 20:34:47 +0000 (20:34 +0000)]
Merge "art: Fix broken cmdline_parser_test"
Serban Constantinescu [Wed, 28 Jan 2015 11:57:05 +0000 (11:57 +0000)]
Opt Compiler: ARM64: Enable Callee-saved register, as defined by AAPCS64.
For now we block kQuickSuspendRegister - x19, since Quick and the runtime
use this as a suspend counter register.
Change-Id: I090d386670e81e7924e4aa9a3864ef30d0580a30
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
Jeff Hao [Tue, 27 Jan 2015 19:22:04 +0000 (11:22 -0800)]
Revert "Revert "Allow preopted apps to have sharpened calls for non-x86 architectures.""
Should really say it allows pre-linked calls instead of sharpened calls.
Bug:
19100762
Change-Id: Ia2045a9eda92255e87a7f6187de18d6370b8f060
Igor Murashkin [Thu, 5 Feb 2015 19:22:45 +0000 (11:22 -0800)]
art: Fix broken cmdline_parser_test
Bug:
19274810
Change-Id: I28df72dced9bdbbe0684836e9a18334994183421
David Brazdil [Thu, 5 Feb 2015 18:10:57 +0000 (18:10 +0000)]
Merge "ART: Fix crash when timing method failing to build"
David Brazdil [Thu, 5 Feb 2015 11:34:02 +0000 (11:34 +0000)]
ART: Fix crash when timing method failing to build
PassInfoPrinter previously required that AfterPass is always called
before the timing results are printed, which was not the case when
a method compilation failed either in Builder or SsaBuilder.
Change-Id: I3686bba6869402a62eec884f59fd872d5674e5a5
Sebastien Hertz [Thu, 5 Feb 2015 15:30:58 +0000 (16:30 +0100)]
Read JDWP options from runtime
Allocates JDWP::JdwpOptions on the heap and copies parsed options to
avoid the need to include jdwp/jdwp.h into runtime.h file.
Also does some minor cleanup and removes the old JDWP options parsing
code that became dead code after we move it to the new command-line
parser.
Bug:
19275792
Change-Id: I71901c89fbf2cc3c1901a089e2a98b4326c6ee70
Nicolas Geoffray [Thu, 5 Feb 2015 10:31:57 +0000 (10:31 +0000)]
Merge "Disable test, it fails on target and read-barrier config."
Nicolas Geoffray [Thu, 5 Feb 2015 10:14:10 +0000 (10:14 +0000)]
Disable test, it fails on target and read-barrier config.
Change-Id: Ib1ae28b1e81a1355196c32c43765a6f5466ca728
Sebastien Hertz [Thu, 5 Feb 2015 08:19:21 +0000 (08:19 +0000)]
Merge "Fix transaction aborting"
Sebastien Hertz [Tue, 3 Feb 2015 10:58:06 +0000 (11:58 +0100)]
Fix transaction aborting
During compilation, a java.lang.InternalError is used to indicate
that class initialization failed and the enclosing transaction
should be aborted and the changes rolled back. However there is
nothing preventing the code executed from a class initializer from
catching that exception (like catching Throwable and ignore it).
Therefore we may return from the class initializer with no pending
exception, even if the transaction was aborted, and not rollback
the changes properly.
To fix this, we now rely on the new Transaction::aborted_ field to
know whether a transaction aborted. When returning from the class
initializer without pending exception, we now check wether we aborted
the enclosing transaction. If that's the case, we set the status of
the class to kStatusError and throw a new java.lang.InternalError
with the original abort message.
This CL also contains some cleanup:
- Renames Transaction::Abort to Transaction::Rollback which is less
ambiguous and more reflect what is done.
- Moves the code throwing the java.lang.InternalError exception into
the Transaction::ThrowInternalError method so we do not duplicate
code. Now we may abort transaction more than once (because we may
have caught the java.lang.InternalError then execute code causing
new transaction abort), we only keep the first abort message to
throw the exception.
- Updates transaction_test with more cases and more checks.
- Bumps oat version to force recompilation with this fix.
Bug:
19202032
Change-Id: Iedc6969528a68bbdf3123146e990df4dbc57834b