OSDN Git Service
Nikita Popov [Sat, 29 Jun 2019 15:12:59 +0000 (15:12 +0000)]
[LFTR] Rephrase getLoopTest into "based-on" check; NFCI
What we want to know here is whether we're already using this value
for the loop condition, so make the query about that. We can extend
this to a more general "based-on" relationship, rather than a direct
icmp use later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364715
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Sanjay Patel [Sat, 29 Jun 2019 14:28:54 +0000 (14:28 +0000)]
[InstCombine] canonicalize fmin/fmax to LLVM intrinsics minnum/maxnum
This transform came up in D62414, but we should deal with it first.
We have LLVM intrinsics that correspond exactly to libm calls (unlike
most libm calls, these libm calls never set errno).
This holds without any fast-math-flags, so we should always canonicalize
to those intrinsics directly for better optimization.
Currently, we convert to fcmp+select only when we have FMF (nnan) because
fcmp+select does not preserve the semantics of the call in the general case.
Differential Revision: https://reviews.llvm.org/D63214
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364714
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Nikita Popov [Sat, 29 Jun 2019 12:41:02 +0000 (12:41 +0000)]
[LFTR] Remove unnecessary latch check; NFCI
The whole indvars pass works on loops in simplified form, so there
is always a unique latch. Convert the condition into an assertion
in needsLFTR (though we also assert this in later LFTR functions).
Additionally update the comment on getLoopTest() now that we are
dealing with multiple exits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364713
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Roman Lebedev [Sat, 29 Jun 2019 11:51:50 +0000 (11:51 +0000)]
[InstCombine] Shift amount reassociation (PR42391)
Summary:
Given pattern:
`(x shiftopcode Q) shiftopcode K`
we should rewrite it as
`x shiftopcode (Q+K)` iff `(Q+K) u< bitwidth(x)`
This is valid for any shift, but they must be identical.
* https://rise4fun.com/Alive/9E2
* exact on both lshr => exact https://rise4fun.com/Alive/plHk
* exact on both ashr => exact https://rise4fun.com/Alive/QDAA
* nuw on both shl => nuw https://rise4fun.com/Alive/5Uk
* nsw on both shl => nsw https://rise4fun.com/Alive/0plg
Should fix [[ https://bugs.llvm.org/show_bug.cgi?id=42391 | PR42391]].
Reviewers: spatel, nikic, RKSimon
Reviewed By: nikic
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63812
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364712
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Roman Lebedev [Sat, 29 Jun 2019 11:51:37 +0000 (11:51 +0000)]
[IR][Patternmatch] Add m_SpecificInt_ULT() predicate
Summary:
Match an integer or vector with every element unsigned less than the
Threshold. For vectors, this includes constants with undefined elements.
FIXME: is it worth generalizing this to simply take ICmpInst::Predicate?
Reviewers: craig.topper, spatel, nikic
Reviewed By: spatel
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63811
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364711
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Dmitry Venikov [Sat, 29 Jun 2019 11:38:12 +0000 (11:38 +0000)]
[APInt] Fix getBitsNeeded for INT_MIN values
Summary: This patch fixes behaviour of APInt::getBitsNeeded for INT_MIN 10 bits values.
Reviewers: regehr, RKSimon
Reviewed By: RKSimon
Subscribers: grandinj, dexonsmith, kristina, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63691
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364710
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Nikita Popov [Sat, 29 Jun 2019 09:24:12 +0000 (09:24 +0000)]
[LFTR] Fix post-inc pointer IV with truncated exit count (PR41998)
Fixes https://bugs.llvm.org/show_bug.cgi?id=41998. Usually when we
have a truncated exit count we'll truncate the IV when comparing
against the limit, in which case exit count overflow in post-inc
form doesn't matter. However, for pointer IVs we don't do that, so
we have to be careful about incrementing the IV in the wide type.
I'm fixing this by removing the IVCount variable (which was
ExitCount or ExitCount+1) and replacing it with a UsePostInc flag,
and then moving the actual limit adjustment to the individual cases
(which are: pointer IV where we add to the wide type, integer IV
where we add to the narrow type, and constant integer IV where we
add to the wide type).
Differential Revision: https://reviews.llvm.org/D63686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364709
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Sam Clegg [Sat, 29 Jun 2019 01:53:26 +0000 (01:53 +0000)]
Partial revert of "[llvm-ar] Document response file support in --help"
This is partial revert of
70a8027c60fe1f95e8a8a1ff6575ebf8778d3544.
The test apparently failed on win32 bots due to the way slashes in
pathnames are handled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364705
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Matt Arsenault [Sat, 29 Jun 2019 00:55:16 +0000 (00:55 +0000)]
AMDGPU/GlobalISel: Add some more tests for icmp select
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364703
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Matt Arsenault [Sat, 29 Jun 2019 00:44:36 +0000 (00:44 +0000)]
AMDGPU/GlobalISel: RegBankSelect for update.dpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364701
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Matt Arsenault [Sat, 29 Jun 2019 00:39:20 +0000 (00:39 +0000)]
AMDGPU/GlobalISel: RegBankSelect for atomic.inc/atomic.dec
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364699
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Matt Arsenault [Sat, 29 Jun 2019 00:33:13 +0000 (00:33 +0000)]
AMDGPU/GlobalISel: RegBankSelect for some DS intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364698
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Matt Arsenault [Sat, 29 Jun 2019 00:29:56 +0000 (00:29 +0000)]
AMDGPU/GlobalISel: RegBankSelect for some easy intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364697
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Matt Arsenault [Sat, 29 Jun 2019 00:28:52 +0000 (00:28 +0000)]
AMDGPU/GlobalISel: RegBankSelect for icmp/fcmp intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364696
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Matt Arsenault [Sat, 29 Jun 2019 00:25:53 +0000 (00:25 +0000)]
AMDGPU/GlobalISel: RegBankSelect for amdgcn.div.fmas
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364695
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Matt Arsenault [Sat, 29 Jun 2019 00:22:28 +0000 (00:22 +0000)]
AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364694
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Philip Reames [Sat, 29 Jun 2019 00:19:31 +0000 (00:19 +0000)]
[IndVars] Remove a bit of manual constant folding [NFC]
SCEV is more than capable of folding (add x, trunc(0)) to x.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364693
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Matt Arsenault [Fri, 28 Jun 2019 23:43:40 +0000 (23:43 +0000)]
AMDGPU: Add baseline test for packed shufflevector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364691
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Wouter van Oortmerssen [Fri, 28 Jun 2019 22:20:33 +0000 (22:20 +0000)]
[WebAssembly] Assembler: support .int16/32/64 directives.
Reviewers: sbc100
Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63959
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364689
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Wouter van Oortmerssen [Fri, 28 Jun 2019 21:53:11 +0000 (21:53 +0000)]
[WebAssembly] Allow @object in .type directives.
Reviewers: sbc100
Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63955
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364688
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Sanjay Patel [Fri, 28 Jun 2019 21:45:55 +0000 (21:45 +0000)]
[x86] remove stale comment about cmov; NFC
The cmov node used to sometimes return a glue result (and that's what
'flag' meant in this context), but that was removed with D38664.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364687
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Cameron McInally [Fri, 28 Jun 2019 21:39:08 +0000 (21:39 +0000)]
[NFC][NewGVN] Explicitly check fpmath metadata in fpmath.ll
Suggested in D63933.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364685
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Sanjay Patel [Fri, 28 Jun 2019 20:45:32 +0000 (20:45 +0000)]
[Lanai] auto-generate complete test checks; NFC
This file will fail with a common codegen transform that
I'm looking at, and I can't tell if that's an improvement
or regression based on the sparse checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364684
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Wouter van Oortmerssen [Fri, 28 Jun 2019 20:31:13 +0000 (20:31 +0000)]
[WebAssembly] Assembler: Allow offsets and p2align in symbol load.
Reviewers: sbc100
Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63951
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364682
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Wouter van Oortmerssen [Fri, 28 Jun 2019 20:29:16 +0000 (20:29 +0000)]
[WebAssembly] Assembler: Improve section parsing.
Reviewers: sbc100
Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63947
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364681
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Cameron McInally [Fri, 28 Jun 2019 20:09:32 +0000 (20:09 +0000)]
[NewGVN] Add unary FNeg support to NewGVN pass
Differential Revision: https://reviews.llvm.org/D63933
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364680
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Cameron McInally [Fri, 28 Jun 2019 19:57:31 +0000 (19:57 +0000)]
[GVNSink] Add unary FNeg support to GVNSink pass
Differential Revision: https://reviews.llvm.org/D63900
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364678
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Erik Pilkington [Fri, 28 Jun 2019 19:54:19 +0000 (19:54 +0000)]
[demangle] Support for C++2a char8_t
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364677
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Brad Smith [Fri, 28 Jun 2019 19:48:31 +0000 (19:48 +0000)]
Default to Secure PLT on PPC for musl libc.
This matches the default settings of clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364675
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Sam Clegg [Fri, 28 Jun 2019 18:48:05 +0000 (18:48 +0000)]
[llvm-ar] Document response file support in --help
Also a test for this.
Differential Revision: https://reviews.llvm.org/D63836
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364673
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Lang Hames [Fri, 28 Jun 2019 18:36:59 +0000 (18:36 +0000)]
Re-apply r364600 with fixes.
Fix: MachO/X86_64_RELOC_GOT is a 32-bit reloc, so only compare 32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364672
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Rainer Orth [Fri, 28 Jun 2019 18:29:18 +0000 (18:29 +0000)]
[unittests][Support] Fix LLVM-Unit :: Support/./SupportTests/FileSystemTest.permissions on Solaris
LLVM-Unit :: Support/./SupportTests/FileSystemTest.permissions currently
FAILs on Solaris:
FAIL: LLVM-Unit :: Support/./SupportTests/FileSystemTest.permissions (2940 of 51555)
******************** TEST 'LLVM-Unit :: Support/./SupportTests/FileSystemTest.permissions' FAILED ********************
Note: Google Test filter = FileSystemTest.permissions
[==========] Running 1 test from 1 test case.
[----------] Global test environment set-up.
[----------] 1 test from FileSystemTest
[ RUN ] FileSystemTest.permissions
/opt/llvm-buildbot/obj/llvm/llvm.src/unittests/Support/Path.cpp:1705: Failure
Value of: CheckPermissions(fs::sticky_bit)
Actual: false
Expected: true
/opt/llvm-buildbot/obj/llvm/llvm.src/unittests/Support/Path.cpp:1712: Failure
Value of: CheckPermissions(fs::set_uid_on_exe | fs::set_gid_on_exe | fs::sticky_bit)
Actual: false
Expected: true
/opt/llvm-buildbot/obj/llvm/llvm.src/unittests/Support/Path.cpp:1719: Failure
Value of: CheckPermissions(fs::all_read | fs::set_uid_on_exe | fs::set_gid_on_exe | fs::sticky_bit)
Actual: false
Expected: true
/opt/llvm-buildbot/obj/llvm/llvm.src/unittests/Support/Path.cpp:1722: Failure
Value of: CheckPermissions(fs::all_perms)
Actual: false
Expected: true
[ FAILED ] FileSystemTest.permissions (0 ms)
[----------] 1 test from FileSystemTest (0 ms total)
[----------] Global test environment tear-down
[==========] 1 test from 1 test case ran. (1 ms total)
[ PASSED ] 0 tests.
[ FAILED ] 1 test, listed below:
[ FAILED ] FileSystemTest.permissions
1 FAILED TEST
Checking with truss reveals that this is the same issue as on AIX and
documented in chmod(2):
If the process is not a privileged process and the file is not a direc-
tory, mode bit 01000 (S_ISVTX, the sticky bit) is cleared.
The following patch fixes this in the same way. Tested on amd64-pc-solaris2.11.
Differential Revision: https://reviews.llvm.org/D63598
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364671
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Jinsong Ji [Fri, 28 Jun 2019 18:07:19 +0000 (18:07 +0000)]
[UpdateChecks] Add support for armv7-apple-darwin
armv7-apple-darwin was not supported well, the script can't generate
checks.
https://reviews.llvm.org/D60601/new/#inline-568671
Differential Revision: https://reviews.llvm.org/D63939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364668
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Simon Pilgrim [Fri, 28 Jun 2019 17:57:32 +0000 (17:57 +0000)]
[X86] CombineShuffleWithExtract - recurse through EXTRACT_SUBVECTOR chain
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364667
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Peter Collingbourne [Fri, 28 Jun 2019 17:53:26 +0000 (17:53 +0000)]
hwasan: Remove the old frame descriptor mechanism.
Differential Revision: https://reviews.llvm.org/D63470
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364665
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Roman Lebedev [Fri, 28 Jun 2019 17:26:28 +0000 (17:26 +0000)]
[NFC][Codegen] Revisit test coverage for X % C == 0 fold once more (add tests with '1' divisor)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364661
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Wouter van Oortmerssen [Fri, 28 Jun 2019 16:51:06 +0000 (16:51 +0000)]
[WebAssembly] Added visibility and ident directives to WasmAsmParser.
Summary:
These are output by clang -S, so can now be roundtripped thru clang.
(partially) fixes: https://bugs.llvm.org/show_bug.cgi?id=34544
Reviewers: dschuff
Subscribers: sbc100, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63901
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364658
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Roman Lebedev [Fri, 28 Jun 2019 16:36:53 +0000 (16:36 +0000)]
[NFC][InstCombine] Shift amount reassociation: revisit flag preservation tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364657
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Dmitry Preobrazhensky [Fri, 28 Jun 2019 16:28:46 +0000 (16:28 +0000)]
[AMDGPU][MC] Fix 2 for sanitizer failure in 364645
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364656
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Sam Tebbs [Fri, 28 Jun 2019 15:43:31 +0000 (15:43 +0000)]
[ARM] Add support for the MVE long shift instructions
MVE adds the lsll, lsrl and asrl instructions, which perform a shift on a 64 bit value separated into two 32 bit registers.
The Expand64BitShift function is modified to accept ISD::SHL, ISD::SRL and ISD::SRA and convert it into the appropriate opcode in ARMISD. An SHL is converted into an lsll, an SRL is converted into an lsrl for the immediate form and a negation and lsll for the register form, and SRA is converted into an asrl.
test/CodeGen/ARM/shift_parts.ll is added to test the logic of emitting these instructions.
Differential Revision: https://reviews.llvm.org/D63430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364654
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Max Moroz [Fri, 28 Jun 2019 15:38:25 +0000 (15:38 +0000)]
[llvm-cov[ Fix lcov coverage report contains functions from other compilation units.
Summary: Patch by Chuan Qiu (@eagleonhill).
Reviewers: Dor1s
Reviewed By: Dor1s
Subscribers: lebedev.ri, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63571
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364653
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Roman Lebedev [Fri, 28 Jun 2019 15:32:52 +0000 (15:32 +0000)]
[NFC][InstCombine] Shift amount reassociation: add flag preservation test
As discussed in https://reviews.llvm.org/D63812#inline-569870
* exact on both lshr => exact https://rise4fun.com/Alive/plHk
* exact on both ashr => exact https://rise4fun.com/Alive/QDAA
* nuw on both shl => nuw https://rise4fun.com/Alive/5Uk
* nsw on both shl => nsw https://rise4fun.com/Alive/0plg
So basically if the same flag is set on both original shifts -> set it on new shift.
Don't think we can do anything with non-matching flags on shl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364652
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Dmitry Preobrazhensky [Fri, 28 Jun 2019 15:22:47 +0000 (15:22 +0000)]
[AMDGPU][MC] Fix for sanitizer failure in 364645
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364651
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Cameron McInally [Fri, 28 Jun 2019 15:12:15 +0000 (15:12 +0000)]
[NFC][Float2Int] Pre-commit unary FNeg test to basic.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364649
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Cameron McInally [Fri, 28 Jun 2019 14:39:58 +0000 (14:39 +0000)]
[NFC][NewGVN] Pre-commit unary FNeg test to fpmath.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364646
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Dmitry Preobrazhensky [Fri, 28 Jun 2019 14:14:02 +0000 (14:14 +0000)]
[AMDGPU][MC] Enabled constant expressions as operands of sendmsg
See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820
Reviewers: artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D62735
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364645
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Simon Pilgrim [Fri, 28 Jun 2019 12:24:49 +0000 (12:24 +0000)]
[X86] CombineShuffleWithExtract - only require 1 source to be EXTRACT_SUBVECTOR
We were requiring that both shuffle operands were EXTRACT_SUBVECTORs, but we can relax this to only require one of them to be.
Also, we shouldn't bother attempting this if both operands are from the lowest subvector (or not EXTRACT_SUBVECTOR at all).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364644
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David Green [Fri, 28 Jun 2019 11:44:03 +0000 (11:44 +0000)]
[ARM] Add MVE mul patterns
This simply adds integer and floating point VMUL patterns for MVE, same as we
have add and sub.
Differential Revision: https://reviews.llvm.org/D63866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364643
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Roman Lebedev [Fri, 28 Jun 2019 11:36:34 +0000 (11:36 +0000)]
[NFC][Codegen] Revisit test coverage for X % C == 0 fold
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364642
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David Green [Fri, 28 Jun 2019 11:17:38 +0000 (11:17 +0000)]
[ARM] Mark math routines as non-legal for MVE
This adds handling and tests for a number of floating point math routines,
which have no MVE instructions.
Differential Revision: https://reviews.llvm.org/D63725
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364641
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David Green [Fri, 28 Jun 2019 10:25:35 +0000 (10:25 +0000)]
[ARM] MVE patterns for VABS and VNEG
This simply adds the required patterns for fp neg and abs.
Differential Revision: https://reviews.llvm.org/D63861
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364640
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Fangrui Song [Fri, 28 Jun 2019 10:10:10 +0000 (10:10 +0000)]
[DebugInfo] Fix setStartAddress after r364637
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364638
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Fangrui Song [Fri, 28 Jun 2019 10:06:11 +0000 (10:06 +0000)]
[DebugInfo] Simplify GSYM::AddressRange and GSYM::AddressRanges
Delete unnecessary getters of AddressRange.
Simplify AddressRange::size(): Start <= End check should be checked in an upper layer.
Delete isContiguousWith() that doesn't make sense.
Simplify AddressRanges::insert. Delete commented code. Fix it when more than 1 ranges are to be deleted.
Delete trailing newline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364637
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David Green [Fri, 28 Jun 2019 09:47:55 +0000 (09:47 +0000)]
[ARM] Widening loads and narrowing stores
MVE has instructions to widen as it loads, and narrow as it stores. This adds
the required patterns and legalisation to make them work including specifying
that they are legal, patterns to select them and test changes.
Patch by David Sherwood.
Differential Revision: https://reviews.llvm.org/D63839
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364636
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Simon Tatham [Fri, 28 Jun 2019 09:28:39 +0000 (09:28 +0000)]
[ARM] Fix integer UB in MVE load/store immediate handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364635
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Fangrui Song [Fri, 28 Jun 2019 08:58:05 +0000 (08:58 +0000)]
[DebugInfo] GSYM cleanups after D63104/r364427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364634
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David Green [Fri, 28 Jun 2019 08:41:40 +0000 (08:41 +0000)]
[ARM] MVE loads and stores
This fills in the gaps for basic MVE loads and stores, allowing unaligned
access and adding far too many tests. These will become important as
narrowing/expanding and pre/post inc are added. Big endian might still not be
handled very well, because we have not yet added bitcasts (and I'm not sure how
we want it to work yet). I've included the alignment code anyway which maps
with our current patterns. We plan to return to that later.
Code written by Simon Tatham, with additional tests from Me and Mikhail Maltsev.
Differential Revision: https://reviews.llvm.org/D63838
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364633
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Dylan McKay [Fri, 28 Jun 2019 08:35:21 +0000 (08:35 +0000)]
[AVR] Don't look for the TargetFrameLowering in the FrameLowering implementation
c.f. r364349
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364632
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David Green [Fri, 28 Jun 2019 08:18:55 +0000 (08:18 +0000)]
[ARM] Mark div and rem as expand for MVE
We don't have vector operations for these, so they need to be expanded for both
integer and float.
Differential Revision: https://reviews.llvm.org/D63595
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364631
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David Green [Fri, 28 Jun 2019 07:41:09 +0000 (07:41 +0000)]
[ARM] Select MVE fp add and sub
The same as integer arithmetic, we can add simple floating point MVE addition and
subtraction patterns.
Initial code by David Sherwood
Differential Revision: https://reviews.llvm.org/D63257
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364629
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Sam Parker [Fri, 28 Jun 2019 07:38:16 +0000 (07:38 +0000)]
[HardwareLoops] Loop counter guard intrinsic
Introduce llvm.test.set.loop.iterations which sets the loop counter
and also produces an i1 after testing that the count is not zero.
Differential Revision: https://reviews.llvm.org/D63809
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364628
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David Green [Fri, 28 Jun 2019 07:21:11 +0000 (07:21 +0000)]
[ARM] Select MVE add and sub
This adds the first few patterns for MVE code generation, adding simple integer
add and sub patterns.
Initial code by David Sherwood
Differential Revision: https://reviews.llvm.org/D63255
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364627
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David Green [Fri, 28 Jun 2019 07:08:42 +0000 (07:08 +0000)]
[ARM] MVE vector shuffles
This patch adds necessary shuffle vector and buildvector support for ARM MVE.
It essentially adds support for VDUP, VREVs and some VMOVs, which are often
required by other code (like upcoming patches).
This mostly uses the same code from Neon that already generated
NEONvdup/NEONvduplane/NEONvrev's. These have been renamed to ARMvdup/etc and
moved to ARMInstrInfo as they are common to both architectures. Most of the
selection code seems to be applicable to both, but NEON does have some more
instructions making some parts specific.
Most code originally by David Sherwood.
Differential Revision: https://reviews.llvm.org/D63567
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364626
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Craig Topper [Fri, 28 Jun 2019 06:58:50 +0000 (06:58 +0000)]
[X86] Connect the output chain properly when combining vzext_movl+load into vzext_load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364625
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Mikael Holmen [Fri, 28 Jun 2019 06:45:20 +0000 (06:45 +0000)]
Silence gcc warning in testcase [NFC]
Without the fix gcc (7.4.0) complains with
../unittests/ADT/APIntTest.cpp: In member function 'virtual void {anonymous}::APIntTest_MultiplicativeInverseExaustive_Test::TestBody()':
../unittests/ADT/APIntTest.cpp:2510:36: error: comparison between signed and unsigned integer expressions [-Werror=sign-compare]
for (unsigned Value = 0; Value < (1 << BitWidth); ++Value) {
~~~~~~^~~~~~~~~~~~~~~~~
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364624
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Craig Topper [Fri, 28 Jun 2019 05:03:47 +0000 (05:03 +0000)]
[X86] Remove some duplicate patterns that already exist as part of their instruction definition. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364623
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Alex Brachet [Fri, 28 Jun 2019 04:07:13 +0000 (04:07 +0000)]
[Support] Fix add fs::getUmask() patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364622
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Alex Brachet [Fri, 28 Jun 2019 03:21:00 +0000 (03:21 +0000)]
[Support] Add fs::getUmask() function and change fs::setPermissions
Summary: This patch changes fs::setPermissions to optionally set permissions while respecting the umask. It also adds the function fs::getUmask() which returns the current umask.
Reviewers: jhenderson, rupprecht, aprantl, lhames
Reviewed By: jhenderson, rupprecht
Subscribers: sanaanajjar231288, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63583
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364621
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Zi Xuan Wu [Fri, 28 Jun 2019 02:51:03 +0000 (02:51 +0000)]
[NFC][PowerPC] Move XS*QP series instruction apart from XS*QPO series in position of td file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364620
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Stanislav Mekhanoshin [Fri, 28 Jun 2019 01:52:13 +0000 (01:52 +0000)]
[AMDGPU] Packed thread ids in function call ABI
Differential Revision: https://reviews.llvm.org/D63851
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364619
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Matt Arsenault [Fri, 28 Jun 2019 01:47:44 +0000 (01:47 +0000)]
GlobalISel: Use Register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364618
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Kai Luo [Fri, 28 Jun 2019 01:38:42 +0000 (01:38 +0000)]
[PowerPC][NFC] Use `|=` to update `Simplified` flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364617
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Matt Arsenault [Fri, 28 Jun 2019 01:16:46 +0000 (01:16 +0000)]
AMDGPU/GlobalISel: Convert to using Register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364616
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Matt Arsenault [Fri, 28 Jun 2019 01:16:41 +0000 (01:16 +0000)]
GlobalISel: Convert rest of MachineIRBuilder to using Register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364615
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Amara Emerson [Thu, 27 Jun 2019 23:56:34 +0000 (23:56 +0000)]
[GlobalISel][IRTranslator] Fix some PHI bugs related to jump tables when optimizations are used.
The new switch lowering code that tries to generate jump tables and range checks
were tested at -O0 on arm64, but on -O3 the generic switch lowering code goes to
town on trying to generate optimized lowerings, e.g. multiple jump tables, range
checks etc. This exposed bugs in the way PHI nodes are handled because the CFG
looks even stranger after all of this is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364613
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Fedor Sergeev [Thu, 27 Jun 2019 23:41:03 +0000 (23:41 +0000)]
[InlineCost] make InlineCost assignable
Summary:
Current InlineCost is not assignable because of const members Cost and Threshold.
I dont see practical benefits from having them const (access to these members is
private and internal interactions are rather simple). On other hand that makes
it hard to use as a member in some other data structure where assignability is necessary.
I'm going to use InlineCost in a downstream inliner that maintains a complex queue
of candidate call-sites and thus keeping and recalculating InlineCost is necessary.
This patch just removes 'const' from both members, making InlineCost assignable.
Reviewers: eraman, greened, chandlerc, yrouban, apilipenko
Reviewed By: apilipenko
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63823
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364612
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Rumeet Dhindsa [Thu, 27 Jun 2019 23:37:04 +0000 (23:37 +0000)]
Fix ASAN error caused by commit r364512.
This patch intends to fix ASAN stack-use-after-scope error.
This is at least a short-term fix to unbreak LLVM's mainline.
Differential Revision: https://reviews.llvm.org/D63905
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364611
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Amara Emerson [Thu, 27 Jun 2019 23:33:05 +0000 (23:33 +0000)]
[LangRef] Clarify codegen expectations for intrinsics with fp/integer-only overloads.
This change is a result of discussions on list: "GlobalISel: Ambiguous intrinsic semantics problem"
Differential Revision: https://reviews.llvm.org/D59657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364610
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Peter Collingbourne [Thu, 27 Jun 2019 23:24:07 +0000 (23:24 +0000)]
hwasan: Use llvm.read_register intrinsic to read the PC on aarch64 instead of taking the function's address.
This shaves an instruction (and a GOT entry in PIC code) off prologues of
functions with stack variables.
Differential Revision: https://reviews.llvm.org/D63472
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364608
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Lang Hames [Thu, 27 Jun 2019 23:00:30 +0000 (23:00 +0000)]
Revert "[JITLink][MachO/x86-64] Add a testcase for X86_64_RELOC_GOT."
Reverts commit r364600 while I investigate bot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364606
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Roman Lebedev [Thu, 27 Jun 2019 21:52:10 +0000 (21:52 +0000)]
[CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 3)
Summary:
I'm submitting a new revision since i don't understand how to reclaim/reopen/take over the existing one, D50222.
There is no such action in "Add Action" menu...
This implements an optimization described in Hacker's Delight 10-17: when `C` is constant,
the result of `X % C == 0` can be computed more cheaply without actually calculating the remainder.
The motivation is discussed here: https://bugs.llvm.org/show_bug.cgi?id=35479.
This is a recommit, the original commit rL364563 was reverted in rL364568
because test-suite detected miscompile - the new comparison constant 'Q'
was being computed incorrectly (we divided by `D0` instead of `D`).
Original patch D50222 by @hermord (Dmytro Shynkevych)
Notes:
- In principle, it's possible to also handle the `X % C1 == C2` case, as discussed on bugzilla.
This seems to require an extra branch on overflow, so I refrained from implementing this for now.
- An explicit check for when the `REM` can be reduced to just its LHS is included:
the `X % C` == 0 optimization breaks `test1` in `test/CodeGen/X86/jump_sign.ll` otherwise.
I hadn't managed to find a better way to not generate worse output in this case.
- The `test/CodeGen/X86/jump_sign.ll` regresses, and is being fixed by a followup patch D63390.
Reviewers: RKSimon, craig.topper, spatel, hermord, xbolva00
Reviewed By: RKSimon, xbolva00
Subscribers: dexonsmith, kristina, xbolva00, javed.absar, llvm-commits, hermord
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63391
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364600
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Roman Lebedev [Thu, 27 Jun 2019 21:51:54 +0000 (21:51 +0000)]
[NFC][APInt] Add (exhaustive) test for multiplicativeInverse()
Else there is no direct test coverage at all.
The function should either return '0' or precise answer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364599
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Lang Hames [Thu, 27 Jun 2019 21:50:29 +0000 (21:50 +0000)]
[JITLink][MachO/x86-64] Add a testcase for X86_64_RELOC_GOT.
This is the data-section counterpart to X86_64_RELOC_GOTPCREL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364598
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Cameron McInally [Thu, 27 Jun 2019 21:23:07 +0000 (21:23 +0000)]
[NFC][GVNSink] Pre-commit unary FNeg test to fpmath.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364597
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Heejin Ahn [Thu, 27 Jun 2019 21:22:04 +0000 (21:22 +0000)]
[WebAssembly] Enable an atomic.notify MC test
Summary:
Assembly of atomic.notify has been fixed in r364576, so we can enable
it.
Reviewers: aardappel
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63898
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364596
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Cameron McInally [Thu, 27 Jun 2019 21:05:02 +0000 (21:05 +0000)]
[GVN] Add support for unary FNeg to GVN pass
Differential Revision: https://reviews.llvm.org/D63896
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364592
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Reid Kleckner [Thu, 27 Jun 2019 20:56:04 +0000 (20:56 +0000)]
[compiler-rt] Rename lit.*.cfg.* -> lit.*.cfg.py.*
These lit configuration files are really Python source code. Using the
.py file extension helps editors and tools use the correct language
mode. LLVM and Clang already use this convention for lit configuration,
this change simply applies it to all of compiler-rt.
Reviewers: vitalybuka, dberris
Differential Revision: https://reviews.llvm.org/D63658
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364591
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Alexandre Ganea [Thu, 27 Jun 2019 20:46:11 +0000 (20:46 +0000)]
Convert line endings to LF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364590
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Sanjay Patel [Thu, 27 Jun 2019 20:37:12 +0000 (20:37 +0000)]
[x86] remove whitespace; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364588
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Cameron McInally [Thu, 27 Jun 2019 20:33:44 +0000 (20:33 +0000)]
[NFC][GVN] Pre-commit unary FNeg tests to fpmath.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364587
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Sanjay Patel [Thu, 27 Jun 2019 20:16:58 +0000 (20:16 +0000)]
[x86] prevent crashing from select narrowing with AVX512
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364585
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Vitaly Buka [Thu, 27 Jun 2019 19:55:22 +0000 (19:55 +0000)]
[GN] Update build file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364583
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Vitaly Buka [Thu, 27 Jun 2019 19:55:21 +0000 (19:55 +0000)]
[GN] Set exit code to 1 if changes are needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364582
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Jinsong Ji [Thu, 27 Jun 2019 19:35:11 +0000 (19:35 +0000)]
[PowerPC][NFC] Remove unused (and unsupported) fusion feature bits.
FeatureFusion bits was first introduced in
https://reviews.llvm.org/rL253724. for add/load integer fusion for P8.
The only use of `hasFusion` was https://reviews.llvm.org/rL255319.
However, this was removed later in https://reviews.llvm.org/rL280440.
So, there is NO any reference to fusion in code now.
Leaving it there is misleading and confusing, so remove it for now.
We can alwasy add back if we ever support fusion in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364581
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Johannes Doerfert [Thu, 27 Jun 2019 19:29:48 +0000 (19:29 +0000)]
Use "willreturn" in isGuaranteedToTransferExecutionToSuccessor
The `willreturn` function attribute guarantees that a function call will
come back to the call site if the call is also known not to throw.
Therefore, this attribute can be used in
`isGuaranteedToTransferExecutionToSuccessor`.
Patch by Hideto Ueno (@uenoku)
Reviewers: jdoerfert, sstefan1
Reviewed By: jdoerfert
Subscribers: hiraditya, jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63372
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364580
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Philip Reames [Thu, 27 Jun 2019 19:22:43 +0000 (19:22 +0000)]
Update -analyze -scalar-evolution output for multiple exit loops w/computable exit values
The previous output was next to useless if *any* exit was not computable. If we have more than one exit, show the exit count for each so that it's easier to see what's going from with SCEV analysis when debugging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364579
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Roman Lebedev [Thu, 27 Jun 2019 19:09:51 +0000 (19:09 +0000)]
[NFC][CodeGen] Add negative test for X u% C == 0 fold (D63391)
The fold (D63391) uses multiplicativeInverse(),
but it is not guaranteed to always succeed,
and '100' appears to be one of the problematic values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364578
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Michael Liao [Thu, 27 Jun 2019 19:05:46 +0000 (19:05 +0000)]
Correct the file path. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364577
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Wouter van Oortmerssen [Thu, 27 Jun 2019 18:58:26 +0000 (18:58 +0000)]
[WebAssembly] AsmParser: better atomic inst detection
Summary:
Previously missed atomic.notify.
Fixes https://bugs.llvm.org/show_bug.cgi?id=40728
Reviewers: aheejin
Subscribers: sbc100, jgravelle-google, sunfish, jfb, llvm-commits, dschuff
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63747
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364576
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Yuanfang Chen [Thu, 27 Jun 2019 18:39:34 +0000 (18:39 +0000)]
[llvm-objdump] Update the doc for --disassemble-functions.
Update the doc after llvm-svn: 364121 is landed.
With two more trivial fixes that are not related to
--disassemble-functions but still about llvm-objdump.
Reviewers: jhenderson, grimar, MaskRay, rupprecht, peter.smith
Reviewed by: jhenderson, MaskRay
Differential Revision: https://reviews.llvm.org/D63787
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364573
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