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Daniel P. Berrange [Fri, 1 Sep 2017 10:54:34 +0000 (11:54 +0100)]
iotests: blacklist 194 with the luks driver
The 194 test has a lot of code that assumes a simple image file. Rewriting
this to work with luks is possible, but non-trivial, so blacklist the
luks format for now.
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-Id: <
20170901105434.3288-3-berrange@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Tested-by: Fam Zheng <famz@redhat.com>
[eblake: commit message typo fixed]
Reviewed-by: Kashyap Chamarthy <kchamart@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Eric Blake <eblake@redhat.com>
Daniel P. Berrange [Fri, 1 Sep 2017 10:54:33 +0000 (11:54 +0100)]
iotests: rewrite 192 to use _launch_qemu to fix LUKS support
The LUKS driver requires extra args to QEMU to setup passwords.
The _launch_qemu function takes care of this, so convert the
test to use this function and use correct -drive syntax
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-Id: <
20170901105434.3288-2-berrange@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Tested-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Eric Blake <eblake@redhat.com>
Peter Maydell [Tue, 5 Sep 2017 17:55:40 +0000 (18:55 +0100)]
Revert "kvm: use DIV_ROUND_UP"
This reverts commit
206a0fc75d5f54886c1b3f3a65782a75e36b6b97.
The linux-headers directory is for kernel headers which we keep in
sync with the upstream kernel via scripts/update-linux-headers.sh, so
we shouldn't be applying our code cleanups to it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 5 Sep 2017 16:09:24 +0000 (17:09 +0100)]
Merge remote-tracking branch 'remotes/gkurz/tags/for-upstream' into staging
Some trivial fixes/cleanup and a fix to cause QEMU to error out gracefully
instead of aborting.
# gpg: Signature made Tue 05 Sep 2017 16:57:19 BST
# gpg: using DSA key 0x02FC3AEB0101DBC2
# gpg: Good signature from "Greg Kurz <groug@kaod.org>"
# gpg: aka "Greg Kurz <groug@free.fr>"
# gpg: aka "Greg Kurz <gkurz@linux.vnet.ibm.com>"
# gpg: aka "Gregory Kurz (Groug) <groug@free.fr>"
# gpg: aka "[jpeg image of size 3330]"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 2BD4 3B44 535E C0A7 9894 DBA2 02FC 3AEB 0101 DBC2
* remotes/gkurz/tags/for-upstream:
virtfs: error out gracefully when mandatory suboptions are missing
9pfs: local: clarify fchmodat_nofollow() implementation
fsdev: fix memory leak in main()
9pfs: avoid sign conversion error simplifying the code
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Greg Kurz [Mon, 4 Sep 2017 07:59:01 +0000 (09:59 +0200)]
virtfs: error out gracefully when mandatory suboptions are missing
We internally convert -virtfs to -fsdev/-device. If the user doesn't
provide the path or security_model suboptions, and the fsdev backend
requires them, we hit an assertion when populating the internal -fsdev
option:
util/qemu-option.c:547: opt_set: Assertion `opt->str' failed.
Aborted (core dumped)
Let's test the suboption presence on the command line before trying
to set it in the internal -fsdev option, and let the backend code
error out gracefully (ie, like it already does when the user passes
-fsdev on the command line).
Reported-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Greg Kurz [Mon, 4 Sep 2017 07:24:53 +0000 (09:24 +0200)]
9pfs: local: clarify fchmodat_nofollow() implementation
Since fchmodat(2) on Linux doesn't support AT_SYMLINK_NOFOLLOW, we have to
implement it using workarounds. There are two different ways, depending on
whether the system supports O_PATH or not.
In the case O_PATH is supported, we rely on the behavhior of openat(2)
when passing O_NOFOLLOW | O_PATH and the file is a symbolic link. Even
if openat_file() already adds O_NOFOLLOW to the flags, this patch makes
it explicit that we need both creation flags to obtain the expected
behavior.
This is only cleanup, no functional change.
Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Peter Maydell [Tue, 5 Sep 2017 14:59:28 +0000 (15:59 +0100)]
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging
# gpg: Signature made Tue 05 Sep 2017 14:28:52 BST
# gpg: using RSA key 0x9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/block-pull-request:
block: document semantics of bdrv_co_preadv|pwritev
qemu-iotests: use context managers for resource cleanup in 194
iotests.py: add FilePath context manager
qemu.py: make VM() a context manager
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 5 Sep 2017 14:22:09 +0000 (15:22 +0100)]
Merge remote-tracking branch 'remotes/berrange/tags/pull-qcrypto-
20170905-1' into staging
Merge QEMU crypto 2017/09/05 v1
# gpg: Signature made Tue 05 Sep 2017 10:28:17 BST
# gpg: using RSA key 0xBE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>"
# gpg: aka "Daniel P. Berrange <berrange@redhat.com>"
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF
* remotes/berrange/tags/pull-qcrypto-
20170905-1:
crypto: fix test cert generation to not use SHA1 algorithm
tests: fix incorrect size_t format in benchmark-crypto
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 5 Sep 2017 13:14:32 +0000 (14:14 +0100)]
Merge remote-tracking branch 'remotes/berrange/tags/pull-qio-
20170905-2' into staging
Merge QEMU I/O 2017/09/05 v2
# gpg: Signature made Tue 05 Sep 2017 13:22:36 BST
# gpg: using RSA key 0xBE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>"
# gpg: aka "Daniel P. Berrange <berrange@redhat.com>"
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF
* remotes/berrange/tags/pull-qio-
20170905-2:
io: fix check for handshake completion in TLS test
io: add new qio_channel_{readv, writev, read, write}_all functions
io: fix typo in docs comment for qio_channel_read
util: remove the obsolete non-blocking connect
io: fix temp directory used by test-io-channel-tls test
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Daniel P. Berrange [Tue, 29 Aug 2017 16:04:52 +0000 (17:04 +0100)]
io: fix check for handshake completion in TLS test
The TLS I/O channel test had mistakenly used && instead
of || when checking for handshake completion. As a
result it could terminate the handshake process before
it had actually completed. This was harmless before but
changes in GNUTLS 3.6.0 exposed this bug and caused the
test suite to fail.
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Daniel P. Berrange [Wed, 30 Aug 2017 13:53:59 +0000 (14:53 +0100)]
io: add new qio_channel_{readv, writev, read, write}_all functions
These functions wait until they are able to read / write the full
requested data buffer(s).
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Daniel P. Berrange [Wed, 30 Aug 2017 13:46:29 +0000 (14:46 +0100)]
io: fix typo in docs comment for qio_channel_read
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Cao jin [Fri, 16 Jun 2017 08:54:45 +0000 (16:54 +0800)]
util: remove the obsolete non-blocking connect
The non-blocking connect mechanism is obsolete, and it doesn't
work well in inet connection, because it will call getaddrinfo
first and getaddrinfo will blocks on DNS lookups. Since commit
e65c67e4 &
d984464e, the non-blocking connect of migration goes
through QIOChannel in a different manner(using a thread), and
nobody use this old non-blocking connect anymore.
Any newly written code which needs a non-blocking connect should
use the QIOChannel code, so we can drop NonBlockingConnectHandler
as a concept entirely.
Suggested-by: Daniel P. Berrange <berrange@redhat.com>
Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com>
Signed-off-by: Mao Zhongyi <maozy.fnst@cn.fujitsu.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
ZhiPeng Lu [Wed, 9 Aug 2017 14:32:46 +0000 (16:32 +0200)]
fsdev: fix memory leak in main()
@rpath and @sock_name are not freed and leaked.
[groug, not really leaked since the program exits just after that. But it
is always good practice to free allocated memory]
Signed-off-by: Zhipeng Lu <lu.zhipeng@zte.com.cn>
Signed-off-by: Greg Kurz <groug@kaod.org>
Philippe Mathieu-Daudé [Wed, 9 Aug 2017 14:32:46 +0000 (16:32 +0200)]
9pfs: avoid sign conversion error simplifying the code
(note this is how other functions also handle the errors).
hw/9pfs/9p.c:948:18: warning: Loss of sign in implicit conversion
offset = err;
^~~
Reported-by: Clang Static Analyzer
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Greg Kurz <groug@kaod.org>
Daniel P. Berrange [Thu, 31 Aug 2017 10:54:56 +0000 (11:54 +0100)]
block: document semantics of bdrv_co_preadv|pwritev
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id:
20170831105456.9558-1-berrange@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Thu, 24 Aug 2017 07:22:02 +0000 (08:22 +0100)]
qemu-iotests: use context managers for resource cleanup in 194
Switch from atexit.register() to a more elegant idiom of declaring
resources in a with statement:
with FilePath('monitor.sock') as monitor_path,
VM() as vm:
...
The files and VMs will be automatically cleaned up whether the test
passes or fails.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20170824072202.26818-4-stefanha@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Thu, 24 Aug 2017 07:22:01 +0000 (08:22 +0100)]
iotests.py: add FilePath context manager
The scratch/ (TEST_DIR) directory is not automatically cleaned up after
test execution. It is the responsibility of tests to remove any files
they create.
A nice way of doing this is to declare files at the beginning of the
test and automatically remove them with a context manager:
with iotests.FilePath('test.img') as img_path:
qemu_img(...)
qemu_io(...)
# img_path is guaranteed to be deleted here
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20170824072202.26818-3-stefanha@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Thu, 24 Aug 2017 07:22:00 +0000 (08:22 +0100)]
qemu.py: make VM() a context manager
There are a number of ways to ensure that the QEMU process is shut down
when the test ends, including atexit.register(), try: finally:, or
unittest.teardown() methods. All of these require extra code and the
programmer must remember to add vm.shutdown().
A nice solution is context managers:
with VM(binary) as vm:
...
# vm is guaranteed to be shut down here
Cc: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Message-id:
20170824072202.26818-2-stefanha@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Peter Maydell [Mon, 4 Sep 2017 17:53:46 +0000 (18:53 +0100)]
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into staging
qemu-sparc update
# gpg: Signature made Mon 04 Sep 2017 18:45:26 BST
# gpg: using RSA key 0x5BC2C56FAE0F321F
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>"
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* remotes/mcayland/tags/qemu-sparc-signed:
apb: add busA qdev property to PBM PCI bridge
apb: fix endianness for APB and PCI config accesses
apb: fix up PCI bus nomenclature
sun4u: expose fw_cfg and NVRAM on ebus PCI IO address space
sun4u: switch to using qdev to instantiate fw_cfg interface
sun4u: pass PCIDevice into pci_ebus_init() instead of PCIBus
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Mark Cave-Ayland [Mon, 4 Sep 2017 17:41:01 +0000 (18:41 +0100)]
apb: add busA qdev property to PBM PCI bridge
As future sun4u PCI topologies place the ebus containing the in-built devices
behind a PCI bridge, add a busA property to the PBM PCI bridge that is then
used to allow IO accesses by default.
This allows early fw_cfg/NVRAM/serial access to occur even before OpenBIOS
has had a chance to configure the PCI bridges.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Mark Cave-Ayland [Mon, 4 Sep 2017 17:41:01 +0000 (18:41 +0100)]
apb: fix endianness for APB and PCI config accesses
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Mark Cave-Ayland [Mon, 4 Sep 2017 17:41:01 +0000 (18:41 +0100)]
apb: fix up PCI bus nomenclature
Rather than referring to the PCI busses as bus2 and bus3, refer to them as
busA and busB as per the documentation. Also replace the long bus names with
the shorter pciA and pciB aliases (to make it easier to attach additional
devices to either from the command line).
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Mark Cave-Ayland [Mon, 4 Sep 2017 17:41:01 +0000 (18:41 +0100)]
sun4u: expose fw_cfg and NVRAM on ebus PCI IO address space
To allow future changes to the sun4u PCI topology.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-By: Artyom Tarasenko <atar4qemu@gmail.com>
Mark Cave-Ayland [Mon, 4 Sep 2017 17:41:01 +0000 (18:41 +0100)]
sun4u: switch to using qdev to instantiate fw_cfg interface
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Mark Cave-Ayland [Mon, 4 Sep 2017 17:41:01 +0000 (18:41 +0100)]
sun4u: pass PCIDevice into pci_ebus_init() instead of PCIBus
In order to wire up the ebus PCI address spaces differently then we need
access to the underlying PCIDevice.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Peter Maydell [Mon, 4 Sep 2017 16:21:24 +0000 (17:21 +0100)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-
20170904-2' into staging
target-arm:
* collection of M profile cleanups and minor bugfixes
* loader: handle ELF files with overlapping zero-init data
* virt: allow PMU instantiation with userspace irqchip
* wdt_aspeed: Add support for the reset width register
* cpu: Define new cpu_transaction_failed() hook
* Mark some SoC devices as not user-creatable
* arm: Fix aa64 ldp register writeback
* arm_gicv3_kvm: Fix compile warning
# gpg: Signature made Mon 04 Sep 2017 17:20:40 BST
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-
20170904-2: (33 commits)
arm_gicv3_kvm: Fix compile warning
target/arm: Fix aa64 ldp register writeback
hw/arm/digic: Mark device with user_creatable = false
hw/arm/aspeed_soc: Mark devices as user_creatable = false
target/arm: Allow deliver_fault() caller to specify EA bit
target/arm: Factor out fault delivery code
cputlb: Support generating CPU exceptions on memory transaction failures
cpu: Define new cpu_transaction_failed() hook
memory.h: Move MemTxResult type to memattrs.h
aspeed_soc: Propagate silicon-rev to watchdog
watchdog: wdt_aspeed: Add support for the reset width register
target/arm/kvm: pmu: improve error handling
hw/arm/virt: allow pmu instantiation with userspace irqchip
target/arm/kvm: pmu: split init and set-irq stages
hw/arm/virt: add pmu interrupt state
hw/arm: use defined type name instead of hard-coded string
loader: Ignore zero-sized ELF segments
loader: Handle ELF files with overlapping zero-initialized data
nvic: Implement "user accesses BusFault" SCS region behaviour
armv7m_nvic.h: Move from include/hw/arm to include/hw/intc
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Pranith Kumar [Mon, 4 Sep 2017 14:21:56 +0000 (15:21 +0100)]
arm_gicv3_kvm: Fix compile warning
Fix the following warning:
/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: warning: logical not is only applied to the left hand side of this bitwise operator [-Wlogical-not-parentheses]
if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {
^ ~
/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: note: add parentheses after the '!' to evaluate the bitwise operator first
if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {
^
/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: note: add parentheses around left hand side expression to silence this warning
if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {
^
This logic error meant we were not setting the PTZ
bit when we should -- luckily as the comment suggests
this wouldn't have had any effects beyond making GIC
initialization take a little longer.
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
Message-id:
20170829173226.7625-1-bobby.prani@gmail.com
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 4 Sep 2017 14:21:56 +0000 (15:21 +0100)]
target/arm: Fix aa64 ldp register writeback
For "ldp x0, x1, [x0]", if the second load is on a second page and
the second page is unmapped, the exception would be raised with x0
already modified. This means the instruction couldn't be restarted.
Cc: qemu-arm@nongnu.org
Cc: qemu-stable@nongnu.org
Reported-by: Andrew <andrew@fubar.geek.nz>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20170825224833.4463-1-richard.henderson@linaro.org
Fixes: https://bugs.launchpad.net/qemu/+bug/
1713066
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[PMM: tweaked comment format]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Thomas Huth [Mon, 4 Sep 2017 14:21:55 +0000 (15:21 +0100)]
hw/arm/digic: Mark device with user_creatable = false
QEMU currently shows some unexpected behavior when the user trys to
do a "device_add digic" on an unrelated ARM machine like integratorcp
in "-nographic" mode (the device_add command does not immediately
return to the monitor prompt), and trying to "device_del" the device
later results in a "qemu/qdev-monitor.c:872:qdev_unplug: assertion
failed: (hotplug_ctrl)" error condition.
Looking at the realize function of the device, it uses serial_hds
directly and this means that the device can not be added a second
time, so let's simply mark it with "user_creatable = false" now.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Thomas Huth [Mon, 4 Sep 2017 14:21:55 +0000 (15:21 +0100)]
hw/arm/aspeed_soc: Mark devices as user_creatable = false
QEMU currently aborts if the user is accidentially trying to
do something like this:
$ aarch64-softmmu/qemu-system-aarch64 -S -M integratorcp -nographic
QEMU 2.9.93 monitor - type 'help' for more information
(qemu) device_add ast2400
Unexpected error in error_set_from_qdev_prop_error()
at hw/core/qdev-properties.c:1032:
Aborted (core dumped)
The ast2400 SoC devices are clearly not creatable by the user since
they are using the serial_hds and nd_table arrays directly in their
realize function, so mark them with user_creatable = false.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 4 Sep 2017 14:21:55 +0000 (15:21 +0100)]
target/arm: Allow deliver_fault() caller to specify EA bit
For external aborts, we will want to be able to specify the EA
(external abort type) bit in the syndrome field. Allow callers of
deliver_fault() to do that by adding a field to ARMMMUFaultInfo which
we use when constructing the syndrome values.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Peter Maydell [Mon, 4 Sep 2017 14:21:55 +0000 (15:21 +0100)]
target/arm: Factor out fault delivery code
We currently have some similar code in tlb_fill() and in
arm_cpu_do_unaligned_access() for delivering a data abort or prefetch
abort. We're also going to want to do the same thing to handle
external aborts. Factor out the common code into a new function
deliver_fault().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Peter Maydell [Mon, 4 Sep 2017 14:21:55 +0000 (15:21 +0100)]
cputlb: Support generating CPU exceptions on memory transaction failures
Call the new cpu_transaction_failed() hook at the places where
CPU generated code interacts with the memory system:
io_readx()
io_writex()
get_page_addr_code()
Any access from C code (eg via cpu_physical_memory_rw(),
address_space_rw(), ld/st_*_phys()) will *not* trigger CPU exceptions
via cpu_transaction_failed(). Handling for transactions failures for
this kind of call should be done by using a function which returns a
MemTxResult and treating the failure case appropriately in the
calling code.
In an ideal world we would not generate CPU exceptions for
instruction fetch failures in get_page_addr_code() but instead wait
until the code translation process tried a load and it failed;
however that change would require too great a restructuring and
redesign to attempt at this point.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Peter Maydell [Mon, 4 Sep 2017 14:21:54 +0000 (15:21 +0100)]
cpu: Define new cpu_transaction_failed() hook
Currently we have a rather half-baked setup for allowing CPUs to
generate exceptions on accesses to invalid memory: the CPU has a
cpu_unassigned_access() hook which the memory system calls in
unassigned_mem_write() and unassigned_mem_read() if the current_cpu
pointer is non-NULL. This was originally designed before we
implemented the MemTxResult type that allows memory operations to
report a success or failure code, which is why the hook is called
right at the bottom of the memory system. The major problem with
this is that it means that the hook can be called even when the
access was not actually done by the CPU: for instance if the CPU
writes to a DMA engine register which causes the DMA engine to begin
a transaction which has been set up by the guest to operate on
invalid memory then this will casue the CPU to take an exception
incorrectly. Another minor problem is that currently if a device
returns a transaction error then this won't turn into a CPU exception
at all.
The right way to do this is to have allow the CPU to respond
to memory system transaction failures at the point where the
CPU specific code calls into the memory system.
Define a new QOM CPU method and utility function
cpu_transaction_failed() which is called in these cases.
The functionality here overlaps with the existing
cpu_unassigned_access() because individual target CPUs will
need some work to convert them to the new system. When this
transition is complete we can remove the old cpu_unassigned_access()
code.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Peter Maydell [Mon, 4 Sep 2017 14:21:54 +0000 (15:21 +0100)]
memory.h: Move MemTxResult type to memattrs.h
Move the MemTxResult type to memattrs.h. We're going to want to
use it in cpu/qom.h, which doesn't want to include all of
memory.h. In practice MemTxResult and MemTxAttrs are pretty
closely linked since both are used for the new-style
read_with_attrs and write_with_attrs callbacks, so memattrs.h
is a reasonable home for this rather than creating a whole
new header file for it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Andrew Jeffery [Mon, 4 Sep 2017 14:21:54 +0000 (15:21 +0100)]
aspeed_soc: Propagate silicon-rev to watchdog
This is required to configure differences in behaviour between the
AST2400 and AST2500 watchdog IPs.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Andrew Jeffery [Mon, 4 Sep 2017 14:21:54 +0000 (15:21 +0100)]
watchdog: wdt_aspeed: Add support for the reset width register
The reset width register controls how the pulse on the SoC's WDTRST{1,2}
pins behaves. A pulse is emitted if the external reset bit is set in
WDT_CTRL. On the AST2500 WDT_RESET_WIDTH can consume magic bit patterns
to configure push-pull/open-drain and active-high/active-low
behaviours and thus needs some special handling in the write path.
As some of the capabilities depend on the SoC version a silicon-rev
property is introduced, which is used to guard version-specific
behaviour.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Andrew Jones [Mon, 4 Sep 2017 14:21:54 +0000 (15:21 +0100)]
target/arm/kvm: pmu: improve error handling
If a KVM PMU init or set-irq attr call fails we just silently stop
the PMU DT node generation. The only way they could fail, though,
is if the attr's respective KVM has-attr call fails. But that should
never happen if KVM advertises the PMU capability, because both
attrs have been available since the capability was introduced. Let's
just abort if this should-never-happen stuff does happen, because,
if it does, then something is obviously horribly wrong.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Message-id:
1500471597-2517-5-git-send-email-drjones@redhat.com
[PMM: change kvm32.c kvm_arm_pmu_init() to the new API too]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Andrew Jones [Mon, 4 Sep 2017 14:21:54 +0000 (15:21 +0100)]
hw/arm/virt: allow pmu instantiation with userspace irqchip
Move the in-kernel-irqchip test to only guard the set-irq
stage, not the init stage of the PMU. Also add the PMU to
the KVM device irq line synchronization to enable its use.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Message-id:
1500471597-2517-4-git-send-email-drjones@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Andrew Jones [Mon, 4 Sep 2017 14:21:54 +0000 (15:21 +0100)]
target/arm/kvm: pmu: split init and set-irq stages
When adding a PMU with a userspace irqchip we skip the set-irq
stage of device creation. Split the 'create' function into two
functions 'init' and 'set-irq' so they may be called separately.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Message-id:
1500471597-2517-3-git-send-email-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Andrew Jones [Mon, 4 Sep 2017 14:21:53 +0000 (15:21 +0100)]
hw/arm/virt: add pmu interrupt state
Mimicking gicv3-maintenance-interrupt, add the PMU's interrupt to
CPU state.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
1500471597-2517-2-git-send-email-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Mon, 4 Sep 2017 14:21:53 +0000 (15:21 +0100)]
hw/arm: use defined type name instead of hard-coded string
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 4 Sep 2017 14:21:53 +0000 (15:21 +0100)]
loader: Ignore zero-sized ELF segments
Some ELF files have program headers that specify segments that
are of zero size. Ignore them, rather than trying to create
zero-length ROM blobs for them, because the zero-length blob
can falsely trigger the overlapping-ROM-blobs check.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Hua Yanghao <huayanghao@gmail.com>
Message-id:
1502116754-18867-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:53 +0000 (15:21 +0100)]
loader: Handle ELF files with overlapping zero-initialized data
For embedded systems, notably ARM, one common use of ELF
file segments is that the 'physical addresses' represent load addresses
and the 'virtual addresses' execution addresses, such that
the load addresses are packed into ROM or flash, and the
relocation and zero-initialization of data is done at runtime.
This means that the 'memsz' in the segment header represents
the runtime size of the segment, but the size that needs to
be loaded is only the 'filesz'. In particular, paddr+memsz
may overlap with the next segment to be loaded, as in this
example:
0x70000001 off 0x00007f68 vaddr 0x00008150 paddr 0x00008150 align 2**2
filesz 0x00000008 memsz 0x00000008 flags r--
LOAD off 0x000000f4 vaddr 0x00000000 paddr 0x00000000 align 2**2
filesz 0x00000124 memsz 0x00000124 flags r--
LOAD off 0x00000218 vaddr 0x00000400 paddr 0x00000400 align 2**3
filesz 0x00007d58 memsz 0x00007d58 flags r-x
LOAD off 0x00007f70 vaddr 0x20000140 paddr 0x00008158 align 2**3
filesz 0x00000a80 memsz 0x000022f8 flags rw-
LOAD off 0x000089f0 vaddr 0x20002438 paddr 0x00008bd8 align 2**0
filesz 0x00000000 memsz 0x00004000 flags rw-
LOAD off 0x000089f0 vaddr 0x20000000 paddr 0x20000000 align 2**0
filesz 0x00000000 memsz 0x00000140 flags rw-
where the segment at paddr 0x8158 has a memsz of 0x2258 and
would overlap with the segment at paddr 0x8bd8 if QEMU's loader
tried to honour it. (At runtime the segments will not overlap
since their vaddrs are more widely spaced than their paddrs.)
Currently if you try to load an ELF file like this with QEMU then
it will fail with an error "rom: requested regions overlap",
because we create a ROM image for each segment using the memsz
as the size.
Support ELF files using this scheme, by truncating the
zero-initialized part of the segment if it would overlap another
segment. This will retain the existing loader behaviour for
all ELF files we currently accept, and also accept ELF files
which only need 'filesz' bytes to be loaded.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1502116754-18867-2-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:53 +0000 (15:21 +0100)]
nvic: Implement "user accesses BusFault" SCS region behaviour
The ARMv7M architecture specifies that most of the addresses in the
PPB region (which includes the NVIC, systick and system registers)
are not accessible to unprivileged accesses, which should
BusFault with a few exceptions:
* the STIR is configurably user-accessible
* the ITM (which we don't implement at all) is always
user-accessible
Implement this by switching the register access functions
to the _with_attrs scheme that lets us distinguish user
mode accesses.
This allows us to pull the handling of the CCR.USERSETMPEND
flag up to the level where we can make it generate a BusFault
as it should for non-permitted accesses.
Note that until the core ARM CPU code implements turning
MEMTX_ERROR into a BusFault the registers will continue to
act as RAZ/WI to user accesses.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-16-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:53 +0000 (15:21 +0100)]
armv7m_nvic.h: Move from include/hw/arm to include/hw/intc
The armv7m_nvic.h header file was accidentally placed in
include/hw/arm; move it to include/hw/intc to match where
its corresponding .c file lives.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-15-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:53 +0000 (15:21 +0100)]
target/arm: Create and use new function arm_v7m_is_handler_mode()
Add a utility function for testing whether the CPU is in Handler
mode; this is just a check whether v7m.exception is non-zero, but
we do it in several places and it makes the code a bit easier
to read to not have to mentally figure out what the test is testing.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-14-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:53 +0000 (15:21 +0100)]
target/arm: Don't calculate lr in arm_v7m_cpu_do_interrupt() until needed
Move the code in arm_v7m_cpu_do_interrupt() that calculates the
magic LR value down to when we're actually going to use it.
Having the calculation and use so far apart makes the code
a little harder to understand than it needs to be.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-13-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
target/arm: Make arm_cpu_dump_state() handle the M-profile XPSR
Make the arm_cpu_dump_state() debug logging handle the M-profile XPSR
rather than assuming it's an A-profile CPSR. On M profile the PSR
line of a register dump will now look like this:
XPSR=
41000000 -Z-- T priv-thread
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-12-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
target/arm: Don't use cpsr_write/cpsr_read to transfer M profile XPSR
For M profile the XPSR is a similar but not identical format to the
A profile CPSR/SPSR. (For instance the Thumb bit is in a different
place.) For guest accesses we make the M profile code go through
xpsr_read() and xpsr_write() which handle the different layout.
However for migration we use cpsr_read() and cpsr_write() to
marshal state into and out of the migration data stream. This
is pretty confusing and works more by luck than anything else.
Make M profile migration use xpsr_read() and xpsr_write() instead.
The most complicated part of this is handling the possibility
that the migration source is an older QEMU which hands us a
CPSR format value; helpfully we can always tell the two apart.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-11-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
target/arm: Don't store M profile PRIMASK and FAULTMASK in daif
We currently store the M profile CPU register state PRIMASK and
FAULTMASK in the daif field of the CPU state in its I and F
bits. This is a legacy from the original implementation, which
tried to share the cpu_exec_interrupt code between A profile
and M profile. We've since separated out the two cases because
they are significantly different, so now there is no common
code between M and A profile which looks at env->daif: all the
uses are either in A-only or M-only code paths. Sharing the state
fields now is just confusing, and will make things awkward
when we implement v8M, where the PRIMASK and FAULTMASK
registers are banked between security states.
Switch M profile over to using v7m.faultmask and v7m.primask
fields for these registers.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-10-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
target/arm: Define and use XPSR bit masks
The M profile XPSR is almost the same format as the A profile CPSR,
but not quite. Define some XPSR_* macros and use them where we
definitely dealing with an XPSR rather than reusing the CPSR ones.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-9-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
target/arm: Fix outdated comment about exception exit
When we switched our handling of exception exit to detect
the magic addresses at translate time rather than via
a do_unassigned_access hook, we forgot to update a
comment; correct the omission.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-8-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
target/arm: Remove incorrect comment about MPU_CTRL
Remove the comment that claims that some MPU_CTRL bits are stored
in sctlr_el[1]. This has never been true since MPU_CTRL was added
in commit
29c483a50607 -- the comment is a leftover from
Michael Davidsaver's original implementation, which I modified
not to use sctlr_el[1]; I forgot to delete the comment then.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-7-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:52 +0000 (15:21 +0100)]
hw/intc/armv7m_nvic.c: Remove out of date comment
Remove an out of date comment which says there's only one
item in the NVIC container region -- we put systick into its
own device object a while back and so now there are two
things in the container.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-6-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:51 +0000 (15:21 +0100)]
target/arm: Tighten up Thumb decode where new v8M insns will be
Tighten up the T32 decoder in the places where new v8M instructions
will be:
* TT/TTT/TTA/TTAT are in what was nominally LDREX/STREX r15, ...
which is UNPREDICTABLE:
make the UNPREDICTABLE behaviour be to UNDEF
* BXNS/BLXNS are distinguished from BX/BLX via the low 3 bits,
which in previous architectural versions are SBZ:
enforce the SBZ via UNDEF rather than ignoring it, and move
the "ARCH(5)" UNDEF case up so we don't leak a TCG temporary
* SG is in the encoding which would be LDRD/STRD with rn = r15;
this is UNPREDICTABLE and we currently UNDEF:
move this check further up the code so that we don't leak
TCG temporaries in the UNDEF case and have a better place
to put the SG decode.
This means that if a v8M binary is accidentally run on v7M
or if a test case hits something that we haven't implemented
yet the behaviour will be obvious (UNDEF) rather than obscure
(plough on treating it as a different instruction).
In the process, add some comments about the instruction patterns
at these points in the decode. Our Thumb and ARM decoders are
very difficult to understand currently, but gradually adding
comments like this should help to clarify what exactly has
been decoded when.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-5-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:51 +0000 (15:21 +0100)]
target/arm: Consolidate PMSA handling in get_phys_addr()
Currently get_phys_addr() has PMSAv7 handling before the
"is translation disabled?" check, and then PMSAv5 after it.
Tidy this up by making the PMSAv5 code handle the "MPU disabled"
case itself, so that we have all the PMSA code in one place.
This will make adding the PMSAv8 code slightly cleaner, and
also means that pre-v7 PMSA cores benefit from the MPU lookup
logging that the PMSAv7 codepath had.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-4-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:51 +0000 (15:21 +0100)]
target/arm: Don't trap WFI/WFE for M profile
M profile cores can never trap on WFI or WFE instructions. Check for
M profile in check_wfx_trap() to ensure this.
The existing code will do the right thing for v7M cores because
the hcr_el2 and scr_el3 registers will be all-zeroes and so we
won't attempt to trap, but when we start setting ARM_FEATURE_V8
for v8M cores the v8A handling of SCTLR.nTWE and .nTWI will not
give the right results.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 14:21:51 +0000 (15:21 +0100)]
target/arm: Use MMUAccessType enum rather than int
In the ARM get_phys_addr() code, switch to using the MMUAccessType
enum and its MMU_* values rather than int and literal 0/1/2.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
1501692241-23310-2-git-send-email-peter.maydell@linaro.org
Peter Maydell [Mon, 4 Sep 2017 12:28:09 +0000 (13:28 +0100)]
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2017-09-01-v3' into staging
QAPI patches for 2017-09-01
# gpg: Signature made Mon 04 Sep 2017 12:30:31 BST
# gpg: using RSA key 0x3870B400EB918653
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>"
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>"
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-qapi-2017-09-01-v3: (47 commits)
qapi: drop the sentinel in enum array
qapi: Change data type of the FOO_lookup generated for enum FOO
qapi: Convert indirect uses of FOO_lookup[...] to qapi_enum_lookup()
qapi: Mechanically convert FOO_lookup[...] to FOO_str(...)
qapi: Generate FOO_str() macro for QAPI enum FOO
qapi: Avoid unnecessary use of enum lookup table's sentinel
qapi: Use qapi_enum_parse() in input_type_enum()
crypto: Use qapi_enum_parse() in qcrypto_block_luks_name_lookup()
quorum: Use qapi_enum_parse() in quorum_open()
block: Use qemu_enum_parse() in blkdebug_debug_breakpoint()
hmp: Use qapi_enum_parse() in hmp_migrate_set_parameter()
hmp: Use qapi_enum_parse() in hmp_migrate_set_capability()
tpm: Clean up model registration & lookup
tpm: Clean up driver registration & lookup
qapi: Drop superfluous qapi_enum_parse() parameter max
qapi: Update qapi-code-gen.txt examples to match current code
qapi-schema: Improve section headings
qapi-schema: Move queries from common.json to qapi-schema.json
qapi-schema: Make block-core.json self-contained
qapi-schema: Fold event.json back into qapi-schema.json
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Marc-André Lureau [Thu, 24 Aug 2017 08:46:11 +0000 (10:46 +0200)]
qapi: drop the sentinel in enum array
Now that all usages have been converted to user lookup helpers.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20170822132255.23945-14-marcandre.lureau@redhat.com>
[Rebased, superfluous local variable dropped, missing
check-qom-proplist.c update added]
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-17-git-send-email-armbru@redhat.com>
Marc-André Lureau [Thu, 24 Aug 2017 08:46:10 +0000 (10:46 +0200)]
qapi: Change data type of the FOO_lookup generated for enum FOO
Currently, a FOO_lookup is an array of strings terminated by a NULL
sentinel.
A future patch will generate enums with "holes". NULL-termination
will cease to work then.
To prepare for that, store the length in the FOO_lookup by wrapping it
in a struct and adding a member for the length.
The sentinel will be dropped next.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20170822132255.23945-13-marcandre.lureau@redhat.com>
[Basically redone]
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-16-git-send-email-armbru@redhat.com>
[Rebased]
Markus Armbruster [Thu, 24 Aug 2017 08:46:09 +0000 (10:46 +0200)]
qapi: Convert indirect uses of FOO_lookup[...] to qapi_enum_lookup()
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-15-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 08:46:08 +0000 (10:46 +0200)]
qapi: Mechanically convert FOO_lookup[...] to FOO_str(...)
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-14-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 08:46:07 +0000 (10:46 +0200)]
qapi: Generate FOO_str() macro for QAPI enum FOO
The next commit will put it to use. May look pointless now, but we're
going to change the FOO_lookup's type, and then it'll help.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-13-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 08:46:06 +0000 (10:46 +0200)]
qapi: Avoid unnecessary use of enum lookup table's sentinel
Currently, the FOO_lookup[] generated for QAPI enum types are
terminated by a NULL sentinel.
A future patch will generate enums with "holes". NULL-termination
will cease to work then.
To prepare for that, replace "have we reached the sentinel?"
predicates by "have we reached the FOO__MAX value?" predicates.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-12-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 08:46:05 +0000 (10:46 +0200)]
qapi: Use qapi_enum_parse() in input_type_enum()
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-11-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 08:46:04 +0000 (10:46 +0200)]
crypto: Use qapi_enum_parse() in qcrypto_block_luks_name_lookup()
Cc: "Daniel P. Berrange" <berrange@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-10-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Daniel P. Berrange <berrange@redhat.com>
Marc-André Lureau [Thu, 24 Aug 2017 08:46:03 +0000 (10:46 +0200)]
quorum: Use qapi_enum_parse() in quorum_open()
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20170822132255.23945-12-marcandre.lureau@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
[Rebased, qemu_opt_get() factored out, commit message tweaked]
Cc: Alberto Garcia <berto@igalia.com>
Reviewed-by: Alberto Garcia <berto@igalia.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-9-git-send-email-armbru@redhat.com>
Marc-André Lureau [Thu, 24 Aug 2017 08:46:02 +0000 (10:46 +0200)]
block: Use qemu_enum_parse() in blkdebug_debug_breakpoint()
The error message on invalid blkdebug events changes from
qemu-system-x86_64: LOCATION: Invalid event name "VALUE"
to
qemu-system-x86_64: LOCATION: invalid parameter value: VALUE
Slight degradation, but the message is sub-par even before the patch.
When complaining about a parameter value, both parameter name and
value should be mentioned, as the value may well not be unique. Left
for another day.
Also left is the error message's unhelpful location: it points to the
config=FILENAME rather than into that file.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20170822132255.23945-11-marcandre.lureau@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
[Rebased, commit message rewritten]
Cc: Kevin Wolf <kwolf@redhat.com>
Cc: Max Reitz <mreitz@redhat.com>
Cc: qemu-block@nongnu.org
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-8-git-send-email-armbru@redhat.com>
Marc-André Lureau [Thu, 24 Aug 2017 08:46:01 +0000 (10:46 +0200)]
hmp: Use qapi_enum_parse() in hmp_migrate_set_parameter()
The error message on invalid parameter name changes from
Invalid parameter "NAME"
to
invalid parameter value: NAME
Slight degratation, perhaps.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20170822132255.23945-10-marcandre.lureau@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
[Rebased, assertion added, commit message rewritten]
Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-7-git-send-email-armbru@redhat.com>
Marc-André Lureau [Thu, 24 Aug 2017 08:46:00 +0000 (10:46 +0200)]
hmp: Use qapi_enum_parse() in hmp_migrate_set_capability()
The error message on invalid capability name changes from
Invalid parameter "NAME"
to
invalid parameter value: NAME
No worse than before.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20170822132255.23945-9-marcandre.lureau@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
[Rebased, commit message rewritten]
Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-6-git-send-email-armbru@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 08:45:59 +0000 (10:45 +0200)]
tpm: Clean up model registration & lookup
We have a strict separation between enum TpmModel and tpm_models[]:
* TpmModel may have any number of members. It just happens to have one.
* tpm_register_model() uses the first empty slot in tpm_models[].
If you register more than tpm_models[] has space,
tpn_register_model() fails. Its caller silently ignores the
failure.
Register the same TpmModel more than once has no effect other than
wasting tpm_models[] slots: tpm_model_is_registered() is happy with
the first one it finds.
Since we only ever register one model, and tpm_models[] has space for
just that one, this contraption even works.
Turn tpm_models[] into a straight map from enum TpmType to bool. Much
simpler.
Cc: Stefan Berger <stefanb@us.ibm.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-5-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
[Commit message typo fixed]
Marc-André Lureau [Thu, 24 Aug 2017 08:45:58 +0000 (10:45 +0200)]
tpm: Clean up driver registration & lookup
We have a strict separation between enum TpmType and be_drivers[]:
* TpmType may have any number of members. It just happens to have one.
* tpm_register_driver() uses the first empty slot in be_drivers[].
If you register more than tpm_models[] has space,
tpm_register_driver() fails. Its caller silently ignores the
failure.
If you register more than one with a given TpmType,
tpm_display_backend_drivers() will shows all of them, but
tpm_driver_find_by_type() and tpm_get_backend_driver() will find
only the one one that registered first.
Since we only ever register one driver, and be_drivers[] has space for
just that one, this contraption even works.
Turn be_drivers[] into a straight map from enum TpmType to driver.
Much simpler, and has a decent chance to actually work should we ever
acquire additional drivers.
While there, use qapi_enum_parse() in tpm_get_backend_driver().
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20170822132255.23945-8-marcandre.lureau@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
[Rebased, superfluous initializer dropped, commit message rewritten]
Cc: Stefan Berger <stefanb@us.ibm.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-4-git-send-email-armbru@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 08:45:57 +0000 (10:45 +0200)]
qapi: Drop superfluous qapi_enum_parse() parameter max
The lookup tables have a sentinel, no need to make callers pass their
size.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-3-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
[Rebased, commit message corrected]
Markus Armbruster [Thu, 24 Aug 2017 08:45:56 +0000 (10:45 +0200)]
qapi: Update qapi-code-gen.txt examples to match current code
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503564371-26090-2-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:14:08 +0000 (21:14 +0200)]
qapi-schema: Improve section headings
The generated QEMU QMP reference is now structured as follows:
1.1 Introduction
1.2 Stability Considerations
1.3 Common data types
1.4 Socket data types
1.5 VM run state
1.6 Cryptography
1.7 Block devices
1.7.1 Block core (VM unrelated)
1.7.2 QAPI block definitions (vm unrelated)
1.8 Character devices
1.9 Net devices
1.10 Rocker switch device
1.11 TPM (trusted platform module) devices
1.12 Remote desktop
1.12.1 Spice
1.12.2 VNC
1.13 Input
1.14 Migration
1.15 Transactions
1.16 Tracing
1.17 QMP introspection
1.18 Miscellanea
Section "1.18 Miscellanea" is still too big: it documents 134 symbols.
Section "1.7.1 Block core (VM unrelated)" is also rather big: 128
symbols. All the others are of reasonable size.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-17-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:14:07 +0000 (21:14 +0200)]
qapi-schema: Move queries from common.json to qapi-schema.json
query-version and query-commands are in common.json for no good
reason. Several similar queries are in qapi-schema.json. Move them
there.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-16-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:14:06 +0000 (21:14 +0200)]
qapi-schema: Make block-core.json self-contained
Except for block-core.json, the sub-schemas are self-contained: if
they use a symbol defined in another sub-schema, they include that
sub-schema. To check, feed the sub-schema to qapi2texi (or any other
QAPI generator) along with the pragma from qapi-schema.json.
Fix up things to make block-core.json self-contained, too.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-15-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:14:05 +0000 (21:14 +0200)]
qapi-schema: Fold event.json back into qapi-schema.json
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-14-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:14:04 +0000 (21:14 +0200)]
qapi-schema: Move block events from event.json to block.json
Cc: Alberto Garcia <berto@igalia.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-13-git-send-email-armbru@redhat.com>
Reviewed-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:14:03 +0000 (21:14 +0200)]
qapi-schema: Collect TPM stuff in qapi/tpm.json
Sadly, we don't have a TPM maintainer, not even a MAINTAINERS entry.
Create one, and mark it orphaned.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-12-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:14:02 +0000 (21:14 +0200)]
qapi-schema: Collect transaction stuff in qapi/transaction.json
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-11-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:14:01 +0000 (21:14 +0200)]
qapi-schema: Collect migration stuff in qapi/migration.json
Cc: Juan Quintela <quintela@redhat.com>
Cc: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-10-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:14:00 +0000 (21:14 +0200)]
qapi-schema: Collect UI stuff in qapi/ui.json
UI stuff is remote desktop stuff (Spice, VNC) and input stuff (mouse,
keyboard).
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-9-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:13:59 +0000 (21:13 +0200)]
qapi-schema: Collect net device stuff in qapi/net.json
Cc: Jason Wang <jasowang@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-8-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:13:58 +0000 (21:13 +0200)]
qapi-schema: Collect char device stuff in qapi/char.json
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-7-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:13:57 +0000 (21:13 +0200)]
qapi-schema: Collect run state stuff in qapi/run-state.json
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-6-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:13:56 +0000 (21:13 +0200)]
qapi-schema: Collect sockets stuff in qapi/sockets.json
Cc: "Daniel P. Berrange" <berrange@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
1503602048-12268-5-git-send-email-armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:13:55 +0000 (21:13 +0200)]
qapi-schema: Rocker doc section contains unrelated stuff, fix
Bug: section "Rocker switch device" starts with the rocker stuff, but
then has unrelated stuff, like ReplayMode, xen-load-devices-state, ...
Cause: rocker.json is included in the middle of section "QMP commands".
Fix: include it in a sane place, namely next to the other sub-schemas.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
1503602048-12268-4-git-send-email-armbru@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:13:54 +0000 (21:13 +0200)]
qapi-schema: Introspection doc is in the wrong section, fix
Bug: introspection documentation is in section "Tracing commands".
Cause: sub-schema qapi/introspect.json lacks a section header, and
therefore goes into whatever section precedes its include.
Fix: add a section header.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
1503602048-12268-3-git-send-email-armbru@redhat.com>
Markus Armbruster [Thu, 24 Aug 2017 19:13:53 +0000 (21:13 +0200)]
qapi-schema: Document how generated documentation is ordered
Documentation generated with qapi2texi.py is in source order, with
included sub-schemas inserted at the first include directive
(subsequent include directives have no effect). To get a sane and
stable order, it's best to include each sub-schema just once, or
include it first in qapi-schema.json. Document that.
While there, drop a few redundant comments.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
1503602048-12268-2-git-send-email-armbru@redhat.com>
Marc-André Lureau [Fri, 25 Aug 2017 10:59:11 +0000 (12:59 +0200)]
qlit: Tighten QLit list vs QList comparison
We check that all members of the QLit list are also in the QList. We
neglect to check the other direction. Fix that.
While there, use QLIST_FOREACH_ENTRY() to simplify the code and break
the loop on the first mismatch.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20170825105913.4060-13-marcandre.lureau@redhat.com>
[Commit message improved]
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Marc-André Lureau [Fri, 25 Aug 2017 10:59:10 +0000 (12:59 +0200)]
qlit: Tighten QLit dict vs QDict comparison
We check that all members of the QLit dictionary are also in the
QDict. We neglect to check the other direction.
Comparing the number of members suffices, because QDict can't
contain duplicate members, and putting duplicates in a QLit is a
programming error.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20170825105913.4060-12-marcandre.lureau@redhat.com>
[Commit message improved]
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Marc-André Lureau [Fri, 25 Aug 2017 10:59:09 +0000 (12:59 +0200)]
tests/check-qlit: New, covering qobject/qlit.c
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20170825105913.4060-11-marcandre.lureau@redhat.com>
[Copyright notice correction squashed in, commit message tweaked]
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Marc-André Lureau [Fri, 25 Aug 2017 10:59:08 +0000 (12:59 +0200)]
qlit: Replace open-coded qnum_get_int() by call
Bonus: rids us of a side effect in an assertion.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20170825105913.4060-10-marcandre.lureau@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Marc-André Lureau [Fri, 25 Aug 2017 10:59:07 +0000 (12:59 +0200)]
qlit: add QLIT_QNULL and QLIT_BOOL
As they are going to be used in the following patches.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20170825105913.4060-9-marcandre.lureau@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Marc-André Lureau [Fri, 25 Aug 2017 10:59:06 +0000 (12:59 +0200)]
qlit: make qlit_equal_qobject() take const arguments
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20170825105913.4060-8-marcandre.lureau@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Marc-André Lureau [Fri, 25 Aug 2017 10:59:05 +0000 (12:59 +0200)]
qlit: make qlit_equal_qobject return a bool
Make it more obvious about the expected return values.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20170825105913.4060-7-marcandre.lureau@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>