OSDN Git Service
Bernhard Beschow [Fri, 6 Jan 2023 11:39:27 +0000 (12:39 +0100)]
hw/pci-host/mv64361: Reuse pci_swizzle_map_irq_fn
mv64361_pcihost_map_irq() is a reimplementation of
pci_swizzle_map_irq_fn(). Resolve this redundancy.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <
20230106113927.8603-1-shentey@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
BALATON Zoltan [Tue, 17 Jan 2023 21:36:42 +0000 (22:36 +0100)]
ppc/pegasos2: Improve readability of VIA south bridge creation
Slightly improve readability of creating the south btidge by cnamging
type of a local variable to avoid some casts within function arguments
which makes some lines shorter and easier to read.
Also remove an unneded line break.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20230117214545.
5E191746369@zero.eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Murilo Opsfelder Araujo [Tue, 9 Aug 2022 00:24:51 +0000 (21:24 -0300)]
tests/migration: add support for ppc64le for guestperf.py
Add support for ppc64le for guestperf.py. On ppc, console is usually
hvc0 and serial device for pseries machine is spapr-vty.
Signed-off-by: Murilo Opsfelder Araujo <muriloo@linux.ibm.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <
20220809002451.91541-3-muriloo@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Murilo Opsfelder Araujo [Tue, 9 Aug 2022 00:24:50 +0000 (21:24 -0300)]
tests/migration: add sysprof-capture-4 as dependency for stress binary
`make tests/migration/stress` fails with:
FAILED: tests/migration/stress
cc -m64 -mlittle-endian -o tests/migration/stress tests/migration/stress.p/stress.c.o -Wl,--as-needed -Wl,--no-undefined -pie -Wl,--warn-common -Wl,-z,relro -Wl,-z,now -fstack-protector-strong -static -pthread -Wl,--start-group -lgthread-2.0 -lglib-2.0 -Wl,--end-group
/usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gutils.c.o): in function `.annobin_gutils.c':
(.text+0x3b4): warning: Using 'getpwuid' in statically linked applications requires at runtime the shared libraries from the glibc version used for linking
/usr/bin/ld: (.text+0x178): warning: Using 'getpwnam_r' in statically linked applications requires at runtime the shared libraries from the glibc version used for linking
/usr/bin/ld: (.text+0x1bc): warning: Using 'getpwuid_r' in statically linked applications requires at runtime the shared libraries from the glibc version used for linking
/usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gthread.c.o):(.toc+0x0): undefined reference to `sysprof_clock'
/usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gtrace.c.o): in function `.annobin_gtrace.c':
(.text+0x24): undefined reference to `sysprof_collector_mark_vprintf'
/usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gtrace.c.o): in function `g_trace_define_int64_counter':
(.text+0x8c): undefined reference to `sysprof_collector_request_counters'
/usr/bin/ld: (.text+0x108): undefined reference to `sysprof_collector_define_counters'
/usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gtrace.c.o): in function `g_trace_set_int64_counter':
(.text+0x23c): undefined reference to `sysprof_collector_set_counters'
/usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gspawn.c.o):(.toc+0x0): undefined reference to `sysprof_clock'
/usr/bin/ld: /usr/lib/gcc/ppc64le-redhat-linux/11/../../../../lib64/libglib-2.0.a(gmain.c.o):(.toc+0x0): undefined reference to `sysprof_clock'
collect2: error: ld returned 1 exit status
ninja: build stopped: subcommand failed.
make: *** [Makefile:162: run-ninja] Error 1
Add sysprof-capture-4 as dependency for stress binary.
Tested on:
- CentOS Stream 9 ppc64le
- Fedora 36 x86_64
Signed-off-by: Murilo Opsfelder Araujo <muriloo@linux.ibm.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <
20220809002451.91541-2-muriloo@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Peter Maydell [Sat, 4 Feb 2023 17:17:15 +0000 (17:17 +0000)]
Merge tag 'linux-user-for-8.0-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging
linux-user branch pull request
20230204
Implement execveat()
un-parent OBJECT(cpu) when closing thread
Revert fix for glibc >= 2.36 sys/mount.h
Fix/update strace
move target_flat.h to target subdirs
Fix SO_ERROR return code of getsockopt()
Fix /proc/cpuinfo output for hppa
Add emulation for MADV_WIPEONFORK and MADV_KEEPONFORK in madvise()
Implement SOL_ALG encryption support
linux-user: Allow sendmsg() without IOV
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# gpg: Signature made Sat 04 Feb 2023 16:08:05 GMT
# gpg: using RSA key
CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* tag 'linux-user-for-8.0-pull-request' of https://gitlab.com/laurent_vivier/qemu: (22 commits)
linux-user: Allow sendmsg() without IOV
linux-user: Implement SOL_ALG encryption support
linux-user: Enhance strace output for various syscalls
linux-user: Show 4th argument of rt_sigprocmask() in strace
linux-user: Add emulation for MADV_WIPEONFORK and MADV_KEEPONFORK in madvise()
linux-user: Improve strace output of personality() and sysinfo()
linux-user: Fix /proc/cpuinfo output for hppa
linux-user: Fix SO_ERROR return code of getsockopt()
linux-user: move target_flat.h to target subdirs
linux-user: Improve strace output of getgroups() and setgroups()
linux-user: Add strace output for clock_getres_time64() and futex_time64()
Revert "linux-user: fix compat with glibc >= 2.36 sys/mount.h"
Revert "linux-user: add more compat ioctl definitions"
linux-user: add more netlink protocol constants
linux-user: fix strace build w/out munlockall
linux-user: un-parent OBJECT(cpu) when closing thread
linux-user: Add missing MAP_HUGETLB and MAP_STACK flags in strace
linux-user/syscall: Implement execveat()
linux-user/syscall: Extract do_execve() from do_syscall1()
linux-user/strace: Add output for execveat() syscall
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Sat, 4 Feb 2023 14:57:39 +0000 (14:57 +0000)]
Merge tag 'm68k-next-pull-request' of https://github.com/vivier/qemu-m68k into staging
m68k pull request
20230201
fix 'bkpt' instruction in softmmu mode
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# gpg: Signature made Wed 01 Feb 2023 09:53:52 GMT
# gpg: using RSA key
CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* tag 'm68k-next-pull-request' of https://github.com/vivier/qemu-m68k:
m68k: fix 'bkpt' instruction in softmmu mode
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Sat, 4 Feb 2023 10:19:55 +0000 (10:19 +0000)]
Merge tag 'pull-monitor-2023-02-03-v2' of https://repo.or.cz/qemu/armbru into staging
Monitor patches for 2023-02-03
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# gpg: Signature made Sat 04 Feb 2023 06:59:20 GMT
# gpg: using RSA key
354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg: issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* tag 'pull-monitor-2023-02-03-v2' of https://repo.or.cz/qemu/armbru: (35 commits)
monitor: Rename misc.c to hmp-target.c
monitor: Loosen coupling between misc.c and monitor.c slightly
monitor: Move remaining QMP stuff from misc.c to qmp-cmds.c
monitor: Move remaining HMP commands from misc.c to hmp-cmds.c
monitor: Move target-dependent HMP commands to hmp-cmds-target.c
monitor: Move monitor_putc() next to monitor_puts & external linkage
monitor: Split file descriptor passing stuff off misc.c
qdev: Move HMP command completion from monitor to softmmu/
acpi: Move the QMP command from monitor/ to hw/acpi/
stats: Move HMP commands from monitor/ to stats/
stats: Move QMP commands from monitor/ to stats/
runstate: Move HMP commands from monitor/ to softmmu/
tpm: Move HMP commands from monitor/ to softmmu/
virtio: Move HMP commands from monitor/ to hw/virtio/
migration: Move the QMP command from monitor/ to migration/
migration: Move HMP commands from monitor/ to migration/
net: Move hmp_info_network() to net-hmp-cmds.c
net: Move HMP commands from monitor to net/
hmp: Rewrite strlist_from_comma_list() as hmp_split_at_comma()
rocker: Move HMP commands from monitor to hw/net/rocker/
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Markus Armbruster [Tue, 24 Jan 2023 12:19:46 +0000 (13:19 +0100)]
monitor: Rename misc.c to hmp-target.c
What's left in misc.c is exactly the target-dependent part of the HMP
core. Rename accordingly.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-33-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:45 +0000 (13:19 +0100)]
monitor: Loosen coupling between misc.c and monitor.c slightly
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-32-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:44 +0000 (13:19 +0100)]
monitor: Move remaining QMP stuff from misc.c to qmp-cmds.c
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-31-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:43 +0000 (13:19 +0100)]
monitor: Move remaining HMP commands from misc.c to hmp-cmds.c
This requires giving them external linkage. Rename do_help_cmd() to
hmp_help(), and do_print() to hmp_print().
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-30-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:42 +0000 (13:19 +0100)]
monitor: Move target-dependent HMP commands to hmp-cmds-target.c
Target-independent hmp_gpa2hva(), hmp_gpa2hpa() move along to stay
next to hmp_gva2gpa().
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-29-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:41 +0000 (13:19 +0100)]
monitor: Move monitor_putc() next to monitor_puts & external linkage
monitor_putc() will soon be used from more than one .c file.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-28-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:40 +0000 (13:19 +0100)]
monitor: Split file descriptor passing stuff off misc.c
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-27-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:39 +0000 (13:19 +0100)]
qdev: Move HMP command completion from monitor to softmmu/
This moves the completion code from MAINTAINERS sections "Human
Monitor (HMP)" and "QMP" to section "QOM".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-26-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:38 +0000 (13:19 +0100)]
acpi: Move the QMP command from monitor/ to hw/acpi/
This moves the command from MAINTAINERS section "QMP" to section
"ACPI/SMBIOS)".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-25-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Markus Armbruster [Tue, 24 Jan 2023 12:19:37 +0000 (13:19 +0100)]
stats: Move HMP commands from monitor/ to stats/
This moves these commands from MAINTAINERS section "Human
Monitor (HMP)" to section "Stats".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-24-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:36 +0000 (13:19 +0100)]
stats: Move QMP commands from monitor/ to stats/
This moves these commands from MAINTAINERS section "QMP" to new
section "Stats". Status is Orphan. Volunteers welcome!
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-23-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:35 +0000 (13:19 +0100)]
runstate: Move HMP commands from monitor/ to softmmu/
This moves these commands from MAINTAINERS section "Human
Monitor (HMP)" and "QMP" to "Main loop".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-22-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:34 +0000 (13:19 +0100)]
tpm: Move HMP commands from monitor/ to softmmu/
This moves these commands from MAINTAINERS section "Human
Monitor (HMP)" to "TPM".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-21-armbru@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:33 +0000 (13:19 +0100)]
virtio: Move HMP commands from monitor/ to hw/virtio/
This moves these commands from MAINTAINERS section "Human
Monitor (HMP)" to "virtio".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-20-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Markus Armbruster [Tue, 24 Jan 2023 12:19:32 +0000 (13:19 +0100)]
migration: Move the QMP command from monitor/ to migration/
This moves the command from MAINTAINERS sections "Human Monitor (HMP)"
and "QMP" to "Migration".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-19-armbru@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:31 +0000 (13:19 +0100)]
migration: Move HMP commands from monitor/ to migration/
This moves these commands from MAINTAINERS sections "Human
Monitor (HMP)" and "QMP" to "Migration".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-18-armbru@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:30 +0000 (13:19 +0100)]
net: Move hmp_info_network() to net-hmp-cmds.c
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-17-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:29 +0000 (13:19 +0100)]
net: Move HMP commands from monitor to net/
This moves these commands from MAINTAINERS sections "Human
Monitor (HMP)" and "QMP" to "Network device backends".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-16-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:28 +0000 (13:19 +0100)]
hmp: Rewrite strlist_from_comma_list() as hmp_split_at_comma()
Use g_strsplit() for the actual splitting. Give external linkage, so
the next commit can move one of its users to another source file.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-15-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:27 +0000 (13:19 +0100)]
rocker: Move HMP commands from monitor to hw/net/rocker/
This moves these commands from MAINTAINERS section "Human
Monitor (HMP)" to "Rocker" and "Network devices".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-14-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:26 +0000 (13:19 +0100)]
block: Factor out hmp_change_medium(), and move to block/monitor/
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-13-armbru@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:25 +0000 (13:19 +0100)]
qom: Move HMP commands from monitor/ to qom/
This moves these commands from MAINTAINERS sections "Human
Monitor (HMP)" and "QMP" to "QOM".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-12-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Markus Armbruster [Tue, 24 Jan 2023 12:19:24 +0000 (13:19 +0100)]
machine: Move HMP commands from monitor/ to hw/core/
This moves these commands from MAINTAINERS section "Human
Monitor (HMP)" to "Machine core".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-11-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:23 +0000 (13:19 +0100)]
machine: Move QMP commands from monitor/ to hw/core/
This moves these commands from MAINTAINERS section "QMP" to "Machine
core".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-10-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:22 +0000 (13:19 +0100)]
trace: Move HMP commands from monitor/ to trace/
This moves these commands from MAINTAINERS sections "Human
Monitor (HMP)" and "QMP" to "Tracing".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-9-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:21 +0000 (13:19 +0100)]
hmp: Rename help_cmd() to hmp_help_cmd(), move declaration to hmp.h
The next commit will move a caller of help_cmd() to a new file.
Including monitor/monitor-internal.h there just for help_cmd() feels
silly. Better to provide it in monitor/hmp.h suitably renamed.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-8-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:20 +0000 (13:19 +0100)]
readline: Extract readline_add_completion_of() from monitor
monitor/misc.h has static add_completion_option(). It's useful
elsewhere in the monitor. Since it's not monitor-specific, move it to
util/readline.c renamed to readline_add_completion_of(), and put it to
use.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-7-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:19 +0000 (13:19 +0100)]
hmp: Drop redundant argument check from add_completion_option()
No need to check for null arguments, no caller passes them.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-6-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:18 +0000 (13:19 +0100)]
char: Factor out qmp_add_client() parts and move to chardev/
Code moves from MAINTAINERS section "QMP" to "Character device
backends".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-5-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:17 +0000 (13:19 +0100)]
char: Move HMP commands from monitor/ to chardev/
This moves these commands from MAINTAINERS sections "Human
Monitor (HMP)" and "QMP" to "Character device backends".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-4-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:16 +0000 (13:19 +0100)]
audio: Move HMP commands from monitor/ to audio/
This moves these commands from MAINTAINERS sections "Human
Monitor (HMP)" and "QMP" to "Overall Audio backends".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-3-armbru@redhat.com>
Markus Armbruster [Tue, 24 Jan 2023 12:19:15 +0000 (13:19 +0100)]
monitor: Drop unnecessary includes
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230124121946.
1139465-2-armbru@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Helge Deller [Mon, 12 Dec 2022 17:34:16 +0000 (18:34 +0100)]
linux-user: Allow sendmsg() without IOV
Applications do call sendmsg() without any IOV, e.g.:
sendmsg(4, {msg_name=NULL, msg_namelen=0, msg_iov=NULL, msg_iovlen=0,
msg_control=[{cmsg_len=36, cmsg_level=SOL_ALG, cmsg_type=0x2}],
msg_controllen=40, msg_flags=0}, MSG_MORE) = 0
sendmsg(4, {msg_name=NULL, msg_namelen=0, msg_iov=[{iov_base="The quick brown fox jumps over t"..., iov_len=183}],
msg_iovlen=1, msg_control=[{cmsg_len=20, cmsg_level=SOL_ALG, cmsg_type=0x3}],
msg_controllen=24, msg_flags=0}, 0) = 183
The function do_sendrecvmsg_locked() is used for sndmsg() and recvmsg()
and calls lock_iovec() to lock the IOV into memory. For the first
sendmsg() above it returns NULL and thus wrongly skips the call the host
sendmsg() syscall, which will break the calling application.
Fix this issue by:
- allowing sendmsg() even with empty IOV
- skip recvmsg() if IOV is NULL
- skip both if the return code of do_sendrecvmsg_locked() != 0, which
indicates some failure like EFAULT on the IOV
Tested with the debian "ell" package with hppa guest on x86_64 host.
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
20221212173416.90590-2-deller@gmx.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Helge Deller [Mon, 12 Dec 2022 17:34:15 +0000 (18:34 +0100)]
linux-user: Implement SOL_ALG encryption support
Add suport to handle SOL_ALG packets via sendmsg() and recvmsg().
This allows emulated userspace to use encryption functionality.
Tested with the debian ell package with hppa guest on x86_64 host.
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
20221212173416.90590-1-deller@gmx.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Helge Deller [Mon, 12 Dec 2022 18:01:32 +0000 (19:01 +0100)]
linux-user: Enhance strace output for various syscalls
Add appropriate strace printf formats for various Linux syscalls.
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <Y5dsfGB1RChGfraW@p100>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Helge Deller [Mon, 30 Jan 2023 22:20:53 +0000 (23:20 +0100)]
linux-user: Show 4th argument of rt_sigprocmask() in strace
Add output for the missing 4th parameter (size_t sigsetsize).
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <Y9hCxdvdM1o+/iHC@p100>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Helge Deller [Tue, 13 Dec 2022 17:03:09 +0000 (18:03 +0100)]
linux-user: Add emulation for MADV_WIPEONFORK and MADV_KEEPONFORK in madvise()
Both parameters have a different value on the parisc platform, so first
translate the target value into a host value for usage in the native
madvise() syscall.
Those parameters are often used by security sensitive applications (e.g.
tor browser, boringssl, ...) which expect the call to return a proper
return code on failure, so return -EINVAL if qemu fails to forward the
syscall to the host OS.
While touching this code, enhance the comments about MADV_DONTNEED.
Tested with testcase of tor browser when running hppa-linux guest on
x86-64 host.
Signed-off-by: Helge Deller <deller@gmx.de>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <Y5iwTaydU7i66K/i@p100>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Helge Deller [Fri, 27 Jan 2023 20:18:58 +0000 (21:18 +0100)]
linux-user: Improve strace output of personality() and sysinfo()
Make the strace look nicer for those two syscalls.
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <Y9QxskymWJjrKQmT@p100>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Helge Deller [Fri, 27 Jan 2023 20:10:49 +0000 (21:10 +0100)]
linux-user: Fix /proc/cpuinfo output for hppa
The hppa architectures provides an own output for the emulated
/proc/cpuinfo file.
Some userspace applications count (even if that's not the recommended
way) the number of lines which start with "processor:" and assume that
this number then reflects the number of online CPUs. Since those 3
architectures don't provide any such line, applications may assume "0"
CPUs. One such issue can be seen in debian bug report:
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=
1024653
Avoid such issues by adding a "processor:" line for each of the online
CPUs.
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <Y9QvyRSq1I1k5/JW@p100>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Helge Deller [Fri, 27 Jan 2023 20:25:27 +0000 (21:25 +0100)]
linux-user: Fix SO_ERROR return code of getsockopt()
Add translation for the host error return code of:
getsockopt(19, SOL_SOCKET, SO_ERROR, [ECONNREFUSED], [4]) = 0
This fixes the testsuite of the cockpit debian package with a
hppa-linux guest on a x86-64 host.
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <Y9QzNzXg0hrzHQeo@p100>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Mike Frysinger [Sun, 29 Jan 2023 00:46:25 +0000 (19:46 -0500)]
linux-user: move target_flat.h to target subdirs
This makes target_flat.h behave like every other target_xxx.h header.
It also makes it actually work -- while the current header says adding
a header to the target subdir overrides the common one, it doesn't.
This is for two reasons:
* meson.build adds -Ilinux-user before -Ilinux-user/$arch
* the compiler search path for "target_flat.h" looks in the same dir
as the source file before searching -I paths.
This can be seen with the xtensa port -- the subdir settings aren't
used which breaks stack setup.
Move it to the generic/ subdir and add include stubs like every
other target_xxx.h header is handled.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230129004625.11228-1-vapier@gentoo.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Helge Deller [Sun, 15 Jan 2023 21:00:57 +0000 (22:00 +0100)]
linux-user: Improve strace output of getgroups() and setgroups()
Make the strace look nicer for those syscalls.
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
20230115210057.445132-1-deller@gmx.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Helge Deller [Sun, 15 Jan 2023 11:35:17 +0000 (12:35 +0100)]
linux-user: Add strace output for clock_getres_time64() and futex_time64()
Add the two syscalls to strace output to avoid "Unknown syscall" message.
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
20230115113517.25143-1-deller@gmx.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Daniel P. Berrangé [Tue, 10 Jan 2023 17:49:01 +0000 (12:49 -0500)]
Revert "linux-user: fix compat with glibc >= 2.36 sys/mount.h"
This reverts commit
3cd3df2a9584e6f753bb62a0028bd67124ab5532.
glibc has fixed (in
2.36.9000-40-g774058d729) the problem
that caused a clash when both sys/mount.h annd linux/mount.h
are included, and backported this to the 2.36 stable release
too:
https://sourceware.org/glibc/wiki/Release/2.36#Usage_of_.3Clinux.2Fmount.h.3E_and_.3Csys.2Fmount.h.3E
It is saner for QEMU to remove the workaround it applied for
glibc 2.36 and expect distros to ship the 2.36 maint release
with the fix. This avoids needing to add a further workaround
to QEMU to deal with the fact that linux/brtfs.h now also pulls
in linux/mount.h via linux/fs.h since Linux 6.1
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230110174901.
2580297-3-berrange@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Daniel P. Berrangé [Tue, 10 Jan 2023 17:49:00 +0000 (12:49 -0500)]
Revert "linux-user: add more compat ioctl definitions"
This reverts commit
c5495f4ecb0cdaaf2e9dddeb48f1689cdb520ca0.
glibc has fixed (in
2.36.9000-40-g774058d729) the problem
that caused a clash when both sys/mount.h annd linux/mount.h
are included, and backported this to the 2.36 stable release
too:
https://sourceware.org/glibc/wiki/Release/2.36#Usage_of_.3Clinux.2Fmount.h.3E_and_.3Csys.2Fmount.h.3E
It is saner for QEMU to remove the workaround it applied for
glibc 2.36 and expect distros to ship the 2.36 maint release
with the fix. This avoids needing to add a further workaround
to QEMU to deal with the fact that linux/brtfs.h now also pulls
in linux/mount.h via linux/fs.h since Linux 6.1
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230110174901.
2580297-2-berrange@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Letu Ren [Sun, 1 Jan 2023 14:11:05 +0000 (22:11 +0800)]
linux-user: add more netlink protocol constants
Currently, qemu strace only prints four protocol contants. This patch
adds others listed in "linux/netlink.h".
Signed-off-by: Letu Ren <fantasquex@gmail.com>
Message-Id: <
20230101141105.12024-1-fantasquex@gmail.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Mike Frysinger [Wed, 18 Jan 2023 09:01:44 +0000 (04:01 -0500)]
linux-user: fix strace build w/out munlockall
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20230118090144.31155-1-vapier@gentoo.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Richard Henderson [Tue, 24 Jan 2023 20:10:19 +0000 (10:10 -1000)]
linux-user: un-parent OBJECT(cpu) when closing thread
This reinstates commit
52f0c1607671293afcdb2acc2f83e9bccbfa74bb:
While forcing the CPU to unrealize by hand does trigger the clean-up
code we never fully free resources because refcount never reaches
zero. This is because QOM automatically added objects without an
explicit parent to /unattached/, incrementing the refcount.
Instead of manually triggering unrealization just unparent the object
and let the device machinery deal with that for us.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/866
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
20220811151413.
3350684-2-alex.bennee@linaro.org>
The original patch tickled a problem in target/arm, and was reverted.
But that problem is fixed as of commit
3b07a936d3bf.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230124201019.
3935934-1-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Helge Deller [Tue, 13 Dec 2022 16:02:24 +0000 (17:02 +0100)]
linux-user: Add missing MAP_HUGETLB and MAP_STACK flags in strace
Add two missing mmap flags.
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <Y5iiED4PpnGAHpyz@p100>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Peter Maydell [Fri, 3 Feb 2023 15:33:05 +0000 (15:33 +0000)]
Merge tag 'pull-target-arm-
20230203' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* Fix physical address resolution for Stage2
* pl011: refactoring, implement reset method
* Support GICv3 with hvf acceleration
* sbsa-ref: remove cortex-a76 from list of supported cpus
* Correct syndrome for ATS12NSO* traps at Secure EL1
* Fix priority of HSTR_EL2 traps vs UNDEFs
* Implement FEAT_FGT for '-cpu max'
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# gpg: Signature made Fri 03 Feb 2023 14:28:59 GMT
# gpg: using RSA key
E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-
20230203' of https://git.linaro.org/people/pmaydell/qemu-arm: (33 commits)
target/arm: Enable FEAT_FGT on '-cpu max'
target/arm: Implement MDCR_EL2.TDCC and MDCR_EL3.TDCC traps
target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 traps
target/arm: Implement the HFGITR_EL2.ERET trap
target/arm: Mark up sysregs for HFGITR bits 48..63
target/arm: Mark up sysregs for HFGITR bits 18..47
target/arm: Mark up sysregs for HFGITR bits 12..17
target/arm: Mark up sysregs for HFGITR bits 0..11
target/arm: Mark up sysregs for HDFGRTR bits 12..63
target/arm: Mark up sysregs for HDFGRTR bits 0..11
target/arm: Mark up sysregs for HFGRTR bits 36..63
target/arm: Mark up sysregs for HFGRTR bits 24..35
target/arm: Mark up sysregs for HFGRTR bits 12..23
target/arm: Mark up sysregs for HFGRTR bits 0..11
target/arm: Implement FGT trapping infrastructure
target/arm: Define the FEAT_FGT registers
target/arm: Disable HSTR_EL2 traps if EL2 is not enabled
target/arm: Make HSTR_EL2 traps take priority over UNDEF-at-EL1
target/arm: All UNDEF-at-EL0 traps take priority over HSTR_EL2 traps
target/arm: Move do_coproc_insn() syndrome calculation earlier
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 30 Jan 2023 18:24:59 +0000 (18:24 +0000)]
target/arm: Enable FEAT_FGT on '-cpu max'
Update the ID registers for TCG's '-cpu max' to report the
presence of FEAT_FGT Fine-Grained Traps support.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-24-peter.maydell@linaro.org
Message-id:
20230127175507.
2895013-24-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:58 +0000 (18:24 +0000)]
target/arm: Implement MDCR_EL2.TDCC and MDCR_EL3.TDCC traps
FEAT_FGT also implements an extra trap bit in the MDCR_EL2 and
MDCR_EL3 registers: bit TDCC enables trapping of use of the Debug
Comms Channel registers OSDTRRX_EL1, OSDTRTX_EL1, MDCCSR_EL0,
MDCCINT_EL0, DBGDTR_EL0, DBGDTRRX_EL0 and DBGDTRTX_EL0 (and their
AArch32 equivalents). This trapping is independent of whether
fine-grained traps are enabled or not.
Implement these extra traps. (We don't implement DBGDTR_EL0,
DBGDTRRX_EL0 and DBGDTRTX_EL0.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-23-peter.maydell@linaro.org
Message-id:
20230127175507.
2895013-23-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:57 +0000 (18:24 +0000)]
target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 traps
Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 fine-grained traps.
These trap execution of the SVC instruction from AArch32 and AArch64.
(As usual, AArch32 can only trap from EL0, as fine grained traps are
disabled with an AArch32 EL1.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-22-peter.maydell@linaro.org
Message-id:
20230127175507.
2895013-22-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:56 +0000 (18:24 +0000)]
target/arm: Implement the HFGITR_EL2.ERET trap
Implement the HFGITR_EL2.ERET fine-grained trap. This traps
execution from AArch64 EL1 of ERET, ERETAA and ERETAB. The trap is
reported with a syndrome value of 0x1a.
The trap must take precedence over a possible pointer-authentication
trap for ERETAA and ERETAB.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-21-peter.maydell@linaro.org
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20230127175507.
2895013-21-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:55 +0000 (18:24 +0000)]
target/arm: Mark up sysregs for HFGITR bits 48..63
Mark up the sysreg definitions for the system instructions
trapped by HFGITR bits 48..63.
Some of these bits are for trapping instructions which are
not in the system instruction encoding (i.e. which are
not handled by the ARMCPRegInfo mechanism):
* ERET, ERETAA, ERETAB
* SVC
We will have to handle those separately and manually.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-20-peter.maydell@linaro.org
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20230127175507.
2895013-20-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:54 +0000 (18:24 +0000)]
target/arm: Mark up sysregs for HFGITR bits 18..47
Mark up the sysreg definitions for the system instructions
trapped by HFGITR bits 18..47. These bits cover TLBI
TLB maintenance instructions.
(If we implemented FEAT_XS we would need to trap some of the
instructions added by that feature using these bits; but we don't
yet, so will need to add the .fgt markup when we do.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-19-peter.maydell@linaro.org
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20230127175507.
2895013-19-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:53 +0000 (18:24 +0000)]
target/arm: Mark up sysregs for HFGITR bits 12..17
Mark up the sysreg definitions for the system instructions
trapped by HFGITR bits 12..17. These bits cover AT address
translation instructions.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-18-peter.maydell@linaro.org
Message-id:
20230127175507.
2895013-18-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:52 +0000 (18:24 +0000)]
target/arm: Mark up sysregs for HFGITR bits 0..11
Mark up the sysreg definitions for the system instructions
trapped by HFGITR bits 0..11. These bits cover various
cache maintenance operations.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-17-peter.maydell@linaro.org
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20230127175507.
2895013-17-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:51 +0000 (18:24 +0000)]
target/arm: Mark up sysregs for HDFGRTR bits 12..63
Mark up the sysreg definitions for the registers trapped
by HDFGRTR/HDFGWTR bits 12..x.
Bits 12..22 and bit 58 are for PMU registers.
The remaining bits in HDFGRTR/HDFGWTR are for traps on
registers that are part of features we don't implement:
Bits 23..32 and 63 : FEAT_SPE
Bits 33..48 : FEAT_ETE
Bits 50..56 : FEAT_TRBE
Bits 59..61 : FEAT_BRBE
Bit 62 : FEAT_SPEv1p2.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-16-peter.maydell@linaro.org
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20230127175507.
2895013-16-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:50 +0000 (18:24 +0000)]
target/arm: Mark up sysregs for HDFGRTR bits 0..11
Mark up the sysreg definitons for the registers trapped
by HDFGRTR/HDFGWTR bits 0..11. These cover various debug
related registers.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-15-peter.maydell@linaro.org
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20230127175507.
2895013-15-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:49 +0000 (18:24 +0000)]
target/arm: Mark up sysregs for HFGRTR bits 36..63
Mark up the sysreg definitions for the registers trapped
by HFGRTR/HFGWTR bits 36..63.
Of these, some correspond to RAS registers which we implement as
always-UNDEF: these don't need any extra handling for FGT because the
UNDEF-to-EL1 always takes priority over any theoretical
FGT-trap-to-EL2.
Bit 50 (NACCDATA_EL1) is for the ACCDATA_EL1 register which is part
of the FEAT_LS64_ACCDATA feature which we don't yet implement.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-14-peter.maydell@linaro.org
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20230127175507.
2895013-14-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:48 +0000 (18:24 +0000)]
target/arm: Mark up sysregs for HFGRTR bits 24..35
Mark up the sysreg definitions for the registers trapped
by HFGRTR/HFGWTR bits 24..35.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-13-peter.maydell@linaro.org
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20230127175507.
2895013-13-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:47 +0000 (18:24 +0000)]
target/arm: Mark up sysregs for HFGRTR bits 12..23
Mark up the sysreg definitions for the registers trapped
by HFGRTR/HFGWTR bits 12..23.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-12-peter.maydell@linaro.org
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20230127175507.
2895013-12-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:46 +0000 (18:24 +0000)]
target/arm: Mark up sysregs for HFGRTR bits 0..11
Mark up the sysreg definitions for the registers trapped
by HFGRTR/HFGWTR bits 0..11.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-11-peter.maydell@linaro.org
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20230127175507.
2895013-11-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:45 +0000 (18:24 +0000)]
target/arm: Implement FGT trapping infrastructure
Implement the machinery for fine-grained traps on normal sysregs.
Any sysreg with a fine-grained trap will set the new field to
indicate which FGT register bit it should trap on.
FGT traps only happen when an AArch64 EL2 enables them for
an AArch64 EL1. They therefore are only relevant for AArch32
cpregs when the cpreg can be accessed from EL0. The logic
in access_check_cp_reg() will check this, so it is safe to
add a .fgt marking to an ARM_CP_STATE_BOTH ARMCPRegInfo.
The DO_BIT and DO_REV_BIT macros define enum constants FGT_##bitname
which can be used to specify the FGT bit, eg
.fgt = FGT_AFSR0_EL1
(We assume that there is no bit name duplication across the FGT
registers, for brevity's sake.)
Subsequent commits will add the .fgt fields to the relevant register
definitions and define the FGT_nnn values for them.
Note that some of the FGT traps are for instructions that we don't
handle via the cpregs mechanisms (mostly these are instruction traps).
Those we will have to handle separately.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-10-peter.maydell@linaro.org
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20230127175507.
2895013-10-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:44 +0000 (18:24 +0000)]
target/arm: Define the FEAT_FGT registers
Define the system registers which are provided by the
FEAT_FGT fine-grained trap architectural feature:
HFGRTR_EL2, HFGWTR_EL2, HDFGRTR_EL2, HDFGWTR_EL2, HFGITR_EL2
All these registers are a set of bit fields, where each bit is set
for a trap and clear to not trap on a particular system register
access. The R and W register pairs are for system registers,
allowing trapping to be done separately for reads and writes; the I
register is for system instructions where trapping is on instruction
execution.
The data storage in the CPU state struct is arranged as a set of
arrays rather than separate fields so that when we're looking up the
bits for a system register access we can just index into the array
rather than having to use a switch to select a named struct member.
The later FEAT_FGT2 will add extra elements to these arrays.
The field definitions for the new registers are in cpregs.h because
in practice the code that needs them is code that also needs
the cpregs information; cpu.h is included in a lot more files.
We're also going to add some FGT-specific definitions to cpregs.h
in the next commit.
We do not implement HAFGRTR_EL2, because we don't implement
FEAT_AMUv1.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-9-peter.maydell@linaro.org
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20230127175507.
2895013-9-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:43 +0000 (18:24 +0000)]
target/arm: Disable HSTR_EL2 traps if EL2 is not enabled
The HSTR_EL2 register is not supposed to have an effect unless EL2 is
enabled in the current security state. We weren't checking for this,
which meant that if the guest set up the HSTR_EL2 register we would
incorrectly trap even for accesses from Secure EL0 and EL1.
Add the missing checks. (Other places where we look at HSTR_EL2
for the not-in-v8A bits TTEE and TJDBX are already checking that
we are in NS EL0 or EL1, so there we alredy know EL2 is enabled.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-8-peter.maydell@linaro.org
Message-id:
20230127175507.
2895013-8-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:42 +0000 (18:24 +0000)]
target/arm: Make HSTR_EL2 traps take priority over UNDEF-at-EL1
The semantics of HSTR_EL2 require that it traps cpreg accesses
to EL2 for:
* EL1 accesses
* EL0 accesses, if the access is not UNDEFINED when the
trap bit is 0
(You can see this in the I_ZFGJP priority ordering, where HSTR_EL2
traps from EL1 to EL2 are priority 12, UNDEFs are priority 13, and
HSTR_EL2 traps from EL0 are priority 15.)
However, we don't get this right for EL1 accesses which UNDEF because
the register doesn't exist at all or because its ri->access bits
non-configurably forbid the access. At EL1, check for the HSTR_EL2
trap early, before either of these UNDEF reasons.
We have to retain the HSTR_EL2 check in access_check_cp_reg(),
because at EL0 any kind of UNDEF-to-EL1 (including "no such
register", "bad ri->access" and "ri->accessfn returns 'trap to EL1'")
takes precedence over the trap to EL2. But we only need to do that
check for EL0 now.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20230130182459.
3309057-7-peter.maydell@linaro.org
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20230127175507.
2895013-7-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:41 +0000 (18:24 +0000)]
target/arm: All UNDEF-at-EL0 traps take priority over HSTR_EL2 traps
The HSTR_EL2 register has a collection of trap bits which allow
trapping to EL2 for AArch32 EL0 or EL1 accesses to coprocessor
registers. The specification of these bits is that when the bit is
set we should trap
* EL1 accesses
* EL0 accesses, if the access is not UNDEFINED when the
trap bit is 0
In other words, all UNDEF traps from EL0 to EL1 take precedence over
the HSTR_EL2 trap to EL2. (Since this is all AArch32, the only kind
of trap-to-EL1 is the UNDEF.)
Our implementation doesn't quite get this right -- we check for traps
in the order:
* no such register
* ARMCPRegInfo::access bits
* HSTR_EL2 trap bits
* ARMCPRegInfo::accessfn
So UNDEFs that happen because of the access bits or because the
register doesn't exist at all correctly take priority over the
HSTR_EL2 trap, but where a register can UNDEF at EL0 because of the
accessfn we are incorrectly always taking the HSTR_EL2 trap. There
aren't many of these, but one example is the PMCR; if you look at the
access pseudocode for this register you can see that UNDEFs taken
because of the value of PMUSERENR.EN are checked before the HSTR_EL2
bit.
Rearrange helper_access_check_cp_reg() so that we always call the
accessfn, and use its return value if it indicates that the access
traps to EL0 rather than continuing to do the HSTR_EL2 check.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-6-peter.maydell@linaro.org
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20230127175507.
2895013-6-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:40 +0000 (18:24 +0000)]
target/arm: Move do_coproc_insn() syndrome calculation earlier
Rearrange the code in do_coproc_insn() so that we calculate the
syndrome value for a potential trap early; we're about to add a
second check that wants this value earlier than where it is currently
determined.
(Specifically, a trap to EL2 because of HSTR_EL2 should take
priority over an UNDEF to EL1, even when the UNDEF is because
the register does not exist at all or because its ri->access
bits non-configurably fail the access. So the check we put in
for HSTR_EL2 trapping at EL1 (which needs the syndrome) is
going to have to be done before the check "is the ARMCPRegInfo
pointer NULL".)
This commit is just code motion; the change to HSTR_EL2
handling that will use the 'syndrome' variable is in a
subsequent commit.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-5-peter.maydell@linaro.org
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20230127175507.
2895013-5-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:39 +0000 (18:24 +0000)]
target/arm: Remove CP_ACCESS_TRAP_UNCATEGORIZED_{EL2, EL3}
We added the CPAccessResult values CP_ACCESS_TRAP_UNCATEGORIZED_EL2
and CP_ACCESS_TRAP_UNCATEGORIZED_EL3 purely in order to use them in
the ats_access() function, but doing so was incorrect (a bug fixed in
a previous commit). There aren't any cases where we want an access
function to be able to request a trap to EL2 or EL3 with a zero
syndrome value, so remove these enum values.
As well as cleaning up dead code, the motivation here is that
we'd like to implement fine-grained-trap handling in
helper_access_check_cp_reg(). Although the fine-grained traps
to EL2 are always lower priority than trap-to-same-EL and
higher priority than trap-to-EL3, they are in the middle of
various other kinds of trap-to-EL2. Knowing that a trap-to-EL2
must always for us have the same syndrome (ie that an access
function will return CP_ACCESS_TRAP_EL2 and there is no other
kind of trap-to-EL2 enum value) means we don't have to try
to choose which of the two syndrome values to report if the
access would trap to EL2 both for the fine-grained-trap and
because the access function requires it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-4-peter.maydell@linaro.org
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20230127175507.
2895013-4-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:38 +0000 (18:24 +0000)]
target/arm: Correct syndrome for ATS12NSO* at Secure EL1
The AArch32 ATS12NSO* address translation operations are supposed to
trap to either EL2 or EL3 if they're executed at Secure EL1 (which
can only happen if EL3 is AArch64). We implement this, but we got
the syndrome value wrong: like other traps to EL2 or EL3 on an
AArch32 cpreg access, they should report the 0x3 syndrome, not the
0x0 'uncategorized' syndrome. This is clear in the access pseudocode
for these instructions.
Fix the syndrome value for these operations by correcting the
returned value from the ats_access() function.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-3-peter.maydell@linaro.org
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20230127175507.
2895013-3-peter.maydell@linaro.org
Peter Maydell [Mon, 30 Jan 2023 18:24:37 +0000 (18:24 +0000)]
target/arm: Name AT_S1E1RP and AT_S1E1WP cpregs correctly
The encodings 0,0,C7,C9,0 and 0,0,C7,C9,1 are AT SP1E1RP and AT
S1E1WP, but our ARMCPRegInfo definitions for them incorrectly name
them AT S1E1R and AT S1E1W (which are entirely different
instructions). Fix the names.
(This has no guest-visible effect as the names are for debug purposes
only.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Fuad Tabba <tabba@google.com>
Message-id:
20230130182459.
3309057-2-peter.maydell@linaro.org
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20230127175507.
2895013-2-peter.maydell@linaro.org
Marcin Juszkiewicz [Thu, 26 Jan 2023 11:44:16 +0000 (12:44 +0100)]
sbsa-ref: remove cortex-a76 from list of supported cpus
Cortex-A76 supports 40bits of address space. sbsa-ref's memory
starts above this limit.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20230126114416.
2447685-1-marcin.juszkiewicz@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Fri, 23 Dec 2022 09:01:07 +0000 (10:01 +0100)]
hw/arm/virt: Make accels in GIC finalize logic explicit
Let's explicitly list out all accelerators that we support when trying to
determine the supported set of GIC versions. KVM was already separate, so
the only missing one is HVF which simply reuses all of TCG's emulation
code and thus has the same compatibility matrix.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20221223090107.98888-3-agraf@csgraf.de
[PMM: Added qtest to the list of accelerators]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Fri, 23 Dec 2022 09:01:06 +0000 (10:01 +0100)]
hw/arm/virt: Consolidate GIC finalize logic
Up to now, the finalize_gic_version() code open coded what is essentially
a support bitmap match between host/emulation environment and desired
target GIC type.
This open coding leads to undesirable side effects. For example, a VM with
KVM and -smp 10 will automatically choose GICv3 while the same command
line with TCG will stay on GICv2 and fail the launch.
This patch combines the TCG and KVM matching code paths by making
everything a 2 pass process. First, we determine which GIC versions the
current environment is able to support, then we go through a single
state machine to determine which target GIC mode that means for us.
After this patch, the only user noticable changes should be consolidated
error messages as well as TCG -M virt supporting -smp > 8 automatically.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Message-id:
20221223090107.98888-2-agraf@csgraf.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Sat, 28 Jan 2023 22:44:59 +0000 (23:44 +0100)]
hvf: arm: Add support for GICv3
We currently only support GICv2 emulation. To also support GICv3, we will
need to pass a few system registers into their respective handler functions.
This patch adds support for HVF to call into the TCG callbacks for GICv3
system register handlers. This is safe because the GICv3 TCG code is generic
as long as we limit ourselves to EL0 and EL1 - which are the only modes
supported by HVF.
To make sure nobody trips over that, we also annotate callbacks that don't
work in HVF mode, such as EL state change hooks.
With GICv3 support in place, we can run with more than 8 vCPUs.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Message-id:
20230128224459.70676-1-agraf@csgraf.de
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Evgeny Iakovlev [Mon, 23 Jan 2023 16:23:03 +0000 (17:23 +0100)]
hw/char/pl011: better handling of FIFO flags on LCR reset
Current FIFO handling code does not reset RXFE/RXFF flags when guest
resets FIFO by writing to UARTLCR register, although internal FIFO state
is reset to 0 read count. Actual guest-visible flag update will happen
only on next data read or write attempt. As a result of that any guest
that expects RXFE flag to be set (and RXFF to be cleared) after resetting
FIFO will never see that happen.
Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
20230123162304.26254-5-eiakovlev@linux.microsoft.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Evgeny Iakovlev [Mon, 23 Jan 2023 16:23:02 +0000 (17:23 +0100)]
hw/char/pl011: implement a reset method
PL011 currently lacks a reset method. Implement it.
Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id:
20230123162304.26254-4-eiakovlev@linux.microsoft.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Evgeny Iakovlev [Mon, 23 Jan 2023 16:23:01 +0000 (17:23 +0100)]
hw/char/pl011: add post_load hook for backwards-compatibility
Previous change slightly modified the way we handle data writes when
FIFO is disabled. Previously we kept incrementing read_pos and were
storing data at that position, although we only have a
single-register-deep FIFO now. Then we changed it to always store data
at pos 0.
If guest disables FIFO and the proceeds to read data, it will work out
fine, because we still read from current read_pos before setting it to
0.
However, to make code less fragile, introduce a post_load hook for
PL011State and move fixup read FIFO state when FIFO is disabled. Since
we are introducing a post_load hook, also do some sanity checking on
untrusted incoming input state.
Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
Message-id:
20230123162304.26254-3-eiakovlev@linux.microsoft.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Evgeny Iakovlev [Mon, 23 Jan 2023 16:23:00 +0000 (17:23 +0100)]
hw/char/pl011: refactor FIFO depth handling code
PL011 can be in either of 2 modes depending guest config: FIFO and
single register. The last mode could be viewed as a 1-element-deep FIFO.
Current code open-codes a bunch of depth-dependent logic. Refactor FIFO
depth handling code to isolate calculating current FIFO depth.
One functional (albeit guest-invisible) side-effect of this change is
that previously we would always increment s->read_pos in UARTDR read
handler even if FIFO was disabled, now we are limiting read_pos to not
exceed FIFO depth (read_pos itself is reset to 0 if user disables FIFO).
Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id:
20230123162304.26254-2-eiakovlev@linux.microsoft.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Thu, 26 Jan 2023 23:31:34 +0000 (13:31 -1000)]
target/arm: Fix physical address resolution for Stage2
Conversion to probe_access_full missed applying the page offset.
Cc: qemu-stable@nongnu.org
Reported-by: Sid Manning <sidneym@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id:
20230126233134.103193-1-richard.henderson@linaro.org
Fixes:
f3639a64f602 ("target/arm: Use softmmu tlbs for page table walking")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Tue, 24 Jan 2023 23:20:59 +0000 (13:20 -1000)]
hw/arm: Use TYPE_ARM_SMMUV3
Use the macro instead of two explicit string literals.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id:
20230124232059.
4017615-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 3 Feb 2023 12:43:10 +0000 (12:43 +0000)]
Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging
Block layer patches
- qemu-img info: Show protocol-level information
- Move more functions to coroutines
- Make coroutine annotations ready for static analysis
- qemu-img: Fix exit code for errors closing the image
- qcow2 bitmaps: Fix theoretical corruption in error path
- pflash: Only load non-zero parts of backend image to save memory
- Code cleanup and test case improvements
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# gpg: Signature made Wed 01 Feb 2023 16:00:53 GMT
# gpg: using RSA key
DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6
# gpg: issuer "kwolf@redhat.com"
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full]
# Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6
* tag 'for-upstream' of https://repo.or.cz/qemu/kevin: (38 commits)
qemu-img: Change info key names for protocol nodes
qemu-img: Let info print block graph
iotests/106, 214, 308: Read only one size line
iotests: Filter child node information
block/qapi: Add indentation to bdrv_node_info_dump()
block/qapi: Introduce BlockGraphInfo
block/qapi: Let bdrv_query_image_info() recurse
qemu-img: Use BlockNodeInfo
block: Split BlockNodeInfo off of ImageInfo
block/vmdk: Change extent info type
block/file: Add file-specific image info
block: Improve empty format-specific info dump
block/nbd: Add missing <qemu/bswap.h> include
block: Rename bdrv_load/save_vmstate() to bdrv_co_load/save_vmstate()
block: Convert bdrv_debug_event() to co_wrapper_mixed
block: Convert bdrv_lock_medium() to co_wrapper
block: Convert bdrv_eject() to co_wrapper
block: Convert bdrv_get_info() to co_wrapper_mixed
block: Convert bdrv_get_allocated_file_size() to co_wrapper
block: use bdrv_co_refresh_total_sectors when possible
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 3 Feb 2023 09:30:45 +0000 (09:30 +0000)]
Merge tag 'pull-tcg-
20230123' of https://gitlab.com/rth7680/qemu into staging
common-user: Re-enable ppc32 host
tcg: Avoid recursion in tcg_gen_mulu2_i32
tcg: Mark tcg helpers noinline to avoid an issue with LTO
tcg/arm: Use register pair allocation for qemu_{ld,st}_i64
disas: Enable loongarch disassembler, and fixes
tcg/loongarch64: Improve move immediate
tcg/loongarch64: Improve add immediate
tcg/loongarch64: Improve setcond
tcg/loongarch64: Implement movcond
tcg/loongarch64: Use tcg_pcrel_diff in tcg_out_ldst
tcg/loongarch64: Reorg goto_tb implementation
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# gpg: Signature made Tue 24 Jan 2023 02:01:17 GMT
# gpg: using RSA key
7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-
20230123' of https://gitlab.com/rth7680/qemu:
tcg/loongarch64: Reorg goto_tb implementation
tcg/loongarch64: Use tcg_pcrel_diff in tcg_out_ldst
tcg/loongarch64: Implement movcond
tcg/loongarch64: Improve setcond expansion
tcg/loongarch64: Introduce tcg_out_addi
tcg/loongarch64: Update tcg-insn-defs.c.inc
tcg/loongarch64: Optimize immediate loading
target/loongarch: Disassemble pcadd* addresses
target/loongarch: Disassemble jirl properly
target/loongarch: Enable the disassembler for host tcg
tcg: Mark tcg helpers noinline to avoid an issue with LTO
linux-user: Implment host/ppc/host-signal.h
common-user/host/ppc: Implement safe-syscall.inc.S
tcg/arm: Use register pair allocation for qemu_{ld,st}_i64
tcg: Avoid recursion in tcg_gen_mulu2_i32
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 2 Feb 2023 18:00:40 +0000 (18:00 +0000)]
Merge tag 'pull-jan-omnibus-020223-1' of https://gitlab.com/stsquad/qemu into staging
Testing, docs, semihosting and plugin updates
- update playbooks for custom runners
- add section timing support to gitlab
- upgrade fedora images to 37
- purge perl from the build system and deps
- disable unstable tests in CI
- improve intro, emulation and semihosting docs
- semihosting bug fix and O_BINARY default
- add memory-sve test
- fix some races in qht
- improve plugin handling of memory helpers
- optimise plugin hooks
- fix some plugin deadlocks
- reduce win64-cross build time by dropping some targets
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# gpg: Signature made Thu 02 Feb 2023 15:59:52 GMT
# gpg: using RSA key
6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44
* tag 'pull-jan-omnibus-020223-1' of https://gitlab.com/stsquad/qemu: (36 commits)
gitlab: cut even more from cross-win64-system build
plugins: Iterate on cb_lists in qemu_plugin_user_exit
cpu-exec: assert that plugin_mem_cbs is NULL after execution
tcg: exclude non-memory effecting helpers from instrumentation
translator: always pair plugin_gen_insn_{start, end} calls
plugins: fix optimization in plugin_gen_disable_mem_helpers
plugins: make qemu_plugin_user_exit's locking order consistent with fork_start's
util/qht: use striped locks under TSAN
thread: de-const qemu_spin_destroy
util/qht: add missing atomic_set(hashes[i])
cpu: free cpu->tb_jmp_cache with RCU
tests/tcg: add memory-sve test for aarch64
semihosting: add O_BINARY flag in host_open for NT compatibility
semihosting: Write back semihosting data before completion callback
docs: add an introduction to the system docs
semihosting: add semihosting section to the docs
docs: add a new section to outline emulation support
docs: add hotlinks to about preface text
MAINTAINERS: Fix the entry for tests/tcg/nios2
gitlab: wrap up test results for custom runners
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Markus Armbruster [Fri, 20 Jan 2023 17:01:04 +0000 (18:01 +0100)]
MAINTAINERS: Cover tpm.c again
Commit
800d4deda0 "softmmu: move more files to softmmu/" (v5.2.0)
updated MAINTAINERS for all moved files but one. Fix that.
Fixes:
800d4deda04be016a95fbbf397c830a2d14ff9f6
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230120170104.359690-1-armbru@redhat.com>
Markus Armbruster [Thu, 19 Jan 2023 09:15:45 +0000 (10:15 +0100)]
MAINTAINERS: Cover include/sysemu/accel-blocker.h
Commit
bd688fc931 "accel: introduce accelerator blocker API" aded
include/sysemu/accel-blocker.h and accel/accel-blocker.c. MAINTAINERS
covers the latter in section "Guest CPU Cores (other accelerators) /
Overall", but not the former. Fix that.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230119091545.
3116376-3-armbru@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Markus Armbruster [Thu, 19 Jan 2023 09:15:44 +0000 (10:15 +0100)]
MAINTAINERS: Cover userfaultfd
Commit
0e9b5cd6b2 "migration: introduce UFFD-WP low-level interface
helpers" added util/userfaultfd.c without covering it in MAINTAINERS.
Add it to section "Migration".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230119091545.
3116376-2-armbru@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Peter Maydell [Thu, 2 Feb 2023 13:42:56 +0000 (13:42 +0000)]
Merge tag 'pull-request-2023-01-31' of https://gitlab.com/thuth/qemu into staging
* qtest improvements
* Remove the deprecated OTP config of sifive_u
* Add libfdt to some of our CI jobs that were still missing it
* Use __builtin_bswap() everywhere (all compiler versions support it now)
* Deprecate the HAXM accelerator
* Document PCI devices handling on s390x
* Make Audiodev introspectable
* Improve the runtime of some CI jobs
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# gpg: Signature made Tue 31 Jan 2023 10:05:10 GMT
# gpg: using RSA key
27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg: aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2023-01-31' of https://gitlab.com/thuth/qemu: (27 commits)
gitlab-ci.d/buildtest: Merge the --without-default-* jobs
tests/qtest/display-vga-test: Add proper checks if a device is available
gitlab-ci.d/buildtest: Remove ppc-softmmu from the clang-system job
qapi, audio: Make introspection reflect build configuration more closely
qapi, audio: add query-audiodev command
docs/s390x/pcidevices: document pci devices on s390x
tests/qtest/boot-serial-test: Constify tests[] array
tests/qtest/vnc-display-test: Disable on Darwin
tests/qtest/vnc-display-test: Use the 'none' machine
tests/qtest/vnc-display-test: Suppress build warnings on Windows
tests/tcg: Do not build/run TCG tests if TCG is disabled
docs/about/deprecated: Mark HAXM in QEMU as deprecated
MAINTAINERS: Abort HAXM maintenance
qemu/bswap: Use compiler __builtin_bswap() on NetBSD
qemu/bswap: Use compiler __builtin_bswap() on FreeBSD
qemu/bswap: Use compiler __builtin_bswap() on Haiku
qemu/bswap: Remove <byteswap.h> dependency
qemu/bswap: Replace bswapXXs() by compiler __builtin_bswap()
qemu/bswap: Replace bswapXX() by compiler __builtin_bswap()
tests/docker/dockerfiles: Add libfdt to the i386 and to the riscv64 container
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alex Bennée [Thu, 2 Feb 2023 13:25:27 +0000 (13:25 +0000)]
gitlab: cut even more from cross-win64-system build
This keeps hitting the time limits so cut even more from the list.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Richard Henderson [Tue, 24 Jan 2023 18:01:27 +0000 (18:01 +0000)]
plugins: Iterate on cb_lists in qemu_plugin_user_exit
Rather than iterate over all plugins for all events,
iterate over plugins that have registered a given event.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230117035701.168514-4-richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <
20230124180127.
1881110-36-alex.bennee@linaro.org>
Emilio Cota [Tue, 24 Jan 2023 18:01:26 +0000 (18:01 +0000)]
cpu-exec: assert that plugin_mem_cbs is NULL after execution
Fixes: #1381
Signed-off-by: Emilio Cota <cota@braap.org>
Message-Id: <
20230108165107.62488-1-cota@braap.org>
[AJB: manually applied follow-up fix]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230124180127.
1881110-35-alex.bennee@linaro.org>