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Adam Jackson [Thu, 10 Oct 2019 18:05:10 +0000 (14:05 -0400)]
gallium/xlib: Fix xmesa drawable creation
The first time you call glXMakeCurrent, current != ctx. As a result we
would never look up whether the drawable already had an XMesaDrawable,
and would instead always create one. Then XMesaBufferList would have two
different buffers for the same XID, and you'd be reading and drawing to
different places, and that's not what you want at all.
Instead just always look up the drawable.
Fixes:
db8be355 (gallium/xlib: Remove drawable caching from the MakeCurrent path)
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1196
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Eric Engestrom [Mon, 14 Oct 2019 22:53:15 +0000 (23:53 +0100)]
gitlab-ci: set a common job parent for test stage
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Eric Engestrom [Mon, 14 Oct 2019 22:52:58 +0000 (23:52 +0100)]
gitlab-ci: set a common job parent for build stage
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Eric Engestrom [Mon, 14 Oct 2019 22:04:14 +0000 (23:04 +0100)]
gitlab-ci: set a common job parent for container stage
While at it, rename to singular "container" for consistency.
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Samuel Pitoiset [Tue, 15 Oct 2019 12:40:51 +0000 (14:40 +0200)]
Revert "radv: do not emit PKT3_CONTEXT_CONTROL with AMDGPU 3.6.0+"
This reverts commit
2ca8629fa9b303e24783b76a7b3b0c2513e32fbd.
This was initially ported from RadeonSI, but in the meantime it has
been reverted because it might hang. Be conservative and re-introduce
this packet emission.
Unfortunately this doesn't fix anything known.
Cc: 19.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Jonathan Marek [Mon, 14 Oct 2019 21:15:56 +0000 (17:15 -0400)]
spirv: set correct dest_type for texture query ops
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Jonathan Marek [Mon, 7 Oct 2019 01:42:27 +0000 (21:42 -0400)]
turnip: more descriptor sets
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 14 Oct 2019 15:09:27 +0000 (11:09 -0400)]
turnip: push constants
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 14 Oct 2019 15:28:31 +0000 (11:28 -0400)]
turnip: depth/stencil
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 14 Oct 2019 16:46:37 +0000 (12:46 -0400)]
turnip: basic msaa working
Not perfect but gets through some tests.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Sat, 5 Oct 2019 16:38:40 +0000 (12:38 -0400)]
turnip: improve CmdCopyImage and implement CmdBlitImage
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 7 Oct 2019 02:26:49 +0000 (22:26 -0400)]
turnip: use nir_assign_io_var_locations instead of nir_assign_var_locations
Variables with same location should use the same driver_location.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 7 Oct 2019 02:25:59 +0000 (22:25 -0400)]
turnip: add missing nir passes
Avoids assert fails in ir3.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 7 Oct 2019 01:40:19 +0000 (21:40 -0400)]
turnip: add code to lower indirect samplers
Taken from nir_lower_samplers. Sampler arrays don't work though, this is
just to avoid an assert fail in ir3.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 7 Oct 2019 01:07:57 +0000 (21:07 -0400)]
turnip: fixup consts
Fix some mistakes in previous series.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 7 Oct 2019 01:05:47 +0000 (21:05 -0400)]
turnip: update some shader state bits from GL driver
Notably includes centroid varying bits that were missing.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Mon, 30 Sep 2019 18:04:38 +0000 (11:04 -0700)]
turnip: Emit clears of gmem using linear.
This is what we do in freedreno.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Mon, 14 Oct 2019 16:33:42 +0000 (12:33 -0400)]
turnip: Set up the correct tiling mode for small attachments.
Noticed while debugging a tiling-looking issue by comparing our gmem
blit setup to freedreno's.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Fri, 27 Sep 2019 23:04:30 +0000 (16:04 -0700)]
turnip: Tell spirv_to_nir that we want fragcoord as a sysval.
Fixes ir3 compiler failure failure in
dEQP-VK.renderpass.dedicated_allocation.formats.r8g8b8a8_unorm.clear.clear_draw
(now just a rendering failure where the subpass clear isn't happening)
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Fri, 27 Sep 2019 22:24:00 +0000 (15:24 -0700)]
turnip: Fill in clear color packing for r10g11b11 and rgb9e5.
Fixes assertion failures in
dEQP-VK.api.image_clearing.core.clear_color_image.2d.* for these
formats, though the test set as a whole is stil failing.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Fri, 27 Sep 2019 22:20:16 +0000 (15:20 -0700)]
turnip: Drop unused tu_pack_clear_value() return.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Sat, 5 Oct 2019 16:39:13 +0000 (12:39 -0400)]
turnip: add anisotropy and compressed formats to device features
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Fri, 4 Oct 2019 19:57:28 +0000 (15:57 -0400)]
turnip: disable tiling as necessary
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Fri, 4 Oct 2019 19:56:32 +0000 (15:56 -0400)]
turnip: update setup_slices
Deal with tiled r8g8 having different alignment and other updates taken
from fd6_resource. Additionally track image samples/cpp.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Sat, 5 Oct 2019 16:41:48 +0000 (12:41 -0400)]
turnip: add VK_KHR_sampler_mirror_clamp_to_edge
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Sat, 5 Oct 2019 16:40:18 +0000 (12:40 -0400)]
turnip: add black border color
Avoids hangs and some texture tests are happy with just this.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Sat, 5 Oct 2019 16:29:01 +0000 (12:29 -0400)]
turnip: improve sampler descriptor
Fixes anisotropy and shadow texture
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Sat, 5 Oct 2019 16:24:29 +0000 (12:24 -0400)]
turnip: improve view descriptor
Changes to make compressed, tiled, 3d, etc textures work
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Sat, 5 Oct 2019 16:13:29 +0000 (12:13 -0400)]
turnip: add more 2d_ifmt translations
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Sat, 5 Oct 2019 16:12:47 +0000 (12:12 -0400)]
turnip: format table fixes
* Fix R16G16 SCALED and R16G16B16A16 SCALED having texture format
* Fix B5G6R5 swap value
* Use R8_UINT instead of R8_UNORM for S8_UINT rb format
* Disable 96-bit texture formats instead having a check for NPOT formats
* Don't fail assert on D24X8 format
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Sat, 5 Oct 2019 16:05:52 +0000 (12:05 -0400)]
turnip: add format_is_uint/format_is_sint
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Sat, 5 Oct 2019 16:04:48 +0000 (12:04 -0400)]
turnip: add astc format layout
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 14 Oct 2019 15:41:08 +0000 (11:41 -0400)]
turnip: fix assert failing for 0 color attachments
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 14 Oct 2019 15:25:11 +0000 (11:25 -0400)]
turnip: fix segmentation fault with compute pipeline
Not supported, so always set pointer to NULL
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 14 Oct 2019 15:24:27 +0000 (11:24 -0400)]
turnip: fix segmentation fault in events
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 14 Oct 2019 15:16:02 +0000 (11:16 -0400)]
turnip: fix 32 vertex attributes case
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Mon, 14 Oct 2019 15:15:05 +0000 (11:15 -0400)]
turnip: fix triangle strip
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Jonathan Marek [Sat, 5 Oct 2019 16:52:54 +0000 (12:52 -0400)]
freedreno/regs: update a6xx 2d blit bits
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Samuel Pitoiset [Tue, 15 Oct 2019 08:29:46 +0000 (10:29 +0200)]
radv: rename VK_KHR_shader_float16_int8 structs/constants
Trivial change.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Iago Toral [Tue, 15 Oct 2019 06:56:45 +0000 (06:56 +0000)]
v3d: drop unused shader_rec_count member from context
Looks like this was copied from the vc4 driver where it is actually
included in the submit CL ioctl.
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Mon, 14 Oct 2019 15:42:12 +0000 (11:42 -0400)]
freedreno/ir3: implement fquantize2f16
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robclark@gmail.com>
Jonathan Marek [Mon, 7 Oct 2019 20:21:52 +0000 (16:21 -0400)]
freedreno/ir3: implement texop_texture_samples
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robclark@gmail.com>
Jonathan Marek [Mon, 7 Oct 2019 20:21:09 +0000 (16:21 -0400)]
freedreno/ir3: fix GETLOD for negative LODs
Note: for output type U32, negative LOD is not sign extended from 16 bits
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robclark@gmail.com>
Jonathan Marek [Mon, 7 Oct 2019 01:00:11 +0000 (21:00 -0400)]
freedreno/ir3: implement fdd{x,y}_coarse opcodes
Same as regular fddx/fddy.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robclark@gmail.com>
Jonathan Marek [Mon, 7 Oct 2019 00:55:11 +0000 (20:55 -0400)]
freedreno/ir3: increase size of inputs/outputs arrays
Makes it possible to support 32 varyings.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robclark@gmail.com>
Jonathan Marek [Mon, 7 Oct 2019 00:53:41 +0000 (20:53 -0400)]
freedreno/ir3: remove input ncomp field
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robclark@gmail.com>
Lucas Stach [Mon, 16 Sep 2019 12:37:01 +0000 (14:37 +0200)]
etnaviv: fix vertex buffer state emission for single stream GPUs
GPUs with a single supported vertex stream must use the single state
address to program the stream.
Fixes:
3d09bb390a39 (etnaviv: GC7000: State changes for HALTI3..5)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Dave Airlie [Tue, 30 Jul 2019 22:23:29 +0000 (08:23 +1000)]
gallivm/draw/swr: make the gs_iface not depend on tgsi.
This gs_iface doesn't seem to require a dependence on the tgsi
context, except for the swr end prim code.
This refactors the API to include all the info that the swr
code needs in the interface rather than having to dig it out of
the struct inheritance.
This is a precursor to adding NIR support to llvmpipe.
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Kenneth Graunke [Mon, 14 Oct 2019 08:20:20 +0000 (01:20 -0700)]
iris: Implement the Gen < 9 tessellation quads workaround
Fixes several CTS tests:
- KHR-GL46.tessellation_shader.vertex.vertex_spacing
- KHR-GL46.tessellation_shader.tessellation_shader_point_mode.points_verification
Fixes:
823609b1a39 ("iris/WIP: add broadwell support")
Caio Marcelo de Oliveira Filho [Fri, 17 May 2019 17:38:04 +0000 (10:38 -0700)]
anv: Advertise VK_KHR_spirv_1_4
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Caio Marcelo de Oliveira Filho [Mon, 14 Oct 2019 15:14:25 +0000 (08:14 -0700)]
vulkan: Update the XML and headers to 1.1.125
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Mauro Rossi [Sun, 13 Oct 2019 22:35:37 +0000 (00:35 +0200)]
android: amd/common: export amd/llvm headers
Fixes the following building error:
external/mesa/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c:42:10:
fatal error: 'ac_llvm_util.h' file not found
^~~~~~~~~~~~~~~~
1 error generated.
Fixes:
3a08110 ("amd: Move all amd/common code that depends on LLVM to amd/llvm.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
James Xiong [Mon, 14 Oct 2019 08:05:46 +0000 (10:05 +0200)]
gallium: rename PIPE_CAP_MAX_FRAMES_IN_FLIGHT to PIPE_CAP_THROTTLE
v2: [ Michel Dänzer ]
* Update src/gallium/docs/source/screen.rst accordingly
Signed-off-by: James Xiong <james.xiong@intel.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> # v1
Reviewed-by: Marek Olšák <marek.olsak@amd.com> # v1
James Xiong [Mon, 14 Oct 2019 08:05:40 +0000 (10:05 +0200)]
gallium: simplify throttle implementation
All gallium drivers currently set MAX_FRAME_IN_FLIGHT to either 1
or 0, which means that the drivers either throttle on the previous
render or don't throttle, the current implementation is more
complicated than necessary and can be simplified.
Signed-off-by: James Xiong <james.xiong@intel.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Fri, 11 Oct 2019 15:40:59 +0000 (17:40 +0200)]
radv: fix DCC fast clear code for intensity formats
This fixes a rendering issue with DiRT 4 on GFX10. Only GFX10 was
affected because intensity formats are different.
Cc: 19.2 <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1923
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Eric Engestrom [Sun, 1 Sep 2019 16:42:23 +0000 (17:42 +0100)]
gbm: use size_t for array indexes
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Eric Engestrom [Sun, 1 Sep 2019 16:41:19 +0000 (17:41 +0100)]
gbm: replace NULL sentinel with explicit ARRAY_SIZE()
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Eric Engestrom [Sun, 1 Sep 2019 16:39:55 +0000 (17:39 +0100)]
gbm: replace 1/0 bool with true/false
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Eric Engestrom [Sun, 1 Sep 2019 16:30:32 +0000 (17:30 +0100)]
gbm: turn 0/-1 bool into true/false
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Eric Engestrom [Thu, 11 Oct 2018 14:19:04 +0000 (15:19 +0100)]
radv: add exported symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Eric Engestrom [Thu, 11 Oct 2018 14:19:13 +0000 (15:19 +0100)]
anv: add exported symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Eric Engestrom [Sat, 3 Aug 2019 23:27:05 +0000 (00:27 +0100)]
symbols-check: ignore exported C++ symbols
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Boris Brezillon [Wed, 9 Oct 2019 12:05:18 +0000 (14:05 +0200)]
panfrost: Fix support for packed 24-bit formats
pan_pack_color() color was missing the 24-bit packed format case.
Looks like putting the clear color in a 32-bit slot does the trick.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Timothy Arceri [Fri, 11 Oct 2019 05:23:48 +0000 (16:23 +1100)]
glsl: fix crash compiling bindless samplers inside unnamed UBOs
The check to see if we were dealing with a buffer block was
too late and only worked for named UBOs.
Fixes:
f32b01ca435c "glsl/linker: remove ubo explicit binding handling"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1900
Neil Roberts [Fri, 11 Oct 2019 16:06:34 +0000 (18:06 +0200)]
glsl/builtin: Add alternate versions of atan using new ops
Adds alternate versions of the atan builtin functions that use
ir_unop_atan and ir_binop_atan2 instead of inlining to the IR
implementation of the function. These alternatives are selected if the
IR is going to be consumed by NIR. In that case the IR ops will be
translated to the appropriate NIR op.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Neil Roberts [Fri, 11 Oct 2019 14:02:25 +0000 (16:02 +0200)]
glsl: Add opcodes for atan and atan2
Adds ir_binop_atan2 and ir_unop_atan. When converting to NIR these are
expanded out using the appropriate builtin generator. If they are used
with anything else then it will just hit an assert.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Neil Roberts [Fri, 11 Oct 2019 14:01:30 +0000 (16:01 +0200)]
nir/builtin: Add extern "C" guards to nir_builtin_builder.h
That way it can also be included from a C++ source.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Neil Roberts [Fri, 11 Oct 2019 13:57:29 +0000 (15:57 +0200)]
nir/builtin: Add #include u_math.h to the header
The inline functions use M_PI so they should include a header to make
sure it is defined.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Neil Roberts [Fri, 11 Oct 2019 13:43:47 +0000 (15:43 +0200)]
nir/builder: Move nir_atan and nir_atan2 from SPIR-V translator
Moves build_atan and build_atan2 into nir_builtin_builder. The goal is
to be able to use this from the GLSL translator too.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Hal Gentz [Fri, 11 Oct 2019 00:35:50 +0000 (18:35 -0600)]
egl: Configs w/o double buffering support have no `EGL_WINDOW_BIT`.
When users pass a config to `eglCreateWindowSurface` it requests double
buffering, but if the config doesn't have the appropriate `__DRIconfig`,
`eglCreateWindowSurface` fails with a `EGL_BAD_MATCH`.
Given that such behaviour is completely unacceptable, we drop the
`EGL_WINDOW_BIT` if we don't have at least one `__DRIconfig` supporting double
buffering, otherwise dropping the `EGL_PIXMAP_BIT`.
Fixes:
049f343e8ac "egl: Allow 24-bit visuals for 32-bit RGBA8888 configs"
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67676
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Hal Gentz <zegentzy@protonmail.com>
Hal Gentz [Fri, 11 Oct 2019 00:35:50 +0000 (18:35 -0600)]
egl: Puts RGBA visuals in the second config selection group.
That way applications don't get windows that are compositor alpha-blended
accidentally.
In the ideal world, this would be done by the xserver, as it does for
GLX, however, an appropriate place could not be found, so it's being
placed here instead.
Fixes:
049f343e8ac "egl: Allow 24-bit visuals for 32-bit RGBA8888 configs"
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67676
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Hal Gentz <zegentzy@protonmail.com>
Hal Gentz [Fri, 11 Oct 2019 00:35:50 +0000 (18:35 -0600)]
egl: Fixes transparency with EGL and X11.
This commit does this by allowing both RGB and RGBA visuals to match with
EGL configs. We also expose the `EGL_MESA_config_select_group` egl
extension, which is similar to GLX's visual select group extension, to
allow the RGBA visuals to get less priority.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67676
Fixes:
049f343e8ac "egl: Allow 24-bit visuals for 32-bit RGBA8888 configs"
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Hal Gentz <zegentzy@protonmail.com>
Hal Gentz [Fri, 11 Oct 2019 00:35:50 +0000 (18:35 -0600)]
egl: Add EGL_CONFIG_SELECT_GROUP_MESA ext.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67676
Fixes:
049f343e8ac "egl: Allow 24-bit visuals for 32-bit RGBA8888 configs"
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Hal Gentz <zegentzy@protonmail.com>
Kenneth Graunke [Fri, 3 May 2019 23:39:18 +0000 (16:39 -0700)]
intel/fs/gen12: Use TCS 8_PATCH mode.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Jason Ekstrand [Tue, 12 Jun 2018 06:21:57 +0000 (23:21 -0700)]
intel/fs/gen12: Implement gl_FrontFacing on gen12+.
The bit moved on gen12 in order to prepare for dual-SIMD8 dispatch.
This implementation isn't an entirely complete as it only works on SIMD8
and SIMD16 and not dual-SIMD8.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Sat, 28 Sep 2019 02:13:11 +0000 (19:13 -0700)]
intel/fs/gen11+: Fix CS_OPCODE_CS_TERMINATE codegen.
Apparently the ts_request_type and ts_resource_select thread spawner
message descriptor bits were removed from the hardware at least since
ICL. Drop them in order to avoid assertion failures on Gen12+
platforms which don't have any encoding for this. On Gen9+ these are
probably just ignored by the hardware, so this is unlikely to have had
any functional implications prior to Gen12.
v2: Mark TS message fields as non-existing in brw_inst.h on ICL. (Caio)
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Francisco Jerez [Wed, 4 Sep 2019 00:31:37 +0000 (17:31 -0700)]
intel/fs/gen12: Fix barrier codegen.
The WAIT instruction has been removed, but SYNC.bar can be used
instead to wait for a notification on n0.0.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 4 Sep 2019 00:29:11 +0000 (17:29 -0700)]
intel/eu: Don't set notify descriptor field of gateway barrier message.
Apparently this field was removed on SKL, and according to the
hardware docs for previous platforms "This field is only valid for a
ForwardMsg message. It is ignored for other messages. The BarrierMsg
message always increments the N0 notification counter".
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 22 Aug 2019 23:16:26 +0000 (16:16 -0700)]
intel/ir/gen12: Update assert in brw_stage_has_packed_dispatch().
Confirmed no regressions after a full Piglit run on TGL with the
brw_fs_test_dispatch_packing() test enabled.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 18 Apr 2018 00:12:05 +0000 (17:12 -0700)]
intel/eu/validate/gen12: Don't blow up on indirect src0.
They look like a NULL source if you don't look at the address mode.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 6 Feb 2019 05:54:38 +0000 (21:54 -0800)]
intel/eu/validate/gen12: Validation fixes for SEND instruction.
The following fix-up by Jordan Justen is squashed in:
intel/eu/validate: gen12 send instruction doesn't have a dst type field
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 6 Feb 2019 05:54:54 +0000 (21:54 -0800)]
intel/eu/validate/gen12: Fix validation of SYNC instruction.
src0 will typically be null for this instruction.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 7 Dec 2018 22:09:25 +0000 (14:09 -0800)]
intel/eu/validate/gen12: Implement integer multiply restrictions in EU validator.
Due to hardware bug filed as HSDES#
1604601757.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Jordan Justen [Wed, 13 Dec 2017 03:01:44 +0000 (19:01 -0800)]
intel/ir: Lower fpow on Gen12.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 7 Dec 2018 22:13:53 +0000 (14:13 -0800)]
intel/fs/gen12: Don't support source mods for 32x16 integer multiply.
Due to hardware bug filed as HSDES#
1604601757.
v2: Only return if result of fs_inst::can_do_source_mods() is known to
be false for the case new orthogonal restrictions are implemented
below in the future. (Caio)
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Francisco Jerez [Wed, 28 Aug 2019 05:02:49 +0000 (22:02 -0700)]
intel/disasm: Disassemble register file of split SEND sources.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 28 Aug 2019 05:02:19 +0000 (22:02 -0700)]
intel/disasm: Don't disassemble saturate control on SEND instructions.
The field is gone on Gen12+ and it was illegal on previous
generations.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 28 Aug 2019 04:52:51 +0000 (21:52 -0700)]
intel/disasm/gen12: Disassemble Gen12 SEND instructions.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Sat, 27 Apr 2019 00:08:25 +0000 (17:08 -0700)]
intel/disasm/gen12: Disassemble Gen12 SYNC instruction.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 9 Nov 2018 22:13:37 +0000 (14:13 -0800)]
intel/disasm/gen12: Disassemble three-source instruction source and destination regions.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 9 Nov 2018 22:13:38 +0000 (14:13 -0800)]
intel/disasm/gen12: Fix disassembly of some common instruction controls.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 9 Nov 2018 22:13:38 +0000 (14:13 -0800)]
intel/disasm/gen12: Disassemble software scoreboard information.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Francisco Jerez [Thu, 10 Oct 2019 01:47:29 +0000 (18:47 -0700)]
intel/fs/gen12: Demodernize software scoreboard lowering pass.
Kept as a separate commit in order to avoid distracting reviewers of
the software scoreboard pass with memory management boilerplate.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Francisco Jerez [Fri, 9 Nov 2018 22:13:37 +0000 (14:13 -0800)]
intel/fs/gen12: Introduce software scoreboard lowering pass.
Gen12+ hardware lacks the register scoreboard logic that used to
guarantee data coherency between register reads and writes in previous
generations. This lowering pass runs after register allocation in
order to make up for it.
It works by performing global dataflow analysis in order to determine
the set of potential dependencies of every instruction in the shader,
and then inserts any required SWSB annotations and additional SYNC
instructions in order to guarantee data coherency.
v2: Drop unnecessary _safe list iteration (Caio).
v3: Temporarily workaround potential WaR hazard between FPU
instruction and subsequent out-of-order write, pending
clarification from the hardware team. Drop redundant tracking of
implicit access of acc0-1, since the hardware guarantees coherency
of these (but not the other accumulators...).
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Francisco Jerez [Fri, 9 Nov 2018 22:13:37 +0000 (14:13 -0800)]
intel/fs/gen12: Add scheduling information to the IR.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Francisco Jerez [Fri, 27 Sep 2019 06:38:24 +0000 (23:38 -0700)]
intel/eu/gen12: Set SWSB annotations in hand-crafted assembly.
Reviewers are encouraged to audit the code generation pass
independently for the case I missed some potential data hazard or new
code has been added in the meantime.
v2: Add SYNC instruction to cr0 workaround in brw_float_controls_mode().
v3: Drop likely redundant (and potentially harmful) RegDist SWSB
annotation from ce0 read in brw_find_live_channel() (Caio).
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Francisco Jerez [Fri, 9 Nov 2018 22:13:36 +0000 (14:13 -0800)]
intel/eu/gen12: Add tracking of default SWSB state to the current brw_codegen instruction.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Francisco Jerez [Fri, 9 Nov 2018 22:13:36 +0000 (14:13 -0800)]
intel/eu/gen12: Add auxiliary type to represent SWSB information during codegen.
v2: Introduce extra tgl_swsb_sbid() constructor (Caio).
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Francisco Jerez [Wed, 4 Sep 2019 00:51:17 +0000 (17:51 -0700)]
intel/fs/gen12: Add codegen support for the SYNC instruction.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 6 Feb 2019 04:53:06 +0000 (20:53 -0800)]
intel/ir/gen12: Add SYNC hardware instruction.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>