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8 years agoRevert "Refactor the PassManagerBuilder: extract a "addFunctionSimplificationPasses()""
Mehdi Amini [Thu, 11 Feb 2016 22:09:11 +0000 (22:09 +0000)]
Revert "Refactor the PassManagerBuilder: extract a "addFunctionSimplificationPasses()""

This reverts commit r260603.
I didn't intend to push it :(

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260607 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "Define the ThinLTO Pipeline"
Mehdi Amini [Thu, 11 Feb 2016 22:09:07 +0000 (22:09 +0000)]
Revert "Define the ThinLTO Pipeline"

This reverts commit r260604.
I didn't intend to push this now.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260606 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "Add a new insert_as() method to DenseMap and use it for ConstantUniqueMap"
Mehdi Amini [Thu, 11 Feb 2016 22:00:36 +0000 (22:00 +0000)]
Revert "Add a new insert_as() method to DenseMap and use it for ConstantUniqueMap"

This reverts commit r260458.

It was backported on an internal branch and broke stage2 build. Since
this can lead to weird random crash I'm reverting upstream as well
while investigating.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260605 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDefine the ThinLTO Pipeline
Mehdi Amini [Thu, 11 Feb 2016 22:00:31 +0000 (22:00 +0000)]
Define the ThinLTO Pipeline

Summary:
On the contrary to Full LTO, ThinLTO can afford to shift compile time
from the frontend to the linker: both phases are parallel.
This pipeline is based on the proposal in D13443 for full LTO. We ]
didn't move forward on this proposal because the link was far too long
after that.

This patch refactor the "function simplification" passes that are part
of the inliner loop in a helper function (this part is NFC and can be
commited separately to simplify the diff). The ThinLTO pipeline
integrates in the regular O2/O3 flow:

 - The compile phase perform the inliner with a somehow lighter
   function simplification. (TODO: tune the inliner thresholds here)
   This is intendend to simplify the IR and get rid of obvious things
   like linkonce_odr that will be inlined.
 - The link phase will run the pipeline from the start, extended with
   some specific passes that leverage the augmented knowledge we have
   during LTO. Especially after the inliner is done, a sequence of
   globalDCE/globalOpt is performed, followed by another run of the
   "function simplification" passes.

The measurements on the public test suite as well as on our internal
suite show an overall net improvement. The binary size for the clang
executable is reduced by 5%. We're still tuning it with the bringup
of ThinLTO but this should provide a good starting point.

Reviewers: tejohnson

Subscribers: joker.eph, llvm-commits, dexonsmith

Differential Revision: http://reviews.llvm.org/D17115

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260604 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRefactor the PassManagerBuilder: extract a "addFunctionSimplificationPasses()"
Mehdi Amini [Thu, 11 Feb 2016 22:00:25 +0000 (22:00 +0000)]
Refactor the PassManagerBuilder: extract a "addFunctionSimplificationPasses()"

It is intended to contains the passes run over a function after the
inliner is done with a function and before it moves to its callers.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260603 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IRTranslator] Use a single virtual register to represent any Value.
Quentin Colombet [Thu, 11 Feb 2016 21:48:32 +0000 (21:48 +0000)]
[IRTranslator] Use a single virtual register to represent any Value.
PR26161.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260602 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Implements the lowering of formal arguments for GlobalISel.
Quentin Colombet [Thu, 11 Feb 2016 21:45:08 +0000 (21:45 +0000)]
[AArch64] Implements the lowering of formal arguments for GlobalISel.
This is just a trivial implementation:
- Support only arguments passed in registers.
- Support only "plain" arguments, i.e., no sext/zext attribute.

At this point, it is possible to play with the IRTranslator on AArch64:
llc -mtriple arm64-<vendor>-<os> -print-machineinstrs <input.ll> -o - -global-isel

For now, we only support the translation of program with adds and returns.

Follow-up patches are on their way to add a test case (the MIRParser is
not ready as it is).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260600 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/SI: Make sure MIMG descriptors and samplers stay in SGPRs
Tom Stellard [Thu, 11 Feb 2016 21:45:07 +0000 (21:45 +0000)]
AMDGPU/SI: Make sure MIMG descriptors and samplers stay in SGPRs

Summary:
It's possible to have resource descriptors and samplers stored in
VGPRs, either by a VMEM instruction or in the case of samplers,
floating-point calculations.  When this happens, we need to use
v_readfirstlane to copy these values back to sgprs.

Reviewers: mareko, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D17102

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260599 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd support for phi nodes in the LLVM C API test
Amaury Sechet [Thu, 11 Feb 2016 21:37:54 +0000 (21:37 +0000)]
Add support for phi nodes in the LLVM C API test

Summary: This required to add binding to Instruction::removeFromParent so that instruction can be forward declared and then moved at the right place.

Reviewers: bogner, chandlerc, echristo, dblaikie, joker.eph, Wallbraker

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17057

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260597 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel][MachineIRBuilder] Fix comments.
Quentin Colombet [Thu, 11 Feb 2016 21:21:40 +0000 (21:21 +0000)]
[GlobalISel][MachineIRBuilder] Fix comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260594 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel] Make the getter for MBB in MachneIRBuilder public.
Quentin Colombet [Thu, 11 Feb 2016 21:20:35 +0000 (21:20 +0000)]
[GlobalISel] Make the getter for MBB in MachneIRBuilder public.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260593 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Target] Add a helper function to check if an opcode is invalid after isel.
Quentin Colombet [Thu, 11 Feb 2016 21:16:56 +0000 (21:16 +0000)]
[Target] Add a helper function to check if an opcode is invalid after isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260590 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/SI: When splitting SMRD instructions, add its users to VALU worklist
Tom Stellard [Thu, 11 Feb 2016 21:14:34 +0000 (21:14 +0000)]
AMDGPU/SI: When splitting SMRD instructions, add its users to VALU worklist

Summary:
When we split SMRD instructions into two MUBUFs we were adding the users
of the newly created MUBUFs to the VALU worklist.  However, the only
users these instructions had was the REG_SEQUENCE that was inserted
by splitSMRD when the original SMRD instruction was split.

We need to make sure to add the users of the original SMRD to the VALU
worklist before it is split.

I have a test case, but it requires one other bug fix, so it will be
added in a later commt.

Reviewers: mareko, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D17101

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260588 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSet load alignment on aggregate loads.
Pete Cooper [Thu, 11 Feb 2016 21:10:40 +0000 (21:10 +0000)]
Set load alignment on aggregate loads.

When optimizing a extractvalue(load), we generate a load from the
aggregate type.  This load didn't have alignment set and so would
get the alignment of the type.  This breaks when the type is packed
and so the alignment should be lower.

For example, loading { int, int } would give us alignment of 4, but
the original load from this type may have an alignment of 1 if packed.

Reviewed by David Majnemer

Differential revision: http://reviews.llvm.org/D17158

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260587 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "LiveIntervalAnalysis: Support moving of subregister defs in handleMove"
Matthias Braun [Thu, 11 Feb 2016 21:07:44 +0000 (21:07 +0000)]
Revert "LiveIntervalAnalysis: Support moving of subregister defs in handleMove"

This is broke a bot:

http://lab.llvm.org:8011/builders/clang-cmake-aarch64-quick/builds/4703/steps/test-suite/logs/test.log

Reverting while I investigate.

This reverts commit r260565.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260586 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Reformat WebAssemblyFrameLowering and WebAssemblyISelLowering
Derek Schuff [Thu, 11 Feb 2016 20:57:09 +0000 (20:57 +0000)]
[WebAssembly] Reformat WebAssemblyFrameLowering and WebAssemblyISelLowering

Reviewers: sunfish, jfb

Subscribers: jfb, dschuff

Differential Revision: http://reviews.llvm.org/D17156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260585 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SelectionDAG] change getConstant() to use the input SDLoc when building splat vectors
Sanjay Patel [Thu, 11 Feb 2016 20:21:24 +0000 (20:21 +0000)]
[SelectionDAG] change getConstant() to use the input SDLoc when building splat vectors

The code change is simple enough: instead of attaching an anonymous SDLoc to splatted
vector constants, use the scalar constant's existing SDLoc since that is what is passed
into getConstant() as a param. But this changes instruction scheduling, so I'll explain
why that happens.

The motivation for this patch starts near:
http://reviews.llvm.org/rL258833
...x86's getZeroVector() could be similarly cleaned up and I thought it would be 'NFC'.
But when I made that change locally, several x86 codegen tests wiggled.

It turns out that the lack of SDLoc consistency in getConstant() changes the way
ScheduleDAGRRList behaves. This is because the SDLoc contains 'IROrder' and some DAG
scheduler algorithms use IROrder for tie-breaking.

Differential Revision: http://reviews.llvm.org/D16972

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260582 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel] Add the necessary plumbing to lower formal arguments.
Quentin Colombet [Thu, 11 Feb 2016 19:59:41 +0000 (19:59 +0000)]
[GlobalISel] Add the necessary plumbing to lower formal arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260579 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDwarfDebug: emit type units immediately.
Peter Collingbourne [Thu, 11 Feb 2016 19:57:46 +0000 (19:57 +0000)]
DwarfDebug: emit type units immediately.

Rather than storing type units in a vector and emitting them at the end
of code generation, emit them immediately and destroy them, reclaiming the
memory we were using for their DIEs.

In one benchmark carried out against Chromium's 50 largest (by bitcode
file size) translation units, total peak memory consumption with type units
decreased by median 17%, or by 7% when compared against disabling type units.

Tested using check-{llvm,clang}, the GDB 7.5 test suite (with
'-fdebug-types-section') and by eyeballing llvm-dwarfdump output on those
Chromium translation units with split DWARF both disabled and enabled, and
verifying that the only changes were to addresses and abbreviation ordering.

Differential Revision: http://reviews.llvm.org/D17118

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260578 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUse copy initialization.
Rafael Espindola [Thu, 11 Feb 2016 19:54:18 +0000 (19:54 +0000)]
Use copy initialization.

We can do it since getMemBuffer returns a unique_ptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260576 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Trivial implementation of lower return for the IRTranslator.
Quentin Colombet [Thu, 11 Feb 2016 19:45:27 +0000 (19:45 +0000)]
[AArch64] Trivial implementation of lower return for the IRTranslator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260574 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[codeview] Add test intended for r260571
Reid Kleckner [Thu, 11 Feb 2016 19:44:26 +0000 (19:44 +0000)]
[codeview] Add test intended for r260571

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260573 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86] New pass to change byte and word instructions to zero-extending versions.
Kevin B. Smith [Thu, 11 Feb 2016 19:43:04 +0000 (19:43 +0000)]
[X86] New pass to change byte and word instructions to zero-extending versions.
Differential Revision: http://reviews.llvm.org/D17032

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260572 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[codeview] Fix bug around multi-level wrapper inlining
Reid Kleckner [Thu, 11 Feb 2016 19:41:47 +0000 (19:41 +0000)]
[codeview] Fix bug around multi-level wrapper inlining

If there were wrapper functions with no instructions of their own in the
inlining tree, we would fail to emit InlineSite records for them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260571 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Plug the beginning of the GlobalISel pipeline.
Quentin Colombet [Thu, 11 Feb 2016 19:35:06 +0000 (19:35 +0000)]
[AArch64] Plug the beginning of the GlobalISel pipeline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260569 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoPlay nice with Visual Studio and attributes
Quentin Colombet [Thu, 11 Feb 2016 19:33:21 +0000 (19:33 +0000)]
Play nice with Visual Studio and attributes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260568 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CMake] Produce an empty library for GlobalISel when not building it.
Quentin Colombet [Thu, 11 Feb 2016 19:18:27 +0000 (19:18 +0000)]
[CMake] Produce an empty library for GlobalISel when not building it.
The rational for this change is that LLVMBuild cannot express conditional
dependencies. Therefore, when we start optionally using GlobalISel library for
say AArch64, without that change, all the tools that use the AArch64 library
would need to explicitly link with GlobalISel when we ask for it.

This does not scale.

Instead, we will set the dependencies between the target and GlobalISel and if
we did not ask to build GlobalISel, the library will just be empty.

Thanks to Chris Bieneman and Mehdi Animi for the idea.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260566 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLiveIntervalAnalysis: Support moving of subregister defs in handleMove
Matthias Braun [Thu, 11 Feb 2016 19:03:53 +0000 (19:03 +0000)]
LiveIntervalAnalysis: Support moving of subregister defs in handleMove

If two definitions write to independent subregisters then they can be
put in any order. LiveIntervalAnalysis::handleMove() did not support
this previously because it looks like moving a definition of a vreg past
another one.

This is a modified version of a patch proposed (two years ago) by
Vincent Lejeune! This version does not touch the read-undef flags and is
extended for the case of moving a subregister def behind all uses - this
can happen for subregister defs that are completely unused.

Differential Revision: http://reviews.llvm.org/D9067

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260565 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel] Teach the IRTranslator how to lower returns.
Quentin Colombet [Thu, 11 Feb 2016 18:53:28 +0000 (18:53 +0000)]
[GlobalISel] Teach the IRTranslator how to lower returns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260562 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AMDGPU] Fix for "v_div_scale_f64 reg, vcc, ..." parsing
Tom Stellard [Thu, 11 Feb 2016 18:25:26 +0000 (18:25 +0000)]
[AMDGPU] Fix for "v_div_scale_f64 reg, vcc, ..." parsing

Summary:
Added support for "VOP3Only" attribute in VOP3bInst encoding.
Set VOP3Only=1 for V_DIV_SCALE_F64/32 insns.
Added support for multi-dest instructions in AMDGPUAs::cvt*().
Added lit test for "V_DIV_SCALE_F64|F32 vreg,vcc|sreg,vreg,vreg,vreg".

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm, SamWot, nhaustov, vpykhtin

Differential Revision: http://reviews.llvm.org/D16995

Patch By: Artem Tamazov

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260560 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel] Add a type to MachineInstr.
Quentin Colombet [Thu, 11 Feb 2016 18:22:37 +0000 (18:22 +0000)]
[GlobalISel] Add a type to MachineInstr.
We actually need that information only for generic instructions, therefore it
would be nice not to have to pay the extra memory consumption for all
instructions. Especially because a typed non-generic instruction does not make
sense.

The question is then, is it possible to have that information in a union or
something?
My initial thought was that we could have a derived class GenericMachineInstr
with additional information, but in practice it makes little to no sense since
generic MachineInstrs are likely turned into non-generic ones by just switching
the opcode. In other words, we don't want to go through the process of creating
a new, non-generic MachineInstr, object each time we do this switch. The memory
benefit probably is not worth the extra compile time.

Another option would be to keep the type of the MachineInstr in a side table.
This would induce an extra indirection though.

Anyway, I will file a PR to discuss about it and remember we need to come back
to it at some point.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260558 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[NVPTX] emit .file directives for files referenced by subprograms.
Artem Belevich [Thu, 11 Feb 2016 18:21:47 +0000 (18:21 +0000)]
[NVPTX] emit .file directives for files referenced by subprograms.

.. so .loc directives referring to those files work correctly.

Differential Revision: http://reviews.llvm.org/D17086

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260557 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel] Add a hook in TargetConfigPass to run GlobalISel.
Quentin Colombet [Thu, 11 Feb 2016 17:57:22 +0000 (17:57 +0000)]
[GlobalISel] Add a hook in TargetConfigPass to run GlobalISel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260553 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel][IRTranslator] Change the ownership of the MIRBuilder field.
Quentin Colombet [Thu, 11 Feb 2016 17:53:23 +0000 (17:53 +0000)]
[GlobalISel][IRTranslator] Change the ownership of the MIRBuilder field.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260551 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel][IRTranslator] Fix a typo in assert.
Quentin Colombet [Thu, 11 Feb 2016 17:52:28 +0000 (17:52 +0000)]
[GlobalISel][IRTranslator] Fix a typo in assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260550 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel][IRTranslator] Teach the pass how to translate Add instructions.
Quentin Colombet [Thu, 11 Feb 2016 17:51:31 +0000 (17:51 +0000)]
[GlobalISel][IRTranslator] Teach the pass how to translate Add instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260549 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel] Add a MachineIRBuilder class.
Quentin Colombet [Thu, 11 Feb 2016 17:44:59 +0000 (17:44 +0000)]
[GlobalISel] Add a MachineIRBuilder class.
Helper class to build machine instrs. This is a higher abstraction
than MachineInstrBuilder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260547 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[lanai] Add Lanai triple.
Jacques Pienaar [Thu, 11 Feb 2016 17:16:20 +0000 (17:16 +0000)]
[lanai] Add Lanai triple.

Add triple for the Lanai backend.

General Lanai backend discussion on llvm-dev thread "[RFC] Lanai backend".

Differential Revision: http://reviews.llvm.org/D17003

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260545 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd a test case to show isKnownNonZero() returns correctly; NFC
Jun Bum Lim [Thu, 11 Feb 2016 17:11:49 +0000 (17:11 +0000)]
Add a test case to show isKnownNonZero() returns correctly; NFC

Summary:
Added a test case just to make sure that isKnownNonZero() returns false
when we cannot guarantee that a ConstantExpr is a non-zero constant.

Reviewers: sanjoy, majnemer, mcrosier, nlewycky

Subscribers: nlewycky, mssimpso, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D16908

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260544 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFixed typo in r260530
Jun Bum Lim [Thu, 11 Feb 2016 16:46:13 +0000 (16:46 +0000)]
Fixed typo in r260530

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260541 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd -match-full-lines argument to FileCheck.
James Y Knight [Thu, 11 Feb 2016 16:46:09 +0000 (16:46 +0000)]
Add -match-full-lines argument to FileCheck.

This is useful for some tests where more-exact matching is useful, such
as clang's Preprocessor tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260540 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert r260507: "[X86] Enable the LEA optimization pass by default."
Hans Wennborg [Thu, 11 Feb 2016 16:44:06 +0000 (16:44 +0000)]
Revert r260507: "[X86] Enable the LEA optimization pass by default."

This caused PR26575.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260538 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Refactoring findMatchingStore() in aarch64-ldst-opt; NFC
Jun Bum Lim [Thu, 11 Feb 2016 16:18:24 +0000 (16:18 +0000)]
[AArch64] Refactoring findMatchingStore() in aarch64-ldst-opt; NFC

Summary: This change makes findMatchingStore() follow the same coding style introduced in r260275.

Reviewers: gberry, junbuml

Subscribers: aemerson, rengolin, haicheng, bmakam, mssimpso

Differential Revision: http://reviews.llvm.org/D17083

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260534 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[InstCombine] Simplify a known nonzero incoming value of PHI
Jun Bum Lim [Thu, 11 Feb 2016 15:50:07 +0000 (15:50 +0000)]
[InstCombine] Simplify a known nonzero incoming value of PHI

Summary:
When a PHI is used only to be compared with zero, it is possible to replace an
incoming value with any non-zero constant if the incoming value can be proved as
a known nonzero value. For example, in below code, we can replace the incoming value %v with
any non-zero constant based on the fact that the PHI is only used to be compared with zero
and %v is a known non-zero value:
  %v = select %cond, 1, 2
  %p = phi [%v, BB] ...
  %c = icmp eq, %p, 0

Reviewers: mcrosier, jmolloy, sanjoy

Subscribers: hfinkel, mcrosier, majnemer, llvm-commits, haicheng, bmakam, mssimpso, gberry

Differential Revision: http://reviews.llvm.org/D16240

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260530 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDrop the hidden visibility from DebugHandlerBase for now.
Benjamin Kramer [Thu, 11 Feb 2016 15:41:56 +0000 (15:41 +0000)]
Drop the hidden visibility from DebugHandlerBase for now.

If a class has hidden visibility all derived classes and all classes
that have it as a member must have hidden visibility too. That may
be fixable here but requires changes to quite a lot of debug info
classes.

This is also one of the things that GCC enforces aggressively while
clang ignores it, making testing more annoying than necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260529 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Improve load/store optimizer to handle LDUR + LDR.
Chad Rosier [Thu, 11 Feb 2016 14:25:08 +0000 (14:25 +0000)]
[AArch64] Improve load/store optimizer to handle LDUR + LDR.

This patch allows the mixing of scaled and unscaled load/stores to form
load/store pairs.

This is a reapplication of r259812, which had an incorrect assert.  The
test_stur_str_no_assert() test is a reduced version of the issue hit in
the AArch64 self-host.

PR24465

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260523 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[MC] Fixed parsing of macro arguments where expressions with spaces are present.
Scott Egerton [Thu, 11 Feb 2016 13:48:49 +0000 (13:48 +0000)]
[MC] Fixed parsing of macro arguments where expressions with spaces are present.

Summary:
Fixed an issue for mips with an instruction such as 'sdc1 $f1, 272 +8(a0)' which has a space between '272' and '+'. The parser would then parse '272' and '+8' as two arguments instead of a single expression resulting in one too many arguments in the pseudo instruction.
The reason that the test case has been changed is so that the expected
output matches the output of the GNU assembler.

Reviewers: vkalintiris, dsanders

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D13592

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260521 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMake context-sensitive isDereferenceable queries in isSafeToLoadUnconditionally
Artur Pilipenko [Thu, 11 Feb 2016 13:42:59 +0000 (13:42 +0000)]
Make context-sensitive isDereferenceable queries in isSafeToLoadUnconditionally

This is a part of the refactoring to unify isSafeToLoadUnconditionally and isDereferenceablePointer functions. In the subsequent change isSafeToSpeculativelyExecute will be modified to use isSafeToLoadUnconditionally instead of isDereferenceableAndAlignedPointer.

Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D16227

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260520 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix MSVC 2013 build after rL260504
Tamas Berghammer [Thu, 11 Feb 2016 11:27:51 +0000 (11:27 +0000)]
Fix MSVC 2013 build after rL260504

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260511 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDon't propagate dereferenceable attribute through gc.relocate in InstCombine
Artur Pilipenko [Thu, 11 Feb 2016 11:22:46 +0000 (11:22 +0000)]
Don't propagate dereferenceable attribute through gc.relocate in InstCombine

Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D16143

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260509 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86] Enable the LEA optimization pass by default.
Andrey Turetskiy [Thu, 11 Feb 2016 10:51:26 +0000 (10:51 +0000)]
[X86] Enable the LEA optimization pass by default.

Differential Revision: http://reviews.llvm.org/D16877

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260507 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFixed typo in comment & coding style for LoopVersioningLICM.
Ashutosh Nema [Thu, 11 Feb 2016 09:23:53 +0000 (09:23 +0000)]
Fixed typo in comment & coding style for LoopVersioningLICM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260504 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[TableGen] Use range-based for loops. NFC
Craig Topper [Thu, 11 Feb 2016 07:39:29 +0000 (07:39 +0000)]
[TableGen] Use range-based for loops. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260502 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[TableGen] Don't call emitSourceFileHeader a second time in the middle of the output...
Craig Topper [Thu, 11 Feb 2016 07:39:27 +0000 (07:39 +0000)]
[TableGen] Don't call emitSourceFileHeader a second time in the middle of the output file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260501 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[TableGen] Whitespace cleanup in output file. NFC
Craig Topper [Thu, 11 Feb 2016 07:39:25 +0000 (07:39 +0000)]
[TableGen] Whitespace cleanup in output file. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260500 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[TableGen] Simplify code slightly. NFC
Craig Topper [Thu, 11 Feb 2016 07:39:22 +0000 (07:39 +0000)]
[TableGen] Simplify code slightly. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260499 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[MC][ELF] Handle MIPS specific .sdata and .sbss directives
Simon Atanasyan [Thu, 11 Feb 2016 06:45:54 +0000 (06:45 +0000)]
[MC][ELF] Handle MIPS specific .sdata and .sbss directives

MIPS specific .sdata and .sbss directives create corresponding sections
with proper initialized ELF flags including ELF::SHF_MIPS_GPREL.

Differential Revision: http://reviews.llvm.org/D17001

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260498 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Fix constant bus use check with subregisters
Matt Arsenault [Thu, 11 Feb 2016 06:15:39 +0000 (06:15 +0000)]
AMDGPU: Fix constant bus use check with subregisters

If the two operands to an instruction were both
subregisters of the same super register, it would incorrectly
think this counted as the same constant bus use.

This fixes the verifier error in fmin_legacy.ll which
was missing -verify-machineinstrs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260495 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Fix passes depending on dominator tree for no reason
Matt Arsenault [Thu, 11 Feb 2016 06:15:34 +0000 (06:15 +0000)]
AMDGPU: Fix passes depending on dominator tree for no reason

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260494 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Remove some old intrinsic uses from tests
Matt Arsenault [Thu, 11 Feb 2016 06:02:01 +0000 (06:02 +0000)]
AMDGPU: Remove some old intrinsic uses from tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260493 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Fix not handling new workitem intrinsics in DivergenceAnalysis
Matt Arsenault [Thu, 11 Feb 2016 05:32:51 +0000 (05:32 +0000)]
AMDGPU: Fix not handling new workitem intrinsics in DivergenceAnalysis

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260491 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Split R600 and SI store lowering
Matt Arsenault [Thu, 11 Feb 2016 05:32:46 +0000 (05:32 +0000)]
AMDGPU: Split R600 and SI store lowering

These were only sharing some somewhat incorrect
logic for when to scalarize or split vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260490 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[readobj] Dump DT_JMPREL relocations when outputting dynamic relocations.
Michael J. Spencer [Thu, 11 Feb 2016 04:59:53 +0000 (04:59 +0000)]
[readobj] Dump DT_JMPREL relocations when outputting dynamic relocations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260489 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[readobj] Handle ELF files with no section table or with no program headers.
Michael J. Spencer [Thu, 11 Feb 2016 04:59:45 +0000 (04:59 +0000)]
[readobj] Handle ELF files with no section table or with no program headers.

This adds support for finding the dynamic table and dynamic symbol table via
the section table or the program header table. If there's no section table an
attempt is made to figure out the length of the dynamic symbol table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260488 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[readobj] Move dynamic table parsing to a new function. NFC.
Michael J. Spencer [Thu, 11 Feb 2016 04:59:37 +0000 (04:59 +0000)]
[readobj] Move dynamic table parsing to a new function. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260487 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[readobj] Sort switch by enum value.
Michael J. Spencer [Thu, 11 Feb 2016 04:59:32 +0000 (04:59 +0000)]
[readobj] Sort switch by enum value.

Sort by enum value, but keep related entries adjacent. This makes it
easier to compare against documentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260486 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[readobj] Parse sections before dynamic table.
Michael J. Spencer [Thu, 11 Feb 2016 04:59:26 +0000 (04:59 +0000)]
[readobj] Parse sections before dynamic table.

NFC. This code will be expanded to handle dynamic tables that don't have a
PT_DYNAMIC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260485 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix const confusion while lambda function usage
Hemant Kulkarni [Thu, 11 Feb 2016 03:41:34 +0000 (03:41 +0000)]
Fix const confusion while lambda function usage

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260484 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AMDGPU] Assembler: Fix VOP3 only instructions
Tom Stellard [Thu, 11 Feb 2016 03:28:15 +0000 (03:28 +0000)]
[AMDGPU] Assembler: Fix VOP3 only instructions

Separate methods to convert parsed instructions to MCInst:

  - VOP3 only instructions (always create modifiers as operands in MCInst)
  - VOP2 instrunctions with modifiers (create modifiers as operands
    in MCInst when e64 encoding is forced or modifiers are parsed)
  - VOP2 instructions without modifiers (do not create modifiers
    as operands in MCInst)
  - Add VOP3Only flag. Pass HasMods flag to VOP3Common.
  - Simplify code that deals with modifiers (-1 is now same as
    0). This is no longer needed.
  - Add few tests (more will be added separately).
    Update error message now correct.

Patch By: Nikolay Haustov

Differential Revision: http://reviews.llvm.org/D16778

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260483 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-nm] Simplify code logic. Rewrite a single function an inline.
Davide Italiano [Thu, 11 Feb 2016 02:56:02 +0000 (02:56 +0000)]
[llvm-nm] Simplify code logic. Rewrite a single function an inline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260482 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel][MachineRegisterInfo] Add a method to create generic vregs.
Quentin Colombet [Thu, 11 Feb 2016 00:19:17 +0000 (00:19 +0000)]
[GlobalISel][MachineRegisterInfo] Add a method to create generic vregs.
For now, generic virtual registers will not have a register class. We may want
to change that. For instance, if we want to use all the methods from
TargetRegisterInfo with generic virtual registers, we need to either have some
sort of generic register classes that do what we want, or teach those methods
how to deal with nullptr register class.

Although the latter seems easy enough to do, we may still want to differenciate
generic register classes from nullptr to catch cases where nullptr gets
introduced by a bug of some sort.

Anyway, I will file a PR to keep track of that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260474 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix build failure caused in r260430
Hemant Kulkarni [Thu, 11 Feb 2016 00:01:47 +0000 (00:01 +0000)]
Fix build failure caused in r260430

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260471 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-nm] Minor style change. Prefer EXIT_SUCCESS over 0.
Davide Italiano [Wed, 10 Feb 2016 23:56:18 +0000 (23:56 +0000)]
[llvm-nm] Minor style change. Prefer EXIT_SUCCESS over 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260470 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix Windows bot failure in Transforms/FunctionImport/funcimport.ll
Teresa Johnson [Wed, 10 Feb 2016 23:47:38 +0000 (23:47 +0000)]
Fix Windows bot failure in Transforms/FunctionImport/funcimport.ll

Make sure we split ":" from the end of the global function id (which
is <path>:<function> for local functions) instead of the beginning to
avoid splitting at the wrong place for Windows file paths that contain
a ":".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260469 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel] Remember the size of generic virtual registers
Quentin Colombet [Wed, 10 Feb 2016 23:43:48 +0000 (23:43 +0000)]
[GlobalISel] Remember the size of generic virtual registers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260468 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFunctionImport: add a progressive heuristic to limit importing too deep in the callgraph
Mehdi Amini [Wed, 10 Feb 2016 23:31:45 +0000 (23:31 +0000)]
FunctionImport: add a progressive heuristic to limit importing too deep in the callgraph

The current function importer will walk the callgraph, importing
transitively any callee that is below the threshold. This can
lead to import very deep which is costly in compile time and not
necessarily beneficial as most of the inline would happen in
imported function and not necessarilly in user code.

The actual factor has been carefully chosen by flipping a coin ;)
Some tuning need to be done (just at the existing limiting threshold).

Reviewers: tejohnson

Differential Revision: http://reviews.llvm.org/D17082

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260466 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMake llvm-nm test consistent with other tests
Hemant Kulkarni [Wed, 10 Feb 2016 23:28:43 +0000 (23:28 +0000)]
Make llvm-nm test consistent with other tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260464 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUse a StringSet in Internalize, and allow to create the pass from an existing one...
Mehdi Amini [Wed, 10 Feb 2016 23:24:31 +0000 (23:24 +0000)]
Use a StringSet in Internalize, and allow to create the pass from an existing one (NFC)

There is not reason to pass an array of "char *" to rebuild a set if
the client already has one.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260462 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd the ability to initialize a StringSet from a pair of iterators (NFC)
Mehdi Amini [Wed, 10 Feb 2016 23:24:21 +0000 (23:24 +0000)]
Add the ability to initialize a StringSet from a pair of iterators (NFC)

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260461 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-nm] Prefer range-based loop over explicit iterator.
Davide Italiano [Wed, 10 Feb 2016 23:16:17 +0000 (23:16 +0000)]
[llvm-nm] Prefer range-based loop over explicit iterator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260459 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd a new insert_as() method to DenseMap and use it for ConstantUniqueMap
Mehdi Amini [Wed, 10 Feb 2016 23:07:29 +0000 (23:07 +0000)]
Add a new insert_as() method to DenseMap and use it for ConstantUniqueMap

Summary:
Just like the existing find_as() method, the new insert_as() accepts
an extra parameter which is used as a key to find the bucket in the
map.
When creating a Constant, we want to check the map before actually
creating the object. In this case we have to perform two queries to
the map, and this extra parameter can save recomputing the hash value
for the second query.

Reviewers: dexonsmith, chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16268

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260458 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CMake] Add a macro definition to detect if we are building GlobalISel:
Quentin Colombet [Wed, 10 Feb 2016 23:00:57 +0000 (23:00 +0000)]
[CMake] Add a macro definition to detect if we are building GlobalISel:
LLVM_BUILD_GLOBAL_ISEL

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260457 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalISel] More detailed skeleton for the IRTranslator.
Quentin Colombet [Wed, 10 Feb 2016 22:59:27 +0000 (22:59 +0000)]
[GlobalISel] More detailed skeleton for the IRTranslator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260456 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoBitcode reader: replace DecodeChar6() with a lookup table (NFC)
Mehdi Amini [Wed, 10 Feb 2016 22:47:48 +0000 (22:47 +0000)]
Bitcode reader: replace DecodeChar6() with a lookup table (NFC)

Summary: Measured to be more performant when reading bitcode.

Reviewers: rafael, dexonsmith

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16285

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260455 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSimplify handleOperandChangeImpl() removing last argument (NFC)
Mehdi Amini [Wed, 10 Feb 2016 22:47:15 +0000 (22:47 +0000)]
Simplify handleOperandChangeImpl() removing last argument (NFC)

The Use argument was used to compute the operand number for a fast
path when replacing only one operand. However we always have to go
through all the operands. So the argument number can be recomputed
locally anyway.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260454 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFollow up to 260439, Speculative fix to clang builders
Philip Reames [Wed, 10 Feb 2016 22:22:41 +0000 (22:22 +0000)]
Follow up to 260439, Speculative fix to clang builders

It looks like clang has a couple of test cases which caught the fact LVI was not slightly more precise after 260439.  When looking at the failures, it struck me as wasteful to be querying nullness of a constant via LVI, so instead of tweaking the clang tests, let's just stop querying constants from this source.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260451 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PGO] Make the number of records for each value site metada adjustable
Rong Xu [Wed, 10 Feb 2016 22:19:43 +0000 (22:19 +0000)]
[PGO] Make the number of records for each value site metada adjustable

The patch adds a parameter in annotateValueSite() to control the max number
of records written to the value profile meta data for each value site. The
default is kept as the current value of 3.

Differential Revision: http://reviews.llvm.org/D17084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260450 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAPInt: Simplify EqualSlowCase
Matthias Braun [Wed, 10 Feb 2016 22:13:10 +0000 (22:13 +0000)]
APInt: Simplify EqualSlowCase

Previously the code used getActiveBits() to determine the highest set
bit of each APInt first. However doing so requires the same amount of
memory accesses as simply comparing both numbers right away.

Removing all the active bit checks leads to simpler code and is faster
in my benchmark.

Differential Revision: http://reviews.llvm.org/D16620

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260447 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix buildbot failure (hosts without zlib)
Xinliang David Li [Wed, 10 Feb 2016 22:05:41 +0000 (22:05 +0000)]
Fix buildbot failure (hosts without zlib)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260446 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRestore "[ThinLTO] Use MD5 hash in function index." with fix
Teresa Johnson [Wed, 10 Feb 2016 21:55:02 +0000 (21:55 +0000)]
Restore "[ThinLTO] Use MD5 hash in function index." with fix

This restores commit r260408, along with a fix for a bot failure.

The bot failure was caused by dereferencing a unique_ptr in the same
call instruction parameter list where it was passed via std::move.
Apparently due to luck this was not exposed when I built the compiler
with clang, only with gcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260442 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LVI] Handle constants defensively
Philip Reames [Wed, 10 Feb 2016 21:46:32 +0000 (21:46 +0000)]
[LVI] Handle constants defensively

There's nothing preventing callers of LVI from asking for lattice values representing a Constant.  In fact, given that several callers are walking back through PHI nodes and trying to simplify predicates, such queries are actually quite common.  This is mostly harmless today, but we start volatiling assertions if we add new calls to getBlockValue in otherwise reasonable places.

Note that this change is not NFC.  Specifically:
1) The result returned through getValueAt will now be more precise.  In principle, this could trigger any latent infinite optimization loops in callers, but in practice, we're unlikely to see this.
2) The result returned through getBlockValueAt is potentially weakened for non-constants that were previously queried.  With the old code, you had the possibility that a later query might bypass the cache and discover some information the original query did not.  I can't find a scenario which actually causes this to happen, but it was in principle possible.  On the other hand, this may end up reducing compile time when the same value is queried repeatedly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260439 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Re-triage list of compilation failures for torture tests
Derek Schuff [Wed, 10 Feb 2016 21:43:16 +0000 (21:43 +0000)]
[WebAssembly] Re-triage list of compilation failures for torture tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260438 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[codeview] Describe int local variables using .cv_def_range
Reid Kleckner [Wed, 10 Feb 2016 20:55:49 +0000 (20:55 +0000)]
[codeview] Describe int local variables using .cv_def_range

Summary:
Refactor common value, scope, and label tracking logic out of DwarfDebug
into a common base class called DebugHandlerBase.

Update an old LLVM IR test case to avoid an assertion in LexicalScopes.

Reviewers: dblaikie, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16931

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260432 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-readobj] Option to emit readelf like output
Hemant Kulkarni [Wed, 10 Feb 2016 20:40:55 +0000 (20:40 +0000)]
[llvm-readobj] Option to emit readelf like output

New option --elf-output-style=LLVM or GNU
Enables -file-headers in readelf style when elf-output-style=GNU

Differential revision: http://reviews.llvm.org/D14128

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260430 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Address comments left over from r260421
Derek Schuff [Wed, 10 Feb 2016 20:14:15 +0000 (20:14 +0000)]
[WebAssembly] Address comments left over from r260421

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260429 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Coverage] add covmap v2 binary format regression test
Xinliang David Li [Wed, 10 Feb 2016 20:14:04 +0000 (20:14 +0000)]
[Coverage] add covmap v2 binary format regression test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260428 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Release the scavenged offset register during VGPR spill
Nicolai Haehnle [Wed, 10 Feb 2016 20:13:58 +0000 (20:13 +0000)]
AMDGPU: Release the scavenged offset register during VGPR spill

Summary:
This fixes a crash where subsequent spills would be unable to scavenge
a register. In particular, it fixes a crash in piglit's
spec@glsl-1.50@execution@geometry@max-input-components (the test still
has a shader that fails to compile because of too many SGPR spills, but
at least it doesn't crash any more).

This is a candidate for the release branch.

Reviewers: arsenm, tstellarAMD

Subscribers: qcolombet, arsenm

Differential Revision: http://reviews.llvm.org/D16558

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260427 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[x86] refactor masked load/store combine logic ; NFCI
Sanjay Patel [Wed, 10 Feb 2016 20:02:45 +0000 (20:02 +0000)]
[x86] refactor masked load/store combine logic ; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260426 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Switch varags calling convention to use a register
Derek Schuff [Wed, 10 Feb 2016 19:51:04 +0000 (19:51 +0000)]
[WebAssembly] Switch varags calling convention to use a register

Instead of passing varargs directly on the user stack, allocate a buffer in
the caller's stack frame and pass a pointer to it. This simplifies the C
ABI (e.g. non-C callers of C functions do not need to use C's user stack if
they have their own mechanism) and allows further optimizations in the future
(e.g. fewer functions may need to use the stack).

Differential Revision: http://reviews.llvm.org/D17048

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260421 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AArch64] Refactor is logic into a helper function. NFC.
Chad Rosier [Wed, 10 Feb 2016 19:45:48 +0000 (19:45 +0000)]
[AArch64] Refactor is logic into a helper function.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260419 91177308-0d34-0410-b5e6-96231b3b80d8