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Sanjay Patel [Fri, 13 May 2016 18:04:39 +0000 (18:04 +0000)]
regenerate checks and add a run to show missed shrinkage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269449
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Kostya Serebryany [Fri, 13 May 2016 18:04:35 +0000 (18:04 +0000)]
[libFuzzer] simplify FuzzerInterface.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269448
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Sanjay Patel [Fri, 13 May 2016 18:02:16 +0000 (18:02 +0000)]
regenerate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269447
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Paul Osmialowski [Fri, 13 May 2016 18:00:09 +0000 (18:00 +0000)]
add support for -print-imm-hex for AArch64
Most immediates are printed in Aarch64InstPrinter using 'formatImm' macro,
but not all of them.
Implementation contains following rules:
- floating point immediates are always printed as decimal
- signed integer immediates are printed depends on flag settings
(for negative values 'formatImm' macro prints the value as i.e -0x01
which may be convenient when imm is an address or offset)
- logical immediates are always printed as hex
- the 64-bit immediate for advSIMD, encoded in "a:b:c:d:e:f:g:h" is always printed as hex
- the 64-bit immedaite in exception generation instructions like:
brk, dcps1, dcps2, dcps3, hlt, hvc, smc, svc is always printed as hex
- the rest of immediates is printed depends on availability
of -print-imm-hex
Signed-off-by: Maciej Gabka <maciej.gabka@arm.com>
Signed-off-by: Paul Osmialowski <pawel.osmialowski@arm.com>
Differential Revision: http://reviews.llvm.org/D16929
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269446
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Geoff Berry [Fri, 13 May 2016 17:54:58 +0000 (17:54 +0000)]
[EarlyCSE] Change key type of AvailableCalls to Instruction*. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269445
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Reid Kleckner [Fri, 13 May 2016 17:48:24 +0000 (17:48 +0000)]
[codeview] Dump the type index on the first line of each record
This will make it easier to write FileCheck tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269444
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Chris Bieneman [Fri, 13 May 2016 17:41:41 +0000 (17:41 +0000)]
[obj2yaml] [yaml2obj] Basic support for MachO::load_command
This patch adds basic support for MachO::load_command. Load command types and sizes are encoded in the YAML and expanded back into MachO.
The YAML doesn't yet support load command structs, that is coming next. In the meantime as a temporary measure when writing MachO files the load commands are padded with zeros so that the generated binary is valid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269442
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Sanjay Patel [Fri, 13 May 2016 17:28:12 +0000 (17:28 +0000)]
[InstCombine] handle zero constant vectors for LE/GE comparisons too
Enhancement to: http://reviews.llvm.org/rL269426
With discussion in: http://reviews.llvm.org/D17859
This should complete the fixes for: PR26701, PR26819:
https://llvm.org/bugs/show_bug.cgi?id=26701
https://llvm.org/bugs/show_bug.cgi?id=26819
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269439
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Richard Smith [Fri, 13 May 2016 17:27:08 +0000 (17:27 +0000)]
Update module map for r269380.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269438
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Rong Xu [Fri, 13 May 2016 17:26:06 +0000 (17:26 +0000)]
[PGO] Add flags to control IRPGO warnings.
Currently there is no reasonable way to control the warnings in the 'use' phase
of the IRPGO pass. This is problematic because the output can be somewhat
spammy. This patch adds some flags which allow us to optionally disable these
warnings. The current upstream behavior will remain the default.
Patch by Jake VanAdrighem (jvanadrighem@gmail.com)
Differential Revision: http://reviews.llvm.org/D20195
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269437
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Bryan Chan [Fri, 13 May 2016 17:23:48 +0000 (17:23 +0000)]
[RuntimeDyld] Support R_390_PC64 relocation type
Summary: When the MCJIT generates ELF code, some DWARF data requires 64-bit PC-relative relocation (R_390_PC64). This patch adds support for R_390_PC64 relocation to RuntimeDyld::resolveSystemZRelocation, to avoid an assertion failure.
Reviewers: uweigand
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D20033
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269436
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Jun Bum Lim [Fri, 13 May 2016 16:52:24 +0000 (16:52 +0000)]
[MemCpyOpt] Use MaxIntSize in byte instead of bit
Summary: This change fix the bug in isProfitableToUseMemset() where MaxIntSize shoule be in byte, not bit.
Reviewers: arsenm, joker.eph, mcrosier
Subscribers: mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D20176
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269433
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Renato Golin [Fri, 13 May 2016 16:02:44 +0000 (16:02 +0000)]
Revert "[llc] New diagnostic handler"
This reverts commit r269428, as it breaks the LLDB build. We need to
understand how to change LLDB in the same way as LLC before landing this
again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269432
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Renato Golin [Fri, 13 May 2016 15:37:46 +0000 (15:37 +0000)]
[llc] New diagnostic handler
Without a diagnostic handler installed, llc's behaviour is to exit on the first
error that it encounters. This is very different from the behaviour of clang
and other front ends, which try to gather as many errors as possible before
exiting.
This commit adds a diagnostic handler to llc, allowing it to find and report
more than one error. The old behaviour is preserved under a flag (-exit-on-error).
Some of the tests fail with the new diagnostic handler, so they have to use the
new flag in order to run under the previous behaviour. Some of these are known
bugs, others need further investigation. Ideally, we should fix the tests and
remove the flag at some point in the future.
Patch by Diana Picus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269428
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Sanjay Patel [Fri, 13 May 2016 15:10:46 +0000 (15:10 +0000)]
[InstCombine] canonicalize* LE/GE vector integer comparisons to LT/GT (PR26701, PR26819)
*We don't currently handle the edge case constants (min/max values), so it's not a complete
canonicalization.
To fully solve the motivating bugs, we need to enhance this to recognize a zero vector
too because that's a ConstantAggregateZero which is a ConstantData, not a ConstantVector
or a ConstantDataVector.
Differential Revision: http://reviews.llvm.org/D17859
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269426
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Renato Golin [Fri, 13 May 2016 15:10:24 +0000 (15:10 +0000)]
[ARM,AArch64] NFC. Add extra test cases for bswap lowering.
These tests were sitting in Phab for many months. They're good tests and should be in.
Patch by Charlie Turner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269425
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Silviu Baranga [Fri, 13 May 2016 14:54:50 +0000 (14:54 +0000)]
[scan-build] fix warnings emiited on LLVM Analysis code base
Fix "Logic error" warnings of the type "Called C++ object pointer is
null" reported by Clang Static Analyzer on the following files:
lib/Analysis/ScalarEvolution.cpp,
lib/Analysis/LoopInfo.cpp.
Patch by Apelete Seketeli!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269424
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Simon Pilgrim [Fri, 13 May 2016 14:47:55 +0000 (14:47 +0000)]
[X86][AVX512] Moved CHECKs inside functions to stop update_llc_test_checks going haywire
I'm not going to regenerate these anytime soon but do have some diffs to apply that I'd like to do with update_llc_test_checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269420
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Krzysztof Parzyszek [Fri, 13 May 2016 13:13:59 +0000 (13:13 +0000)]
[scan-build] fix dead store warnings emitted on LLVM Hexagon code base
Patch by Apelete Seketeli.
Differential Revision: http://reviews.llvm.org/D19900
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269415
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Krzysztof Parzyszek [Fri, 13 May 2016 13:01:19 +0000 (13:01 +0000)]
[MIB] Create a helper function getRegState to extract all register flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269414
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Amjad Aboud [Fri, 13 May 2016 12:46:57 +0000 (12:46 +0000)]
Assure calling "cld" instruction in prologue of X86 interrupt handler function.
Differential Revision: http://reviews.llvm.org/D18725
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269413
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Daniel Sanders [Fri, 13 May 2016 12:07:14 +0000 (12:07 +0000)]
[mips][ias] Work around yet another incorrect microMIPS relocation evaluation exposed by r268900.
It's not entirely clear why R_MICROMIPS_(GOT|HI16|LO16) are evaluated
incorrectly in a small number of the LNT tests at this point. However, it's not
related to the STO_MIPS_MICROMIPS issue.
At this point all the microMIPS-related changes of r268900 have been reverted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269410
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Chandler Carruth [Fri, 13 May 2016 11:39:37 +0000 (11:39 +0000)]
Yet another attempt to appease MSVC...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269409
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Hrvoje Varga [Fri, 13 May 2016 11:32:53 +0000 (11:32 +0000)]
[mips][microMIPS] Implement APPEND, BPOSGE32C, MODSUB, MULSA.W.PH and MULSAQ_S.W.PH instructions
Differential Revision: http://reviews.llvm.org/D14117
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269408
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Chandler Carruth [Fri, 13 May 2016 10:55:23 +0000 (10:55 +0000)]
Try to fix MSVC by explicitly providing copy and move constructors so it
doesn't try to use the converting constructor template for those
operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269406
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Daniel Sanders [Fri, 13 May 2016 10:23:04 +0000 (10:23 +0000)]
[llvm-mc-fuzzer] Use LLVMFuzzerInitialize() instead of a custom main() and FuzzerDriver()
Reviewers: kcc
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D20201
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269405
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George Rimar [Fri, 13 May 2016 10:20:12 +0000 (10:20 +0000)]
[Support/ELF] - Added few constants and structs relative to compressed sections.
Patch adds few constants and structs to support compressed sections.
SHF_COMPRESSED intersects with platform specific XCORE_SHF_CP_SECTION,
both has value of 0x800U.
Reference link:
http://www.sco.com/developers/gabi/latest/ch4.sheader.html
Differential revision: http://reviews.llvm.org/D20209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269404
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Justin Bogner [Fri, 13 May 2016 06:37:53 +0000 (06:37 +0000)]
SDAG: Clean up a dangling node in SparcISelDAGToDAG::SelectImpl
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269396
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Michael Zolotukhin [Fri, 13 May 2016 06:32:25 +0000 (06:32 +0000)]
Revert "[Unroll] Implement a conservative and monotonically increasing cost tracking system during the full unroll heuristic analysis that avoids counting any instruction cost until that instruction becomes "live" through a side-effect or use outside the..."
This reverts commit r269388.
It caused some bots to fail, I'm reverting it until I investigate the
issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269395
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Justin Bogner [Fri, 13 May 2016 06:30:15 +0000 (06:30 +0000)]
SDAG: Clean up a dangling node in MipsISelDAGToDAG::SelectImpl
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269394
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Justin Bogner [Fri, 13 May 2016 06:10:50 +0000 (06:10 +0000)]
SDAG: Implement Select instead of SelectImpl in MSP430DAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269393
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Adam Nemet [Fri, 13 May 2016 04:20:31 +0000 (04:20 +0000)]
[LoopDist] Only run LAA for loops with the pragma
This should fix some compile-time regressions after r267672. Thanks to
Chris Matthews for bisecting it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269392
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Matt Arsenault [Fri, 13 May 2016 04:15:48 +0000 (04:15 +0000)]
AMDGPU: Remove verifier check for scc live ins
We only really need this to be true for SIFixSGPRCopies.
I'm not sure there's any way this could happen before that point.
Fixes a case where MachineCSE could introduce a cross block
scc use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269391
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Chandler Carruth [Fri, 13 May 2016 03:57:50 +0000 (03:57 +0000)]
[ADT] Add an 'llvm::seq' function which produces an iterator range over
a sequence of values.
It increments through the values in the half-open range: [Begin, End),
producing those values when indirecting the iterator. It should support
integers, iterators, and any other type providing these basic arithmetic
operations.
This came up in the C++ standards committee meeting, and it seemed like
a useful construct that LLVM might want as well, and I wanted to
understand how easily we could solve it. I suspect this can be used to
write simpler counting loops even in LLVM along the lines of:
for (int i : seq(0, v.size())) {
...
};
As part of this, I had to fix the lack of a proxy object returned from
the operator[] in our iterator facade.
Differential Revision: http://reviews.llvm.org/D17870
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269390
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Michael Zolotukhin [Fri, 13 May 2016 01:42:39 +0000 (01:42 +0000)]
[Unroll] Implement a conservative and monotonically increasing cost tracking system during the full unroll heuristic analysis that avoids counting any instruction cost until that instruction becomes "live" through a side-effect or use outside the...
Summary:
...loop after the last iteration.
This is really hard to do correctly. The core problem is that we need to
model liveness through the induction PHIs from iteration to iteration in
order to get the correct results, and we need to correctly de-duplicate
the common subgraphs of instructions feeding some subset of the
induction PHIs. All of this can be driven either from a side effect at
some iteration or from the loop values used after the loop finishes.
This patch implements this by storing the forward-propagating analysis
of each instruction in a cache to recall whether it was free and whether
it has become live and thus counted toward the total unroll cost. Then,
at each sink for a value in the loop, we recursively walk back through
every value that feeds the sink, including looping back through the
iterations as needed, until we have marked the entire input graph as
live. Because we cache this, we never visit instructions more than twice
-- once when we analyze them and put them into the cache, and once when
we count their cost towards the unrolled loop. Also, because the cache
is only two bits and because we are dealing with relatively small
iteration counts, we can store all of this very densely in memory to
avoid this from becoming an excessively slow analysis.
The code here is still pretty gross. I would appreciate suggestions
about better ways to factor or split this up, I've stared too long at
the algorithmic side to really have a good sense of what the design
should probably look at.
Also, it might seem like we should do all of this bottom-up, but I think
that is a red herring. Specifically, the simplification power is *much*
greater working top-down. We can forward propagate very effectively,
even across strange and interesting recurrances around the backedge.
Because we use data to propagate, this doesn't cause a state space
explosion. Doing this level of constant folding, etc, would be very
expensive to do bottom-up because it wouldn't be until the last moment
that you could collapse everything. The current solution is essentially
a top-down simplification with a bottom-up cost accounting which seems
to get the best of both worlds. It makes the simplification incremental
and powerful while leaving everything dead until we *know* it is needed.
Finally, a core property of this approach is its *monotonicity*. At all
times, the current UnrolledCost is a conservatively low estimate. This
ensures that we will never early-exit from the analysis due to exceeding
a threshold when if we had continued, the cost would have gone back
below the threshold. These kinds of bugs can cause incredibly hard to
track down random changes to behavior.
We could use a techinque similar (but much simpler) within the inliner
as well to avoid considering speculated code in the inline cost.
Reviewers: chandlerc
Subscribers: sanjoy, mzolotukhin, llvm-commits
Differential Revision: http://reviews.llvm.org/D11758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269388
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Michael Zolotukhin [Fri, 13 May 2016 01:42:34 +0000 (01:42 +0000)]
[LoopUnrollAnalyzer] Don't treat gep-instructions with simplified offset as simplified.
Summary:
Currently we consider such instructions as simplified, which is incorrect,
because if their user isn't simplified, we can't actually simplify them too.
This biases our estimates of profitability: for instance the analyzer expects
much more gains from unrolling memcpy loops than there actually are.
Reviewers: hfinkel, chandlerc
Subscribers: mzolotukhin, llvm-commits
Differential Revision: http://reviews.llvm.org/D17365
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269387
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Teresa Johnson [Fri, 13 May 2016 01:25:31 +0000 (01:25 +0000)]
[ThinLTO] Use correct pipeline for ThinLTO in gold-plugin.
This change is the gold side of the change made in D17115 and clang
patch r261045 to add a ThinLTO specific pipeline that moves more of
the optimization to the backends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269386
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Xinliang David Li [Fri, 13 May 2016 00:23:49 +0000 (00:23 +0000)]
Remove runtime specific code from common header
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269384
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Adrian Prantl [Fri, 13 May 2016 00:17:58 +0000 (00:17 +0000)]
dsymutil: Fix the DWOId mismatch check for cached modules.
In verbose mode, we emit a warning if the DWOId of a skeleton CU
mismatches the DWOId of the referenced module. This patch updates the
cached DWOId after a module has been loaded to the DWOId of the module
on disk (instead of storing the DWOId we expected to load). This
allows us to correctly emit the mismatch warning for all subsequent
object files that want to import the same module. This patch also
ensures both warnings are only emitted in verbose mode.
rdar://problem/
26214027
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269383
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Reid Kleckner [Thu, 12 May 2016 23:26:23 +0000 (23:26 +0000)]
[codeview] Try to handle errors better in record iterator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269381
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Chris Bieneman [Thu, 12 May 2016 23:18:31 +0000 (23:18 +0000)]
[MachO] Extract MachO load command enums into a def file
Having the MachO enums in a def file instead of inline will allow us to write utilities and encoding/decoding methods for load commands without having to write a lot of mechanically repeated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269380
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Justin Bogner [Thu, 12 May 2016 23:10:30 +0000 (23:10 +0000)]
SDAG: Implement Select instead of SelectImpl in AArch64DAGToDAGISel
This one has a lot of code churn, but it's all mechanical and
straightforward.
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269379
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Hemant Kulkarni [Thu, 12 May 2016 22:51:26 +0000 (22:51 +0000)]
llvm-readobj: Fix GNU style entry point print width
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269376
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Reid Kleckner [Thu, 12 May 2016 22:46:41 +0000 (22:46 +0000)]
[codeview] Fix dumping VFTables, stop when we see LF_PAD*
Also stop visiting type records when we encounter an error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269374
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Chandler Carruth [Thu, 12 May 2016 22:19:39 +0000 (22:19 +0000)]
[PM] Port of the DepndenceAnalysis to the new PM.
Ported DA to the new PM by splitting the former DependenceAnalysis Pass
into a DependenceInfo result type and DependenceAnalysisWrapperPass type
and adding a new PM-style DependenceAnalysis analysis pass returning the
DependenceInfo.
Patch by Philip Pfaffe, most of the review by Justin.
Differential Revision: http://reviews.llvm.org/D18834
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269370
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Hemant Kulkarni [Thu, 12 May 2016 22:16:53 +0000 (22:16 +0000)]
llvm-readobj: Change Hex output for GNU style dynamic table print
Dynamic table when printed shows uppercase tag/values.
This changes it to lower case when printing in GNU style
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269368
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Justin Bogner [Thu, 12 May 2016 21:56:18 +0000 (21:56 +0000)]
SDAG: Implement Select instead of SelectImpl in LanaiDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we were calling SelectNodeTo, just return afterwards.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269364
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Justin Bogner [Thu, 12 May 2016 21:46:18 +0000 (21:46 +0000)]
SDAG: Implement Select instead of SelectImpl in HexagonDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we had already replaced all uses and we returned a node, just
remove the dead node instead.
- Where we would return null to fall back to another selector, rename
the method to try* and return a bool for success.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269358
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Adam Nemet [Thu, 12 May 2016 21:41:53 +0000 (21:41 +0000)]
[LAA] Use std::min. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269356
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Justin Bogner [Thu, 12 May 2016 21:24:23 +0000 (21:24 +0000)]
SDAG: Clean up a dangling node in HexagonISelDAGToDAG::SelectImpl
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269355
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Renato Golin [Thu, 12 May 2016 21:22:42 +0000 (21:22 +0000)]
[ARM] Support and tests for transform of LDR rt, = to MOV
This change implements the transformation in processInstruction() for the
LDR rt, =expression to MOV rt, expression when the expression can be evaluated
and can fit into the immediate field of the MOV or a MVN.
Across the ARM and Thumb instruction sets there are several cases to consider,
each with a different range of representatble constants.
In ARM we have:
* Modified immediate (All ARM architectures)
* MOVW (v6t2 and above)
In Thumb we have:
* Modified immediate (v6t2, v7m and v8m.mainline)
* MOVW (v6t2, v7m, v8.mainline and v8m.baseline)
* Narrow Thumb MOV that can be used in an IT block (non flag-setting)
If the immediate fits any of the available alternatives then we make the transformation.
Fixes 25722.
Patch by Peter Smith.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269354
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Renato Golin [Thu, 12 May 2016 21:22:37 +0000 (21:22 +0000)]
[ARM] Fixup tests to take into account mov translation. NFC.
Alter instances in the test-suite that use immediates that can be represented
in the immediate field of a MOV. The reason for doing this is that when the
LDR rt,=imm transformation to MOV rt, imm the existing tests do not need to
be modified.
Required by the patch that fixes PR25722.
Patch by Peter Smith.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269353
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Renato Golin [Thu, 12 May 2016 21:22:31 +0000 (21:22 +0000)]
[ARM] Delay ARM constant pool creation. NFC.
This change adds a new constant pool kind to ARMOperand. When parsing the
operand for =immediate we create an instance of this operand rather than
creating a constant pool entry and rewriting the operand.
As the new operand kind is only created for ldr rt,= we can make ldr rt,=
an explicit pseudo instruction in ARM, Thumb and Thumb2
The pseudo instruction is expanded in processInstruction(). This creates the
constant pool and transforms the pseudo instruction into a pc-relative ldr to
the constant pool.
There are no functional changes and no modifications needed to existing tests.
Required by the patch that fixes PR25722.
Patch by Peter Smith.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269352
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Justin Bogner [Thu, 12 May 2016 21:14:47 +0000 (21:14 +0000)]
SDAG: Implement Select instead of SelectImpl in BPFDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we were calling SelectNodeTo, just return afterwards.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269350
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Justin Bogner [Thu, 12 May 2016 21:03:32 +0000 (21:03 +0000)]
SDAG: Implement Select instead of SelectImpl in AMDGPUDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we would return null to fall back to another selector, rename
the method to try* and return a bool for success.
- Where we were calling SelectNodeTo, just return afterwards.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269349
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Simon Pilgrim [Thu, 12 May 2016 21:01:20 +0000 (21:01 +0000)]
Tidied up switch cases. NFCI.
Split FCMP//ICMP/SEL from the basic arithmetic cost functions. They were not sharing any notable code path (just the return) and were repeatedly testing the opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269348
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John Regehr [Thu, 12 May 2016 20:55:09 +0000 (20:55 +0000)]
[Docs] clarify semantics of x.with.overflow intrinsics
Differential Revision: http://reviews.llvm.org/D20151
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269346
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Justin Bogner [Thu, 12 May 2016 20:54:27 +0000 (20:54 +0000)]
SDAG: Clean up dangling nodes in AArch64ISelDAGToDAG::SelectImpl
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.
Part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269345
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Tom Stellard [Thu, 12 May 2016 20:27:40 +0000 (20:27 +0000)]
Revert "LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()"
This reverts commit r269016 and also the follow-up commit r269020.
This patch caused PR27705.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269344
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David Blaikie [Thu, 12 May 2016 19:59:54 +0000 (19:59 +0000)]
llvm-dwp: Use llvm::Error to improve diagnostic quality/error handling in llvm-dwp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269339
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Hemant Kulkarni [Thu, 12 May 2016 19:58:52 +0000 (19:58 +0000)]
llvm-readobj: Fix the GNU section header flags for SHF_MASKPROC and SHF_MASKOS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269338
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Amjad Aboud [Thu, 12 May 2016 19:58:32 +0000 (19:58 +0000)]
Fixed the callee saved registers list for X86 AllRegs calling convention.
32-bit AllRegs:
SSE: xmm0-xmm7
AVX: ymm0-ymm7
AVX512: zmm0-zmm7 + k0-k7
64-bit AllRegs:
SSE: xmm0-xmm15
AVX: ymm0-ymm15
AVX512: zmm0-zmm31 + k0-k7
Differential Revision: http://reviews.llvm.org/D20142
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269337
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Chris Bieneman [Thu, 12 May 2016 19:57:07 +0000 (19:57 +0000)]
[obj2yaml] Fix ASAN bot failure
I was leaking out of a unique_ptr, should have just kept it in the unique_ptr.
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/12738/steps/check-llvm%20asan/logs/stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269336
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Chad Rosier [Thu, 12 May 2016 19:51:58 +0000 (19:51 +0000)]
[AArch64] Give function a more appropriate name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269335
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Amjad Aboud [Thu, 12 May 2016 19:49:24 +0000 (19:49 +0000)]
Fixed dwarf X86-32 register mapping for k0-k7 registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269333
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Chad Rosier [Thu, 12 May 2016 19:38:18 +0000 (19:38 +0000)]
[AArch64] Minor refactoring to simplify future patch. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269329
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Krzysztof Parzyszek [Thu, 12 May 2016 19:16:02 +0000 (19:16 +0000)]
[Hexagon] Expand VSelect pseudo instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269328
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Vedant Kumar [Thu, 12 May 2016 19:01:11 +0000 (19:01 +0000)]
[unittests] Use coveragemap_error in CoverageMappingReaderMock (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269324
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Davide Italiano [Thu, 12 May 2016 18:49:32 +0000 (18:49 +0000)]
[PM] Make LowerAtomic a FunctionPass.
Differential Revision: http://reviews.llvm.org/D20025
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269322
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Michael Kuperstein [Thu, 12 May 2016 18:44:51 +0000 (18:44 +0000)]
[LoopVectorizer] LoopVectorBody doesn't need to be a vector. NFC.
LoopVectorBody was changed from a single pointer to a SmallVector when
store predication was introduced in r200270. Since r247139, store predication
no longer splits the vector loop body in-place, so we can go back to having
a single LoopVectorBody block.
This reverts the no-longer-needed changes from r200270.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269321
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Chris Bieneman [Thu, 12 May 2016 18:21:09 +0000 (18:21 +0000)]
[yaml2macho] Handle mach_header_64 reserved field
I've added the reserved field as an "optional" in YAML, but I've added asserts in the yaml2macho code to enforce that the field is present in mach_header_64, but not in mach_header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269320
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Chris Bieneman [Thu, 12 May 2016 18:02:13 +0000 (18:02 +0000)]
[yaml2macho] Use memset instead of bzero
This should fix the bots I broke.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269319
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Chris Bieneman [Thu, 12 May 2016 17:53:01 +0000 (17:53 +0000)]
[ObjectYAML] filetype is a required field in MachO headers
Not sure how I managed to copy-pasta this wrong, but I did.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269317
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Zachary Turner [Thu, 12 May 2016 17:45:51 +0000 (17:45 +0000)]
Get rid of CVLeafTypes.def and combine with TypeRecords.def
This merges the functionality of the macros in `CVLeafTypes.def` and the
macros in `TypeRecords.def` into a single set of macros.
Differential Revision: http://reviews.llvm.org/D20190
Reviewed By: rnk, amccarth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269316
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Zachary Turner [Thu, 12 May 2016 17:45:44 +0000 (17:45 +0000)]
Make CodeView record serialization more generic.
This introduces a variadic template and some helper macros to
safely and correctly deserialize many types of common record
fields while maintaining error checking.
Differential Revision: http://reviews.llvm.org/D20183
Reviewed By: rnk, amccarth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269315
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Chris Bieneman [Thu, 12 May 2016 17:44:48 +0000 (17:44 +0000)]
[yaml2obj] Support for dumping mach_header from yaml
With this change obj2yaml and yaml2obj can now round-trip mach_headers.
This change also adds ObjectYAML/MachO tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269314
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Chris Bieneman [Thu, 12 May 2016 17:44:43 +0000 (17:44 +0000)]
[obj2yaml] Include all mach_header fields in yaml
Since we want to be able to use yaml to describe degenerate object files as well as valid ones, we need to be explicit of some fields in your yaml definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269313
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Krzysztof Parzyszek [Thu, 12 May 2016 17:21:40 +0000 (17:21 +0000)]
[Hexagon] Properly handle instruction selection of vsplat intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269312
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Xinliang David Li [Thu, 12 May 2016 16:41:27 +0000 (16:41 +0000)]
minor test clean up /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269308
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Xinliang David Li [Thu, 12 May 2016 16:39:02 +0000 (16:39 +0000)]
Fix option description /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269307
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Chris Bieneman [Thu, 12 May 2016 16:04:20 +0000 (16:04 +0000)]
[macho2yaml] Add support for dumping mach_headers
This patch adds the ability to dump mach headers. For my local clang binary the macho2yaml output is now:
--- !mach-o
FileHeader:
cputype: 0x01000007
cpusubtype: 0x80000003
filetype: 0x00000002
ncmds: 19
flags: 0x00A18085
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269304
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Chris Bieneman [Thu, 12 May 2016 16:04:16 +0000 (16:04 +0000)]
[ObjectYAML] Support Thin MachO headers to YAML
This patch adds support to ObjectYAML for serializing mach_header structs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269303
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Daniel Sanders [Thu, 12 May 2016 14:01:50 +0000 (14:01 +0000)]
[mips][ias] Fix O32 .cprestore directive when inside .set noat region and offset is in range.
Summary:
This expands on r269179 to fix an additional case that was not covered by our
tests. The assembler temporary is not needed when the .cprestore offset fits
inside a simm16 and it is not an error to use it inside a '.set noat' in this
case.
Reviewers: emaste, seanbruno, sdardis
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D20199
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269295
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Daniel Sanders [Thu, 12 May 2016 13:39:13 +0000 (13:39 +0000)]
[mips][ias] Work around incorrect another microMIPS relocation evaluation exposed by r268900
As explained in r269196, microMIPS has a special case that is not correctly
implemented in LLVM. If we have a symbol 'foo' which is equivalent to
'.text+0x10'. The value of an R_MICROMIPS_LO16 relocation using 'foo' is
'foo+0x11' and not 'foo+0x10'. The in-place addend should therefore be 0x11.
This commit reverts a little more of the effect of r268900 by keeping the
symbol when the STO_MIPS_MICROMIPS flag is set for R_MIPS_GPREL32 relocations.
This fixes SingleSource/UnitTests/2003-08-11-VaListArg, and
SingleSource/UnitTests/2003-05-07-VarArgs for microMIPS.
I believe there are additional relocations that have the same issue (e.g.
R_MIPS_64, and R_MIPS_GPREL16) but for now I'm focusing on restoring our
internal buildbots back to the green state we had in r268899.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269294
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Chad Rosier [Thu, 12 May 2016 13:27:24 +0000 (13:27 +0000)]
[AArch64] Remove command-line option use for testing.
The EXTR combine has been in tree for over 2 years without complain, so go ahead
and remove the option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269292
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Simon Pilgrim [Thu, 12 May 2016 13:09:49 +0000 (13:09 +0000)]
[SelectionDAG] Attempt to split BITREVERSE vector legalization into BSWAP and BITREVERSE stages
For BITREVERSE, bit shifting/masking every bit in a vector element is a very lengthy procedure.
If the input vector type is a whole multiple of bytes wide then we can split this into a BSWAP shuffle stage (to reverse at the byte level) and then a BITREVERSE stage applied to each byte. Most vector capable targets can efficiently BSWAP using shuffles resulting in a considerable reduction in instructions.
With this patch targets would only need to implement a target specific vXi8 BITREVERSE implementation to efficiently reverse most legal vector types.
Differential Revision: http://reviews.llvm.org/D19978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269290
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Hrvoje Varga [Thu, 12 May 2016 12:46:06 +0000 (12:46 +0000)]
Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions"
This reverts commit r269176 as it caused test-suite failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269287
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Rafael Espindola [Thu, 12 May 2016 12:37:52 +0000 (12:37 +0000)]
Refactor duplicated code. NFC.
Linkage is always followed by visibility and dll storage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269286
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Renato Golin [Thu, 12 May 2016 12:33:33 +0000 (12:33 +0000)]
[scan-build] fix warnings emitted on LLVM ARM code base
Fix "Logic error" warnings of the type "Called C++ object pointer is
null" reported by Clang Static Analyzer.
Patch by Apelete Seketeli.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269285
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Daniel Sanders [Thu, 12 May 2016 11:31:19 +0000 (11:31 +0000)]
[mips][ias] Correct ELF eflags when Octeon is the target.
Reviewers: sdardis
Subscribers: petarj, mpf, dsanders, spetrovic, llvm-commits, sdardis
Differential Revision: http://reviews.llvm.org/D18899
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269283
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Daniel Sanders [Thu, 12 May 2016 10:55:00 +0000 (10:55 +0000)]
[mips][ias] Handle N64 compound relocations and R_MIPS_SUB in needsRelocateWithSymbol()
Summary:
This eliminates the default case for N64 that was left out of r269047.
The change to R_MIPS_SUB is needed in this patch to make this testable since
%lo(%neg(%gp_rel(foo))) and %hi(%neg(%gp_rel(foo))) remain the only ways to get
a compound relocation from the assembler.
Reviewers: sdardis, rafael
Subscribers: dsanders, llvm-commits, sdardis
Differential Revision: http://reviews.llvm.org/D20097
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269280
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Dan Gohman [Thu, 12 May 2016 04:19:09 +0000 (04:19 +0000)]
[WebAssembly] Fast-isel support for calls, arguments, and selects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269273
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Hal Finkel [Thu, 12 May 2016 04:00:56 +0000 (04:00 +0000)]
[PowerPC] Fix a DAG replacement bug in PPCTargetLowering::DAGCombineExtBoolTrunc
While promoting nodes in PPCTargetLowering::DAGCombineExtBoolTrunc, it is
possible for one of the nodes to be replaced by another. To make sure we do not
visit the deleted nodes, and to make sure we visit the replacement nodes, use a
list of HandleSDNodes to track the to-be-promoted nodes during the promotion
process.
The same fix has been applied to the analogous code in
PPCTargetLowering::DAGCombineTruncBoolExt.
Fixes PR26985.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269272
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David Majnemer [Thu, 12 May 2016 03:07:40 +0000 (03:07 +0000)]
[SCCP] Resolve shifts beyond the bitwidth to undef
Shifts beyond the bitwidth are undef but SCCP resolved them to zero.
Instead, DTRT and resolve them to undef.
This reimplements the transform which caused PR27712.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269269
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Matt Arsenault [Thu, 12 May 2016 02:45:18 +0000 (02:45 +0000)]
AMDGPU: Fix getIntegerAttribute type and error message
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269268
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Xinliang David Li [Thu, 12 May 2016 02:19:16 +0000 (02:19 +0000)]
[Layout] Add a new test case for optimal rotation
Enabled by -force-precise-rotation-cost option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269267
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Xinliang David Li [Thu, 12 May 2016 02:04:41 +0000 (02:04 +0000)]
[Layout] Add a new option (NFC)
Currently cost based loop rotation algo can only be turned on with
two conditions: the function has real profile data, and -precise-rotation-cost
flag is turned on. This is not convenient for developers to experiment
when profile is not available. Add a new option to force the new
rotation algorithm -force-precise-rotation-cost
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269266
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Matt Arsenault [Thu, 12 May 2016 01:58:58 +0000 (01:58 +0000)]
AMDGPU: Fix breaking IR on instructions with multiple pointer operands
The promote alloca pass would attempt to promote an alloca with
a select, icmp, or phi user, even though the other operand was
from a non-promotable source, producing a select on two different
pointer types.
Only do this if we know that both operands derive from the same
alloca. In the future we should be able to relax this to an alloca
which will also be promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269265
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Chris Bieneman [Thu, 12 May 2016 01:52:33 +0000 (01:52 +0000)]
[obj2yaml] Adding Error/Expected to macho2yaml
I figure if I'm adding Mach support I may as well use the new fancy Error model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269264
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Chad Rosier [Thu, 12 May 2016 01:42:01 +0000 (01:42 +0000)]
[AArch64] Add support for unscaled narrow stores in getUsefulBitsForUse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269263
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