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Rodrigo Vivi [Tue, 5 Jan 2021 20:28:10 +0000 (15:28 -0500)]
Merge tag 'gvt-next-fixes-2020-12-25' of https://github.com/intel/gvt-linux into drm-intel-next
gvt-next-fixes-2020-12-25
- Avoid one useless inline (Jani)
- make gvt header self-contained, fix CONFIG_DRM_I915_WERROR (Jani)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
From: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201225022009.GF16939@zhen-hp.sh.intel.com
José Roberto de Souza [Mon, 4 Jan 2021 20:56:54 +0000 (12:56 -0800)]
drm/i915/display/psr: Program plane's calculated offset to plane SF register
It programs Plane's calculated x, y, offset to Plane SF register.
It does the calculation of x and y offsets using
skl_calc_main_surface_offset().
v3: Update commit message
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210104205654.238928-4-jose.souza@intel.com
José Roberto de Souza [Mon, 4 Jan 2021 20:56:53 +0000 (12:56 -0800)]
drm/i915/display: Split and export main surface calculation from skl_check_main_surface()
The calculation the offsets of the main surface will be needed by PSR2
selective fetch code so here splitting and exporting it.
No functional changes were done here.
v3: Rebased
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210104205654.238928-3-jose.souza@intel.com
José Roberto de Souza [Mon, 4 Jan 2021 20:56:52 +0000 (12:56 -0800)]
drm/i915/display/psr: Use plane damage clips to calculate damaged area
Now using plane damage clips property to calcualte the damaged area.
Selective fetch only supports one region to be fetched so software
needs to calculate a bounding box around all damage clips.
Now that we are not complete fetching each plane, there is another
loop needed as all the plane areas that intersect with the pipe
damaged area needs to be fetched from memory so the complete blending
of all planes can happen.
v2:
- do not shifting new_plane_state->uapi.dst only src is in 16.16 format
v4:
- setting plane selective fetch area using the whole pipe damage area
- mark the whole plane area damaged if plane visibility or alpha
changed
v5:
- taking in consideration src.y1 in the damage coordinates
- adding to the pipe damaged area planes that were visible but are
invisible in the new state
v6:
- consider old state plane coordinates when visibility changes or it
moved to calculate damaged area
- remove from damaged area the portion not in src clip
v7:
- intersec every damage clip with src to minimize damaged area
v8:
- adjust pipe_damaged area to 4 lines grouping
- adjust calculation now that is understood that uapi.src is the
framebuffer coordinates that plane will start to fetch from
v9:
- Only add plane dst or src to damaged_area if visible
- Early skip plane damage calculation if it was not visible in old and
new state
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210104205654.238928-2-jose.souza@intel.com
José Roberto de Souza [Mon, 4 Jan 2021 20:56:51 +0000 (12:56 -0800)]
drm: Add function to convert rect in 16.16 fixed format to regular format
Much more clear to read one function call than four lines doing this
conversion.
v7:
- function renamed
- calculating width and height before truncate
- inlined
v10:
- renamed parameters from source and destination to src and dst
to match sister functions
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210104205654.238928-1-jose.souza@intel.com
Chris Wilson [Wed, 30 Dec 2020 20:23:09 +0000 (20:23 +0000)]
drm/i915/dp: Track pm_qos per connector
Since multiple connectors may run intel_dp_aux_xfer conncurrently, a
single global pm_qos does not suffice. (One connector may disable the
dma-latency boost prematurely while the second is still depending on
it.) Instead of a single global pm_qos, track the pm_qos request for
each intel_dp.
v2: Move the pm_qos setup/teardown to intel_dp_aux_init/fini
Fixes:
9ee32fea5fe8 ("drm/i915: irq-drive the dp aux communication")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201230202309.23982-1-chris@chris-wilson.co.uk
Lyude Paul [Fri, 4 Dec 2020 22:36:00 +0000 (17:36 -0500)]
drm/i915/dp: Add register definitions for Intel HDR backlight interface
No functional changes yet, this just adds definitions for all of the
known DPCD registers used by Intel's HDR backlight interface. Since
we'll only ever use this in i915, we just define them in
intel_dp_aux_backlight.c
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Cc: thaytan@noraisin.net
Cc: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201204223603.249878-7-lyude@redhat.com
Lyude Paul [Fri, 4 Dec 2020 22:35:59 +0000 (17:35 -0500)]
drm/i915/dp: Rename eDP VESA backlight interface functions
Since we're about to add support for a second type of backlight control
interface over DP AUX (specifically, Intel's proprietary HDR backlight
controls) let's rename all of the current backlight hooks we have for
vesa to make it clear that they're specific to the VESA interface and
not Intel's.
v3:
* Rebase
Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: thaytan@noraisin.net
Cc: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201204223603.249878-6-lyude@redhat.com
Lyude Paul [Fri, 4 Dec 2020 22:35:57 +0000 (17:35 -0500)]
drm/i915: Pass down brightness values to enable/disable backlight callbacks
Instead of using intel_panel->backlight.level, have the caller provide us
with the current panel backlight value. We'll need this for when we
separate PWM-related backlight callbacks from other means of backlight
control (like DPCD backlight controls), as the caller of each PWM callback
will be responsible for converting the current brightness value to it's
respective PWM level.
Signed-off-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201204223603.249878-4-lyude@redhat.com
Lyude Paul [Fri, 4 Dec 2020 22:35:56 +0000 (17:35 -0500)]
drm/i915: Rename pwm_* backlight callbacks to ext_pwm_*
Since we're going to need to add a set of lower-level PWM backlight
control hooks to be shared by normal backlight controls and HDR
backlight controls in SDR mode, let's add a prefix to the external PWM
backlight functions so that the difference between them and the high
level PWM-only backlight functions is a bit more obvious.
This introduces no functional changes.
Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Cc: thaytan@noraisin.net
Cc: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201204223603.249878-3-lyude@redhat.com
Lyude Paul [Fri, 4 Dec 2020 22:35:55 +0000 (17:35 -0500)]
drm/i915/dp: Program source OUI on eDP panels
Since we're about to start adding support for Intel's magic HDR
backlight interface over DPCD, we need to ensure we're properly
programming this field so that Intel specific sink services are exposed.
Otherwise, 0x300-0x3ff will just read zeroes.
We also take care not to reprogram the source OUI if it already matches
what we expect. This is just to be careful so that we don't accidentally
take the panel out of any backlight control modes we found it in.
v2:
* Add careful parameter to intel_edp_init_source_oui() to avoid
re-writing the source OUI if it's already been set during driver
initialization
Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: thaytan@noraisin.net
Cc: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201204223603.249878-2-lyude@redhat.com
Dave Airlie [Mon, 21 Dec 2020 11:09:57 +0000 (13:09 +0200)]
drm/i915: refactor i915 plane code into separate file.
Ville suggested this as a good idea, let's move this before moving
the crtc code.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[Jani: fixed i915xx_plane.h standalone build.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201221110957.18215-1-jani.nikula@intel.com
Dave Airlie [Mon, 21 Dec 2020 09:04:48 +0000 (11:04 +0200)]
drm/i915: refactor cursor code out of i915_display.c
This file is a monster, let's start simple, the cursor plane code
seems pretty standalone, and splits out easily enough.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
[Jani: cleaned up intel_cursor.h a bit.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201221090449.8288-4-jani.nikula@intel.com
Dave Airlie [Mon, 21 Dec 2020 09:04:47 +0000 (11:04 +0200)]
drm/i915/display: fix misused comma
There is no need for a comma use here.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201221090449.8288-3-jani.nikula@intel.com
Dave Airlie [Mon, 21 Dec 2020 09:04:46 +0000 (11:04 +0200)]
drm/i915/display: move to_intel_frontbuffer to header
This will be used for some refactoring in other files, so move it
first.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201221090449.8288-2-jani.nikula@intel.com
Dave Airlie [Mon, 21 Dec 2020 09:04:45 +0000 (11:04 +0200)]
drm/i915/display: move needs_modeset to an inline in header
This function is going to be used in a later change, so clean it
up first before moving it.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201221090449.8288-1-jani.nikula@intel.com
Jani Nikula [Tue, 8 Dec 2020 10:29:14 +0000 (12:29 +0200)]
drm/i915/gvt: make mpt.h self-contained
Add necessary #includes and forward declarations to make the header
compile on its own.
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/73958c4ed1d94aa581acd91f7d7e82785b13d07e.1607422863.git.jani.nikula@intel.com
Jani Nikula [Tue, 8 Dec 2020 10:29:13 +0000 (12:29 +0200)]
drm/i915/gvt: make scheduler.h self-contained
Add necessary #includes and forward declarations to make the header
compile on its own.
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/3949d345330155c6223ed947215b54c1285a0db5.1607422863.git.jani.nikula@intel.com
Jani Nikula [Tue, 8 Dec 2020 10:29:12 +0000 (12:29 +0200)]
drm/i915/gvt: make gvt.h self-contained
Add necessary #includes and forward declarations to make the header
compile on its own.
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/dc4f4d498a39279d12096c1487a3c50d201e5e4f.1607422863.git.jani.nikula@intel.com
Jani Nikula [Tue, 8 Dec 2020 10:29:11 +0000 (12:29 +0200)]
drm/i915/gvt: make mmio_context.h self-contained
Add necessary #includes and forward declarations to make the header
compile on its own.
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/979ba0ea394e9589f7332b94e91ac200faf995c5.1607422863.git.jani.nikula@intel.com
Jani Nikula [Tue, 8 Dec 2020 10:29:10 +0000 (12:29 +0200)]
drm/i915/gvt: make interrupt.h self-contained
Add necessary #includes and forward declarations to make the header
compile on its own.
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/3a1060d0e9b951d76815745f466efc17a7c85741.1607422863.git.jani.nikula@intel.com
Jani Nikula [Tue, 8 Dec 2020 10:29:09 +0000 (12:29 +0200)]
drm/i915/gvt: make gtt.h self-contained
Add necessary #includes and forward declarations to make the header
compile on its own.
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/ed11c982872c7c3bef4f22d13dfa029e18e980a9.1607422863.git.jani.nikula@intel.com
Jani Nikula [Tue, 8 Dec 2020 10:29:08 +0000 (12:29 +0200)]
drm/i915/gvt: make fb_decoder.h self-contained
Add necessary #includes and forward declarations to make the header
compile on its own.
While at it, also remove a useless forward declaration.
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/46c2acf80f1d214182a96a97fa6322ab89a3de05.1607422863.git.jani.nikula@intel.com
Jani Nikula [Tue, 8 Dec 2020 10:29:07 +0000 (12:29 +0200)]
drm/i915/gvt: make execlist.h self-contained
Remove unused declaration.
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/e201af3bcf8e1bc389ae501ea5e3572b95e66f55.1607422863.git.jani.nikula@intel.com
Ville Syrjälä [Fri, 4 Dec 2020 18:23:09 +0000 (20:23 +0200)]
drm/i915: Reduce duplicated switch cases in hpd code
With GEN11_HOTPLUG_CTL_LONG_DETECT(), SHOTPLUG_CTL_DDI_HPD_LONG_DETECT()
and ICP_TC_HPD_LONG_DETECT() taking the hpd_pin as their argument
we can remove some duplication in the long_detect() switch statements.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201204182309.14213-1-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Sean Paul [Wed, 9 Dec 2020 21:16:36 +0000 (16:16 -0500)]
drm/i915/display/tc: Only WARN once for bogus tc port flag
No need to spam syslog/console when we can ignore/fix the flag.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201209211828.53193-1-sean@poorly.run
Imre Deak [Wed, 9 Dec 2020 15:39:52 +0000 (17:39 +0200)]
drm/i915/icl: Fix initing the DSI DSC power refcount during HW readout
For an enabled DSC during HW readout the corresponding power reference
is taken along the CRTC power domain references in
get_crtc_power_domains(). Remove the incorrect get ref from the DSI
encoder hook.
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201209153952.3397959-1-imre.deak@intel.com
Jani Nikula [Tue, 8 Dec 2020 12:33:54 +0000 (14:33 +0200)]
drm/i915/bios: fill in DSC rc_model_size from VBT
The VBT fields match the DPCD data, so use the same helper.
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/43fba75d89525413aed0bdbb082c26b09458bd46.1607429866.git.jani.nikula@intel.com
Jani Nikula [Tue, 8 Dec 2020 12:33:53 +0000 (14:33 +0200)]
drm/dsc: add helper for calculating rc buffer size from DPCD
Add a helper for calculating the rc buffer size from the DCPD offsets
DP_DSC_RC_BUF_BLK_SIZE and DP_DSC_RC_BUF_SIZE.
Cc: Alex Deucher <alexdeucher@gmail.com>
Cc: Harry Wentland <hwentlan@amd.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6c6aee22740fe7a8cf2b8e768bfda378850cf59a.1607429866.git.jani.nikula@intel.com
Jani Nikula [Tue, 8 Dec 2020 12:33:52 +0000 (14:33 +0200)]
drm/i915/dsc: make rc_model_size an encoder defined value
Move the initialization of the rc_model_size from the common code into
encoder code, allowing different encoders to specify the size according
to their needs. Keep using the hard coded value in the encoders for now
to make this a non-functional change.
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6843c4f6958619f7389180aa92fded7b9fdbb4ba.1607429866.git.jani.nikula@intel.com
Jani Nikula [Tue, 8 Dec 2020 12:33:51 +0000 (14:33 +0200)]
drm/i915/dsc: configure hardware using specified rc_model_size
The rc_model_size is specified in the DSC config, and the hardware
programming should respect that instead of hard coding a value of 8192.
Regardless, the rc_model_size in DSC config is currently hard coded to
the same value, so this should have no impact, other than allowing the
use of other sizes as needed.
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/27d86ad25832bbb985f6e996f3d02dca01a66895.1607429866.git.jani.nikula@intel.com
Jani Nikula [Tue, 8 Dec 2020 12:33:50 +0000 (14:33 +0200)]
drm/dsc: use rc_model_size from DSC config for PPS
The PPS is supposed to reflect the DSC config instead of hard coding the
rc_model_size. Make it so.
Currently all users of drm_dsc_pps_payload_pack() hard code the size to
8192 also in the DSC config, so this change should have no impact, other
than allowing the drivers to use other sizes as needed.
Cc: Alex Deucher <alexdeucher@gmail.com>
Cc: Harry Wentland <hwentlan@amd.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c3246aff585efcd728ee3dc96f52db5e46f6a162.1607429866.git.jani.nikula@intel.com
Manasi Navare [Fri, 4 Dec 2020 20:58:04 +0000 (12:58 -0800)]
drm/i915/display/dp: Compute the correct slice count for VDSC on DP
This patch fixes the slice count computation algorithm
for calculating the slice count based on Peak pixel rate
and the max slice width allowed on the DSC engines.
We need to ensure slice count > min slice count req
as per DP spec based on peak pixel rate and that it is
greater than min slice count based on the max slice width
advertised by DPCD. So use max of these two.
In the prev patch we were using min of these 2 causing it
to violate the max slice width limitation causing a blank
screen on 8K@60.
Fixes:
d9218c8f6cf4 ("drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC")
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: <stable@vger.kernel.org> # v5.0+
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201204205804.25225-1-manasi.d.navare@intel.com
Manasi Navare [Wed, 25 Nov 2020 07:26:34 +0000 (23:26 -0800)]
drm/i915/dp: No need to poll FEC Enable Live bit
The Bspec does not mention polling the FEC Enable
Live status bit. That is only there for debug purposes.
So remove the polling from driver.
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201125072634.27664-1-manasi.d.navare@intel.com
Chris Wilson [Fri, 4 Dec 2020 16:16:01 +0000 (16:16 +0000)]
drm/i915: Disable outputs during unregister
Switch off the scanout during driver unregister, so we can shutdown the
HW immediately for unbind.
v2: Remove the old shutdown from remove, it should now be redundant.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201204161601.20897-1-chris@chris-wilson.co.uk
Ville Syrjälä [Tue, 24 Nov 2020 20:11:56 +0000 (22:11 +0200)]
drm/i915: Call kill_bigjoiner_slave() earlier
Let's do the kill_bigjoiner_slave() thing from
intel_bigjoiner_add_affected_crtcs() since it's related to
what we do there. This cleans up the logic in the
compute_config() loop a bit.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201124201156.17095-4-ville.syrjala@linux.intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Ville Syrjälä [Tue, 24 Nov 2020 20:11:55 +0000 (22:11 +0200)]
drm/i915: Properly flag modesets for all bigjoiner pipes
If either of the bigjoiner pipes needs a modeset then we need
a modeset on both pipes. Make it so.
v2: Split out the kill_bigjoiner_slave() change (Manasi)
Add affected connectors/planes
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201124201156.17095-3-ville.syrjala@linux.intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Ville Syrjälä [Tue, 24 Nov 2020 20:11:54 +0000 (22:11 +0200)]
drm/i915: Add intel_atomic_add_affected_planes()
drm_atomic_add_affected_planes() only considers planes which
are logically enabled in the uapi state. For bigjoiner we need
to consider planes logically enabled in the hw state. Add a
helper for that.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201124201156.17095-2-ville.syrjala@linux.intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Ville Syrjälä [Tue, 24 Nov 2020 20:11:53 +0000 (22:11 +0200)]
drm/i915: Track logically enabled planes for hw state
Currently crtc_state->uapi.plane_mask only tracks logically
enabled planes on the uapi level. For bigjoiner purposes
we want to do the same for the hw state. Let's follow the
pattern established by active_planes & co. here.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201124201156.17095-1-ville.syrjala@linux.intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi Navare [Wed, 2 Dec 2020 18:27:27 +0000 (10:27 -0800)]
drm/i915: Add VRR_CTL_LINE_COUNT field to VRR_CTL register def
VRR_CTL register only had a GENMASK but no field prep
define for TRANS_VRR_CTL_LINE_COUNT field so add that
Cc: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201202182727.26158-1-manasi.d.navare@intel.com
Chris Wilson [Wed, 2 Dec 2020 11:21:40 +0000 (11:21 +0000)]
drm/i915/gem: Spring clean debugfs
Throw away all the debugfs entries that are not being actively used for
debugging/developing IGT. Note that a couple of these are already and
will remain available under the gt/
Files removed:
i915_gem_fence_regs
i915_gem_interrupt
i915_ring_freq_table
i915_context_status
i915_llc
i915_shrinker_info
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Andi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201202112140.16759-1-chris@chris-wilson.co.uk
Imre Deak [Mon, 30 Nov 2020 21:22:00 +0000 (23:22 +0200)]
drm/i915: Make intel_display_power_put_unchecked() an internal-only function
All the display power domain references are wakeref tracked now, so we
can mark intel_display_power_put_unchecked() as an internal function
(for suppressing wakeref tracking in non-debug builds).
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130212200.2811939-10-imre.deak@intel.com
Imre Deak [Tue, 1 Dec 2020 16:13:40 +0000 (18:13 +0200)]
drm/i915: Track power reference taken to disable power well functionality
Add wakeref tracking for the display power domain reference taken to
keep the display power well functionality disabled.
v2: Add missing wakeref zeroing to intel_power_domains_driver_remove()
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201201161340.2879202-2-imre.deak@intel.com
Imre Deak [Mon, 30 Nov 2020 21:21:58 +0000 (23:21 +0200)]
drm/i915: Rename power_domains.wakeref to init_wakeref
Rename power_domains.wakeref to power_domains.init_wakeref to make the
use of this reference clearer. The next patch adds tracking for another
power reference user of the power_domains functionality.
While at it add a missing zero wakeref assert when setting the wakeref.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130212200.2811939-8-imre.deak@intel.com
Imre Deak [Mon, 30 Nov 2020 21:21:57 +0000 (23:21 +0200)]
drm/i915: Track power reference taken for eDP VDD
Add wakeref tracking for the eDP encoders' AUX display power domain
references taken while the panel's VDD is enabled.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130212200.2811939-7-imre.deak@intel.com
Imre Deak [Mon, 30 Nov 2020 21:21:56 +0000 (23:21 +0200)]
drm/i915/ddi: Track power reference taken for encoder main lane AUX use
Add wakeref tracking for the DDI encoders' main lane AUX display power
domain references.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130212200.2811939-6-imre.deak@intel.com
Imre Deak [Mon, 30 Nov 2020 21:21:55 +0000 (23:21 +0200)]
drm/i915/ddi: Track power reference taken for encoder DDI IO use
Add wakeref tracking for the DDI encoders' DDI_IO display power domain
references.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130212200.2811939-5-imre.deak@intel.com
Imre Deak [Mon, 30 Nov 2020 21:21:54 +0000 (23:21 +0200)]
drm/i915: Track power references taken for enabled CRTCs
Add wakeref tracking for display power domain references taken for
enabled CRTCs.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130212200.2811939-4-imre.deak@intel.com
Imre Deak [Tue, 1 Dec 2020 16:13:39 +0000 (18:13 +0200)]
drm/i915: Factor out helpers to get/put a set of tracked power domains
Factor out helper functions to get/put a set of power domains that are
tracked using their wakeref handles. The same is needed by the next
patch adding tracking for enabled CRTC power domains.
v2: s/uint64_t/u64/ (Chris)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201201161340.2879202-1-imre.deak@intel.com
Imre Deak [Mon, 30 Nov 2020 21:21:52 +0000 (23:21 +0200)]
drm/i915: Use CRTC index consistently during getting/putting CRTC power domains
The for_each_oldnew_intel_crtc_in_state() iterator index does match
crtc->pipe, but using the same thing as array index when getting and
putting CRTC power domains makes things clearer.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130212200.2811939-2-imre.deak@intel.com
Dave Airlie [Mon, 30 Nov 2020 21:09:45 +0000 (07:09 +1000)]
drm/i915: refactor panel backlight control functions. (v2)
This moves the functions into static const instead of having
funcs and data in the same struct.
It leaves the power callback alone, as it is used in a different
manner.
v2: leave power callback alone (Jani)
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130210945.31850-1-airlied@gmail.com
Jani Nikula [Mon, 30 Nov 2020 11:13:53 +0000 (13:13 +0200)]
drm/i915/gvt: avoid useless use of inline
In most cases, we are better off letting the compiler decide whether to
inline static functions in .c files or not. In this case, the inline
will be ignored anyway as mmio_pm_restore_handler() is passed as a
function pointer.
Fixes:
5f60b12edcd0 ("drm/i915/gvt: Save/restore HW status to support GVT suspend/resume")
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Hang Yuan <hang.yuan@linux.intel.com>
Cc: Colin Xu <colin.xu@intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
Cc: intel-gvt-dev@lists.freedesktop.org
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20201130111353.25406-1-jani.nikula@intel.com
Chris Wilson [Wed, 2 Dec 2020 21:28:14 +0000 (21:28 +0000)]
drm/i915/display: Record the plane update times for debugging
Since we try and estimate how long we require to update the registers to
perform a plane update, it is of vital importance that we measure the
distribution of plane updates to better guide our estimate. If we
underestimate how long it takes to perform the plane update, we may
slip into the next scanout frame causing a tear. If we overestimate, we
may unnecessarily delay the update to the next frame, causing visible
jitter.
Replace the warning that we exceed some arbitrary threshold for the
vblank update with a histogram for debugfs.
v2: Add a per-crtc debugfs entry so that the information is easier to
extract when testing individual CRTC, and so that it can be reset before
a test.
v3: Flip the graph on its side; creates space to label the time axis.
Updates: 4684
|
1us |
|
4us |********
|**********
16us |***********
|*****
66us |
|
262us |
|
1ms |
|
4ms |
|
17ms |
|
Min update: 5918ns
Max update: 54781ns
Average update: 16628ns
Overruns > 250us: 0
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1982
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20201202212814.26320-1-chris@chris-wilson.co.uk
Jani Nikula [Mon, 30 Nov 2020 11:16:01 +0000 (13:16 +0200)]
drm/i915: remove last traces of I915_READ(), I915_WRITE() and POSTING_READ()
Good riddance! Remove the macros and their remaining references in
comments.
The following functions should be used instead, depending on the use
case:
- intel_uncore_read(), intel_uncore_write(), intel_uncore_posting_read()
- intel_de_read(), intel_de_write(), intel_de_posting_read()
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130111601.2817-10-jani.nikula@intel.com
Uma Shankar [Tue, 1 Dec 2020 19:04:06 +0000 (00:34 +0530)]
Revert "drm/i915/display/fbc: Disable fbc by default on TGL"
FBC can be re-enabled on TGL with WA of keeping it disabled
while PSR2 is enabled.
This reverts commit
2982ded2ff5ce0cf1a49bc39a526da182782b664.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201201190406.1752-3-uma.shankar@intel.com
Uma Shankar [Tue, 1 Dec 2020 19:04:05 +0000 (00:34 +0530)]
drm/i915/display/tgl: Disable FBC with PSR2
There are some corner cases wrt underrun when we enable
FBC with PSR2 on TGL. Recommendation from hardware is to
keep this combination disabled.
Bspec: 50422 HSD:
14010260002
v2: Added psr2 enabled check from crtc_state (Anshuman)
Added Bspec link and HSD referneces (Jose)
v3: Moved the logic to disable fbc to intel_fbc_update_state_cache
and removed the crtc->config usages, as per Ville's recommendation.
v4: Introduced a variable in fbc state_cache instead of the earlier
plane.visible WA, as suggested by Jose.
v5: Dropped an extra check for fbc in intel_fbc_enable and addressed
review comments by Jose.
v6: Move WA to end of function and added Jose's RB.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201201190406.1752-2-uma.shankar@intel.com
Jani Nikula [Mon, 30 Nov 2020 11:16:00 +0000 (13:16 +0200)]
drm/i915/gvt: replace I915_WRITE with intel_uncore_write
Let's avoid adding new I915_WRITE uses while we try to get rid of them.
Fixes:
5f60b12edcd0 ("drm/i915/gvt: Save/restore HW status to support GVT suspend/resume")
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Hang Yuan <hang.yuan@linux.intel.com>
Cc: Colin Xu <colin.xu@intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
Cc: intel-gvt-dev@lists.freedesktop.org
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130111601.2817-9-jani.nikula@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:37 +0000 (02:17 +0530)]
drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks
Non-HDMI sinks shouldn't be sent Dynamic Range and Mastering infoframes.
Check for that when using LSPCON.
v2: Addressed Ville's review comment.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-15-uma.shankar@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:36 +0000 (02:17 +0530)]
drm/i915/display: Implement DRM infoframe read for LSPCON
Implement Read back of HDR metadata infoframes i.e Dynamic Range
and Mastering Infoframe for LSPCON devices.
v2: Added proper bitmask of enabled infoframes as per Ville's
recommendation.
v3: Dropped a redundant wrapper as per Ville's comment.
v4: Dropped a redundant print, added Ville's RB.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-14-uma.shankar@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:35 +0000 (02:17 +0530)]
drm/i915/display: Implement infoframes readback for LSPCON
Implemented Infoframes enabled readback for LSPCON devices.
This will help align the implementation with state readback
infrastructure.
v2: Added proper bitmask of enabled infoframes as per Ville's
recommendation.
v3: Added pcon specific infoframe types instead of using the HSW
one's, as recommended by Ville.
v4: Addressed Ville's review comment by adding HDMI infoframe
versions directly instead of DIP wrappers.
v5: Re-ordered the patches to avoid potential break in usage,
as suggested by Ville.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-13-uma.shankar@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:34 +0000 (02:17 +0530)]
drm/i915/lspcon: Create separate infoframe_enabled helper
Lspcon has Infoframes as well as DIP for HDR metadata(DRM Infoframe).
Create a separate mechanism for lspcon compared to HDMI in order to
address the same and ensure future scalability.
v2: Streamlined this as per Ville's suggestions, making sure that
HDMI infoframe versions are directly returned instead of a redundant
and confusing DIP overhead.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-12-uma.shankar@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:33 +0000 (02:17 +0530)]
drm/i915/display: Enable HDR for Parade based lspcon
Enable HDR for LSPCON based on Parade along with MCA.
v2: Added a helper for status reg as suggested by Ville.
v3: Removed a redundant variable, added Ville's RB.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Vipin Anand <vipin.anand@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-11-uma.shankar@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:32 +0000 (02:17 +0530)]
drm/i915/display: Nuke bogus lspcon check
Dropped a irrelevant lspcon check from intel_hdmi_add_properties
function.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-10-uma.shankar@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:31 +0000 (02:17 +0530)]
drm/i915/display: Enable colorspace programming for LSPCON devices
Enable HDMI Colorspace for LSPCON based devices. Sending Colorimetry
data for HDR using AVI infoframe. LSPCON firmware expects this and though
SOC drives DP, for HDMI panel AVI infoframe is sent to the LSPCON device
which transfers the same to HDMI sink.
v2: Dropped state managed in drm core as per Jani Nikula's suggestion.
v3: Aligned colorimetry handling for lspcon as per compute_avi_infoframes,
as suggested by Ville.
v4: Finally fixed this with Ville's help, re-phrased the commit header
and description.
v5: Register HDMI colorspace for lspcon and move this to
intel_dp_add_properties as we can't create property at late_register.
Credits-to: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-9-uma.shankar@intel.com
Ville Syrjälä [Mon, 30 Nov 2020 20:47:30 +0000 (02:17 +0530)]
drm/i915: Split intel_attach_colorspace_property() into HDMI vs. DP variants
With LSPCON we use the AVI infoframe to convey the colorimetry
information (as opposed to DP MSA/SDP), so the property we expose
should match the values we can stuff into the infoframe. Ie. we
must use the HDMI variant of the property, even though we drive
LSPCON in PCON mode. To that end just split
intel_attach_colorspace_property() into HDMI and DP variants
and let the caller worry about which one it wants to use.
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-8-uma.shankar@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:29 +0000 (02:17 +0530)]
drm/i915/display: Attach content type property for LSPCON
Content type is supported on HDMI sink devices. Attached the
property for the same for LSPCON based devices.
v2: Added the content type programming when we are attaching
the property to connector, as suggested by Ville.
v3: Need to attach content type on intel_dp_add_properties
as creating of new properties is not possible at late_register.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-7-uma.shankar@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:28 +0000 (02:17 +0530)]
drm/i915/display: Add a WARN for invalid output range and format
Add a WARN to rule out an invalid output range and format
combination. This is to align the lspcon code with
compute_avi_infoframes.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-6-uma.shankar@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:27 +0000 (02:17 +0530)]
drm/i915/display: Fixes quantization range for YCbCr output
This patch fixes the quantization range for YCbCr output on
Lspcon based devices.
v2: Re-phrased the description and added Ville's Rb.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-5-uma.shankar@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:26 +0000 (02:17 +0530)]
drm/i915/display: Attach HDR property for capable Gen9 devices
Attach HDR property for Gen9 devices with MCA LSPCON
chips.
v2: Cleaned HDR property attachment logic based on capability
as per Jani Nikula's suggestion.
v3: Fixed the HDR property attachment logic as per the new changes
by Kai-Feng to align with lspcon detection failure on some devices.
v4: Add HDR proprty in late_register to handle lspcon detection,
as suggested by Ville.
v5: Init Lspcon only if advertized from BIOS.
v6: Added a Todo to plan a cleanup later, added Ville's RB.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-4-uma.shankar@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:25 +0000 (02:17 +0530)]
drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon
Gen9 hardware supports HDMI2.0 through LSPCON chips.
Extending HDR support for MCA LSPCON based GEN9 devices.
SOC will drive LSPCON as DP and send HDR metadata as standard
DP SDP packets. LSPCON will be set to operate in PCON mode,
will receive the metadata and create Dynamic Range and
Mastering Infoframe (DRM packets) and send it to HDR capable
HDMI sink devices.
v2: Re-used hsw infoframe write implementation for HDR metadata
for LSPCON as per Ville's suggestion.
v3: Addressed Jani Nikula's review comments.
v4: Addressed Ville's review comments, removed redundant wrapper
and checks, passed arguments instead of hardcodings.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-3-uma.shankar@intel.com
Uma Shankar [Mon, 30 Nov 2020 20:47:24 +0000 (02:17 +0530)]
drm/i915/display: Add HDR Capability detection for LSPCON
LSPCON firmware exposes HDR capability through LPCON_CAPABILITIES
DPCD register. LSPCON implementations capable of supporting
HDR set HDR_CAPABILITY bit in LSPCON_CAPABILITIES to 1. This patch
reads the same, detects the HDR capability and adds this to
intel_lspcon struct.
v2: Addressed Jani Nikula's review comment and fixed the HDR
capability detection logic
v3: Deferred HDR detection from lspcon_init (Ville)
v4: Addressed Ville's minor review comments, added his RB.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130204738.2443-2-uma.shankar@intel.com
José Roberto de Souza [Mon, 30 Nov 2020 12:57:50 +0000 (04:57 -0800)]
drm/i915/display/psr: Calculate selective fetch plane registers
Add the calculations to set plane selective fetch registers depending
in the value of the area damaged.
It is still using the whole plane area as damaged but that will change
in next patches.
v2:
- fixed new_plane_state->uapi.dst.y2 typo in
intel_psr2_sel_fetch_update()
- do not shifthing new_plane_state->uapi.dst only src is in 16.16 format
BSpec: 55229
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130125750.17820-1-jose.souza@intel.com
Jani Nikula [Mon, 30 Nov 2020 11:15:59 +0000 (13:15 +0200)]
drm/i915/irq: replace I915_READ()/WRITE() with intel_uncore_read()/write()
Arguably some of these should use intel_de_read() or intel_de_write(),
however not all. Prioritize I915_READ() and I915_WRITE() removal in
general over migrating to the pedantically correct replacements right
away.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130111601.2817-8-jani.nikula@intel.com
Jani Nikula [Mon, 30 Nov 2020 11:15:58 +0000 (13:15 +0200)]
drm/i915/pm: replace I915_READ()/WRITE() with intel_uncore_read()/write()
Arguably some of these should use intel_de_read() or intel_de_write(),
however not all. Prioritize I915_READ() and I915_WRITE() removal in
general over migrating to the pedantically correct replacements right
away.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130111601.2817-7-jani.nikula@intel.com
Jani Nikula [Mon, 30 Nov 2020 11:15:57 +0000 (13:15 +0200)]
drm/i915/suspend: replace I915_READ()/WRITE() with intel_de_read()/write()
Another straggler with I915_READ() and I915_WRITE() uses gone.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130111601.2817-6-jani.nikula@intel.com
Jani Nikula [Mon, 30 Nov 2020 11:15:56 +0000 (13:15 +0200)]
drm/i915/debugfs: replace I915_READ() with intel_uncore_read()
Another straggler with I915_READ() uses gone.
Arguably some of these should use intel_de_read(), however not
all. Prioritize I915_READ() removal in general over migrating to the
pedantically correct replacement right away.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130111601.2817-5-jani.nikula@intel.com
Jani Nikula [Mon, 30 Nov 2020 11:15:55 +0000 (13:15 +0200)]
drm/i915/debugfs: remove the i915_cache_sharing debugfs file
The i915_cache_sharing file is a debugfs interface for gen 6-7 with no
validation or user. Remove it.
This also removes the last I915_WRITE() use in i915_debugfs.c.
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130111601.2817-4-jani.nikula@intel.com
Jani Nikula [Mon, 30 Nov 2020 11:15:54 +0000 (13:15 +0200)]
drm/i915/cdclk: prefer intel_de_write() over I915_WRITE()
Let's try to not add new ones while we're phasing out I915_READ() and
I915_WRITE().
Fixes:
27a6bc802bd9 ("drm/i915/dg1: Initialize RAWCLK properly")
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130111601.2817-3-jani.nikula@intel.com
Jani Nikula [Mon, 30 Nov 2020 11:15:53 +0000 (13:15 +0200)]
drm/i915: remove last traces of I915_READ_FW() and I915_WRITE_FW()
Good riddance! Remove the macros and their remaining references in
comments.
intel_uncore_read_fw() and intel_uncore_write_fw() should be used
instead.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130111601.2817-2-jani.nikula@intel.com
Jani Nikula [Mon, 30 Nov 2020 11:15:52 +0000 (13:15 +0200)]
drm/i915/debugfs: remove RPS autotuning details from i915_rps_boost_info
The information is no longer relevant, so remove it. This also removes
the last users of I915_READ_FW()
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201130111601.2817-1-jani.nikula@intel.com
Lionel Landwerlin [Thu, 26 Nov 2020 10:51:55 +0000 (12:51 +0200)]
drm/i915/perf: also include Gen11 in OATAILPTR workaround
CI shows this workaround is also needed on Gen11.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
059a0beb486344 ("drm/i915/perf: workaround register corruption in OATAILPTR")
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201126105155.540350-1-lionel.g.landwerlin@intel.com
Chris Wilson [Fri, 27 Nov 2020 21:00:59 +0000 (21:00 +0000)]
drm/i915/display: Suppress "Combo PHY A HW state changed unexpectedly"
We know a problem exists in the ifwi shipped with the early
pre-production Tigerlake and DG1 prototypes, later revisions are fine.
However, CI still relies on the earlier ifwi and we grow tired of
the volume of warnings as we wait for replacements.
Since the warning is a bug, we do not want to lose the warning in its
entirety, so only suppress the warning for the platforms currently
exhibiting the issue.
Suggested-by: José Roberto de Souza <gitlab@gitlab.freedesktop.org>
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2411
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201127210059.10702-1-chris@chris-wilson.co.uk
Tom Rix [Fri, 27 Nov 2020 16:28:28 +0000 (08:28 -0800)]
drm/i915: remove trailing semicolon in macro definition
The macro use will already have a semicolon.
Signed-off-by: Tom Rix <trix@redhat.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201127162828.2660230-1-trix@redhat.com
Chris Wilson [Fri, 27 Nov 2020 14:57:48 +0000 (14:57 +0000)]
Revert "drm/i915: re-order if/else ladder for hpd_irq_setup"
We now use ilk_hpd_irq_setup for all GMCH platforms that do not have
hotplug. These are early gen3 and gen2 devices that now explode on boot
as they try to access non-existent registers.
Fixes:
794d61a19090 ("drm/i915: re-order if/else ladder for hpd_irq_setup")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201127145748.29491-1-chris@chris-wilson.co.uk
Chris Wilson [Wed, 25 Nov 2020 19:30:32 +0000 (19:30 +0000)]
drm/i915/display: Defer initial modeset until after GGTT is initialised
Prior to sanitizing the GGTT, the only operations allowed in
intel_display_init_nogem() are those to reserve the preallocated (and
active) regions in the GGTT leftover from the BIOS. Trying to allocate a
GGTT vma (such as intel_pin_and_fence_fb_obj during the initial modeset)
may then conflict with other preallocated regions that have not yet been
protected.
Move the initial modesetting from the end of init_nogem to the beginning
of init so that any vma pinning (either framebuffers or DSB, for example),
is after the GGTT is ready to handle it.
This will prevent the DSB object from being destroyed too early:
[ 53.449241] BUG: KASAN: use-after-free in i915_init_ggtt+0x324/0x9e0 [i915]
[ 53.449309] Read of size 8 at addr
ffff88811b1e8070 by task systemd-udevd/345
[ 53.449399] CPU: 1 PID: 345 Comm: systemd-udevd Tainted: G W 5.10.0-rc5+ #12
[ 53.449409] Call Trace:
[ 53.449418] dump_stack+0x9a/0xcc
[ 53.449558] ? i915_init_ggtt+0x324/0x9e0 [i915]
[ 53.449565] print_address_description.constprop.0+0x3e/0x60
[ 53.449577] ? _raw_spin_lock_irqsave+0x4e/0x50
[ 53.449718] ? i915_init_ggtt+0x324/0x9e0 [i915]
[ 53.449849] ? i915_init_ggtt+0x324/0x9e0 [i915]
[ 53.449857] kasan_report.cold+0x1f/0x37
[ 53.449993] ? i915_init_ggtt+0x324/0x9e0 [i915]
[ 53.450130] i915_init_ggtt+0x324/0x9e0 [i915]
[ 53.450273] ? i915_ggtt_suspend+0x1f0/0x1f0 [i915]
[ 53.450281] ? static_obj+0x69/0x80
[ 53.450289] ? lockdep_init_map_waits+0xa9/0x310
[ 53.450431] ? intel_wopcm_init+0x96/0x3d0 [i915]
[ 53.450581] ? i915_gem_init+0x75/0x2d0 [i915]
[ 53.450720] i915_gem_init+0x75/0x2d0 [i915]
[ 53.450852] i915_driver_probe+0x8c2/0x1210 [i915]
[ 53.450993] ? i915_pm_prepare+0x630/0x630 [i915]
[ 53.451006] ? check_chain_key+0x1e7/0x2e0
[ 53.451025] ? __pm_runtime_resume+0x58/0xb0
[ 53.451157] i915_pci_probe+0xa6/0x2b0 [i915]
[ 53.451285] ? i915_pci_remove+0x40/0x40 [i915]
[ 53.451295] ? lockdep_hardirqs_on_prepare+0x124/0x230
[ 53.451302] ? _raw_spin_unlock_irqrestore+0x42/0x50
[ 53.451309] ? lockdep_hardirqs_on+0xbf/0x130
[ 53.451315] ? preempt_count_sub+0xf/0xb0
[ 53.451321] ? _raw_spin_unlock_irqrestore+0x2f/0x50
[ 53.451335] pci_device_probe+0xf9/0x190
[ 53.451350] really_probe+0x17f/0x5b0
[ 53.451365] driver_probe_device+0x13a/0x1c0
[ 53.451376] device_driver_attach+0x82/0x90
[ 53.451386] ? device_driver_attach+0x90/0x90
[ 53.451391] __driver_attach+0xab/0x190
[ 53.451401] ? device_driver_attach+0x90/0x90
[ 53.451407] bus_for_each_dev+0xe4/0x140
[ 53.451414] ? subsys_dev_iter_exit+0x10/0x10
[ 53.451423] ? __list_add_valid+0x2b/0xa0
[ 53.451440] bus_add_driver+0x227/0x2e0
[ 53.451454] driver_register+0xd3/0x150
[ 53.451585] i915_init+0x92/0xac [i915]
[ 53.451592] ? 0xffffffffa0a20000
[ 53.451598] do_one_initcall+0xb6/0x3b0
[ 53.451606] ? trace_event_raw_event_initcall_finish+0x150/0x150
[ 53.451614] ? __kasan_kmalloc.constprop.0+0xc2/0xd0
[ 53.451627] ? kmem_cache_alloc_trace+0x4a4/0x8e0
[ 53.451634] ? kasan_unpoison_shadow+0x33/0x40
[ 53.451649] do_init_module+0xf8/0x350
[ 53.451662] load_module+0x43de/0x47f0
[ 53.451716] ? module_frob_arch_sections+0x20/0x20
[ 53.451731] ? rw_verify_area+0x5f/0x130
[ 53.451780] ? __do_sys_finit_module+0x10d/0x1a0
[ 53.451785] __do_sys_finit_module+0x10d/0x1a0
[ 53.451792] ? __ia32_sys_init_module+0x40/0x40
[ 53.451800] ? seccomp_do_user_notification.isra.0+0x5c0/0x5c0
[ 53.451829] ? rcu_read_lock_bh_held+0xb0/0xb0
[ 53.451835] ? mark_held_locks+0x24/0x90
[ 53.451856] do_syscall_64+0x33/0x80
[ 53.451863] entry_SYSCALL_64_after_hwframe+0x44/0xa9
[ 53.451868] RIP: 0033:0x7fde09b4470d
[ 53.451875] Code: 00 c3 66 2e 0f 1f 84 00 00 00 00 00 90 f3 0f 1e fa 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 53 f7 0c 00 f7 d8 64 89 01 48
[ 53.451880] RSP: 002b:
00007ffd6abc1718 EFLAGS:
00000246 ORIG_RAX:
0000000000000139
[ 53.451890] RAX:
ffffffffffffffda RBX:
000056444e528150 RCX:
00007fde09b4470d
[ 53.451895] RDX:
0000000000000000 RSI:
00007fde09a21ded RDI:
000000000000000f
[ 53.451899] RBP:
0000000000020000 R08:
0000000000000000 R09:
0000000000000000
[ 53.451904] R10:
000000000000000f R11:
0000000000000246 R12:
00007fde09a21ded
[ 53.451909] R13:
0000000000000000 R14:
000056444e329200 R15:
000056444e528150
[ 53.451957] Allocated by task 345:
[ 53.451995] kasan_save_stack+0x1b/0x40
[ 53.452001] __kasan_kmalloc.constprop.0+0xc2/0xd0
[ 53.452006] kmem_cache_alloc+0x1cd/0x8d0
[ 53.452146] i915_vma_instance+0x126/0xb70 [i915]
[ 53.452304] i915_gem_object_ggtt_pin_ww+0x222/0x3f0 [i915]
[ 53.452446] intel_dsb_prepare+0x14f/0x230 [i915]
[ 53.452588] intel_atomic_commit+0x183/0x690 [i915]
[ 53.452730] intel_initial_commit+0x2bc/0x2f0 [i915]
[ 53.452871] intel_modeset_init_nogem+0xa02/0x2af0 [i915]
[ 53.452995] i915_driver_probe+0x8af/0x1210 [i915]
[ 53.453120] i915_pci_probe+0xa6/0x2b0 [i915]
[ 53.453125] pci_device_probe+0xf9/0x190
[ 53.453131] really_probe+0x17f/0x5b0
[ 53.453136] driver_probe_device+0x13a/0x1c0
[ 53.453142] device_driver_attach+0x82/0x90
[ 53.453148] __driver_attach+0xab/0x190
[ 53.453153] bus_for_each_dev+0xe4/0x140
[ 53.453158] bus_add_driver+0x227/0x2e0
[ 53.453164] driver_register+0xd3/0x150
[ 53.453286] i915_init+0x92/0xac [i915]
[ 53.453292] do_one_initcall+0xb6/0x3b0
[ 53.453297] do_init_module+0xf8/0x350
[ 53.453302] load_module+0x43de/0x47f0
[ 53.453307] __do_sys_finit_module+0x10d/0x1a0
[ 53.453312] do_syscall_64+0x33/0x80
[ 53.453318] entry_SYSCALL_64_after_hwframe+0x44/0xa9
[ 53.453345] Freed by task 82:
[ 53.453379] kasan_save_stack+0x1b/0x40
[ 53.453384] kasan_set_track+0x1c/0x30
[ 53.453389] kasan_set_free_info+0x1b/0x30
[ 53.453394] __kasan_slab_free+0x112/0x160
[ 53.453399] kmem_cache_free+0xb2/0x3f0
[ 53.453536] i915_gem_flush_free_objects+0x31a/0x3b0 [i915]
[ 53.453542] process_one_work+0x519/0x9f0
[ 53.453547] worker_thread+0x75/0x5c0
[ 53.453552] kthread+0x1da/0x230
[ 53.453557] ret_from_fork+0x22/0x30
[ 53.453584] The buggy address belongs to the object at
ffff88811b1e8040
which belongs to the cache i915_vma of size 968
[ 53.453692] The buggy address is located 48 bytes inside of
968-byte region [
ffff88811b1e8040,
ffff88811b1e8408)
[ 53.453792] The buggy address belongs to the page:
[ 53.453842] page:
00000000b35f7048 refcount:1 mapcount:0 mapping:
0000000000000000 index:0xffff88811b1ef940 pfn:0x11b1e8
[ 53.453847] head:
00000000b35f7048 order:3 compound_mapcount:0 compound_pincount:0
[ 53.453853] flags: 0x8000000000010200(slab|head)
[ 53.453860] raw:
8000000000010200 ffff888115596248 ffff888115596248 ffff8881155b6340
[ 53.453866] raw:
ffff88811b1ef940 0000000000170001 00000001ffffffff 0000000000000000
[ 53.453870] page dumped because: kasan: bad access detected
[ 53.453895] Memory state around the buggy address:
[ 53.453944]
ffff88811b1e7f00: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
[ 53.454011]
ffff88811b1e7f80: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
[ 53.454079] >
ffff88811b1e8000: fc fc fc fc fc fc fc fc fa fb fb fb fb fb fb fb
[ 53.454146] ^
[ 53.454211]
ffff88811b1e8080: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[ 53.454279]
ffff88811b1e8100: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[ 53.454347] ==================================================================
[ 53.454414] Disabling lock debugging due to kernel taint
[ 53.454434] general protection fault, probably for non-canonical address 0xdead0000000000d0: 0000 [#1] PREEMPT SMP KASAN PTI
[ 53.454446] CPU: 1 PID: 345 Comm: systemd-udevd Tainted: G B W 5.10.0-rc5+ #12
[ 53.454592] RIP: 0010:i915_init_ggtt+0x26f/0x9e0 [i915]
[ 53.454602] Code: 89 8d 48 ff ff ff 4c 8d 60 d0 49 39 c7 0f 84 37 02 00 00 4c 89 b5 40 ff ff ff 4d 8d bc 24 90 00 00 00 4c 89 ff e8 c1 97 f8 e0 <49> 83 bc 24 90 00 00 00 00 0f 84 0f 02 00 00 49 8d 7c 24 08 e8 a8
[ 53.454618] RSP: 0018:
ffff88812247f430 EFLAGS:
00010286
[ 53.454625] RAX:
0000000000000000 RBX:
ffff888136440000 RCX:
ffffffffa03fb78f
[ 53.454633] RDX:
0000000000000000 RSI:
0000000000000008 RDI:
dead000000000160
[ 53.454641] RBP:
ffff88812247f500 R08:
ffffffff8113589f R09:
0000000000000000
[ 53.454648] R10:
ffffffff83063843 R11:
fffffbfff060c708 R12:
dead0000000000d0
[ 53.454656] R13:
ffff888136449ba0 R14:
0000000000002000 R15:
dead000000000160
[ 53.454664] FS:
00007fde095c4880(0000) GS:
ffff88840c880000(0000) knlGS:
0000000000000000
[ 53.454672] CS: 0010 DS: 0000 ES: 0000 CR0:
0000000080050033
[ 53.454679] CR2:
00007fef132b4f28 CR3:
000000012245c002 CR4:
00000000003706e0
[ 53.454686] DR0:
0000000000000000 DR1:
0000000000000000 DR2:
0000000000000000
[ 53.454693] DR3:
0000000000000000 DR6:
00000000fffe0ff0 DR7:
0000000000000400
[ 53.454700] Call Trace:
[ 53.454833] ? i915_ggtt_suspend+0x1f0/0x1f0 [i915]
Reported-by: Matthew Auld <matthew.auld@intel.com>
Fixes:
afeda4f3b1c8 ("drm/i915/dsb: Pre allocate and late cleanup of cmd buffer")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Tested-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201125193032.29282-1-chris@chris-wilson.co.uk
Jani Nikula [Tue, 24 Nov 2020 09:31:16 +0000 (11:31 +0200)]
Merge tag 'gvt-next-2020-11-23' of https://github.com/intel/gvt-linux into drm-intel-next-queued
gvt-next-2020-11-23
- Fix host suspend/resume with vGPU (Colin)
- optimize idr init (Varma)
- Change intel_gvt_mpt as const (Julian)
- One comment error fix (Yan)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
From: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201123090517.GC16939@zhen-hp.sh.intel.com
Julian Stecklina [Wed, 11 Nov 2020 17:28:11 +0000 (18:28 +0100)]
drm/i915/gvt: treat intel_gvt_mpt as const in gvt code
The current interface of intel_gvt_register_hypervisor() expects a
non-const pointer to struct intel_gvt_mpt, even though the mediator
never modifies (or should modifiy) the content of this struct.
Change the function signature and relevant struct members to const to
properly express the API's intent and allow instances of intel_gvt_mpt
to be allocated as const.
While I was here, I also made KVM's instance of this struct const to
reduce the number of writable function pointers in the kernel.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: intel-gvt-dev@lists.freedesktop.org
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Julian Stecklina <julian.stecklina@cyberus-technology.de>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20201111172811.558443-1-julian.stecklina@cyberus-technology.de
Aditya Swarup [Tue, 17 Nov 2020 08:48:36 +0000 (00:48 -0800)]
drm/i915/dg1: Enable ports
For DG1 we have a little of mix up wrt to DDI/port names and indexes.
Bspec refers to the ports as DDIA, DDIB, DDI USBC1 and DDI USBC2
(besides the DDIA, DDIB, DDIC, DDID), but the previous naming is the
most unambiguous one. This means that for any register on Display Engine
we should use the index of A, B, D and E. However in some places this is
not true:
- VBT: uses C and D and have to be mapped to D/E
- IO/Combo: uses C and D, but we already differentiate those when
we created the phy vs port distinction.
This additional mapping for VBT and phy are already covered in previous
patches, so now we can initialize all the DDIs as A, B, D and E.
v2: Squash previous patch enabling just ports A and B since most of the
pumbling code is already merged now
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117084836.2318234-1-lucas.demarchi@intel.com
Manasi Navare [Thu, 19 Nov 2020 23:26:15 +0000 (15:26 -0800)]
drm/i915: Do not call hsw_set_frame_start_delay for dsi
This should fix the boot oops for dsi
v2:
* Fix indent (Manasi)
v3:
* Remove redundant condition (Matt Roper)
Fixes:
4e3cdb4535e7 ("drm/i915/dp: Master/Slave enable/disable sequence for bigjoiner")
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201119232615.23231-1-manasi.d.navare@intel.com
Chris Wilson [Thu, 19 Nov 2020 09:07:17 +0000 (09:07 +0000)]
drm/i915/display: Whitespace cleanups
drivers/gpu/drm/i915/display/intel_display.c:3634 intel_find_initial_plane_obj() warn: inconsistent indenting
drivers/gpu/drm/i915/display/intel_display.c:15367 kill_bigjoiner_slave() warn: inconsistent indenting
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201119090717.30687-1-chris@chris-wilson.co.uk
Lionel Landwerlin [Tue, 17 Nov 2020 13:01:24 +0000 (15:01 +0200)]
drm/i915/perf: workaround register corruption in OATAILPTR
After having written the entire OA buffer with reports, the HW will
write again at the beginning of the OA buffer. It'll indicate it by
setting the WRAP bits in the OASTATUS register.
When a wrap happens and that at the end of the read vfunc we write the
OASTATUS register back to clear the REPORT_LOST bit, we sometimes see
that the OATAILPTR register is reset to a previous position on Gen8/9
(apparently not the case on Gen11+). This leads the next call to the
read vfunc to process reports we've already read. Because we've marked
those as read by clearing the reason & timestamp dwords, they're
discarded and a "Skipping spurious, invalid OA report" message is
emitted.
The workaround to avoid this OATAILPTR value reset seems to be to set
the wrap bits when writing back OASTATUS.
This change has no impact on userspace, it only avoids a bunch of
DRM_NOTE("Skipping spurious, invalid OA report\n") messages.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
19f81df2859eb1 ("drm/i915/perf: Add OA unit support for Gen 8+")
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117130124.829979-1-lionel.g.landwerlin@intel.com
Ville Syrjälä [Tue, 17 Nov 2020 19:47:18 +0000 (11:47 -0800)]
drm/i915: Enable bigjoiner
Enough plumbing should be in place to throw the bigjoiner switch.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117194718.11462-16-manasi.d.navare@intel.com
Ville Syrjälä [Tue, 17 Nov 2020 19:47:17 +0000 (11:47 -0800)]
drm/i915: Add bigjoiner state dump
Add a big of bigjoiner information to the state dump.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117194718.11462-15-manasi.d.navare@intel.com
Ville Syrjälä [Tue, 17 Nov 2020 19:47:16 +0000 (11:47 -0800)]
drm/i915: Fix cursor src/dst rectangle with bigjoiner
We can't call drm_plane_state_src() this late for the slave plane since
it would consult the wrong uapi state. We've alreayd done the correct
uapi->hw copy earlier, so let's just preserve the unclipped src/dst
rects using a temp copy across the intel_atomic_plane_check_clipping()
call.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117194718.11462-14-manasi.d.navare@intel.com
Ville Syrjälä [Tue, 17 Nov 2020 19:47:15 +0000 (11:47 -0800)]
drm/i915: Disable legacy cursor fastpath for bigjoiner
The legacy cursor fastpath code doesn't deal with bigjoiner.
Disable the fastpath for now.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117194718.11462-13-manasi.d.navare@intel.com
Maarten Lankhorst [Tue, 17 Nov 2020 19:47:14 +0000 (11:47 -0800)]
drm/i915: Add debugfs dumping for bigjoiner, v3.
Dump debugfs and planar links as well, this will make it easier to debug
when things go wrong.
v4:
* Rebase
Changes since v1:
- Report planar slaves as such, now that we have the plane_state switch.
Changes since v2:
- Rebase on top of the new plane format dumping
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117194718.11462-12-manasi.d.navare@intel.com
Maarten Lankhorst [Tue, 17 Nov 2020 19:47:13 +0000 (11:47 -0800)]
drm/i915: Add bigjoiner aware plane clipping checks
We need to look at hw.fb for the framebuffer, and add the translation
for the slave_plane_state. With these changes we set the correct
rectangle on the bigjoiner slave, and don't set incorrect
src/dst/visibility on the slave plane.
v2:
* Manual rebase (Manasi)
v3:
* hw.rotation instead of uapi.rotation (Ville)
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117194718.11462-11-manasi.d.navare@intel.com
Ville Syrjälä [Tue, 17 Nov 2020 19:47:12 +0000 (11:47 -0800)]
drm/i915: Get the uapi state from the correct plane when bigjoiner is used
When using bigjoiner userspace is only controlling the "master"
plane, so use its uapi state for the "slave" plane as well.
hw.crtc needs a bit of magic since we don't want to copy that from
the uapi state (as it points to the wrong pipe for the "slave
" plane). Instead we pass the right crtc in explicitly but only
assign it when the uapi state indicates the plane to be logically
enabled (ie. uapi.crtc != NULL).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117194718.11462-10-manasi.d.navare@intel.com
Ville Syrjälä [Tue, 17 Nov 2020 19:47:11 +0000 (11:47 -0800)]
drm/i915: Add planes affected by bigjoiner to the state
Make sure both the bigjoiner "master" and "slave" plane are
in the state whenever either of them is in the state.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117194718.11462-9-manasi.d.navare@intel.com
Ville Syrjälä [Tue, 17 Nov 2020 19:47:10 +0000 (11:47 -0800)]
drm/i915: Add crtcs affected by bigjoiner to the state
Make sure both crtcs participating in the bigjoiner stuff
are in the state.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201117194718.11462-8-manasi.d.navare@intel.com