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android-x86/external-libdrm.git
6 years agoamdgpu.ids: Refresh from AMD 17.40 release
Michel Dänzer [Tue, 5 Dec 2017 11:59:35 +0000 (12:59 +0100)]
amdgpu.ids: Refresh from AMD 17.40 release

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
6 years agoamdgpu: Only remember the device's marketing name
Michel Dänzer [Thu, 30 Nov 2017 17:52:06 +0000 (18:52 +0100)]
amdgpu: Only remember the device's marketing name

There's no point in keeping around the full table of marketing names,
when amdgpu_get_marketing_name only ever returns the device's marketing
name.

Acked-by: Slava Abramov <slava.abramov@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoamdgpu: Simplify error handling in parse_one_line
Michel Dänzer [Fri, 1 Dec 2017 15:59:38 +0000 (16:59 +0100)]
amdgpu: Simplify error handling in parse_one_line

* Move empty/commented line check before the strdup and return -EAGAIN
  directly
* Initialize r = -EAGAIN and remove redundant assignments
* Set r = -ENOMEM if last strdup fails, and remove redundant goto

Acked-by: Slava Abramov <slava.abramov@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoamdgpu: Clean up amdgpu_parse_asic_ids error handling
Michel Dänzer [Thu, 30 Nov 2017 17:28:01 +0000 (18:28 +0100)]
amdgpu: Clean up amdgpu_parse_asic_ids error handling

* Move error message printing into amdgpu_parse_asic_ids and make it
  return void
* Print only "Invalid format" error message if parse_one_line returns
  -EINVAL
* Use strerror instead of printing the (negative) error code in hex

Acked-by: Slava Abramov <slava.abramov@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoamdgpu: Add explicit dependency test.
Andrey Grodzovsky [Fri, 24 Nov 2017 20:19:09 +0000 (15:19 -0500)]
amdgpu: Add explicit dependency test.

The test is as following:

1) Create context A & B
2) Send a command submission using context A which fires up a compute shader.
3) The shader wait a bit and then write a value to a memory location.
4) Send a command submission using context B which writes another value to the same memory location, but having an explicit dependency on the first command submission.
5) Wait with the CPU for both submissions to finish and inspect the written value.

Test passes if the value seen in the memory location after both submissions is from command B.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoamdgpu: Add amdgpu_cs_create_syncobj2 to amdgpu-symbol-check
Michel Dänzer [Thu, 30 Nov 2017 14:52:50 +0000 (15:52 +0100)]
amdgpu: Add amdgpu_cs_create_syncobj2 to amdgpu-symbol-check

Fixes make check. Trivial.

6 years agoamdgpu: Adding amdgpu_cs_create_syncobj2 to create syncobj as signaled initially
David Mao [Tue, 28 Nov 2017 03:22:26 +0000 (11:22 +0800)]
amdgpu: Adding amdgpu_cs_create_syncobj2 to create syncobj as signaled initially

Signed-off-by: David Mao <david.mao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoamdgpu: Dynamicly disable BO suite "Metadata" test.
Andrey Grodzovsky [Mon, 27 Nov 2017 12:26:13 +0000 (07:26 -0500)]
amdgpu: Dynamicly disable BO suite "Metadata" test.

Disable the test instead of doing  #ifdef 0

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
6 years agoamdgpu: Switch amdgpu CS tests enabling to the new way.
Andrey Grodzovsky [Fri, 24 Nov 2017 20:50:51 +0000 (15:50 -0500)]
amdgpu: Switch amdgpu CS tests enabling to the new way.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
6 years agoAndroid: disable warnings causing errors
Rob Herring [Mon, 27 Nov 2017 19:38:29 +0000 (13:38 -0600)]
Android: disable warnings causing errors

AOSP master has changed the build default to -Werror making all the
warnings errors. Override that with -Wno-error.

Signed-off-by: Rob Herring <robh@kernel.org>
6 years agoamdgpu: Disable deadlock test suite for Vega 10
Andrey Grodzovsky [Tue, 14 Nov 2017 14:02:48 +0000 (09:02 -0500)]
amdgpu: Disable deadlock test suite for Vega 10

The test stalls the CP, until RCA is done the test is
disabled to not disrupt regression testing.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
6 years agoamdgpu: Add memory over allocation test.
Andrey Grodzovsky [Mon, 13 Nov 2017 17:01:42 +0000 (12:01 -0500)]
amdgpu: Add memory over allocation test.

Allocates 1 TB of memory. Test is disabled by default
since it's triggers OOM killer.

v2:
FIx the test to only alloc the BO and assert if return value
not equal to -ENOMEM and remove test disable on start.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
6 years agoamdgpu: Move memory alloc tests in bo suite.
Andrey Grodzovsky [Fri, 10 Nov 2017 04:30:02 +0000 (23:30 -0500)]
amdgpu: Move memory alloc tests in bo suite.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
6 years agoamdgpu: Use new suite/test disabling functionality.
Andrey Grodzovsky [Fri, 10 Nov 2017 04:30:01 +0000 (23:30 -0500)]
amdgpu: Use new suite/test disabling functionality.

Switch from disabling tests during run to using the new disable
API.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
6 years agoamdgpu: Add functions to disable suites and tests.
Andrey Grodzovsky [Fri, 10 Nov 2017 04:30:00 +0000 (23:30 -0500)]
amdgpu: Add functions to disable suites and tests.

Suits are diasbled based on hooks they provide (e.g incompatible
ASIC or missing blocks). Single tests are diasbled explicitly.
Suit or test can be forced to execute even if disabled by adding -f
flag after specifying suit [test] ids.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
6 years agoheaders: Drop outdated node about a delta in drm_mode.h.
Eric Anholt [Wed, 8 Nov 2017 19:31:20 +0000 (11:31 -0800)]
headers: Drop outdated node about a delta in drm_mode.h.

Fixed in 9433b702fc16 ("headers: Sync drm{,_mode}.h with the kernel")

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
6 years agoheaders: Sync up kernel changes to use kernel types instead of stdint.h.
Eric Anholt [Wed, 8 Nov 2017 19:22:55 +0000 (11:22 -0800)]
headers: Sync up kernel changes to use kernel types instead of stdint.h.

This pulls in pieces of drm-next d65d31388a23 ("Merge tag
'drm-misc-next-fixes-2017-11-07' of
git://anongit.freedesktop.org/drm/drm-misc into drm-next")

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
6 years agoheaders: Sync up mga_drm.h from drm-next.
Eric Anholt [Wed, 8 Nov 2017 19:18:47 +0000 (11:18 -0800)]
headers: Sync up mga_drm.h from drm-next.

The kernel started using the struct from drm.h instead of the typedef.

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
6 years agoheaders: Sync up some comment spelling and whitespace fixes from drm-next.
Eric Anholt [Wed, 8 Nov 2017 19:09:54 +0000 (11:09 -0800)]
headers: Sync up some comment spelling and whitespace fixes from drm-next.

This pulls in pieces of drm-next d65d31388a23
("Merge tag 'drm-misc-next-fixes-2017-11-07' of
git://anongit.freedesktop.org/drm/drm-misc into drm-next")

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
6 years agoheaders: Sync up some header guard changes from drm-next.
Eric Anholt [Wed, 8 Nov 2017 19:06:55 +0000 (11:06 -0800)]
headers: Sync up some header guard changes from drm-next.

This pulls in pieces of drm-next d65d31388a23
("Merge tag 'drm-misc-next-fixes-2017-11-07' of
git://anongit.freedesktop.org/drm/drm-misc into drm-next")

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
6 years agoheaders: Sync vc4 header from drm-next.
Eric Anholt [Wed, 8 Nov 2017 19:04:31 +0000 (11:04 -0800)]
headers: Sync vc4 header from drm-next.

This updates the header with the contents from drm-next d65d31388a23
("Merge tag 'drm-misc-next-fixes-2017-11-07' of
git://anongit.freedesktop.org/drm/drm-misc into drm-next")

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
6 years agoRevert "amdgpu: fix 32bit VA manager max address"
Christian König [Thu, 9 Nov 2017 09:36:05 +0000 (10:36 +0100)]
Revert "amdgpu: fix 32bit VA manager max address"

This reverts commit 944f6665de36b6a6c36263f23b7b9d1730e544fa.

Accidentially pushed an imcomplete patch.

Signed-off-by: Christian König <christian.koenig@amd.com>
6 years agoRevert "amdgpu: use the high VA range if possible"
Christian König [Thu, 9 Nov 2017 09:35:24 +0000 (10:35 +0100)]
Revert "amdgpu: use the high VA range if possible"

This reverts commit 6c0ea4b0c5452bfc1e67b74ce723696ef3c80b25.

Accidentially pushed an incomplete patch.

Signed-off-by: Christian König <christian.koenig@amd.com>
6 years agoamdgpu: use the high VA range if possible
Christian König [Tue, 7 Nov 2017 14:31:45 +0000 (15:31 +0100)]
amdgpu: use the high VA range if possible

This frees up the low range for HMM.

Signed-off-by: Christian König <christian.koenig@amd.com>
6 years agoamdgpu: fix 32bit VA manager max address
Christian König [Thu, 2 Nov 2017 17:54:59 +0000 (18:54 +0100)]
amdgpu: fix 32bit VA manager max address

The range is exclusive not inclusive.

Signed-off-by: Christian König <christian.koenig@amd.com>
6 years agoamdgpu: sanitize 64bit VA manager
Christian König [Thu, 2 Nov 2017 17:54:59 +0000 (18:54 +0100)]
amdgpu: sanitize 64bit VA manager

Adding the extra reservation of the 32bit space to the 64bit manager is
complete nonsense and just a waste of memory and CPU cycles.

Signed-off-by: Christian König <christian.koenig@amd.com>
6 years agoamdpgu: fix coding style in amdgpu_vamgr.c
Christian König [Thu, 2 Nov 2017 17:47:34 +0000 (18:47 +0100)]
amdpgu: fix coding style in amdgpu_vamgr.c

No functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
6 years agofreedreno: add the API fd_pipe_new2 to the symbol test
Emil Velikov [Tue, 7 Nov 2017 11:21:32 +0000 (11:21 +0000)]
freedreno: add the API fd_pipe_new2 to the symbol test

As kindly spotted by `make check'

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
6 years agoexynos: change the license to X11/MIT
Inki Dae [Thu, 10 Aug 2017 04:52:38 +0000 (13:52 +0900)]
exynos: change the license to X11/MIT

Change GPL license of Exynos related code to X11/MIT.

I'd like to keep a consistent license across all Exynos code
because License checker notices two more licenses exist
in libdrm.

For the license change I need to get your agree - all committers.
So please give me Acked-by if you agree with me.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Hyungwon Hwang <human.hwang@samsung.com>
Acked-by: SooChan Lim <sc1.lim@samsung.com>
Acked-by: Sangjin LEE <lsj119@samsung.com>
Acked-by: Boram Park <boram1288.park@samsung.com>
Acked-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: Jan Vesely <jan.vesely@rutgers.edu>
6 years agofreedreno: submit-queue context priority
Rob Clark [Wed, 23 Aug 2017 21:08:39 +0000 (17:08 -0400)]
freedreno: submit-queue context priority

With a new-enough kernel to support prioritized submit-queues, we can
expose priority level support to mesa.  Open a submit queue associated
with the fd_pipe and pass it's id back to SUBMIT ioctl.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
6 years agofreedreno: sync uapi header (driver version 1.3.0)
Rob Clark [Wed, 23 Aug 2017 19:00:12 +0000 (15:00 -0400)]
freedreno: sync uapi header (driver version 1.3.0)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
6 years agoconfigure.ac: bump version for release
Marek Olšák [Fri, 3 Nov 2017 16:28:58 +0000 (17:28 +0100)]
configure.ac: bump version for release

6 years agoamdgpu: Fix wrappers for AMDGPU_VM IOCTL.
Andrey Grodzovsky [Thu, 2 Nov 2017 14:29:55 +0000 (10:29 -0400)]
amdgpu: Fix wrappers for AMDGPU_VM IOCTL.

Rmove amdgpu_context_handle from the interface and use
amdgpu_device_handle instead. Uupdate VMID reservation test
accordingly.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
6 years agoconfigure.ac: bump version for release
Marek Olšák [Tue, 31 Oct 2017 14:49:12 +0000 (15:49 +0100)]
configure.ac: bump version for release

6 years agoamdgpu: fix 32-bit build
Marek Olšák [Tue, 31 Oct 2017 14:48:23 +0000 (15:48 +0100)]
amdgpu: fix 32-bit build

6 years agoconfigure.ac: bump version for release
Marek Olšák [Tue, 31 Oct 2017 01:11:20 +0000 (02:11 +0100)]
configure.ac: bump version for release

6 years agoamdgpu: Add VMID reservation per GPU context test.
Andrey Grodzovsky [Fri, 27 Oct 2017 15:09:11 +0000 (11:09 -0400)]
amdgpu: Add VMID reservation per GPU context test.

The test will Reserve a VMID, submit a command and
unreserve the VMID.

v2:
Wrappers names were changed.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
6 years agoamdgpu: Add wrappers for AMDGPU_VM IOCTL.
Andrey Grodzovsky [Fri, 27 Oct 2017 15:09:10 +0000 (11:09 -0400)]
amdgpu: Add wrappers for AMDGPU_VM IOCTL.

v2:
Rename wrappers to match the IOCTL naming, fix
identation and fix make check error.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
6 years agodrm/syncobj: fix some whitespace issues
Dave Airlie [Wed, 25 Oct 2017 06:43:56 +0000 (07:43 +0100)]
drm/syncobj: fix some whitespace issues

These had tabs, just remove them.

Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agodrm: sync drm headers from drm-next.
Dave Airlie [Wed, 25 Oct 2017 06:37:44 +0000 (16:37 +1000)]
drm: sync drm headers from drm-next.

This updates the headers with the contents in drm-next
at 62884cd386b876638720ef88374b31a84ca7ee5f

This adds leasing and aspect ratio.

6 years agoconfigure.ac: bump version to 2.4.85
Marek Olšák [Fri, 20 Oct 2017 22:26:24 +0000 (00:26 +0200)]
configure.ac: bump version to 2.4.85

6 years agoamdgpu: add padding to the fence to handle ioctl
Marek Olšák [Fri, 20 Oct 2017 22:19:52 +0000 (00:19 +0200)]
amdgpu: add padding to the fence to handle ioctl

copied from Dave's kernel patch.

6 years agoAdd const qualifier to arguments of drmModeAddFB2()
Tobias Jakobi [Tue, 10 Oct 2017 10:12:52 +0000 (12:12 +0200)]
Add const qualifier to arguments of drmModeAddFB2()

Both drmModeAddFB2() and drmModeAddFB2WithModifiers() have some
arguments that are just pointers to uint32_t in disguise. These
are not modified (just copied) in the function, so we can add a
const qualifier here.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
6 years agoamdgpu: implement context priority for amdgpu_cs_ctx_create2 v3
Andres Rodriguez [Fri, 20 Oct 2017 14:57:59 +0000 (10:57 -0400)]
amdgpu: implement context priority for amdgpu_cs_ctx_create2 v3

Add a new context creation function that allows specifying the context
priority.

A high priority context has the potential of starving lower priority
contexts. The current kernel driver implementation allows only apps
that hold CAP_SYS_NICE or DRM_MASTER to acquire a priority above
AMDGPU_CTX_PRIORITY_NORMAL.

v2: corresponding changes for kernel patch v2
v3: Fixed 'make check' symbol error

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoheaders: Sync amdgpu_drm.h with drm-next
Andres Rodriguez [Fri, 20 Oct 2017 14:57:58 +0000 (10:57 -0400)]
headers: Sync amdgpu_drm.h with drm-next

Generated using make headers_install from:
airlied/drm-next 282dc83 Merge tag 'drm-intel-next-2017-10-12' ...

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agomodetest: Allow full testing of primary planes
Ville Syrjälä [Wed, 11 Oct 2017 14:58:11 +0000 (17:58 +0300)]
modetest: Allow full testing of primary planes

Allow the user to override the default configuration set by setcrtc
for the primary plane. On some hardware primary planes can be freely
positioned/sized, and it'd be nice if we can actually test that feature.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
6 years agomodetest: Decode IN_FORMATS plane blob property
Kristian H. Kristensen [Thu, 28 Sep 2017 23:02:09 +0000 (16:02 -0700)]
modetest: Decode IN_FORMATS plane blob property

This teaches modetest about the new IN_FORMATS blob and decodes the
blob to show supported formats and modifiers.

Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
6 years agoconfigure.ac: bump version to 2.4.84
Marek Olšák [Thu, 12 Oct 2017 18:48:54 +0000 (20:48 +0200)]
configure.ac: bump version to 2.4.84

6 years agoamdgpu: add amdgpu_cs_fence_to_handle
Marek Olšák [Fri, 8 Sep 2017 14:05:54 +0000 (16:05 +0200)]
amdgpu: add amdgpu_cs_fence_to_handle

v2: update amdgpu-symbol-check

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
6 years agoamdgpu: add amdgpu_cs_syncobj_wait
Marek Olšák [Mon, 11 Sep 2017 19:58:03 +0000 (21:58 +0200)]
amdgpu: add amdgpu_cs_syncobj_wait

v2: update amdgpu-symbol-check

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
6 years agodrm: add drmSyncobjWait wrapper
Marek Olšák [Mon, 11 Sep 2017 19:57:32 +0000 (21:57 +0200)]
drm: add drmSyncobjWait wrapper

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
6 years agoamdgpu: add sync_file import and export functions
Marek Olšák [Mon, 11 Sep 2017 19:12:12 +0000 (21:12 +0200)]
amdgpu: add sync_file import and export functions

v2: update amdgpu-symbol-check

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
6 years agoinclude: sync drm.h and amdgpu_drm.h with airlied/drm-next
Marek Olšák [Thu, 12 Oct 2017 18:31:44 +0000 (20:31 +0200)]
include: sync drm.h and amdgpu_drm.h with airlied/drm-next

6 years agoheaders: sync syncobj ioctl defines.
Dave Airlie [Wed, 11 Oct 2017 00:41:25 +0000 (10:41 +1000)]
headers: sync syncobj ioctl defines.

This syncs the drm.h header with my drm-next branch as of
bb7a9c8d712f37385a706a594d6edf6e6d2669d0

Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agoheaders: sync DRM_MODE_ROTATE/REFLECT defines from kernel v4.14-rc1
Rob Herring [Fri, 6 Oct 2017 21:18:57 +0000 (16:18 -0500)]
headers: sync DRM_MODE_ROTATE/REFLECT defines from kernel v4.14-rc1

Add the new DRM_MODE_ROTATE_* and DRM_MODE_REFLECT_* defines from v4.14-rc1
kernel.

Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
6 years agoAndroid: move libraries to /vendor
Rob Herring [Fri, 15 Sep 2017 13:45:59 +0000 (08:45 -0500)]
Android: move libraries to /vendor

As part of Treble project in Android O, all the device specific files have
to be located in a separate vendor partition. This is done by setting
LOCAL_PROPRIETARY_MODULE (the name is misleading). This change will not
break existing platforms without a vendor partition as it will just move
files to /system/vendor.

Signed-off-by: Rob Herring <robh@kernel.org>
6 years agotests/amdgpu: fix uvd enc data corruption issue
James Zhu [Thu, 5 Oct 2017 14:57:42 +0000 (10:57 -0400)]
tests/amdgpu: fix uvd enc data corruption issue

In uvd encode parameter package, parameters input_pic_luma_pitch and
input_pic_chroma_pitch should be picture width align with hardware alignment.
The hardware alignment is 16 for amdgpu family earlier than AMDGPU_FAMILY_AI,
and 256 for later than and including AMDGPU_FAMILY_AI.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
6 years agotests/amdgpu: add new uvd enc support check
James Zhu [Thu, 5 Oct 2017 14:56:51 +0000 (10:56 -0400)]
tests/amdgpu: add new uvd enc support check

Query hardware IP information to find out if there are uvd encode rings
ready for use in kernel driver.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
6 years agoamdgpu: Add deadlock detection test suit.
Andrey Grodzovsky [Mon, 2 Oct 2017 18:07:48 +0000 (14:07 -0400)]
amdgpu: Add deadlock detection test suit.

Adding initial tests for locks detection when SW
scheduler FIFO is full.

The test works by submitting a batch of identical commands which make the CP
stall waiting for condition to become true. The condition is later satisfied
form a helper thread. Other events that happen during this time
might create deadlock situations. One such example is GPU reset
triggered by this stall when  amdgpu_lockup_timeout != 0.

v2:
Increase the delay from 2 to 100 ms.
Comment out the compute test until it's working.
Typos fix.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
6 years agoamdgpu: make userptr unit test more interesting
Christian König [Thu, 7 Sep 2017 08:16:01 +0000 (10:16 +0200)]
amdgpu: make userptr unit test more interesting

Do a fork() to force some MMU callbacks.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoamdgpu: print error messages when amdgpu_device_initialize is failing
Marek Olšák [Mon, 4 Sep 2017 19:05:26 +0000 (21:05 +0200)]
amdgpu: print error messages when amdgpu_device_initialize is failing

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
6 years agointel: Change a KBL pci id to GT2 from GT1.5
Anuj Phogat [Wed, 20 Sep 2017 19:11:03 +0000 (12:11 -0700)]
intel: Change a KBL pci id to GT2 from GT1.5

See Mesa commit 9c588ff

Cc: Matt Turner <mattst88@gmail.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
6 years agofreedreno/kgsl: fix pointer-to-int cast
Eric Engestrom [Thu, 14 Sep 2017 09:56:01 +0000 (10:56 +0100)]
freedreno/kgsl: fix pointer-to-int cast

Fixes this warning:

freedreno/kgsl/kgsl_ringbuffer.c: In function ‘kgsl_ringbuffer_flush’:
freedreno/kgsl/kgsl_ringbuffer.c:149:19: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
   req.timestamp = (uint32_t)kgsl_ring->bo->hostptr;
                   ^

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
6 years agoetnaviv: prevent deadlock in error path
Philipp Zabel [Wed, 13 Sep 2017 14:08:19 +0000 (16:08 +0200)]
etnaviv: prevent deadlock in error path

If drmPrimeFDToHandle fails in etna_bo_from_dmabuf, the function must
not return with the table_lock mutex held. Unlock the mutex in the error
path.

Based on ceb70a6b1015 ("freedreno: prevent deadlock in error path").

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
6 years agoamdgpu: Do not write beyond allocated memory when parsing ids
Jan Vesely [Fri, 1 Sep 2017 18:49:19 +0000 (14:49 -0400)]
amdgpu: Do not write beyond allocated memory when parsing ids

Fixes crash when/usr/share/libdrm/amdgpu.ids contains ASIC_ID_TABLE_NUM_ENTRIES + 1 entries.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102432
Fixes: 7e6bf88cac315a9fa41818cf72a7b5d18a2cb1fc (amdgpu: move asic id table to a separate file)
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
6 years agotests/amdgpu: add missing header to SOURCES
Alex Deucher [Wed, 30 Aug 2017 18:00:18 +0000 (14:00 -0400)]
tests/amdgpu: add missing header to SOURCES

Fixes the tarball generation.

fixes: 9d133dd08720d80dfc8ce098bf0972 (tests/amdgpu: add uvd encode unit tests)
bug: https://bugs.freedesktop.org/show_bug.cgi?id=102391
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoconfigure.ac: Bump version to 2.4.83
Daniel Stone [Thu, 24 Aug 2017 11:31:30 +0000 (12:31 +0100)]
configure.ac: Bump version to 2.4.83

6 years agoetnaviv: fix etna_bo_from_name
Philipp Zabel [Mon, 21 Aug 2017 12:41:11 +0000 (14:41 +0200)]
etnaviv: fix etna_bo_from_name

Look up BOs from the name table using the name parameter instead of
req.handle (which at this point is always zero).

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
6 years agoandroid: amdgpu: fix build break
Chih-Wei Huang [Thu, 27 Jul 2017 08:20:52 +0000 (16:20 +0800)]
android: amdgpu: fix build break

Define two macros to avoid building errors.

Fixes: 7e6bf88cac (amdgpu: move asic id table to a separate file)

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
6 years agoandroid: add rules to build amdgpu.ids
Chih-Wei Huang [Thu, 27 Jul 2017 08:20:51 +0000 (16:20 +0800)]
android: add rules to build amdgpu.ids

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
6 years agodrmsltest: Check expected neighbours
Jan Vesely [Fri, 28 Jul 2017 14:23:22 +0000 (10:23 -0400)]
drmsltest: Check expected neighbours

Fixes: 7d8c9464081634f053e16e5eac9655a12fae1dc4
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agotests/amdgpu: add uvd encode unit tests
Boyuan Zhang [Tue, 15 Aug 2017 15:33:43 +0000 (11:33 -0400)]
tests/amdgpu: add uvd encode unit tests

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher at amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agodrm: Pull new modifier uapi into drm_fourcc and drm_mode
Jason Ekstrand [Mon, 14 Aug 2017 23:12:19 +0000 (16:12 -0700)]
drm: Pull new modifier uapi into drm_fourcc and drm_mode

Reviewed-by: Daniel Stone <daniels@collabora.com>
6 years agoamdgpu: merge and cleanup amdgpu_bo_free
Monk Liu [Tue, 8 Aug 2017 16:09:07 +0000 (12:09 -0400)]
amdgpu: merge and cleanup amdgpu_bo_free

since bo_reference and bo_internal_free are
all only used by bo_free, so we just merge them
together

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoamdgpu: fix race issue between two bo functions(v2)
Monk Liu [Tue, 8 Aug 2017 07:34:20 +0000 (15:34 +0800)]
amdgpu: fix race issue between two bo functions(v2)

there is race issue between two threads on amdgpu_bo_reference and
amdgpu_bo_import, this patch tends to fix it by moving the
pthread_mutex_lock out of bo_free_internal and move to bo_reference
to cover the update_reference part.

The mutex_unlock in bo_import should also cover bo refcount
increasement.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoamdgpu: fix missing mutex unlock before return
Monk Liu [Mon, 7 Aug 2017 14:35:11 +0000 (22:35 +0800)]
amdgpu: fix missing mutex unlock before return

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agofreedreno: prevent deadlock in error path
Eric Engestrom [Sun, 30 Jul 2017 20:27:40 +0000 (21:27 +0100)]
freedreno: prevent deadlock in error path

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno/msm: remove dead error path
Eric Engestrom [Sun, 30 Jul 2017 20:27:39 +0000 (21:27 +0100)]
freedreno/msm: remove dead error path

`ring` cannot be non-null, so the label reduces to a simple return.
Then, there is no point initialising `ring` just to overwrite it before
anyone reads it.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno: remove dead error path
Eric Engestrom [Sun, 30 Jul 2017 20:27:38 +0000 (21:27 +0100)]
freedreno: remove dead error path

`pipe` cannot be non-null, so the label reduces to a simple return.
Then, there is no point initialising `pipe` just to overwrite it before
anyone reads it.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rob Clark <robdclark@gmail.com>
6 years agotest/amdgpu: fix test failure for SI
Flora Cui [Wed, 19 Jul 2017 02:52:33 +0000 (10:52 +0800)]
test/amdgpu: fix test failure for SI

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agotests/amdgpu: bypass VCE tests on raven
Hawking Zhang [Sat, 27 May 2017 06:49:19 +0000 (14:49 +0800)]
tests/amdgpu: bypass VCE tests on raven

raven doesn't support VCE

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agotests/amdgpu: bypass UVD CS tests on raven
Hawking Zhang [Sat, 27 May 2017 05:40:45 +0000 (13:40 +0800)]
tests/amdgpu: bypass UVD CS tests on raven

raven doesn't support UVD decode

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoamdgpu: Add FX-9800P Bristol Ridge iGPU id
Jan Vesely [Fri, 28 Jul 2017 05:46:45 +0000 (01:46 -0400)]
amdgpu: Add FX-9800P Bristol Ridge iGPU id

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
6 years agoradeon: add fallthrough annotation
Eric Engestrom [Sun, 30 Jul 2017 20:34:16 +0000 (21:34 +0100)]
radeon: add fallthrough annotation

GCC 7 started warning when a switch case has neither a `break` nor
a "fallthrough" comment.
Let's be explicit that we meant to fall through here.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
6 years agoxf86drm: continue with next device if drmProcessUsbDevice fails
Emil Velikov [Thu, 20 Jul 2017 11:25:27 +0000 (12:25 +0100)]
xf86drm: continue with next device if drmProcessUsbDevice fails

Analogous to previous commit (and the rest of the codebase), simply
discard the device if we cannot parse it.

Fixes: f8484ccbd12 ("xf86drm: Add USB support")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoxf86drm: continue after drmProcessPlatformDevice failure
Gurchetan Singh [Wed, 19 Jul 2017 15:37:06 +0000 (08:37 -0700)]
xf86drm: continue after drmProcessPlatformDevice failure

On ChromeOS devices, readdir() processes the directory in
the following order:

-NAME-              -TYPE-
.                    n/a
..                   n/a
vgem                 n/a
card1           DRM_BUS_PLATFORM
renderD129      DRM_BUS_PLATFORM
card0             DRM_BUS_PCI
renderD128        DRM_BUS_PCI
controlD64        DRM_BUS_PCI

In drmGetDevices2, after drmProcessPlatformDevice fails for
/dev/dri/card1, we don't process the remaining directory entries.
As such, Vulkan fails to initialize since Mesa uses drmGetDevices2.
To fix this, continue if drmProcessPlatformDevice fails.

Fixes: 7b1f37f474d ("xf86drm: Add platform and host1x bus support")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[Emil: correct the host1x platforms as well]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoconfigure.ac: bump version for release
Lucas Stach [Wed, 19 Jul 2017 08:49:34 +0000 (10:49 +0200)]
configure.ac: bump version for release

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
6 years agoamdgpu: add new symbols to tests.
Dave Airlie [Tue, 18 Jul 2017 23:40:38 +0000 (00:40 +0100)]
amdgpu: add new symbols to tests.

6 years agodrm/amdgpu: add new low overhead command submission API. (v2)
Dave Airlie [Tue, 18 Jul 2017 00:31:27 +0000 (01:31 +0100)]
drm/amdgpu: add new low overhead command submission API. (v2)

This just sends chunks to the kernel API for a single command
stream.

This should provide a more future proof and extensible API
for command submission.

v2: use amdgpu_bo_list_handle, add two helper functions to
access bo and context internals.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agodrm/amdgpu: add syncobj create/destroy/import/export apis
Dave Airlie [Sun, 16 Jul 2017 19:18:40 +0000 (20:18 +0100)]
drm/amdgpu: add syncobj create/destroy/import/export apis

These are just wrappers using the amdgpu device handle.

Acked-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agoRemove redundant memclear
coypu [Fri, 30 Jun 2017 03:56:55 +0000 (03:56 +0000)]
Remove redundant memclear

drmMalloc will zero out the memory for us

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
6 years agoetnaviv: submit full struct drm_etnaviv_gem_submit
Christian Gmeiner [Fri, 9 Jun 2017 10:27:34 +0000 (12:27 +0200)]
etnaviv: submit full struct drm_etnaviv_gem_submit

It is safe to submit the full struct even on older kernels as such
kernels do not process the full struct. Without this change it
becomes quite challenging to extned the submit struct.

Freedreno has no special treatment too. See git commits
- freedreno: sync uapi header
- freedreno: add fence fd support

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Philipp Zabel <p.zabel@pengutronix.de>
6 years agointel/intel_chipset: Move IS_9XX below IS_GEN10.
Rodrigo Vivi [Fri, 30 Jun 2017 21:24:55 +0000 (14:24 -0700)]
intel/intel_chipset: Move IS_9XX below IS_GEN10.

No functional change. Just organizing the code
so it gets clear for future platforms.

Paulo deserves credits becuase he was the one
that just noticed this IS_9XX was in the wrong position
after CNL patches got introduced.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
6 years agointel: add GEN10 to IS_9XX.
Paulo Zanoni [Thu, 27 Apr 2017 20:11:09 +0000 (17:11 -0300)]
intel: add GEN10 to IS_9XX.

As far as I understand, IS_9XX should return true for it.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
6 years agointel/gen10: Add missed gen10 stuff
Ben Widawsky [Wed, 24 Aug 2016 21:51:43 +0000 (14:51 -0700)]
intel/gen10: Add missed gen10 stuff

This got lost on rebase, I believe

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
6 years agointel: Add Cannonlake PCI IDs for Y-skus.
Rodrigo Vivi [Tue, 13 Dec 2016 00:06:03 +0000 (16:06 -0800)]
intel: Add Cannonlake PCI IDs for Y-skus.

By the Spec all CNL Y skus are 2+2, i.e. GT2.

This is a copy of merged i915's
commit 95578277cbdb ("drm/i915/cnl: Add Cannonlake PCI IDs for Y-skus.")

v2: Add kernel commit id for reference.

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
6 years agointel: Add Cannonlake PCI IDs for U-skus.
Rodrigo Vivi [Tue, 13 Dec 2016 00:06:02 +0000 (16:06 -0800)]
intel: Add Cannonlake PCI IDs for U-skus.

Platform enabling and its power-on are organized in different
skus (U x Y x S x H, etc). So instead of organizing it in
GT1 x GT2 x GT3 let's also use the platform sku.

This is a copy of merged i915's
commit e918d79a5d0a ("drm/i915/cnl: Add Cannonlake PCI IDs for U-skus.")

v2: Remove PCI IDs for SKU not mentioned in spec.
v3: Add kernel commit id for reference.

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
6 years agointel: PCI Ids for U SKU in CFL
Anusha Srivatsa [Wed, 21 Jun 2017 18:17:37 +0000 (11:17 -0700)]
intel: PCI Ids for U SKU in CFL

Add the PCI IDs for U SKU IN CFL by following the spec.

v2: Update IDs

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
6 years agointel: PCI Ids for H SKU in CFL
Anusha Srivatsa [Wed, 21 Jun 2017 18:17:36 +0000 (11:17 -0700)]
intel: PCI Ids for H SKU in CFL

Add the PCI IDs for H SKU IN CFL by following the spec.

v2: Update IDs

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
6 years agointel: PCI Ids for S SKU in CFL
Anusha Srivatsa [Wed, 21 Jun 2017 18:17:35 +0000 (11:17 -0700)]
intel: PCI Ids for S SKU in CFL

Add the PCI IDs for S SKU IN CFL by following the spec.

v2: Update IDs.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>