OSDN Git Service
Chandler Carruth [Sat, 15 Jul 2017 15:44:36 +0000 (15:44 +0000)]
[wasm] Update two tests for r308025 which causes scheduling changes due
to the newly improved AA information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308100
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Sanjay Patel [Sat, 15 Jul 2017 15:29:47 +0000 (15:29 +0000)]
[InstCombine] allow (0 - x) & 1 --> x & 1 for vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308098
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Sanjay Patel [Sat, 15 Jul 2017 15:01:33 +0000 (15:01 +0000)]
[InstCombine] remove dead code/tests; NFCI
These patterns and tests were added to InstSimplify with:
https://reviews.llvm.org/rL303004
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308096
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Chandler Carruth [Sat, 15 Jul 2017 13:50:26 +0000 (13:50 +0000)]
Revert r308078 (and subsequent tweak in r308079) which introduces a test
that appears to exhibit non-determinism and is flaking on the bots
pretty consistently.
r308078: [ThinLTO] Ensure we always select the same function copy to import
r308079: Require asserts in new test that uses debug flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308095
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Florian Hahn [Sat, 15 Jul 2017 13:13:19 +0000 (13:13 +0000)]
[LoopInterchange] Add some optimization remarks.
Reviewers: anemet, karthikthecool, blitz.opensource
Reviewed By: anemet
Subscribers: mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D35122
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308094
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Nuno Lopes [Sat, 15 Jul 2017 09:09:24 +0000 (09:09 +0000)]
[docs] AliasAnalysis: clarify that PartialAlias doesn't enforce
objects to start at the same address
As discussed on the ML, there's consensus that this is what the implementations
do and it seems sensible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308090
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Chandler Carruth [Sat, 15 Jul 2017 08:08:19 +0000 (08:08 +0000)]
[PM/LCG] Teach the LazyCallGraph to maintain reference edges from every
function to every defined function known to LLVM as a library function.
LLVM can introduce calls to these functions either by replacing other
library calls or by recognizing patterns (such as memset_pattern or
vector math patterns) and replacing those with calls. When these library
functions are actually defined in the module, we need to have reference
edges to them initially so that we visit them during the CGSCC walk in
the right order and can effectively rebuild the call graph afterward.
This was discovered when building code with Fortify enabled as that is
a common case of both inline definitions of library calls and
simplifications of code into calling them.
This can in extreme cases of LTO-ing with libc introduce *many* more
reference edges. I discussed a bunch of different options with folks but
all of them are unsatisfying. They either make the graph operations
substantially more complex even when there are *no* defined libfuncs, or
they introduce some other complexity into the callgraph. So this patch
goes with the simplest possible solution of actual synthetic reference
edges. If this proves to be a memory problem, I'm happy to implement one
of the clever techniques to save memory here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308088
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Simon Atanasyan [Sat, 15 Jul 2017 07:14:25 +0000 (07:14 +0000)]
[mips] Handle the `long-calls` feature flags in the MIPS backend
If the `long-calls` feature flags is enabled, disable use of the `jal`
instruction. Instead of that call a function by by first loading its
address into a register, and then using the contents of that register.
Differential revision: https://reviews.llvm.org/D35168
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308087
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NAKAMURA Takumi [Sat, 15 Jul 2017 06:32:12 +0000 (06:32 +0000)]
SystemZCodeGen: Update libdeps. r308024 introduced LoopDataPrefetchPass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308086
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Yonghong Song [Sat, 15 Jul 2017 06:08:08 +0000 (06:08 +0000)]
bpf: fix a compilation bug due to unused variable for release build
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308083
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Matt Arsenault [Sat, 15 Jul 2017 05:52:59 +0000 (05:52 +0000)]
AMDGPU: Return correct type during argument lowering
The type needs to be casted back to the original argument type.
Fixes an assert that for some reason is only run when
using -debug.
Includes an additional combine to avoid test regressions
from having conversions mixed with multiple Assert[SZ]ext
nodes. On subtargets where i16 is legal, this was producing an i32
register with an i16 AssertZExt, truncated to i16 with another i8
AssertZExt.
t2: i32,ch = CopyFromReg t0, Register:i32 %vreg0
t3: i16 = truncate t2
t5: i16 = AssertZext t3, ValueType:ch:i8
t6: i8 = truncate t5
t7: i32 = zero_extend t6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308082
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Dinar Temirbulatov [Sat, 15 Jul 2017 05:43:54 +0000 (05:43 +0000)]
[SLPVectorizer] Add an extra parameter to tryScheduleBundle function, NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308081
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Yonghong Song [Sat, 15 Jul 2017 05:41:42 +0000 (05:41 +0000)]
bpf: generate better lowering code for certain select/setcc instructions
Currently, for code like below,
===
inner_map = bpf_map_lookup_elem(outer_map, &port_key);
if (!inner_map) {
inner_map = &fallback_map;
}
===
the compiler generates (pseudo) code like the below:
===
I1: r1 = bpf_map_lookup_elem(outer_map, &port_key);
I2: r2 = 0
I3: if (r1 == r2)
I4: r6 = &fallback_map
I5: ...
===
During kernel verification process, After I1, r1 holds a state
map_ptr_or_null. If I3 condition is not taken
(path [I1, I2, I3, I5]), supposedly r1 should become map_ptr.
Unfortunately, kernel does not recognize this pattern
and r1 remains map_ptr_or_null at insn I5. This will cause
verificaiton failure later on.
Kernel, however, is able to recognize pattern "if (r1 == 0)"
properly and give a map_ptr state to r1 in the above case.
LLVM here generates suboptimal code which causes kernel verification
failure. This patch fixes the issue by changing BPF insn pattern
matching and lowering to generate proper codes if the righthand
parameter of the above condition is a constant. A test case
is also added.
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308080
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Teresa Johnson [Sat, 15 Jul 2017 05:27:57 +0000 (05:27 +0000)]
Require asserts in new test that uses debug flag
This should fix bot failures from r308078.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308079
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Teresa Johnson [Sat, 15 Jul 2017 04:53:05 +0000 (04:53 +0000)]
[ThinLTO] Ensure we always select the same function copy to import
Summary:
Check if the first eligible callee is under the instruction threshold.
Checking this on the first eligible callee ensures that we don't end
up selecting different callees to import when we invoke this routine
with different thresholds due to reaching the callee via paths that
are shallower or hotter (when there are multiple copies, i.e. with
weak or linkonce linkage). We don't want to leave the decision of which
copy to import up to the backend.
Reviewers: mehdi_amini
Subscribers: inglorion, fhahn, llvm-commits
Differential Revision: https://reviews.llvm.org/D35436
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308078
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Haicheng Wu [Sat, 15 Jul 2017 02:12:16 +0000 (02:12 +0000)]
[TTI] Refine the cost of EXT in getUserCost()
Now, getUserCost() only checks the src and dst types of EXT to decide it is free
or not. This change first checks the types, then calls isExtFreeImpl(), and
check if EXT can form ExtLoad at last. Currently, only AArch64 has customized
implementation of isExtFreeImpl() to check if EXT can be folded into its use.
Differential Revision: https://reviews.llvm.org/D34458
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308076
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Kostya Serebryany [Sat, 15 Jul 2017 01:31:40 +0000 (01:31 +0000)]
[libFuzzer] remove stale code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308075
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Jakub Kuderski [Sat, 15 Jul 2017 01:27:16 +0000 (01:27 +0000)]
[Dominators] Fix reachable visitation and reenable a unit test
This fixes a minor bug in insertion to a reachable node that caused
DominatorTree.InsertDeleteExhaustive flakiness. The patch also adds
a new testcase for this exact failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308074
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Jakub Kuderski [Fri, 14 Jul 2017 23:49:12 +0000 (23:49 +0000)]
[Dominators] Temporarily disable a flaky unit test
The DominatorTree.InsertDeleteExhaustive uses a RNG with a
constant seed to generate different sequences of updates. The test
fails on some buildbots and this patch disables it for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308070
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Justin Bogner [Fri, 14 Jul 2017 23:33:04 +0000 (23:33 +0000)]
[libFuzzer] Allow non-fuzzer args after -ignore_remaining_args=1
With this change, libFuzzer will ignore any arguments after a sigil
argument, but it will preserve these arguments at the end of the
command line when launching subprocesses. Using this, its possible to
handle positional and single-dash arguments to the program under test
by discarding everything up to -ignore_remaining_args=1 in
LLVMFuzzerInitialize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308069
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Adrian Prantl [Fri, 14 Jul 2017 23:23:58 +0000 (23:23 +0000)]
Add missing space to comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308068
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Jakub Kuderski [Fri, 14 Jul 2017 22:24:15 +0000 (22:24 +0000)]
[Dominators] Remove an extra semicolon and add a missing include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308065
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Jakub Kuderski [Fri, 14 Jul 2017 21:58:53 +0000 (21:58 +0000)]
[Dominators] Implement incremental deletions
Summary:
This patch implements incremental edge deletions.
It also makes DominatorTreeBase store a pointer to the parent function. The parent function is needed to perform full rebuilts during some deletions, but it is also used to verify that inserted and deleted edges come from the same function.
Reviewers: dberlin, davide, grosser, sanjoy, brzycki
Reviewed By: dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35342
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308062
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Kostya Serebryany [Fri, 14 Jul 2017 21:48:19 +0000 (21:48 +0000)]
[libFuzzer] fix stats during merge
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308061
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Yi Kong [Fri, 14 Jul 2017 21:46:16 +0000 (21:46 +0000)]
[AArch64] Avoid selecting XZR inline ASM memory operand
Restricting register class to PointerRegClass for memory operands.
Also fix the PointerRegClass for AArch64 from GPR64 to GPR64sp, since
XZR cannot hold a memory pointer while SP is.
Fixes PR33134.
Differential Revision: https://reviews.llvm.org/D34999
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308060
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Geoff Berry [Fri, 14 Jul 2017 21:44:12 +0000 (21:44 +0000)]
[AArch64][Falkor] Avoid HW prefetcher tag collisions (step 1)
Summary:
This patch is the first step in reducing HW prefetcher instruction tag
collisions in inner loops for Falkor. It adds a pass that annotates IR
loads with metadata to indicate that they are known to be strided loads,
and adds a target lowering hook that translates this metadata to a
target-specific MachineMemOperand flag.
A follow on change will use this MachineMemOperand flag to re-write
instructions to reduce tag collisions.
Reviewers: mcrosier, t.p.northover
Subscribers: aemerson, rengolin, mgorny, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D34963
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308059
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Jakub Kuderski [Fri, 14 Jul 2017 21:38:15 +0000 (21:38 +0000)]
[Dominators] Add a missing include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308058
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Davide Italiano [Fri, 14 Jul 2017 21:20:29 +0000 (21:20 +0000)]
[AMDGPU] Throw away more dead code. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308055
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Jakub Kuderski [Fri, 14 Jul 2017 21:17:33 +0000 (21:17 +0000)]
[Dominators] Implement incremental insertions
Summary:
This patch introduces incremental edge insertions based on the Depth Based Search algorithm.
Insertions should work for both dominators and postdominators.
Reviewers: dberlin, grosser, davide, sanjoy, brzycki
Reviewed By: dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35341
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308054
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Dimitry Andric [Fri, 14 Jul 2017 21:14:58 +0000 (21:14 +0000)]
Fix mixed line terminators. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308052
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Geoff Berry [Fri, 14 Jul 2017 20:13:21 +0000 (20:13 +0000)]
[EarlyCSE] Handle calls with no MemorySSA info.
Summary:
When checking for memory dependencies between calls using MemorySSA,
handle cases where the calls have no MemoryAccess associated with them
because the AA analysis being used has determined that the call does not
read/write memory.
Fixes PR33756
Reviewers: dberlin, davide
Subscribers: mcrosier, llvm-commits, Prazek
Differential Revision: https://reviews.llvm.org/D35317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308051
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Haicheng Wu [Fri, 14 Jul 2017 19:16:47 +0000 (19:16 +0000)]
[JumpThreading] Add a pattern to TryToUnfoldSelectInCurrBB()
Add the following pattern to TryToUnfoldSelectInCurrBB()
bb:
%p = phi [0, %bb1], [1, %bb2], [0, %bb3], [1, %bb4], ...
%c = cmp %p, 0
%s = select %c, trueval, falseval
The Select in the above pattern will be unfolded and then jump-threaded. The
current implementation does not allow CMP in the middle of PHI and Select.
Differential Revision: https://reviews.llvm.org/D34762
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308050
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Krzysztof Parzyszek [Fri, 14 Jul 2017 19:02:32 +0000 (19:02 +0000)]
[Hexagon] Replace ISD opcode VPACK with VPACKE/VPACKO, NFC
This breaks up pack-even and pack-odd into two separate operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308049
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Davide Italiano [Fri, 14 Jul 2017 18:47:29 +0000 (18:47 +0000)]
[AMDGPU] Garbage collect dead code. NFCI.
Unbreaks the build with GCC7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308047
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Craig Topper [Fri, 14 Jul 2017 18:30:09 +0000 (18:30 +0000)]
[TableGen][MC] Fix a few places where we didn't hide the underlying type of LaneBitmask very well.
One place compared with 32, which I've replaced with LaneBitmask::BitWidth.
The other places are shifts of a constant 1 by a lane number. But if LaneBitmask were to be a larger type than 32-bits like 64-bits, the 1 would need to be 1ULL to do a 64-bit shift. To hide this I've added a LanebitMask::getLane that hides the shift and make sures the 1 is casted to correct type first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308042
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Jakub Kuderski [Fri, 14 Jul 2017 18:26:09 +0000 (18:26 +0000)]
[Dominators] Make IsPostDominator a template parameter
Summary:
DominatorTreeBase used to have IsPostDominators (bool) member to indicate if the tree is a dominator or a postdominator tree. This made it possible to switch between the two 'modes' at runtime, but it isn't used in practice anywhere.
This patch makes IsPostDominator a template argument. This way, it is easier to switch between different algorithms at compile-time based on this argument and design external utilities around it. It also makes it impossible to incidentally assign a postdominator tree to a dominator tree (and vice versa), and to further simplify template code in GenericDominatorTreeConstruction.
Reviewers: dberlin, sanjoy, davide, grosser
Reviewed By: dberlin
Subscribers: mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D35315
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308040
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Alfred Huang [Fri, 14 Jul 2017 17:56:55 +0000 (17:56 +0000)]
[AMDGPU] Do not insert an instruction into worklist twice in movetovalu
In moveToVALU(), move to vector ALU is performed, all instrs in
the use chain will be visited. We do not want the same node to be
pushed to the visit worklist more than once.
Differential Revision: https://reviews.llvm.org/D34726
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308039
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Jakub Kuderski [Fri, 14 Jul 2017 16:56:35 +0000 (16:56 +0000)]
[Dominators] Simplify block and node printing
Summary:
This patch adds `BlockPrinter`-- a small wrapper for printing CFG nodes and DomTree nodes to `raw_ostream`. It is meant to be only used internally, for debugging and printing errors.
Reviewers: dberlin, sanjoy, grosser, davide
Reviewed By: grosser, davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35286
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308036
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George Rimar [Fri, 14 Jul 2017 16:00:16 +0000 (16:00 +0000)]
[llvm-readobj] - Teach readobj to print DT_FILTER dynamic tag in human readable form.
Nothing special here, output format is similar to the format
used by binutils readelf and ELF Tool Chain readelf.
Differential revision: https://reviews.llvm.org/D35351
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308033
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Krzysztof Parzyszek [Fri, 14 Jul 2017 15:58:48 +0000 (15:58 +0000)]
[Hexagon] Add intrinsics for data cache operations
This is the LLVM part, adding definitions for
void @llvm.hexagon.Y2.dccleana(i8*)
void @llvm.hexagon.Y2.dccleaninva(i8*)
void @llvm.hexagon.Y2.dcinva(i8*)
void @llvm.hexagon.Y2.dczeroa(i8*)
void @llvm.hexagon.Y4.l2fetch(i8*, i32)
void @llvm.hexagon.Y5.l2fetch(i8*, i64)
The clang part will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308032
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Sanjay Patel [Fri, 14 Jul 2017 15:09:49 +0000 (15:09 +0000)]
[InstCombine] convert bitwise (in)equality checks to logical ops (PR32401)
As discussed in:
https://bugs.llvm.org/show_bug.cgi?id=32401
we have a backend transform to undo this:
https://reviews.llvm.org/rL299542
when it's likely that the xor version leads to better codegen, but we want
this form in IR for better analysis and simplification potential.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308031
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Simon Dardis [Fri, 14 Jul 2017 15:08:05 +0000 (15:08 +0000)]
Revert "Reland "[mips][mt][6/7] Add support for mftr, mttr instructions.""
FileCheck is crashing on in the input file, so reverting again while
I investigate.
This reverts r308023.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308030
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Sanjay Patel [Fri, 14 Jul 2017 14:43:28 +0000 (14:43 +0000)]
[InstCombine] add tests for PR32401; NFC
Also, add comments to a couple of tests that could be moved out of instcombine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308029
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Jonas Paulsson [Fri, 14 Jul 2017 14:30:46 +0000 (14:30 +0000)]
[SystemZ] Minor fixing in SystemZScheduleZ196.td
Some minor corrections for the recently added instructions.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308028
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Sanjay Patel [Fri, 14 Jul 2017 14:29:11 +0000 (14:29 +0000)]
[InstCombine] auto-generate complete test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308027
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Nirav Dave [Fri, 14 Jul 2017 13:56:21 +0000 (13:56 +0000)]
Improve Aliasing of operations to static alloca
Recommiting after adding check to avoid miscomputing alias information
on addresses of the same base but different subindices.
Memory accesses offset from frame indices may alias, e.g., we
may merge write from function arguments passed on the stack when they
are contiguous. As a result, when checking aliasing, we consider the
underlying frame index's offset from the stack pointer.
Static allocs are realized as stack objects in SelectionDAG, but its
offset is not set until post-DAG causing DAGCombiner's alias check to
consider access to static allocas to frequently alias. Modify isAlias
to consider access between static allocas and access from other frame
objects to be considered aliasing.
Many test changes are included here. Most are fixes for tests which
indirectly relied on our aliasing ability and needed to be modified to
preserve their original intent.
The remaining tests have minor improvements due to relaxed
ordering. The exception is CodeGen/X86/2011-10-19-widen_vselect.ll
which has a minor degradation dispite though the pre-legalized DAG is
improved.
Reviewers: rnk, mkuper, jonpa, hfinkel, uweigand
Reviewed By: rnk
Subscribers: sdardis, nemanjai, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D33345
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308025
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Jonas Paulsson [Fri, 14 Jul 2017 13:52:38 +0000 (13:52 +0000)]
[SystemZ] Enable LoopDataPrefetch pass.
Loop data prefetching has shown some improvements on benchmarks, and is
enabled at -O1 and above.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308024
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Simon Dardis [Fri, 14 Jul 2017 13:44:12 +0000 (13:44 +0000)]
Reland "[mips][mt][6/7] Add support for mftr, mttr instructions.""
Unlike many other instructions, these instructions have aliases which
take coprocessor registers, gpr register, accumulator (and dsp accumulator)
registers, floating point registers, floating point control registers and
coprocessor 2 data and control operands.
For the moment, these aliases are treated as pseudo instructions which are
expanded into the underlying instruction. As a result, disassembling these
instructions shows the underlying instruction and not the alias.
Reviewers: slthakur, atanasyan
Differential Revision: https://reviews.llvm.org/D35253
The last version of this patch broke one of the expensive checks buildbots,
this version changes the failing test/MC/Mips/mt/invalid.s and other invalid
tests to write the errors to a file and run FileCheck on that, rather than
relying on the 'not llvm-mc ... <%s 2>&1 | Filecheck %s' idiom.
Hopefully this will sarisfy the buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308023
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Zoran Jovanovic [Fri, 14 Jul 2017 10:52:22 +0000 (10:52 +0000)]
Reverting commit 308011.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308017
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Zoran Jovanovic [Fri, 14 Jul 2017 10:13:11 +0000 (10:13 +0000)]
[mips][microMIPS] Extending size reduction pass with ADDIUSP and ADDIUR1SP
Author: milena.vujosevic.janicic
Reviewers: sdardis
The patch extends size reduction pass for MicroMIPS.
The following instructions are examined and transformed, if possible:
ADDIU instruction is transformed into 16-bit instruction ADDIUSP
ADDIU instruction is transformed into 16-bit instruction ADDIUR1SP
Function InRange is changed to avoid left shifting of negative values, since
that caused some sanitizer tests to fail (so the previous patch
Differential Revision: https://reviews.llvm.org/D34511
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308011
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Diana Picus [Fri, 14 Jul 2017 09:46:06 +0000 (09:46 +0000)]
[ARM] GlobalISel: Support G_BRCOND
Insert a TSTri to set the flags and a Bcc to branch based on their
values. This is a bit inefficient in the (common) cases where the
condition for the branch comes from a compare right before the branch,
since we set the flags both as part of the compare lowering and as part
of the branch lowering. We're going to live with that until we settle on
a principled way to handle this kind of situation, which occurs with
other patterns as well (combines might be the way forward here).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308009
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Jonas Paulsson [Fri, 14 Jul 2017 09:18:18 +0000 (09:18 +0000)]
[SystemZ] Minor fixing in SystemZScheduleZEC12.td
Some minor corrections for the recently added instructions.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308007
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Renato Golin [Fri, 14 Jul 2017 08:33:52 +0000 (08:33 +0000)]
[RelTest] Diana is doing both releases now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308006
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Sam Parker [Fri, 14 Jul 2017 08:23:56 +0000 (08:23 +0000)]
[ARM] Allow rematerialization of ARM Thumb literal pool loads
Constants are crucial for code size in the ARM Thumb-1 instruction
set. The 16 bit instruction size often does not offer enough space
for immediate arguments. This means that additional instructions are
frequently used to load constants into registers. Since constants are
hoisted, this can lead to significant register spillage if they are
used multiple times in a single function. This can be avoided by
rematerialization, i.e. recomputing a constant instead of reloading
it from the stack. This patch fixes the rematerialization of literal
pool loads in the ARM Thumb instruction set.
Patch by Philip Ginsbach
Differential Revision: https://reviews.llvm.org/D33936
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308004
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Max Kazantsev [Fri, 14 Jul 2017 06:35:03 +0000 (06:35 +0000)]
[IRCE] Fix corner case with Start = INT_MAX
When iterating through loop
for (int i = INT_MAX; i > 0; i--)
We fail to generate the pre-loop for it. It happens because we use the
overflown value in a comparison predicate when identifying whether or not
we need it.
In old logic, we used SLE predicate against Greatest value which exceeds all
seen values of the IV and might be overflown. Now we use the GreatestSeen
value of this IV with SLT predicate.
Also added a test that ensures that a pre-loop is generated for such loops.
Differential Revision: https://reviews.llvm.org/D35347
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308001
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Adam Nemet [Fri, 14 Jul 2017 04:54:26 +0000 (04:54 +0000)]
[opt-viewer] Flush stdout after progress update
Without this, there was no progress shown during parsing but only during
rendering on macOS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308000
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Eric Christopher [Fri, 14 Jul 2017 04:33:43 +0000 (04:33 +0000)]
Add a set of comments explaining why getSubtargetImpl() is deleted on these targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307999
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Dinar Temirbulatov [Fri, 14 Jul 2017 03:48:29 +0000 (03:48 +0000)]
[SLPVectorizer] Add an extra parameter to alreadyVectorized function, NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307996
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Eric Christopher [Fri, 14 Jul 2017 01:40:47 +0000 (01:40 +0000)]
Remove set but not used variables from the debug info verifier code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307987
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Leo Li [Fri, 14 Jul 2017 00:35:21 +0000 (00:35 +0000)]
[CMake]Use LLVM_LIBRARY_DIR for lib path.
Summary:
This makes sure the correct lib path is being used when `CMAKE_CFG_INTDIR` or
`LLVM_LIBDIR_SUFFIX` is set.
Reviewers: beanz
Subscribers: mgorny, srhines, pirama, llvm-commits
Differential Revision: https://reviews.llvm.org/D35318
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307985
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Kostya Serebryany [Fri, 14 Jul 2017 00:18:37 +0000 (00:18 +0000)]
[libFuzzer] update the comments in afl/afl_driver.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307981
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Kostya Serebryany [Fri, 14 Jul 2017 00:16:23 +0000 (00:16 +0000)]
[libFuzzer] remove stale code; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307980
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Matt Arsenault [Fri, 14 Jul 2017 00:11:13 +0000 (00:11 +0000)]
AMDGPU: Detect kernarg segment pointer
This is necessary to pass the kernarg segment pointer
to callee functions. Also don't unconditionally enable
for kernels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307978
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Kostya Serebryany [Fri, 14 Jul 2017 00:06:27 +0000 (00:06 +0000)]
[libFuzzer] simplify the handling of memmem/strstr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307977
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Stanislav Mekhanoshin [Thu, 13 Jul 2017 23:59:15 +0000 (23:59 +0000)]
[AMDGPU] fcaninicalize optimization for GFX9+
Since GFX9 supports denorm modes for v_min_f32/v_max_f32 that
is possible to further optimize fcanonicalize and remove it
if applied to min/max given their operands are known not to be
an sNaN or that sNaNs are not supported.
Additionally we can remove fcanonicalize if denorms are supported
for the VT and we know that its argument is never a NaN.
Differential Revision: https://reviews.llvm.org/D35335
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307976
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Spyridoula Gravani [Thu, 13 Jul 2017 23:25:24 +0000 (23:25 +0000)]
[DWARF] Introduce verification for the unit header chain in .debug_info section to llvm-dwarfdump.
This patch adds verification checks for the unit header chain in the .debug_info section.
Specifically, for each unit in the .debug_info section, the verifier checks that:
The unit length is valid (i.e. the unit can actually fit in the .debug_info section)
The dwarf version of the unit is valid
The address size is valid (4 or 8)
The unit type (if the unit is in dwarf5) is valid
The debug_abbrev_offset is valid
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307975
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Jakub Kuderski [Thu, 13 Jul 2017 23:11:57 +0000 (23:11 +0000)]
[Dominators] Define Arc less-than operator inline.
This fixes warnings on some buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307974
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Kostya Serebryany [Thu, 13 Jul 2017 22:30:23 +0000 (22:30 +0000)]
[libFuzzer] move code around; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307973
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Reid Kleckner [Thu, 13 Jul 2017 22:05:30 +0000 (22:05 +0000)]
Fix build due to const-correctness issue after last minute refactoring
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307971
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Reid Kleckner [Thu, 13 Jul 2017 22:02:23 +0000 (22:02 +0000)]
[PDB] Fix quadratic behavior when writing a BinaryItemStream
Binary streams are an abstraction over a discontiguous buffer. To write
a discontiguous buffer, we want to copy each contiguous chunk
individually. Currently BinaryStreams do not expose a way to iterate
over the chunks, so the code repeatedly calls
readLongestContiguousChunk() with an increasing offset. In order to
lookup the chunk by offset, we would iterate the items list to figure
out which chunk the offset is within. This is obviously O(n^2).
Instead, pre-compute a table of offsets and do a binary search to figure
out which chunk to use. This is still only an O(n^2) to O(n log n)
improvement, but it's a very local fix that seems worth doing.
This improves self-linking lld.exe with PDBs from 90s to 10s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307970
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Jakub Kuderski [Thu, 13 Jul 2017 21:52:56 +0000 (21:52 +0000)]
[Dominators] Rename Update.Arc to Update.Edge
Update.Arc of type Arc caused a warning on some buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307968
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Matt Arsenault [Thu, 13 Jul 2017 21:43:42 +0000 (21:43 +0000)]
AMDGPU: Annotate call graph with used features
Previously this wouldn't detect used features indirectly
used in callee functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307967
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Jakub Kuderski [Thu, 13 Jul 2017 21:16:01 +0000 (21:16 +0000)]
[Dominators] Add CFGBuilder testing utility
Summary:
This patch introduces a new testing utility for building and modifying CFG -- CFGBuilder. The primary use case for the utility is testing the upcoming incremental dominator tree update API.
The current design provides a simple mechanism of constructing arbitrary graphs and then applying series of updates to them. CFGBuilder takes care of creating empty functions, connecting and disconnecting basic blocks. Under the hood it uses SwitchInst and UnreachableInst.
It will be also possible to create a thin wrapper over CFGBuilder for parsing string input and to hook it up to other textual tools (e.g. opt used with FileCheck).
Reviewers: dberlin, sanjoy, grosser, dblaikie
Reviewed By: dblaikie
Subscribers: davide, mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D34798
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307960
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Jakub Kuderski [Thu, 13 Jul 2017 20:45:32 +0000 (20:45 +0000)]
[Dominators] Simplify templates
Summary: DominatorTreeBase and related classes used overcomplicated template machinery. This patch simplifies them and gets rid of DominatorTreeBaseTraits and DominatorTreeBaseByTraits, which weren't actually used outside the DomTree construction.
Reviewers: dberlin, sanjoy, davide, grosser
Reviewed By: dberlin, davide, grosser
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35285
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307953
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Lang Hames [Thu, 13 Jul 2017 20:44:46 +0000 (20:44 +0000)]
[Orc] Fix some Error-related fixmes in CompileOnDemandLayer now that the layer
interface has been errorized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307952
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Sanjay Patel [Thu, 13 Jul 2017 20:35:45 +0000 (20:35 +0000)]
[InstCombine] put tests for commuted variants of the same fold together; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307951
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Jakub Kuderski [Thu, 13 Jul 2017 20:35:01 +0000 (20:35 +0000)]
[Dominators] Split SemiNCA into smaller functions
Summary:
This patch splits the SemiNCA algorithm into smaller functions. It also adds a new debug macro.
In order to perform incremental updates, we need to be able to refire SemiNCA on a subset of CFG nodes (determined by a DFS walk results). We also need to skip nodes that are not deep enough in a DomTree.
Reviewers: dberlin, davide, sanjoy, grosser
Reviewed By: dberlin, davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35282
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307950
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Jakub Kuderski [Thu, 13 Jul 2017 20:26:45 +0000 (20:26 +0000)]
[NFC] Move DEBUG_TYPE below includes in Hexagon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307947
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Reid Kleckner [Thu, 13 Jul 2017 20:12:23 +0000 (20:12 +0000)]
[PDB] Fix type server handling for archives
Summary:
This fixes type indices for SDK or CRT static archives. Previously we'd
try to look next to the archive object file path, which would not exist
on the local machine.
Also error out if we can't resolve a type server record. Hypothetically
we can recover from this error by discarding debug info for this object,
but that is not yet implemented.
Reviewers: ruiu, amccarth
Subscribers: aprantl, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D35369
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307946
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Jakub Kuderski [Thu, 13 Jul 2017 19:30:52 +0000 (19:30 +0000)]
[NFC] Move DEBUG_TYPE macro below includes...
in MachineCombiner.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307940
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Simon Dardis [Thu, 13 Jul 2017 19:27:41 +0000 (19:27 +0000)]
Revert "[mips][mt][6/7] Add support for mftr, mttr instructions."
This reverts r307836, it broke one of the buildbots. Reverting
while I investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307939
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George Karpenkov [Thu, 13 Jul 2017 19:26:27 +0000 (19:26 +0000)]
[lit] add a -vv option to echo all executed commands.
Debugging LIT scripts can be rather painful, as LIT directly does not
specify which line has failed.
Rather, FileCheck is expected to report the failing location, but it can
be often ambiguous if multiple commands are tested against the same
prefix. This change adds a -vv option, which echoes all output.
Then detecting the error becomes straightforward: last printed line is
the failing one.
Of course, it could be desired to try to get failing line number
directly from bash, but it involves excessive hacks on older bash
versions (cf.
https://stackoverflow.com/questions/
24398691/how-to-get-the-real-line-number-of-a-failing-bash-command)
Differential Revision: https://reviews.llvm.org/D35330
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307938
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Andrew Zhogin [Thu, 13 Jul 2017 18:57:40 +0000 (18:57 +0000)]
[X86][tests] Added rotate_vec.ll CodeGen test. NFC precommit for bug 33691 fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307937
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Jakub Kuderski [Thu, 13 Jul 2017 18:55:52 +0000 (18:55 +0000)]
[Dominators] Improve reachability verification
Summary:
This patch improves verification by making `verifyReachablility` look for CFG not found in the DomTree.
It also makes the verification work with postdominators by handling virtual root.
Reviewers: dberlin, davide, grosser, sanjoy
Reviewed By: dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35279
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307936
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Krzysztof Parzyszek [Thu, 13 Jul 2017 18:17:58 +0000 (18:17 +0000)]
[Hexagon] Use VSPLAT instead of COMBINE for vectors of type v2i32, NFC
This cleans up the vector shift patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307935
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Nemanja Ivanovic [Thu, 13 Jul 2017 18:17:10 +0000 (18:17 +0000)]
[PowerPC] Ensure displacements for DQ-Form instructions are multiples of 16
As outlined in the PR, we didn't ensure that displacements for DQ-Form
instructions are multiples of 16. Since the instruction encoding encodes
a quad-word displacement, a sub-16 byte displacement is meaningless and
ends up being encoded incorrectly.
Fixes https://bugs.llvm.org/show_bug.cgi?id=33671.
Differential Revision: https://reviews.llvm.org/D35007
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307934
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Sanjay Patel [Thu, 13 Jul 2017 17:24:57 +0000 (17:24 +0000)]
[InstCombine] add descriptive comments for tests; NFC
Also, remove unnecessary function attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307930
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Simon Pilgrim [Thu, 13 Jul 2017 17:10:12 +0000 (17:10 +0000)]
Fix unused variable warning on EXPENSIVE_CHECKS release builds. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307929
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Martin Storsjo [Thu, 13 Jul 2017 17:03:12 +0000 (17:03 +0000)]
[AArch64] Implement support for windows style vararg functions
Pass parameters properly in calls to such functions (pass all
floats in integer registers), and handle va_start properly (allocate
stack immediately below the arguments on the stack, to save the
register arguments into a single continuous array).
Differential Revision: https://reviews.llvm.org/D35006
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307928
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Martin Storsjo [Thu, 13 Jul 2017 17:03:02 +0000 (17:03 +0000)]
[llvm-objdump] Properly print MachO aarch64 addend relocations
Previously such relocations fell into the last case for local
symbols, using the relocation addend as symbol index, leading to
a crash.
Differential Revision: https://reviews.llvm.org/D35239
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307927
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Rafael Espindola [Thu, 13 Jul 2017 17:00:30 +0000 (17:00 +0000)]
Documentation fix. NFC.
A MCFixup might not even be in an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307926
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Reid Kleckner [Thu, 13 Jul 2017 16:56:24 +0000 (16:56 +0000)]
Put std::mutex usage behind #ifdefs to pacify the sanitizer buildbot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307925
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Frederich Munch [Thu, 13 Jul 2017 16:11:08 +0000 (16:11 +0000)]
Support: Add llvm::center_justify.
Summary: Completes the set.
Reviewers: ruiu
Reviewed By: ruiu
Subscribers: ruiu, llvm-commits
Differential Revision: https://reviews.llvm.org/D35278
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307922
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Davide Italiano [Thu, 13 Jul 2017 15:55:34 +0000 (15:55 +0000)]
[GlobalOpt] Autogenerate checks for the test in PR33686.
Also fix a typo while here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307921
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Davide Italiano [Thu, 13 Jul 2017 15:40:59 +0000 (15:40 +0000)]
Reapply [GlobalOpt] Remove unreachable blocks before optimizing a function.
This commit reapplies r307215 now that we found out and fixed
the cause of the cfi test failure (in r307871).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307920
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Sjoerd Meijer [Thu, 13 Jul 2017 15:29:13 +0000 (15:29 +0000)]
[AArch64] Enable the mnemonic spell checker
The AsmParser mnemonic spell checker was introduced in r307148 and enabled only
for ARM. This patch enables it for AArch64.
Differential Revision: https://reviews.llvm.org/D35357
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307918
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Amara Emerson [Thu, 13 Jul 2017 15:19:56 +0000 (15:19 +0000)]
[AArch64] Add an SVE target feature to the backend and TargetParser.
The feature will be used properly once assembler/disassembler support
begins to land.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307917
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Matthew Simpson [Thu, 13 Jul 2017 15:01:23 +0000 (15:01 +0000)]
[AArch64] Add preliminary support for ARMv8.1 SUB/AND atomics
This patch is a follow-up to r305893 and adds preliminary support for the
fetch_sub and fetch_and operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307913
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Anna Thomas [Thu, 13 Jul 2017 13:21:23 +0000 (13:21 +0000)]
[RuntimeUnrolling] Update DomTree correctly when exit blocks have successors
Summary:
When we runtime unroll with multiple exit blocks, we also need to update the
immediate dominators of the immediate successors of the exit blocks.
Reviewers: reames, mkuper, mzolotukhin, apilipenko
Reviewed by: mzolotukhin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35304
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307909
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Simon Dardis [Thu, 13 Jul 2017 11:28:05 +0000 (11:28 +0000)]
Reland "[mips] Fix multiprecision arithmetic."
For multiprecision arithmetic on MIPS, rather than using ISD::ADDE / ISD::ADDC,
get SelectionDAG to break down the operation into ISD::ADDs and ISD::SETCCs.
For MIPS, only the DSP ASE has a carry flag, so in the general case it is not
useful to directly support ISD::{ADDE, ADDC, SUBE, SUBC} nodes.
Also improve the generation code in such cases for targets with
TargetLoweringBase::ZeroOrOneBooleanContent by directly using the result of the
comparison node rather than using it in selects. Similarly for ISD::SUBE /
ISD::SUBC.
Address optimization breakage by moving the generation of MIPS specific integer
multiply-accumulate nodes to before legalization.
This revolves PR32713 and PR33424.
Thanks to Simonas Kazlauskas and Pirama Arumuga Nainar for reporting the issue!
Reviewers: slthakur
Differential Revision: https://reviews.llvm.org/D33494
The previous version of this patch was too aggressive in producing fused
integer multiple-addition instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307906
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