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Andres Rodriguez [Tue, 26 Sep 2017 16:22:46 +0000 (12:22 -0400)]
drm/amdgpu: add option for force enable multipipe policy for compute
Useful for testing the effects of multipipe compute without recompiling.
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andres Rodriguez [Tue, 26 Sep 2017 16:22:45 +0000 (12:22 -0400)]
drm/amdgpu: use multipipe compute policy on non PL11 asics
A performance regression for OpenCL tests on Polaris11 had this feature
disabled for all asics.
Instead, disable it selectively on the affected asics.
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 28 Sep 2017 13:47:32 +0000 (09:47 -0400)]
drm/amdgpu: fix vf error handling
The error handling for virtual functions assumed a single
vf per VM and didn't properly account for bare metal. Make
the error arrays per device and add locking.
Reviewed-by: Gavin Wan <gavin.wan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 19 Sep 2017 14:20:27 +0000 (10:20 -0400)]
drm/amdgpu: clarify license in amdgpu_trace_points.c
It was not clear. The rest of the driver is MIT/X11.
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Samuel Li [Tue, 22 Aug 2017 19:25:33 +0000 (15:25 -0400)]
drm/amdgpu: Add gem_prime_mmap support
v2: drop hdp invalidate/flush.
v3: honor pgoff during prime mmap. Add a barrier after cpu access.
v4: drop begin/end_cpu_access() for now, revisit later.
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 09:34:15 +0000 (17:34 +0800)]
drm/amd/powerplay: delete dead code in smumgr
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 09:33:55 +0000 (17:33 +0800)]
drm/amd/powerplay: delete SMUM_FIELD_MASK
repeated defining in hwmgr.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 09:31:07 +0000 (17:31 +0800)]
drm/amd/powerplay: delete SMUM_WAIT_INDIRECT_FIELD
repeated defining in hwmgr.h
use PHM_WAIT_INDIRECT_FIELD instand.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 09:26:03 +0000 (17:26 +0800)]
drm/amd/powerplay: delete SMUM_READ_FIELD
repeated defining in hwmgr.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 09:24:58 +0000 (17:24 +0800)]
drm/amd/powerplay: delete SMUM_SET_FIELD
repeated defining in hwmgr.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 09:21:25 +0000 (17:21 +0800)]
drm/amd/powerplay: delete SMUM_READ_VFPF_INDIRECT_FIELD
repeated defining in hwmgr.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 09:19:58 +0000 (17:19 +0800)]
drm/amd/powerplay: delete SMUM_WRITE_VFPF_INDIRECT_FIELD
repeated defining in hwmgr.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 09:18:16 +0000 (17:18 +0800)]
drm/amd/powerplay: delete SMUM_WRITE_FIELD
the macro is as same as PHM_WRITE_FIELD
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 09:17:08 +0000 (17:17 +0800)]
drm/amd/powerplay: delete SMU_WRITE_INDIRECT_FIELD
the macro is as same as PHM_WRITE_INDIRECT_FIELD
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 09:29:23 +0000 (17:29 +0800)]
drm/amd/powerplay: move macros to hwmgr.h
the macro is not relevant to SMU,
so rename SMU_WAIT_FIELD_UNEQUAL to
PHM_WAIT_FIELD_UNEQUAL and move to hwmgr.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 09:04:33 +0000 (17:04 +0800)]
drm/amd/powerplay: move PHM_WAIT_VFPF_INDIRECT_FIELD to hwmgr.h
the macro is not relevant to SMU, so move to hwmgr.h
and rename to PHM_WAIT_VFPF_INDIRECT_FIELD
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 09:00:50 +0000 (17:00 +0800)]
drm/amd/powerplay: move SMUM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL to hwmgr.h
the macro is not relevant to SMU, so move to hwmgr.h
and rename to PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 11:28:29 +0000 (19:28 +0800)]
drm/amd/powerplay: move SMUM_WAIT_INDIRECT_FIELD_UNEQUAL to hwmgr.h
the macro is not relevent to SMU, so move to hwmgr.h
and rename to PHM_WAIT_INDIRECT_FIELD_UNEQUAL
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 11:22:01 +0000 (19:22 +0800)]
drm/amd/powerplay: add new helper functions in hwmgr.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 08:49:29 +0000 (16:49 +0800)]
drm/amd/powerplay: use SMU_IND_INDEX/DATA_11 pair
in VFPF macros to support virtualization
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 26 Sep 2017 17:28:27 +0000 (13:28 -0400)]
drm/amd/powerplay: refine powerplay code.
delete struct smumgr, put smu backend function table
in struct hwmgr
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 07:41:33 +0000 (15:41 +0800)]
drm/amd/powerplay: delete dead code in hwmgr.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 20 Sep 2017 03:22:56 +0000 (11:22 +0800)]
drm/amd/powerplay: refine interface in struct pp_smumgr_func
unify to use struct hwmgr as function parameter in
smumgr.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 11 Sep 2017 15:29:26 +0000 (17:29 +0200)]
drm/amdgpu: simplify pinning into visible VRAM
Just set the CPU access required flag when we pin it.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 19 Sep 2017 08:09:53 +0000 (16:09 +0800)]
drm/amdgpu:fix firmware memoryleak(v2)
this fix memory leak due to request_firmware after driver
unloaded
v2:
release gmc firmware for gmc6/7/8 as well
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 15 Sep 2017 08:43:01 +0000 (16:43 +0800)]
drm/amdgpu:fix uvd ring fini routine(v2)
fix missing finish uvd enc_ring.
v2:
since the adev pointer check in already in ring_fini
so drop the check outsider
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 21 Sep 2017 07:10:06 +0000 (15:10 +0800)]
drm/amdgpu/sriov:alloc KIQ MQD in VRAM(v2)
this way after KIQ MQD released in drv unloading, CPC
can still let KIQ access this MQD thus RLCV SAVE_VF
will not fail
v2:
always use VRAM domain for KIQ MQD no matter BM or SRIOV
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 21 Sep 2017 06:59:40 +0000 (14:59 +0800)]
drm/amdgpu:unmap KCQ in gfx hw_fini(v2)
v2:
move kcq_disable out of SRIOV, make it genearal
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 4 Jul 2017 08:40:58 +0000 (16:40 +0800)]
drm/amdgpu:halt when vm fault
only with this way we can debug the VMC page fault issue
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Tue, 19 Sep 2017 16:58:15 +0000 (12:58 -0400)]
drm/amdgpu: Add copy_pte_num_dw member in amdgpu_vm_pte_funcs
Use it to replace the hard coded value in amdgpu_vm_bo_update_mapping().
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Fri, 15 Sep 2017 22:20:37 +0000 (18:20 -0400)]
drm/amdgpu: Fix a bug in amdgpu_fill_buffer()
When max_bytes is not 8 bytes aligned and bo size is larger than
max_bytes, the last 8 bytes in a ttm node may be left unchanged.
For example, on pre SDMA 4.0, max_bytes = 0x1fffff, and the bo size
is 0x200000, the problem will happen.
In order to fix the problem, we separately store the max nums of
PTEs/PDEs a single operation can set in amdgpu_vm_pte_funcs
structure, rather than inferring it from bytes limit of SDMA
constant fill, i.e. fill_max_bytes.
Together with the fix, we replace the hard code value "10" in
amdgpu_vm_bo_update_mapping() with the corresponding values from
structure amdgpu_vm_pte_funcs.
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Mon, 18 Sep 2017 18:25:31 +0000 (14:25 -0400)]
drm/amdgpu: Correct bytes limit for SDMA 3.0 copy and fill
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 18 Sep 2017 12:32:38 +0000 (14:32 +0200)]
drm/amdgpu: use 2MB fragment size for GFX6,7 and 8
Use 2MB fragment size by default for older hardware generations as well.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: John Bridgman <john.bridgman@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang.Yu [Thu, 21 Sep 2017 02:19:49 +0000 (10:19 +0800)]
drm/amdgpu: Fix driver reloading failure
SRIOV doesn't implement PMC capability of PCIe, so it can't update
power state by reading PMC register.
Currently, amdgpu driver doesn't disable pci device when removing
driver, the enable_cnt of pci device will not be decrease to 0.
When reloading driver, pci_enable_device will do nothing as
enable_cnt is not zero. And power state will not be updated as PMC
is not support.
So current_state of pci device is not D0 state and pci_enable_msi
return fail.
Add pci_disable_device when remmoving driver to fix the issue.
Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 21 Sep 2017 02:34:48 +0000 (10:34 +0800)]
drm/amd/powerplay: refine phm_register_thermal_interrupt interface
currently, not all asics implement this callback function
so not return error to avoid powerplay initialize failed
in those asices
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 20 Sep 2017 08:25:40 +0000 (16:25 +0800)]
drm/amd/amdgpu: add vega10/raven mmhub/athub golden settings
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 19 Sep 2017 17:32:10 +0000 (13:32 -0400)]
drm/amd/powerplay: change alert temperature range
Change to more meaningful range that triggers thermal
interrupts.
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 15 Sep 2017 20:43:38 +0000 (16:43 -0400)]
drm/amd/powerplay: implement register thermal interrupt for Vega10
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 15 Sep 2017 20:38:49 +0000 (16:38 -0400)]
drm/amd/powerplay: add register thermal interrupt in hwmgr_hw_init
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 15 Sep 2017 20:33:38 +0000 (16:33 -0400)]
drm/amdgpu: add cgs query info of pci bus devfn
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 19 Sep 2017 15:29:04 +0000 (11:29 -0400)]
drm/amd/amdgpu: Partial revert of iova debugfs
We discovered that on some devices even with iommu enabled
you can access all of system memory through the iommu translation.
Therefore, we revert the read method to the translation only service
and drop the write method completely.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christan König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 20 Sep 2017 02:55:44 +0000 (10:55 +0800)]
drm/amd/amgpu: update vega10 sdma golden setting
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 20 Sep 2017 02:53:39 +0000 (10:53 +0800)]
drm/amd/amgpu: update raven sdma golden setting
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 15 Sep 2017 06:35:09 +0000 (14:35 +0800)]
drm/amdgpu/sriov:fix memory leak after gpu reset
GPU reset will require all hw doing hw_init thus
ucode_init_bo will be invoked again, which lead to
memory leak
skip the fw_buf allocation during sriov gpu reset to avoid
memory leak.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 15 Sep 2017 05:40:31 +0000 (13:40 +0800)]
drm/amdgpu:make ctx_add_fence interruptible(v2)
otherwise a gpu hang will make application couldn't be killed
under timedout=0 mode
v2:
Fix memoryleak job/job->s_fence issue
unlock mn
remove the ERROR msg after waiting being interrupted
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 15 Sep 2017 08:58:08 +0000 (16:58 +0800)]
drm/amdgpu/sriov:init csb for gfxv9
RLC need CSB registers initiated under SRIOV during world switch
otherwise the clear state buffer behav will not be recovered to
current VF scheme after switch back
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Horace Chen [Wed, 28 Jun 2017 09:51:50 +0000 (17:51 +0800)]
drm/amdgpu/sriov:increate mailbox polling timeout
increase timeout to 12 seconds,because there may have multiple
FLR waiting for done, the waiting time of events may be long,
increase to 12s to reduce timeout failure.
Signed-off-by: Horace Chen <horace.chen@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 15 Sep 2017 07:34:52 +0000 (15:34 +0800)]
drm/amdgpu/sriov:fix page fault issue of driver unload
bo_free on csa is too late to put in amdgpu_fini because that
time ttm is already finished,
Move it earlier to avoid the page fault.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 4 Jul 2017 07:43:38 +0000 (15:43 +0800)]
drm/amdgpu:use formal register to trigger hdp invalidate
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 15 Sep 2017 07:03:24 +0000 (15:03 +0800)]
drm/amdgpu:hdp flush should be put it initialized
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 9 Jun 2017 07:04:49 +0000 (15:04 +0800)]
drm/amdgpu:insert TMZ_BEGIN
FRAME_CONTROL(begin) is needed for vega10 due to ucode logic change,
it can fix some CTS random fail under gfx preemption enabled mode.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 15 Sep 2017 10:42:12 +0000 (18:42 +0800)]
drm/amdgpu/sriov:don't load psp fw during gpu reset
At least for SRIOV we found reload PSP fw during
gpu reset cause PSP hang.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 15 Sep 2017 10:57:12 +0000 (18:57 +0800)]
drm/amdgpu/sriov:move in_reset to adev and rename
currently in_reset is only used in sriov gpu reset, and it
will be used for other non-gfx hw component later, like
PSP, so move it from gfx to adev and rename to in_sriov_reset
make more sense.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 14 Sep 2017 11:45:33 +0000 (19:45 +0800)]
drm/amdgpu:no kiq in IH
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 12 Sep 2017 06:33:29 +0000 (14:33 +0800)]
drm/amdgpu/sriov:fix missing error handling
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Thu, 14 Sep 2017 08:25:19 +0000 (16:25 +0800)]
drm/amdgpu: Add GPU reset functionality for Vega10
V2
Signed-off-by: Ken Wang <Ken.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 18 Sep 2017 12:13:28 +0000 (08:13 -0400)]
drm/ttm: Remove TTM dma tracepoint since it's not required anymore
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 18 Sep 2017 12:10:00 +0000 (08:10 -0400)]
drm/amd/amdgpu: remove usage of ttm trace
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 18 Sep 2017 11:28:14 +0000 (07:28 -0400)]
drm/amd/amdgpu: add support for iova_to_phys to replace TTM trace (v5)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(v2): Add domain to iova debugfs
(v3): Add true read/write methods to access system memory of pages
mapped to the device
(v4): Move get_domain call out of loop and return on error
(v5): Just use kmap/kunmap
Tom St Denis [Mon, 18 Sep 2017 11:14:56 +0000 (07:14 -0400)]
drm/amd/amdgpu: Fold TTM debugfs entries into array (v2)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(v2): add domains and avoid strcmp
Rex Zhu [Tue, 19 Sep 2017 06:36:08 +0000 (14:36 +0800)]
drm/amdgpu: fix checkpatch.pl warning to amdgpu_drv.c
fix checkpatch.pl WARNING:
Prefer 'unsigned int' to bare use of 'unsigned'
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Fri, 3 Mar 2017 16:54:37 +0000 (11:54 -0500)]
drm/amdgpu: remove the clearance of vce 4.0 interrupt mask
Requested by SRIOV, the clearance of the bit moved into firmware
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang.Yu [Wed, 13 Sep 2017 02:58:19 +0000 (10:58 +0800)]
drm/amdgpu/sdma3: set wptr shadow atomically
Port it from sdma4 for wptr polling usage.
Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiangliang.Yu [Tue, 12 Sep 2017 09:31:46 +0000 (17:31 +0800)]
drm/amdgpu/sdma3: Enable sdma wptr polling for SRIOV
When hypervisor triggering FLR for one of VFs, need to enable sdma
wptr polling to avoid missing wptr update if enabling doorbell.
Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 3 Jul 2017 17:49:55 +0000 (19:49 +0200)]
drm/ttm: cleanup ttm_page_alloc_dma.c
Remove unused defines and variables. Also stop computing the
gfp_flags when they aren't used.
No intended functional change.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Sat, 26 Aug 2017 06:43:06 +0000 (02:43 -0400)]
drm/amdgpu: Track pending retry faults in IH and VM (v2)
IH tracks pending retry faults in a hash table for fast lookup in
interrupt context. Each VM has a short FIFO of pending VM faults for
processing in a bottom half.
The IH prescreening stage adds retry faults and filters out repeated
retry interrupts to minimize the impact of interrupt storms.
It's the VM's responsibility remove pending faults once they are
handled. For now this is only done when the VM is destroyed.
v2:
- Made the hash table smaller and the FIFO longer. I never want the
FIFO to fill up, because that would make prescreen take longer.
128 pending page faults should be enough to keep migrations busy.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com> (v1)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Thu, 24 Aug 2017 23:22:32 +0000 (19:22 -0400)]
drm/amd: Closed hash table with low overhead (v2)
This adds a statically sized closed hash table implementation with
low memory and CPU overhead. The API is inspired by kfifo.
Storing, retrieving and deleting data does not involve any dynamic
memory management, which makes it ideal for use in interrupt context.
Static memory usage per entry comprises a 32 or 64 bit hash key, two
bits for occupancy tracking and the value size stored in the table.
No list heads or pointers are needed. Therefore this data structure
should be quite cache-friendly, too.
It uses linear probing and lazy deletion. During lookups free space
is reclaimed and entries relocated to speed up future lookups.
v2: squash in do_div and _BITOPS_LONG_SHIFT fixes
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Sat, 26 Aug 2017 06:40:45 +0000 (02:40 -0400)]
drm/amdgpu: Add prescreening stage in IH processing (v2)
To filter out high-frequency interrupts that can be safely ignored.
v2: squash in trivial typo fix for si (Alex)
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Sat, 26 Aug 2017 06:10:12 +0000 (02:10 -0400)]
drm/amdkfd: Use PASID manager from KGD
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Sat, 26 Aug 2017 06:00:57 +0000 (02:00 -0400)]
drm/amdkfd: Separate doorbell allocation from PASID
PASID management is moving into KGD. Limiting the PASID range to the
number of doorbell pages is no longer practical.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Sat, 26 Aug 2017 01:30:18 +0000 (21:30 -0400)]
drm/radeon: Add PASID manager for KFD
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Sat, 26 Aug 2017 00:40:26 +0000 (20:40 -0400)]
drm/amdgpu: Add PASID management
Allows assigning a PASID to a VM for identifying VMs involved in page
faults. The global PASID manager is also exported in the KFD
interface so that AMDGPU and KFD can share the PASID space.
PASIDs of different sizes can be requested. On APUs, the PASID size
is deterined by the capabilities of the IOMMU. So KFD must be able
to allocate PASIDs in a smaller range.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Sat, 26 Aug 2017 00:15:04 +0000 (20:15 -0400)]
drm/amdgpu: Fix error handling in amdgpu_vm_init
Make sure vm->root.bo is not left reserved if amdgpu_bo_kmap fails.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 15 Sep 2017 08:30:52 +0000 (16:30 +0800)]
drm/amd/powerplay: Simplify smu7_voting_clients()
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 12 Sep 2017 05:37:40 +0000 (13:37 +0800)]
drm/amdgpu: add powerplay support for CI asics
currently, for CI asics,
use dpm by default, amdgpu.dpm=-1.
when set amdgpu.dpm=1, enable powplay.
when set amdgpu.dpm=0, disable both dpm and powerplay.
when powerplay is stable on CI asics, ci_dpm will
be removed.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 14 Sep 2017 13:05:18 +0000 (21:05 +0800)]
drm/amd/powerplay: Add support for CI asics to hwmgr
Add support for CI asics (Bonaire, Hawaii) to
the powerplay hwmgr
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 14 Sep 2017 13:14:59 +0000 (21:14 +0800)]
drm/amd/powerplay: Add support functions for CI to ppatomctrl.c
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 15 Sep 2017 03:09:20 +0000 (11:09 +0800)]
drm/amd/powerplay: refine dmesg info under powerplay
Use pr_debug to prevent spamming unimportant dmesg.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 14 Sep 2017 01:10:41 +0000 (09:10 +0800)]
drm/amd/powerplay: fix set target TDP error on tonga/iceland
ConfigurableTDP do not exist from Fiji.
so only use in previous ASIC.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 8 Sep 2017 11:34:33 +0000 (19:34 +0800)]
drm/amd/powerplay: add CI asics support to smumgr (v3)
This ports support for CI asics (Bonaire, Hawaii)
to the powerplay smumgr
v2: warning fix (Alex)
v3: squash in fix for thermal (Tom)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 12 Sep 2017 05:18:13 +0000 (13:18 +0800)]
drm/amd/powerplay: fix pcie max lane define error
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 8 Sep 2017 06:31:26 +0000 (14:31 +0800)]
drm/amd/powerplay: fix spelling typo in function name
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 8 Sep 2017 06:05:51 +0000 (14:05 +0800)]
drm/amdgpu: add support for request SI/CI firmware in CGS
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 6 Sep 2017 10:43:52 +0000 (18:43 +0800)]
drm/amdgpu: unify the interface of amd_pm_funcs
put amd_pm_funcs table in struct powerplay for all
asics.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 6 Sep 2017 08:08:03 +0000 (16:08 +0800)]
drm/amd/powerplay: use struct amd_pm_funcs in powerplay
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 6 Sep 2017 07:27:59 +0000 (15:27 +0800)]
drm/amdgpu: rename amdgpu_dpm_funcs to amd_pm_funcs
renamed amdgpu_dpm_funcs and moved to amd_shared.h
so can shared with powerplay.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 4 Sep 2017 10:22:02 +0000 (18:22 +0800)]
drm/amd/powerplay: delete dead code in powerplay
delete functiontable related codes
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 4 Sep 2017 10:11:52 +0000 (18:11 +0800)]
drm/amd/powerplay: refine powerplay code for RV
use function points instand of function table.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 4 Sep 2017 09:51:28 +0000 (17:51 +0800)]
drm/amd/powerplay: refine powerplay code for CZ/ST
1. add function points instand of creat function tables
2. implement stop dpm tasks for CZ/ST
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 4 Sep 2017 08:25:48 +0000 (16:25 +0800)]
drm/amd/powerplay: refine code for thermal control in powerplay
add function point start_thermal_controller in hwmgr,
delete thermal function table and related functions
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 14 Sep 2017 12:57:26 +0000 (08:57 -0400)]
drm/amd/amdgpu: Support VM environments in amdgpu_ttm_access_memory()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arnd Bergmann [Fri, 15 Sep 2017 20:06:58 +0000 (22:06 +0200)]
drm/radeon: properly initialize r600_audio_status() data
The structure returned from r600_audio_status() is only partially
initialized, and older gcc versions (4.3 and 4.4) warn about this:
drivers/gpu/drm/radeon/r600_hdmi.c: In function 'r600_audio_status':
drivers/gpu/drm/radeon/r600_hdmi.c:108: error: 'status.id' is used uninitialized in this function
drivers/gpu/drm/radeon/r600_hdmi.c:108: error: 'status.connected' is used uninitialized in this function
drivers/gpu/drm/radeon/r600_hdmi.c:108: error: 'status.offset' is used uninitialized in this function
This is harmless and surprisingly correct in C99, as the caller
only accesses the fields that got initialized, so newer compilers
don't warn about it, but initializing the entire structure feels
like the right thing to do here and avoids the warning.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 15 Sep 2017 21:36:19 +0000 (17:36 -0400)]
drm/amdgpu/psp: declare raven psp firmware
So it gets picked up properly by the kernel.
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Allen Pais [Wed, 13 Sep 2017 08:01:09 +0000 (13:31 +0530)]
drivers:gpu:Use ARRAY_SIZE() for the size calculation of the array.
Signed-off-by: Allen Pais <allen.lkml@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Wed, 13 Sep 2017 16:35:15 +0000 (12:35 -0400)]
drm/amd/amdgpu: Change vram debugfs to NO_KIQ for VM environments
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 13 Sep 2017 08:43:09 +0000 (10:43 +0200)]
drm/ttm: fix memory leak while individualizing BOs
We need to free the reservation object before we take the BO
from the delayed delete list.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 12 Sep 2017 08:56:17 +0000 (10:56 +0200)]
drm/amdgpu: fix and cleanup amdgpu_bo_create v2
We adjusted the BO flags for USWC handling, but those never took effect
because the placement was passed in instead of generated inside this
function.
v2: better commit message
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 11 Sep 2017 15:10:26 +0000 (17:10 +0200)]
drm/amd: remove min/max addr handling from cgs
Nobody is actually using this and it causes a bunch of unused and buggy code.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 11 Sep 2017 13:51:30 +0000 (15:51 +0200)]
drm/amdgpu: fix cgs alignment handling
This always allocated on PAGE_SIZE alignment.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Mon, 11 Sep 2017 08:09:17 +0000 (17:09 +0900)]
radeon: Only destroy fbdev framebuffer if it was initialized
Fixes crash when trying to unload the radeon module before the fbdev
framebuffer was initialized, which can happen since the DRM fbdev helper
code supports deferred setup.
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>