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4 years ago[docs][llvm-readobj] Add a note to options that do nothing in GNU output
James Henderson [Fri, 5 Jul 2019 16:38:52 +0000 (16:38 +0000)]
[docs][llvm-readobj] Add a note to options that do nothing in GNU output

--section-data, --section-relocations and --section-symbols have no
effect for GNU style ouput. This patch changes the docs to point this
out, as it has caught me out on a couple of occasions.

See also https://bugs.llvm.org/show_bug.cgi?id=42522.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365221 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[FileCheck] Share variable instance among uses
Thomas Preud'homme [Fri, 5 Jul 2019 16:25:46 +0000 (16:25 +0000)]
[FileCheck] Share variable instance among uses

Summary:
This patch changes expression support to use one instance of
FileCheckNumericVariable per numeric variable rather than one per
variable and per definition. The current system was only necessary for
the last patch of the numeric expression support patch series in order
to handle a line using a variable defined earlier on the same line from
the input text. However this can be dealt more efficiently.

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64229

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365220 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[FileCheck] Don't diagnose undef vars at parse time
Thomas Preud'homme [Fri, 5 Jul 2019 16:25:33 +0000 (16:25 +0000)]
[FileCheck] Don't diagnose undef vars at parse time

Summary:
Diagnosing use of undefined variables takes place in
parseNumericVariableUse() and printSubstitutions() for numeric variables
but only takes place in printSubstitutions() for string variables. The
reason for the split location of diagnostics is that parsing is not
aware of the clearing of variables due to --enable-var-scope and thus
use of variables cleared in this way can only be catched by
printSubstitutions().

Beyond the code level inconsistency, there is also a user facing
inconsistency since diagnostics look different between the two
functions. While the diagnostic in printSubstitutions is more verbose,
doing the diagnostic there allows to diagnose all undefined variables
rather than just the first one and error out.

This patch create dummy variable definition when encountering a use of
undefined variable so that parsing can proceed and be diagnosed by
printSubstitutions() later. Tests that were testing whether parsing
fails in such case are thus modified accordingly.

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64228

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365219 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[AMDGPU] Added a new metadata for multi grid sync implicit argument
Yaxun Liu [Fri, 5 Jul 2019 16:05:17 +0000 (16:05 +0000)]
[AMDGPU] Added a new metadata for multi grid sync implicit argument

Patch by Christudasan Devadasan.

Differential Revision: https://reviews.llvm.org/D63886

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365217 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoScheduleDAG: Fix incorrectly killing registers in bundles
Matt Arsenault [Fri, 5 Jul 2019 15:32:28 +0000 (15:32 +0000)]
ScheduleDAG: Fix incorrectly killing registers in bundles

When looking for uses/defs to add kill flags, the iterator was double
incremented, skipping the first instruction in the bundle. The use
register in the first bundle instruction was then incorrectly killed.
The "First" instruction should be the BUNDLE itself as the proper
reverse iterator endpoint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365216 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ThinLTO] Attempt to recommit r365188 after alignment fix
Eugene Leviant [Fri, 5 Jul 2019 15:25:05 +0000 (15:25 +0000)]
[ThinLTO] Attempt to recommit r365188 after alignment fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365215 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ARM] MVE patterns for VMVN, VORR and VBIC
David Green [Fri, 5 Jul 2019 15:21:29 +0000 (15:21 +0000)]
[ARM] MVE patterns for VMVN, VORR and VBIC

This add simple Q register forms of bitwise not instructions.

Differential Revision: https://reviews.llvm.org/D63983

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365214 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Merge r365203
Nico Weber [Fri, 5 Jul 2019 15:14:06 +0000 (15:14 +0000)]
gn build: Merge r365203

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365213 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[AMDGPU] DPP combiner: recognize identities for more opcodes
Jay Foad [Fri, 5 Jul 2019 14:52:48 +0000 (14:52 +0000)]
[AMDGPU] DPP combiner: recognize identities for more opcodes

Summary:
This allows the DPP combiner to kick in more often. For example the
exclusive scan generated by the atomic optimizer for a divergent atomic
add used to look like this:

        v_mov_b32_e32 v3, v1
        v_mov_b32_e32 v5, v1
        v_mov_b32_e32 v6, v1
        v_mov_b32_dpp v3, v2  wave_shr:1 row_mask:0xf bank_mask:0xf
        s_nop 1
        v_add_u32_dpp v4, v3, v3  row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:0
        v_mov_b32_dpp v5, v3  row_shr:2 row_mask:0xf bank_mask:0xf
        v_mov_b32_dpp v6, v3  row_shr:3 row_mask:0xf bank_mask:0xf
        v_add3_u32 v3, v4, v5, v6
        v_mov_b32_e32 v4, v1
        s_nop 1
        v_mov_b32_dpp v4, v3  row_shr:4 row_mask:0xf bank_mask:0xe
        v_add_u32_e32 v3, v3, v4
        v_mov_b32_e32 v4, v1
        s_nop 1
        v_mov_b32_dpp v4, v3  row_shr:8 row_mask:0xf bank_mask:0xc
        v_add_u32_e32 v3, v3, v4
        v_mov_b32_e32 v4, v1
        s_nop 1
        v_mov_b32_dpp v4, v3  row_bcast:15 row_mask:0xa bank_mask:0xf
        v_add_u32_e32 v3, v3, v4
        s_nop 1
        v_mov_b32_dpp v1, v3  row_bcast:31 row_mask:0xc bank_mask:0xf
        v_add_u32_e32 v1, v3, v1
        v_add_u32_e32 v1, v2, v1
        v_readlane_b32 s0, v1, 63

But now most of the dpp movs are combined into adds:

        v_mov_b32_e32 v3, v1
        v_mov_b32_e32 v5, v1
        s_nop 0
        v_mov_b32_dpp v3, v2  wave_shr:1 row_mask:0xf bank_mask:0xf
        s_nop 1
        v_add_u32_dpp v4, v3, v3  row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:0
        v_mov_b32_dpp v5, v3  row_shr:2 row_mask:0xf bank_mask:0xf
        v_mov_b32_dpp v1, v3  row_shr:3 row_mask:0xf bank_mask:0xf
        v_add3_u32 v1, v4, v5, v1
        s_nop 1
        v_add_u32_dpp v1, v1, v1  row_shr:4 row_mask:0xf bank_mask:0xe
        s_nop 1
        v_add_u32_dpp v1, v1, v1  row_shr:8 row_mask:0xf bank_mask:0xc
        s_nop 1
        v_add_u32_dpp v1, v1, v1  row_bcast:15 row_mask:0xa bank_mask:0xf
        s_nop 1
        v_add_u32_dpp v1, v1, v1  row_bcast:31 row_mask:0xc bank_mask:0xf
        v_add_u32_e32 v1, v2, v1
        v_readlane_b32 s0, v1, 63

Reviewers: arsenm, vpykhtin

Subscribers: kzhuravl, nemanjai, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kbarton, MaskRay, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64207

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365211 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoReverted r365188 due to alignment problems on i686-android
Eugene Leviant [Fri, 5 Jul 2019 13:26:05 +0000 (13:26 +0000)]
Reverted r365188 due to alignment problems on i686-android

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365206 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoScalable Vector IR Type with further LTO fixes
Graham Hunter [Fri, 5 Jul 2019 12:48:16 +0000 (12:48 +0000)]
Scalable Vector IR Type with further LTO fixes

Reintroduces the scalable vector IR type from D32530, after it was reverted
a couple of times due to increasing chromium LTO build times. This latest
incarnation removes the walk over aggregate types from the verifier entirely,
in favor of rejecting scalable vectors in the isValidElementType methods in
ArrayType and StructType. This removes the 70% degradation observed with
the second repro tarball from PR42210.

Reviewers: thakis, hans, rengolin, sdesmalen

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D64079

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365203 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoThis reverts r365061 and r365062 (test update)
Robert Lougher [Fri, 5 Jul 2019 12:42:06 +0000 (12:42 +0000)]
This reverts r365061 and r365062 (test update)

Revision r365061 changed a skip of debug instructions for a skip
of meta instructions. This is not safe, as IMPLICIT_DEF is classed
as a meta instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365202 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[RISCV] Support @llvm.readcyclecounter() Intrinsic
Sam Elliott [Fri, 5 Jul 2019 12:35:21 +0000 (12:35 +0000)]
[RISCV] Support @llvm.readcyclecounter() Intrinsic

On RISC-V, the `cycle` CSR holds a 64-bit count of the number of clock
cycles executed by the core, from an arbitrary point in the past. This
matches the intended semantics of `@llvm.readcyclecounter()`, which we
currently leave to the default lowering (to the constant 0).

With this patch, we will now correctly lower this intrinsic to the
intended semantics, using the user-space instruction `rdcycle`. On
64-bit targets, we can directly lower to this instruction.

On 32-bit targets, we need to do more, as `rdcycle` only returns the low
32-bits of the `cycle` CSR. In this case, we perform a custom lowering,
based on the PowerPC lowering, using `rdcycleh` to obtain the high
32-bits of the `cycle` CSR. This custom lowering inserts a new basic
block which detects overflow in the high 32-bits of the `cycle` CSR
during reading (because multiple instructions are required to read). The
emitted assembly matches the suggested assembly in the RISC-V
specification.

Differential Revision: https://reviews.llvm.org/D64125

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365201 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agolld, llvm-dlltool, llvm-lib: Use getAsString() instead of getSpelling() for printing...
Nico Weber [Fri, 5 Jul 2019 12:31:32 +0000 (12:31 +0000)]
lld, llvm-dlltool, llvm-lib: Use getAsString() instead of getSpelling() for printing unknown args

Since OPT_UNKNOWN args never have any values and consist only of
spelling (and are never aliased), this doesn't make any difference in
practice, but it's more consistent with Arg's guidance to use
getAsString() for diagnostics, and it matches what clang does.

Also tweak two tests to use an unknown option that contains '=' for
additional coverage while here. (The new tests pass fine with the old
code too though.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365200 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoRevert r365198 as this accidentally commited something that
Robert Lougher [Fri, 5 Jul 2019 12:30:45 +0000 (12:30 +0000)]
Revert r365198 as this accidentally commited something that
should not have been added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365199 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoThis reverts r365061 and r365062 (test update)
Robert Lougher [Fri, 5 Jul 2019 12:20:21 +0000 (12:20 +0000)]
This reverts r365061 and r365062 (test update)

Revision r365061 changed a skip of debug instructions for a skip
of meta instructions. This is not safe, as IMPLICIT_DEF is classed
as a meta instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365198 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[RISCV][NFC] Replace hard-coded CSR duplication with symbolic references
Sam Elliott [Fri, 5 Jul 2019 12:16:40 +0000 (12:16 +0000)]
[RISCV][NFC] Replace hard-coded CSR duplication with symbolic references

Reviewers: asb, lenary

Reviewed By: asb, lenary

Subscribers: MaskRay, hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64139

Patch by James Clarke (jrtc27)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365195 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoFix MSVC/cppcheck Use::Next isn't initialized warning. NFCI.
Simon Pilgrim [Fri, 5 Jul 2019 12:12:23 +0000 (12:12 +0000)]
Fix MSVC/cppcheck Use::Next isn't initialized warning. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365194 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[llvm-objcopy] Allow strip symtab from executables and DSOs
Eugene Leviant [Fri, 5 Jul 2019 12:10:44 +0000 (12:10 +0000)]
[llvm-objcopy] Allow strip symtab from executables and DSOs

Differential revision: https://reviews.llvm.org/D61672

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365193 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[FileCheck] Fix comment in parseNumericVariableUse
Thomas Preud'homme [Fri, 5 Jul 2019 12:01:12 +0000 (12:01 +0000)]
[FileCheck] Fix comment in parseNumericVariableUse

Summary:
Comment explaining the interaction between parsing of numeric variable
definition and uses in parseNumericVariableUse is stale since it
suggests both use and definition parsing is done in the same function.
This was the case in a previous version of the patch committed as
71d3f227a790d6cf39d8c6267940e0dc0c237e11 but is no longer the case. This
patch updates the comment accordingly.

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64227

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365192 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[FileCheck] Factor some parsing checks out
Thomas Preud'homme [Fri, 5 Jul 2019 12:01:06 +0000 (12:01 +0000)]
[FileCheck] Factor some parsing checks out

Summary:
Both callers of parseNumericVariableDefinition() perform the same extra
check that no character is found after the variable name. This patch
factors out this check into parseNumericVariableDefinition().

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64226

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365191 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[FileCheck] Add missing final dot in comment
Thomas Preud'homme [Fri, 5 Jul 2019 12:00:56 +0000 (12:00 +0000)]
[FileCheck] Add missing final dot in comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365190 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ThinLTO] Attempt to recommit r365040 after caching fix
Eugene Leviant [Fri, 5 Jul 2019 12:00:10 +0000 (12:00 +0000)]
[ThinLTO] Attempt to recommit r365040 after caching fix

It's possible that some function can load and store the same
variable using the same constant expression:

store %Derived* @foo, %Derived** bitcast (%Base** @bar to %Derived**)
%42 = load %Derived*, %Derived** bitcast (%Base** @bar to %Derived**)

The bitcast expression was mistakenly cached while processing loads,
and never examined later when processing store. This caused @bar to
be mistakenly treated as read-only variable. See load-store-caching.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365188 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[docs][llvm-objcopy] Improve some wording.
James Henderson [Fri, 5 Jul 2019 11:57:07 +0000 (11:57 +0000)]
[docs][llvm-objcopy] Improve some wording.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365187 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoMake joined instances of JoinedOrSeparate flags point to the unaliased args, like...
Nico Weber [Fri, 5 Jul 2019 11:45:24 +0000 (11:45 +0000)]
Make joined instances of JoinedOrSeparate flags point to the unaliased args, like all other arg types do

This fixes an 8-year-old regression. r105763 made it so that aliases
always refer to the unaliased option – but it missed the "joined" branch
of JoinedOrSeparate flags. (r162231 then made the Args classes
non-virtual, and r169344 moved them from clang to llvm.)

Back then, there was no JoinedOrSeparate flag that was an alias, so it
wasn't observable. Now /U in CLCompatOptions is a JoinedOrSeparate alias
in clang, and warn_slash_u_filename incorrectly used the aliased arg id
(using the unaliased one isn't really a regression since that warning
checks if the undefined macro contains slash or backslash and only then
emits the warning – and no valid use will pass "-Ufoo/bar" or similar).

Also, lld has many JoinedOrSeparate aliases, and due to this bug it had
to explicitly call `getUnaliasedOption()` in a bunch of places, even
though that shouldn't be necessary by design. After this fix in Option,
these calls really don't have an effect any more, so remove them.

No intended behavior change.

(I accidentally fixed this bug while working on PR29106 but then
wondered why the warn_slash_u_filename broke. When I figured it out, I
thought it would make sense to land this in a separate commit.)

Differential Revision: https://reviews.llvm.org/D64156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365186 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Merge r365179
Nico Weber [Fri, 5 Jul 2019 11:34:48 +0000 (11:34 +0000)]
gn build: Merge r365179

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365185 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[Object/ELF.h] - Improve error reporting.
George Rimar [Fri, 5 Jul 2019 11:28:49 +0000 (11:28 +0000)]
[Object/ELF.h] - Improve error reporting.

The errors coming from ELF.h are usually not very
useful because they are uninformative. This patch is a
first step to improve the situation.

I tested this patch with a run of check-llvm and found
that few messages are untested. In this patch, I did not
add more tests but marked all such cases with a "TODO" comment.

For all tested messages I extended the error text to
provide more details (see test cases changed).

Differential revision: https://reviews.llvm.org/D64014

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365183 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agolld-link: Make /debugtype: option work better
Nico Weber [Fri, 5 Jul 2019 11:28:31 +0000 (11:28 +0000)]
lld-link: Make /debugtype: option work better

- The code tried to pass false to split()'s KeepEmpty parameter, but
  instead passed it to MaxSplit. As a result, it would never split on
  commas. This has been broken since the flag was added in r278056.

- The code used getSpelling() for getting the argument's values, but
  getSpelling() always returns the `/debugtype:` prefix without any
  values. So if any /debugtype: flag was passed, it always resulted in
  an "unknown option:" warning. (The warning code then used the correct
  getValue() for printing the invalid option, so the warning looked
  kind of like it made sense.) This regressed in r342894.

Slightly improve the test coverage of this feature (but since I don't
know what this flag actually does, there's still no test for the correct
semantics), and add a comment to getSpelling() explaining what it does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365182 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86][SSE] LowerINSERT_VECTOR_ELT - early out for out of range indices
Simon Pilgrim [Fri, 5 Jul 2019 10:34:53 +0000 (10:34 +0000)]
[X86][SSE] LowerINSERT_VECTOR_ELT - early out for out of range indices

Fixes OSS-Fuzz #15662

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365180 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ARM] MVE VMOV immediate handling
David Green [Fri, 5 Jul 2019 10:02:43 +0000 (10:02 +0000)]
[ARM] MVE VMOV immediate handling

This adds some handling for VMOVimm, using the same method that NEON uses. We
create VMOVIMM/VMVNIMM/VMOVFPIMM nodes based on the immediate, and select them
using the now renamed ARMvmovImm/etc. There is also an extra 64bit immediate
mode that I have not yet added here.

Code by David Sherwood

Differential Revision: https://reviews.llvm.org/D63884

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365178 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ARM] MVE fp to int conversions
David Green [Fri, 5 Jul 2019 09:34:30 +0000 (09:34 +0000)]
[ARM] MVE fp to int conversions

This adds the patterns needed for fptosi and sitofp.

Differential Revision: https://reviews.llvm.org/D63729

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365176 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[RISCV] Delete a ctor that is commented out. NFC
Fangrui Song [Fri, 5 Jul 2019 08:25:14 +0000 (08:25 +0000)]
[RISCV] Delete a ctor that is commented out. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365175 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[llvm-objcopy][NFC] Refactor output target parsing v2
Seiya Nuta [Fri, 5 Jul 2019 05:28:38 +0000 (05:28 +0000)]
[llvm-objcopy][NFC] Refactor output target parsing v2

Summary:
Use an enum instead of string to hold the output file format in Config.InputFormat and Config.OutputFormat. It's essential to support other output file formats other than ELF.

This patch originally has been submitted as D63239. However, there was an use-of-uninitialized-value bug and reverted in r364379 (git commit 4ee933c).

This patch includes the fix for the bug by setting Config.InputFormat/Config.OutputFormat in parseStripOptions.

Reviewers: espindola, alexshap, rupprecht, jhenderson

Reviewed By: jhenderson

Subscribers: emaste, arichardson, jakehehrlich, MaskRay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64170

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365173 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[llvm-objcopy][test] Fix respect-umask.test after D62718/r365162
Fangrui Song [Fri, 5 Jul 2019 05:10:28 +0000 (05:10 +0000)]
[llvm-objcopy][test] Fix respect-umask.test after D62718/r365162

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365172 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoFix patch not passing test cases
Alex Brachet [Fri, 5 Jul 2019 01:28:41 +0000 (01:28 +0000)]
Fix patch not passing test cases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365170 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoTemporarily stop failing test case
Alex Brachet [Fri, 5 Jul 2019 01:13:09 +0000 (01:13 +0000)]
Temporarily stop failing test case

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365168 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Merge r365130.
Peter Collingbourne [Fri, 5 Jul 2019 01:11:20 +0000 (01:11 +0000)]
gn build: Merge r365130.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365167 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Merge r365103.
Peter Collingbourne [Fri, 5 Jul 2019 01:11:18 +0000 (01:11 +0000)]
gn build: Merge r365103.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365166 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Merge r365007.
Peter Collingbourne [Fri, 5 Jul 2019 01:11:16 +0000 (01:11 +0000)]
gn build: Merge r365007.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365165 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agogn build: Merge r365091.
Peter Collingbourne [Fri, 5 Jul 2019 01:11:14 +0000 (01:11 +0000)]
gn build: Merge r365091.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365164 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Add custom isel to select ADD/SUB/OR/XOR/AND to their non-immediate forms under...
Craig Topper [Thu, 4 Jul 2019 22:53:57 +0000 (22:53 +0000)]
[X86] Add custom isel to select ADD/SUB/OR/XOR/AND to their non-immediate forms under optsize when the immediate has additional users.

Summary:
We attempt to prevent folding immediates with multiple users under optsize. But we only do this from store nodes and X86ISD::ADD/SUB/XOR/OR/AND patterns. We don't do it for ISD::ADD/SUB/XOR/OR/AND even though we count them as users when deciding whether to fold into other nodes. This leads to situations where we block folding to a compare for example, but still fold into an AND or OR as seen in PR27202.

Unfortunately touching the isel patterns in tablegen for the ISD::ADD/SUB/XOR/OR/AND opcodes will cause the patterns to be unusable for fast isel. And we don't have a way to make a fast isel only pattern.

To workaround this, this patch adds custom isel in front of the isel table that will select the non-immediate forms if the immediate has additional users. This may create some issues for ANDN and NOT matching. And there's room for improvement with unsigned 32 immediates on 64-bit AND.

This patch needs more thorough test cases, but I wanted to get feedback on the direction. Please send me any other test cases you've seen in the wild.

I think we probably have the same issue with the immediate matching when we fold RMW from X86ISD::ADD/SUB/XOR/OR/AND. And our TEST immedaite shrinking logic. Our cost modeling for immediates that can fit in a sign extended 8-bit immediate on a 16/32/64 bit operation is completely wrong.

I also wonder if we should update the ConstantHoisting cost model and block folding for "opaque" constants. But of course constants can still be created by DAG combine and lowering optimizations.

Fixes PR27202

Reviewers: spatel, RKSimon, andreadb

Reviewed By: RKSimon

Subscribers: jsji, hiraditya, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59909

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365163 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[llvm-objcopy] Change handling of output file permissions
Alex Brachet [Thu, 4 Jul 2019 22:45:27 +0000 (22:45 +0000)]
[llvm-objcopy] Change handling of output file permissions

Summary: Address bug [[ https://bugs.llvm.org/show_bug.cgi?id=42082 | 42082 ]] where files were always outputted with 0775 permissions. Now, the output file is given either 0666 or 0777 if the object is executable.

Reviewers: espindola, alexshap, rupprecht, jhenderson, jakehehrlich, MaskRay

Reviewed By: rupprecht, jhenderson, jakehehrlich, MaskRay

Subscribers: emaste, arichardson, jakehehrlich, MaskRay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62718

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365162 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[mips] Refactor expandSeq and expandSeqI methods. NFC
Simon Atanasyan [Thu, 4 Jul 2019 22:45:07 +0000 (22:45 +0000)]
[mips] Refactor expandSeq and expandSeqI methods. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365161 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[NFC] Make some ObjectFormatType switches covering
Hubert Tong [Thu, 4 Jul 2019 21:40:28 +0000 (21:40 +0000)]
[NFC] Make some ObjectFormatType switches covering

Summary:
This patch removes the `default` case from some switches on
`llvm::Triple::ObjectFormatType`, and cases for the missing enumerators
are then added.

For `UnknownObjectFormat`, the action (`llvm_unreachable`) for the
`default` case is kept.

For the other unhandled cases, `report_fatal_error` is used instead.

Reviewers: sfertile, jasonliu, daltenty

Reviewed By: sfertile

Subscribers: wuzish, aheejin, jsji, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D63767

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365160 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[docs] [tools] Fix see also links
Alex Brachet [Thu, 4 Jul 2019 21:19:05 +0000 (21:19 +0000)]
[docs] [tools] Fix see also links

Summary: Changes "see also" links to use :manpage: instead of plain text or the form `name|name` which was being treated literally, not as a link.

Reviewers: jhenderson, rupprecht

Reviewed By: jhenderson

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63970

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365159 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[DAGCombiner] Don't combine (addcarry (uaddo X, Y), 0, Carry) -> (addcarry X, Y,...
Craig Topper [Thu, 4 Jul 2019 18:18:46 +0000 (18:18 +0000)]
[DAGCombiner] Don't combine (addcarry (uaddo X, Y), 0, Carry) -> (addcarry X, Y, Carry) if the Carry comes from the uaddo.

Summary:
The uaddo won't be removed and the addcarry will still be
dependent on the uaddo. So we'll just increase the use count
of X and Y and potentially require a COPY.

Reviewers: spatel, RKSimon, deadalnix

Reviewed By: RKSimon

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64190

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365149 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[AMDGPU] Custom lower INSERT_SUBVECTOR v3, v4, v5, v8
Tim Renouf [Thu, 4 Jul 2019 17:38:24 +0000 (17:38 +0000)]
[AMDGPU] Custom lower INSERT_SUBVECTOR v3, v4, v5, v8

Summary:
Since the changes to introduce vec3 and vec5, INSERT_VECTOR for these
sizes has been marked "expand", which made LegalizeDAG lower it to loads
and stores via a stack slot. The code got optimized a bit later, but the
now-unused stack slot was never deleted.

This commit avoids that problem by custom lowering INSERT_SUBVECTOR into
an EXTRACT_VECTOR_ELT and INSERT_VECTOR_ELT for each element in the
subvector to insert.

V2: Addressed review comments re test.

Differential Revision: https://reviews.llvm.org/D63160

Change-Id: I9e3c13e36f68cfa3431bb9814851cc1f673274e1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365148 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[InstCombine] allow undef elements when forming splat from chain of insertelements
Sanjay Patel [Thu, 4 Jul 2019 16:45:34 +0000 (16:45 +0000)]
[InstCombine] allow undef elements when forming splat from chain of insertelements

We allow forming a splat (broadcast) shuffle, but we were conservatively limiting
that to cases where all elements of the vector are specified. It should be safe
from a codegen perspective to allow undefined lanes of the vector because the
expansion of a splat shuffle would become the chain of inserts again.

Forming splat shuffles can reduce IR and help enable further IR transforms.
Motivating bugs:
https://bugs.llvm.org/show_bug.cgi?id=42174
https://bugs.llvm.org/show_bug.cgi?id=16739

Differential Revision: https://reviews.llvm.org/D63848

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365147 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoFix typos in comments and debug output.
Jay Foad [Thu, 4 Jul 2019 15:04:29 +0000 (15:04 +0000)]
Fix typos in comments and debug output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365146 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86][SSE] Add partial dereferenceable vector load test inspired by PR21780
Simon Pilgrim [Thu, 4 Jul 2019 15:00:04 +0000 (15:00 +0000)]
[X86][SSE] Add partial dereferenceable vector load test inspired by PR21780

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365145 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agollvm-c-test avoid calling malloc(0)
Andus Yu [Thu, 4 Jul 2019 14:36:34 +0000 (14:36 +0000)]
llvm-c-test avoid calling malloc(0)

Summary:
As explained in D63668, malloc(0) could return a null pointer. llvm-c-test does not handle this case correctly. Instead of calling malloc(0), avoid the operation altogether.

Authored By: andusy

Reviewers: hubert.reinterpretcast, xingxue, jasonliu, daltenty, cebowleratibm

Reviewed By: hubert.reinterpretcast

Subscribers: mehdi_amini, dexonsmith, jsji, llvm-commits

Tags: LLVM

Differential Revision: https://reviews.llvm.org/D63788

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365144 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoDocument legacy pass manager extension points
Serge Guelton [Thu, 4 Jul 2019 14:03:11 +0000 (14:03 +0000)]
Document legacy pass manager extension points

Differential Revision: https://reviews.llvm.org/D64093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365142 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[NFC] Added tests for D64099
David Bolvansky [Thu, 4 Jul 2019 13:48:32 +0000 (13:48 +0000)]
[NFC] Added tests for D64099

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365141 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86][SSE] Add some partial dereferenceable vector load tests inspired by PR16739
Simon Pilgrim [Thu, 4 Jul 2019 13:31:49 +0000 (13:31 +0000)]
[X86][SSE] Add some partial dereferenceable vector load tests inspired by PR16739

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365138 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[AMDGPU] Correct the setting of `FlatScratchInit`.
Michael Liao [Thu, 4 Jul 2019 13:29:45 +0000 (13:29 +0000)]
[AMDGPU] Correct the setting of `FlatScratchInit`.

Summary: - That flag setting should skip spilling stack slot.

Reviewers: arsenm, rampitec

Subscribers: qcolombet, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64143

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365137 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Regenerate load fold peephole test.
Simon Pilgrim [Thu, 4 Jul 2019 12:33:37 +0000 (12:33 +0000)]
[X86] Regenerate load fold peephole test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365136 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoFix -Wdocumentation param warning.
Simon Pilgrim [Thu, 4 Jul 2019 10:35:31 +0000 (10:35 +0000)]
Fix -Wdocumentation param warning.

Don't put the full stop at the end of a param name - it confuses the doxygen parser

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365128 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoFix -Wdocumentation warning.
Simon Pilgrim [Thu, 4 Jul 2019 10:33:21 +0000 (10:33 +0000)]
Fix -Wdocumentation warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365127 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vecto...
Simon Pilgrim [Thu, 4 Jul 2019 10:17:10 +0000 (10:17 +0000)]
[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c)

Bitcast v4i32 to v8f32 and back again - it might be worth adding isel patterns for X86PShufd v8i32 on AVX1 targets like we did for X86Blendi to avoid the bitcasts?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365125 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoFix MSVC "not all control paths return a value" warnings. NFCI.
Simon Pilgrim [Thu, 4 Jul 2019 09:46:06 +0000 (09:46 +0000)]
Fix MSVC "not all control paths return a value" warnings. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365119 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[Remarks] Silence gcc warning by catching unhandled values in switches
Mikael Holmen [Thu, 4 Jul 2019 09:29:18 +0000 (09:29 +0000)]
[Remarks] Silence gcc warning by catching unhandled values in switches

Without this fix gcc (7.4) complains with
 ../lib/Remarks/RemarkParser.cpp: In function 'std::unique_ptr<llvm::remarks::ParserImpl> formatToParserImpl(llvm::remarks::ParserFormat, llvm::StringRef)':
 ../lib/Remarks/RemarkParser.cpp:29:1: error: control reaches end of non-void function [-Werror=return-type]
  }
  ^
 ../lib/Remarks/RemarkParser.cpp: In function 'std::unique_ptr<llvm::remarks::ParserImpl> formatToParserImpl(llvm::remarks::ParserFormat, llvm::StringRef, const llvm::remarks::ParsedStringTable&)':
 ../lib/Remarks/RemarkParser.cpp:38:1: error: control reaches end of non-void function [-Werror=return-type]
  }
  ^

The Format enum currently only contains the value YAML which is indeed
already handled in the switches, but gcc complains anyway.

Adding a default case with an llvm_unreachable silences gcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365118 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ARM] Favour PL/MI over GE/LT when possible
David Green [Thu, 4 Jul 2019 08:58:58 +0000 (08:58 +0000)]
[ARM] Favour PL/MI over GE/LT when possible

The arm condition codes for GE is N==V (and for LT is N!=V). If the source of
flags cannot set V (overflow), such as a cmp against #0, then we can use the
simpler PL and MI conditions that only check N. As these PL/MI conditions are
simpler than GE/LT, other passes like the peephole optimiser can have a better
time optimising away the redundant CMPs.

The exception is the VSEL instruction, which cannot take the PL code, so there
the transform favours GE.

Differential Revision: https://reviews.llvm.org/D64160

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365117 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ARM] Added testing for D64160. NFC
David Green [Thu, 4 Jul 2019 08:49:32 +0000 (08:49 +0000)]
[ARM] Added testing for D64160. NFC

Adds some extra vsel testing and regenerates long shift and saturation bitop
tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365116 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[docs][llvm-dwarfdump] Remove unnecessary reference to --show-children
James Henderson [Thu, 4 Jul 2019 08:49:04 +0000 (08:49 +0000)]
[docs][llvm-dwarfdump] Remove unnecessary reference to --show-children

The --show-children option description describes what it does, and
references the =<offset> parameter of section dump switches. I don't
think it needs to be explained again in the documentation of the
section dump switches too.

Reviewed by: JDevlieghere

Differential Revision: https://reviews.llvm.org/D64132

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365115 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[TableGen] Allow DAG isel patterns to override default operands.
Simon Tatham [Thu, 4 Jul 2019 08:43:20 +0000 (08:43 +0000)]
[TableGen] Allow DAG isel patterns to override default operands.

When a Tablegen instruction description uses `OperandWithDefaultOps`,
isel patterns for that instruction don't have to fill in the default
value for the operand in question. But the flip side is that they
actually //can't// override the defaults even if they want to.

This will be very inconvenient for the Arm backend, when we start
wanting to write isel patterns that generate the many MVE predicated
vector instructions, in the form with predication actually enabled. So
this small Tablegen fix makes it possible to write an isel pattern
either with or without values for a defaulted operand, and have the
default values filled in only if they are not overridden.

If all the defaulted operands come at the end of the instruction's
operand list, there's a natural way to match them up to the arguments
supplied in the pattern: consume pattern arguments until you run out,
then fill in any missing instruction operands with their default
values. But if defaulted and non-defaulted operands are interleaved,
it's less clear what to do. This does happen in existing targets (the
first example I came across was KILLGT, in the AMDGPU/R600 backend),
and of course they expect the previous behaviour (that the default for
those operands is used and a pattern argument is not consumed), so for
backwards compatibility I've stuck with that.

Reviewers: nhaehnle, hfinkel, dmgreen

Subscribers: mehdi_amini, javed.absar, tpr, kristof.beyls, steven_wu, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63814

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365114 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[ARM] MVE bitwise instruction patterns
David Green [Thu, 4 Jul 2019 08:41:23 +0000 (08:41 +0000)]
[ARM] MVE bitwise instruction patterns

This adds patterns for the simpler VAND, VORR and VEOR bitwise vector
instructions. It also adjusts the top16Zero PatLeaf to not match on vector
instructions, which can otherwise cause problems.

Code written by David Sherwood.

Differential Revision: https://reviews.llvm.org/D63867

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365113 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[NFC][PowerPC] Make the PowerPC scheduling strategy feature only control the strategy...
QingShan Zhang [Thu, 4 Jul 2019 07:43:51 +0000 (07:43 +0000)]
[NFC][PowerPC] Make the PowerPC scheduling strategy feature only control the strategy instead of the scheduler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365110 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[X86] Use pointer sized indices instead of i32 for EXTRACT_VECTOR_ELT and INSERT_VECT...
Craig Topper [Thu, 4 Jul 2019 06:21:54 +0000 (06:21 +0000)]
[X86] Use pointer sized indices instead of i32 for EXTRACT_VECTOR_ELT and INSERT_VECTOR_ELT in a couple places.

Most places already did this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365109 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[AVR] Fix tests after r363757
Dylan McKay [Thu, 4 Jul 2019 06:12:47 +0000 (06:12 +0000)]
[AVR] Fix tests after r363757

r363757 renamed ExpandISelPseudo to FinalizeISel, so the RUN line in
select-must-add-unconditional-jump.mir needed updating to refer to finalize-isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365108 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[LoopPeel] Some small comment update. NFC.
Serguei Katkov [Thu, 4 Jul 2019 05:10:14 +0000 (05:10 +0000)]
[LoopPeel] Some small comment update. NFC.

Follow-up change of comment after
https://reviews.llvm.org/D63917 is landed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365107 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[PowerPC] Support constraint code "ww"
Fangrui Song [Thu, 4 Jul 2019 04:44:42 +0000 (04:44 +0000)]
[PowerPC] Support constraint code "ww"

Summary:
"ww" and "ws" are both constraint codes for VSX vector registers that
hold scalar double data. "ww" is preferred for float while "ws" is
preferred for double.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D64119

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365106 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[docs] [NFC] Removed excess spacing
Alex Brachet [Thu, 4 Jul 2019 04:41:06 +0000 (04:41 +0000)]
[docs] [NFC] Removed excess spacing

Summary: Removed excess new lines from documentations. As far as I can tell, it seems as though restructured text is agnostic to new lines, the use of new lines was inconsistent and had no effect on how the files were being displayed.

Reviewers: jhenderson, rupprecht, JDevlieghere

Reviewed By: jhenderson

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63971

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365105 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[PowerPC] Hardware Loop branch instruction's condition may not be icmp.
Chen Zheng [Thu, 4 Jul 2019 01:51:47 +0000 (01:51 +0000)]
[PowerPC] Hardware Loop branch instruction's condition may not be icmp.
This fixes pr42492.
Differential Revision: https://reviews.llvm.org/D64124

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365104 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[Remarks] Require an explicit format to the parser
Francis Visoiu Mistrih [Thu, 4 Jul 2019 00:31:03 +0000 (00:31 +0000)]
[Remarks] Require an explicit format to the parser

Make the parser require an explicit format.

This allows new formats to be easily added by following YAML as an
example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365102 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[Remarks][NFC] Move the string table parsing out of the parser constructor
Francis Visoiu Mistrih [Thu, 4 Jul 2019 00:30:58 +0000 (00:30 +0000)]
[Remarks][NFC] Move the string table parsing out of the parser constructor

Make the parser take an already-parsed string table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365101 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[WebAssembly] Update test failure explanations
Derek Schuff [Thu, 4 Jul 2019 00:24:35 +0000 (00:24 +0000)]
[WebAssembly] Update test failure explanations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365100 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[MachO] Add valid architecture function
Shoaib Meenai [Thu, 4 Jul 2019 00:17:02 +0000 (00:17 +0000)]
[MachO] Add valid architecture function

Added array of valid architectures and function returning array.
Modified llvm-lipo to include list of valid architectures in error message for invalid arch.

Patch by Anusha Basana <anusha.basana@gmail.com>

Differential Revision: https://reviews.llvm.org/D63735

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365099 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[JITLink][ORC] Add EHFrameRegistrar interface, use in EHFrameRegistrationPlugin.
Lang Hames [Thu, 4 Jul 2019 00:05:12 +0000 (00:05 +0000)]
[JITLink][ORC] Add EHFrameRegistrar interface, use in EHFrameRegistrationPlugin.

Replaces direct calls to eh-frame registration with calls to methods on an
EHFrameRegistrar instance. This allows clients to substitute a registrar that
registers frames in a remote process via IPC/RPC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365098 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoRevert [ThinLTO] Optimize writeonly globals out
Reid Kleckner [Thu, 4 Jul 2019 00:03:30 +0000 (00:03 +0000)]
Revert [ThinLTO] Optimize writeonly globals out

This reverts r365040 (git commit 5cacb914758c7f436b47c8362100f10cef14bbc4)

Speculatively reverting, since this appears to have broken check-lld on
Linux. Partial analysis in https://crbug.com/981168.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365097 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[WebAssembly] Enable IndirectBrExpandPass
Derek Schuff [Wed, 3 Jul 2019 23:54:06 +0000 (23:54 +0000)]
[WebAssembly] Enable IndirectBrExpandPass

Wasm doesn't have a direct way to lower indirectbr, so hook up the
IndirectBrExpandPass to lower indirectbr into a switch.

Fixes PR42498

Reviewers: aheejin

Differential Revision: https://reviews.llvm.org/D64161

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365096 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoAMDGPU: Add pass to lower SGPR spills
Matt Arsenault [Wed, 3 Jul 2019 23:32:29 +0000 (23:32 +0000)]
AMDGPU: Add pass to lower SGPR spills

This is split out from my patches to split register allocation into a
separate SGPR and VGPR phase, and has some parts that aren't yet used
(like maintaining LiveIntervals).

This simplifies making the frame pointer register callee saved. As it
is now, the code to determine callee saves needs to predict all the
possible SGPR spills and how many callee saved VGPRs are needed. By
handling this before PrologEpilogInserter, it's possible to just check
the spill objects that already exist.

Change-Id: I29e6df4034afcf949e06f8ef44206acb94696f04

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365095 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[JumpThreading] Fix threading with unusual PHI nodes.
Eli Friedman [Wed, 3 Jul 2019 23:12:39 +0000 (23:12 +0000)]
[JumpThreading] Fix threading with unusual PHI nodes.

If the block being cloned contains a PHI node, in general, we need to
clone that PHI node, even though it's trivial. If the operand of the PHI
is an instruction in the block being cloned, the correct value for the
operand doesn't exist until SSAUpdater constructs it.

We usually don't hit this issue because we try to avoid threading across
loop headers, but it's possible to hit this in some cases involving
irreducible CFGs.  I added a flag to allow threading across loop headers
to make the testcase easier to understand.

Thanks to Brian Rzycki for reducing the testcase.

Fixes https://bugs.llvm.org/show_bug.cgi?id=42085.

Differential Revision: https://reviews.llvm.org/D63913

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365094 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoGlobalISel: Fix widenScalar for pointer typed G_MERGE_VALUES
Matt Arsenault [Wed, 3 Jul 2019 23:08:06 +0000 (23:08 +0000)]
GlobalISel: Fix widenScalar for pointer typed G_MERGE_VALUES

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365093 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[Bitcode] Move Bitstream to a separate library
Francis Visoiu Mistrih [Wed, 3 Jul 2019 22:40:07 +0000 (22:40 +0000)]
[Bitcode] Move Bitstream to a separate library

This moves Bitcode/Bitstream*, Bitcode/BitCodes.h to Bitstream/.

This is needed to avoid a circular dependency when using the bitstream
code for parsing optimization remarks.

Since Bitcode uses Core for the IR part:

libLLVMRemarks -> Bitcode -> Core

and Core uses libLLVMRemarks to generate remarks (see
IR/RemarkStreamer.cpp):

Core -> libLLVMRemarks

we need to separate the Bitstream and Bitcode part.

For clang-doc, it seems that it doesn't need the whole bitcode layer, so
I updated the CMake to only use the bitstream part.

Differential Revision: https://reviews.llvm.org/D63899

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365091 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[WebAssembly][NFC] simplify SjLj inline assembly test
Guanzhong Chen [Wed, 3 Jul 2019 22:11:14 +0000 (22:11 +0000)]
[WebAssembly][NFC] simplify SjLj inline assembly test

Summary:
Per feedback in D64115, simplify the test.

`hidden` is left in though, because every test in the file has it.

Reviewers: aheejin, tlively

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365089 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[WebAssembly] Add option to emit passive segments
Thomas Lively [Wed, 3 Jul 2019 22:04:54 +0000 (22:04 +0000)]
[WebAssembly] Add option to emit passive segments

Summary:
Adds `--passive-segments` and `--active-segments` flags to control
what kind of segments are emitted. For now the default is always
to emit active segments so this is not a breaking change, but in
the future the default will be changed to passive segments when
shared memory is requested and active segments otherwise. When
passive segments are emitted, corresponding memory.init and
data.drop instructions are emitted in a `__wasm_init_memory`
function that is automatically called at the beginning of
`__wasm_call_ctors`.

Reviewers: sbc100, aheejin, dschuff

Subscribers: azakai, dschuff, jgravelle-google, sunfish, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59343

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365088 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoRevert "[AMDGPU] Kernel arg metadata: added support for "__hip_texture" type."
Matt Arsenault [Wed, 3 Jul 2019 21:34:34 +0000 (21:34 +0000)]
Revert "[AMDGPU] Kernel arg metadata: added support for "__hip_texture" type."

This reverts commit r365073.

This is crashing, and is improperly relying on IR type names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365087 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoRevert "[llvm-ar][test] Add to MRI test coverage"
JF Bastien [Wed, 3 Jul 2019 20:47:53 +0000 (20:47 +0000)]
Revert "[llvm-ar][test] Add to MRI test coverage"

This reverts commit 250015bacf7f255abcfb646fb8b6b56ce8be7e01.
r365039 was re-commit of D63197 and failed on Mac. Reid XFAIL'd it, but I'd rather jsut revert and have it fixed properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365084 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoTeach ValueTracking that aarch64.irg result aliases its input.
Evgeniy Stepanov [Wed, 3 Jul 2019 20:19:14 +0000 (20:19 +0000)]
Teach ValueTracking that aarch64.irg result aliases its input.

Reviewers: javed.absar, olista01

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64103

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365079 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[LoopBase] Strengthen isLoopExiting by requiring that BB must be inside the loop.
Florian Hahn [Wed, 3 Jul 2019 20:15:14 +0000 (20:15 +0000)]
[LoopBase] Strengthen isLoopExiting by requiring that BB must be inside the loop.

Currently isLoopExiting returns true for BBs that are not part of the
loop. To avoid hiding subtle bugs, this patch adds an assertion to make
sure the passed BB is inside the loop

Reviewers: reames, efriedma, hfinkel, arsenm, nhaehnle

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D63952

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365077 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoTry to XFAIL mri-utf8.test on Mac
Reid Kleckner [Wed, 3 Jul 2019 20:14:54 +0000 (20:14 +0000)]
Try to XFAIL mri-utf8.test on Mac

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365076 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[LFTR] Use SCEVExpander for the pointer limit case instead of manual IR gen
Philip Reames [Wed, 3 Jul 2019 20:03:46 +0000 (20:03 +0000)]
[LFTR] Use SCEVExpander for the pointer limit case instead of manual IR gen

As noted in the test change, this is not trivially NFC, but all of the changes in output are cases where the SCEVExpander form is more canonical/optimal than the hand generation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365075 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[AMDGPU] Kernel arg metadata: added support for "__hip_texture" type.
Konstantin Pyzhov [Wed, 3 Jul 2019 19:11:35 +0000 (19:11 +0000)]
[AMDGPU] Kernel arg metadata: added support for "__hip_texture" type.

Summary:
Hip texture type is equivalent to OpenCL image. So, we need to set the Image type for kernel arguments with __hip_texture type.

Differential revision: https://reviews.llvm.org/D63850

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365073 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[LFTR] Remove a stray variable shadow *of the same value* [NFC]
Philip Reames [Wed, 3 Jul 2019 19:08:43 +0000 (19:08 +0000)]
[LFTR] Remove a stray variable shadow *of the same value* [NFC]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365072 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[LFTR] Style and comment changes to clarify the narrow vs wide bitwidth evaluation...
Philip Reames [Wed, 3 Jul 2019 19:03:37 +0000 (19:03 +0000)]
[LFTR] Style and comment changes to clarify the narrow vs wide bitwidth evaluation behavior [NFC]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365071 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[LFTR] Sink the decision not use truncate scheme for constants into genLoopLimit...
Philip Reames [Wed, 3 Jul 2019 18:41:03 +0000 (18:41 +0000)]
[LFTR] Sink the decision not use truncate scheme for constants into genLoopLimit [NFC]

We might as well just evaluate the constants using SCEV, and having the cases grouped makes the logic slightly easier to read anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365070 91177308-0d34-0410-b5e6-96231b3b80d8

4 years agoFix precedence in assert from r364961
Jessica Paquette [Wed, 3 Jul 2019 18:30:01 +0000 (18:30 +0000)]
Fix precedence in assert from r364961

Precedence was wrong in an assert added in r364961. Add braces around the
assertion condition to make it right.

See: https://reviews.llvm.org/D64084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365069 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[LFTR] Remove falsely generalized (dead) code [NFC]
Philip Reames [Wed, 3 Jul 2019 18:24:06 +0000 (18:24 +0000)]
[LFTR] Remove falsely generalized (dead) code [NFC]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365067 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[LFTR] Hoist extend expressions outside of loops w/o waiting for LICM
Philip Reames [Wed, 3 Jul 2019 18:18:36 +0000 (18:18 +0000)]
[LFTR] Hoist extend expressions outside of loops w/o waiting for LICM

The motivation for this is two fold:
1) Make the output (and thus tests)  a bit more readable to a human trying to understand the result of the transform
2) Reduce spurious diffs in a potential future change to restructure all of this logic to use SCEVExpander (which hoists by default)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365066 91177308-0d34-0410-b5e6-96231b3b80d8

4 years ago[macCatalyst] Print out macCatalyst in llvm-objdump for the platform
Alex Lorenz [Wed, 3 Jul 2019 17:46:30 +0000 (17:46 +0000)]
[macCatalyst] Print out macCatalyst in llvm-objdump for the platform

'macCatalyst' is more readable than 'maccatalyst'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365064 91177308-0d34-0410-b5e6-96231b3b80d8