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Teresa Johnson [Tue, 10 May 2016 15:54:09 +0000 (15:54 +0000)]
[ThinLTO] Add option to emit imports files for distributed backends
Summary:
Add support for emission of plaintext lists of the imported files for
each distributed backend compilation. Used for distributed build file
staging.
Invoked with new gold-plugin thinlto-emit-imports-files option, which is
only valid with thinlto-index-only (i.e. for distributed builds), or
from llvm-lto with new -thinlto-action=emitimports value.
Depends on D19556.
Reviewers: joker.eph
Subscribers: llvm-commits, joker.eph
Differential Revision: http://reviews.llvm.org/D19636
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269067
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Renato Golin [Tue, 10 May 2016 14:02:46 +0000 (14:02 +0000)]
[docs] Fix unexpected indentation in HowToCrossCompileLLVM.rst
Seems like my sphynx version is different than the one in the bot, as it
accepted everything locally. I think this is the right fix...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269062
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Teresa Johnson [Tue, 10 May 2016 13:48:23 +0000 (13:48 +0000)]
Restore "[ThinLTO] Emit individual index files for distributed backends"
This restores commit r268627:
Summary:
When launching ThinLTO backends in a distributed build (currently
supported in gold via the thinlto-index-only plugin option), emit
an individual index file for each backend process as described here:
http://lists.llvm.org/pipermail/llvm-dev/2016-April/098272.html
...
Differential Revision: http://reviews.llvm.org/D19556
Address msan failures by avoiding std::prev on map.end(), the
theory is that this is causing issues due to some known UB problems
in __tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269059
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Renato Golin [Tue, 10 May 2016 12:54:12 +0000 (12:54 +0000)]
[docs] Change CrossCompilation guidde to reflect changes in Clang/GCC
HowToCrossCompile was outdated and generating too much traffic on the mailing
list with similar queries. This change helps offset most of the problems that
were reported recently including:
* Removing the -ccc-gcc-name, adding --sysroot
* Making references to Debian's multiarch for target libraries
* Expanding -DCMAKE_CXX_FLAGS for both GCC and Clang
* Some formatting and clarifications in the text
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269054
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Silviu Baranga [Tue, 10 May 2016 12:28:49 +0000 (12:28 +0000)]
[LAA] Use re-written SCEV expressions when computing distances
This removes a redundant stride versioning step (we already
do it in getPtrStride, so it has no effect) and uses PSE to
get the SCEV expressions for the source and destination
(this might have changed when getPtrStride was called).
I discovered this through code inspection, and couldn't
produce a regression test for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269052
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James Molloy [Tue, 10 May 2016 12:27:23 +0000 (12:27 +0000)]
Revert "[VectorUtils] Query number of sign bits to allow more truncations"
This was a fairly simple patch but on closer inspection was seriously flawed and caused PR27690.
This reverts commit r268921.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269051
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Daniel Sanders [Tue, 10 May 2016 12:17:04 +0000 (12:17 +0000)]
[mips][ias] Make the default path unreachable in needsRelocateWithSymbol() (except for N64).
Following post-commit comments on r268900 from Rafael Espindola:
The missing relocations are now explicitly listed in the switch statement with
appropriate FIXME comments and the default path is now unreachable. The
temporary exception to this is that compound relocations for N64 still have a
default path that returns true. This is because fixing that case ought to be a
separate patch.
Also make R_MIPS_NONE return false since it has no effect on the section data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269047
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Jeroen Ketema [Tue, 10 May 2016 11:19:20 +0000 (11:19 +0000)]
[OCaml] Update core test and re-enable testing
Differential Revision: http://reviews.llvm.org/D19828
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269040
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Simon Pilgrim [Tue, 10 May 2016 10:30:00 +0000 (10:30 +0000)]
[X86][AVX512] Added masked version of MOVDDUP test with 16f32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269038
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Chuang-Yu Cheng [Tue, 10 May 2016 09:45:44 +0000 (09:45 +0000)]
Update Debug Intrinsics in RewriteUsesOfClonedInstructions in LoopRotation
Loop rotation clones instruction from the old header into the preheader. If
there were uses of values produced by these instructions that were outside
the loop, we have to insert PHI nodes to merge the two values. If the values
are used by DbgIntrinsics they will be used as a MetadataAsValue of a
ValueAsMetadata of the original values, and iterating all of the uses of the
original value will not update the DbgIntrinsics. The new code checks if the
values are used by DbgIntrinsics and if so, updates them using essentially
the same logic as the original code.
The attached testcase demonstrates the issue. Without the fix, the
DbgIntrinic outside the loop uses values computed inside the loop, even
though these values do not dominate the DbgIntrinsic.
Author: Thomas Jablin (tjablin)
Reviewers: dblaikie aprantl kbarton hfinkel cycheng
http://reviews.llvm.org/D19564
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269034
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Arnaud A. de Grandmaison [Tue, 10 May 2016 09:24:49 +0000 (09:24 +0000)]
[InstCombine] Remove trivially empty va_start/va_end and va_copy/va_end ranges.
When a va_start or va_copy is immediately followed by a va_end (ignoring
debug information or other start/end in between), then it is safe to
remove the pair. As this code shares some commonalities with the lifetime
markers, this has been factored to helper functions.
This InstCombine pattern kicks-in 3 times when running the LLVM test
suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269033
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Chris Dewhurst [Tue, 10 May 2016 09:09:20 +0000 (09:09 +0000)]
[Sparc][LEON] Itineraries unit test.
Added test to check LeonItineraries are being applied by code checked-in two weeks ago in r267121.
Phabricator Review: http://reviews.llvm.org/D19359
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269032
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Daniel Sanders [Tue, 10 May 2016 09:01:54 +0000 (09:01 +0000)]
Clarify the difference between ISD::BITCAST and the bitcast instruction from LLVM-IR.
Subscribers: llvm-commits, hfinkel
Differential Revision: http://reviews.llvm.org/D16464
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269031
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Renato Golin [Tue, 10 May 2016 08:23:57 +0000 (08:23 +0000)]
Revert "[PGO] Fix __llvm_profile_raw_version linkage in MACHO IR instrumentation generates a COMDAT symbol __llvm_profile_raw_version to overwrite the same symbol in profile run-time to distinguish IR profiles from Clang generated profiles. In MACHO, LinkOnceODR linkage is used due to the lack of COMDAT support."
This reverts commits r268969, r268979 and r268984. They had target specific test
in generic directories without the correct specifiers and made it hard for us to
come up with a good solution by rapidly committing untested changes.
This test needs to be in a target specific directory or have the correct REQUIRED
identifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269027
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Jonas Paulsson [Tue, 10 May 2016 08:09:37 +0000 (08:09 +0000)]
[foldMemoryOperand()] Pass LiveIntervals to enable liveness check.
SystemZ (and probably other targets as well) can fold a memory operand
by changing the opcode into a new instruction that as a side-effect
also clobbers the CC-reg.
In order to do this, liveness of that reg must first be checked. When
LIS is passed, getRegUnit() can be called on it and the right
LiveRange is computed on demand.
Reviewed by Matthias Braun.
http://reviews.llvm.org/D19861
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269026
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Elena Demikhovsky [Tue, 10 May 2016 07:33:35 +0000 (07:33 +0000)]
[LoopVectorize] Handling induction variable with non-constant step.
Allow vectorization when the step is a loop-invariant variable.
This is the loop example that is getting vectorized after the patch:
int int_inc;
int bar(int init, int *restrict A, int N) {
int x = init;
for (int i=0;i<N;i++){
A[i] = x;
x += int_inc;
}
return x;
}
"x" is an induction variable with *loop-invariant* step.
But it is not a primary induction. Primary induction variable with non-constant step is not handled yet.
Differential Revision: http://reviews.llvm.org/D19258
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269023
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Denis Zobnin [Tue, 10 May 2016 05:55:16 +0000 (05:55 +0000)]
[LAA] Rename "isStridedPtr" with "getPtrStride". NFC.
Changing misleading function name was approved in http://reviews.llvm.org/D17268.
Patch by Roman Shirokiy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269021
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Matthias Braun [Tue, 10 May 2016 05:38:47 +0000 (05:38 +0000)]
liveness.mir requires asserts to use -debug-only
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269020
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Craig Topper [Tue, 10 May 2016 05:28:04 +0000 (05:28 +0000)]
[X86][AVX512] Strengthen the assertions from r269001. We need VLX to use the 128/256-bit move opcodes for extended registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269019
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Craig Topper [Tue, 10 May 2016 05:28:02 +0000 (05:28 +0000)]
[X86] Add ZMM registers to the X86_INTR calling convention preserved mask when AVX512 is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269018
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Craig Topper [Tue, 10 May 2016 05:27:56 +0000 (05:27 +0000)]
[X86] Update X86_INTR calling convention to save ZMM registers instead of YMM registers when AVX512 is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269017
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Matthias Braun [Tue, 10 May 2016 04:51:14 +0000 (04:51 +0000)]
LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()
We now use LiveRangeCalc::extendToUses() instead of a specially designed
algorithm in constructMainRangeFromSubranges():
- The original motivation for constructMainRangeFromSubranges() were
differences between the main liverange and subranges because of hidden
dead definitions. This case however cannot happen anymore with the
DetectDeadLaneMasks pass in place.
- It simplifies the code.
- This fixes a longstanding bug where we did not properly create new SSA
values on merging control flow (the MachineVerifier missed most of
these cases).
- Move constructMainRangeFromSubranges() to LiveIntervalAnalysis and
LiveRangeCalc to better match the implementation/available helper
functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269016
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Matthias Braun [Tue, 10 May 2016 04:51:09 +0000 (04:51 +0000)]
LiveInterval: Avoid unnecessary auto, add const; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269015
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Matthias Braun [Tue, 10 May 2016 04:51:07 +0000 (04:51 +0000)]
llc: Print+Verify machine function after loading it
In -run-pass mode verify/print machine function immediately after
loading the .mir file if -verify-machineinstr/-print-machineinstrs
option is specified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269014
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Matthias Braun [Tue, 10 May 2016 04:51:04 +0000 (04:51 +0000)]
TargetPassConfig: Set PrintMachineCode even if addMachinePasses() does not run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269013
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Dan Gohman [Tue, 10 May 2016 04:24:02 +0000 (04:24 +0000)]
[WebAssembly] Move register stackification and coloring to a late phase.
Move the register stackification and coloring passes to run very late, after
PEI, tail duplication, and most other passes. This means that all code emitted
and expanded by those passes is now exposed to these passes. This also
eliminates the need for prologue/epilogue code to be manually stackified,
which significantly simplifies the code.
This does require running LiveIntervals a second time. It's useful to think
of these late passes not as late optimization passes, but as a domain-specific
compression algorithm based on knowledge of liveness information. It's used to
compress the code after all conventional optimizations are complete, which is
why it uses LiveIntervals at a phase when actual optimization passes don't
typically need it.
Differential Revision: http://reviews.llvm.org/D20075
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269012
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Matthias Braun [Tue, 10 May 2016 03:21:59 +0000 (03:21 +0000)]
CodeGen: Move TargetPassConfig from Passes.h to an own header; NFC
Many files include Passes.h but only a fraction needs to know about the
TargetPassConfig class. Move it into an own header. Also rename
Passes.cpp to TargetPassConfig.cpp while we are at it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269011
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Matthias Braun [Tue, 10 May 2016 03:21:47 +0000 (03:21 +0000)]
PrologEpilogInserter: Remove unnecessary dependency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269010
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Matthias Braun [Tue, 10 May 2016 03:03:55 +0000 (03:03 +0000)]
Appease MSVC
Apply a similar fix to the one in r269006 to LiveIntervalTest.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269009
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Sanjoy Das [Tue, 10 May 2016 02:35:44 +0000 (02:35 +0000)]
[ValueTracking] Use guards to prove non-nullness of a value
Reviewers: apilipenko, majnemer, reames
Subscribers: mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D20044
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269008
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Sanjoy Das [Tue, 10 May 2016 02:35:41 +0000 (02:35 +0000)]
[BasicAA] Guard intrinsics don't write to memory
Summary:
The idea is very close to what we do for assume intrinsics: we mark the
guard intrinsics as writing to arbitrary memory to maintain control
dependence, but under the covers we teach AA that they do not mod any
particular memory location.
Reviewers: chandlerc, hfinkel, gbiv, reames
Subscribers: george.burgess.iv, mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D19575
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269007
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Matthias Braun [Tue, 10 May 2016 02:09:32 +0000 (02:09 +0000)]
Try to appease clang-x64-ninja-win7 bot.
Looks like you need the complete definition of "X" when calling a "X
&func()" declared function even when not using the result further.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269006
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Matthias Braun [Tue, 10 May 2016 01:32:44 +0000 (01:32 +0000)]
llc: Rework -run-pass option
We now construct a custom pass pipeline instead of injecting
start-before/stop-after into the default pipeline construction. This
allows to specify any pass known to the pass registry. Previously
specifying indirectly added analysis passes or passes not added to the
pipeline add all would not be added and we would silently do nothing.
This also restricts the -run-pass option to cases with .mir input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269003
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Matthias Braun [Tue, 10 May 2016 01:32:40 +0000 (01:32 +0000)]
LLVMTargetMachine: Add functions to create MIModuleInfo/MIFunction; NFC
Add convenience function to create MachineModuleInfo and
MachineFunctionAnalysis passes and add them to a pass manager.
Despite factoring out some shared code in
LiveIntervalTest/LLVMTargetMachine this will be used by my upcoming llc
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269002
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Quentin Colombet [Tue, 10 May 2016 01:09:14 +0000 (01:09 +0000)]
[X86][AVX512] Use the proper load/store for AVX512 registers.
When loading or storing AVX512 registers we were not using the AVX512
variant of the load and store for VR128 and VR256 like registers.
Thus, we ended up with the wrong encoding and actually were dropping the
high bits of the instruction. The result was that we load or store the
wrong register. The effect is visible only when we emit the object file
directly and disassemble it. Then, the output of the disassembler does
not match the assembly input.
This is related to llvm.org/PR27481.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269001
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Evgeniy Stepanov [Tue, 10 May 2016 00:33:07 +0000 (00:33 +0000)]
Don't inline functions with different SafeStack attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268999
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Sanjoy Das [Tue, 10 May 2016 00:32:31 +0000 (00:32 +0000)]
[SCEVExpander] Clang format expressions; NFC
The boolean expressions are somewhat hard to read otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268998
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Sanjoy Das [Tue, 10 May 2016 00:31:49 +0000 (00:31 +0000)]
[SCEV] Use guards to prove predicates
We can use calls to @llvm.experimental.guard to prove predicates,
relying on the fact that in all locations domianted by a call to
@llvm.experimental.guard the predicate it is guarding is known to be
true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268997
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Justin Lebar [Tue, 10 May 2016 00:31:25 +0000 (00:31 +0000)]
[nvvm] Mark ldu and ldg intrinsics as IntrArgMemOnly.
Summary:
Previously these intrinsics were marked as can-read any memory address.
Now they're marked as reading only the pointer they're passed.
Reviewers: rnk
Subscribers: jholewinski, llvm-commits, tra
Differential Revision: http://reviews.llvm.org/D20080
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268996
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Justin Lebar [Tue, 10 May 2016 00:31:23 +0000 (00:31 +0000)]
Minor formatting fixes in LoopUnroll.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268995
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Justin Lebar [Tue, 10 May 2016 00:31:22 +0000 (00:31 +0000)]
[NVPTX] Change begin/end inline asm comments to "begin/end inline asm".
Previously it was just "// inline asm", which made it tricky to read
code with lots of inline assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268994
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Justin Lebar [Tue, 10 May 2016 00:31:20 +0000 (00:31 +0000)]
[NVVM] Add comments to NVVM intrinsics listing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268993
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Derek Schuff [Tue, 10 May 2016 00:14:07 +0000 (00:14 +0000)]
[WebAssembly] Disable 128-bit shift libcalls
Currently the signature of the functions
i128(i128, i32) aka void(i32, i64, i64, i32) doesn't match the signature
of the call emitted by the default lowering, void(i32, i64, i64).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268991
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Justin Bogner [Mon, 9 May 2016 23:54:23 +0000 (23:54 +0000)]
SDAG: Stop relying on Select's return value in SystemZ's splitLargeImmediate. NFC
The call to Select on Upper here happens in an unusual order in order
to defeat the constant folding that getNode() does. Add a comment
explaining why we can't just move the Select to later to avoid a
Handle, and wrap the call to SelectCode in a handle so we don't need
its return value.
This is part of the work to have Select return void instead of an
SDNode *, which is in turn part of llvm.org/pr26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268990
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Eugene Zelenko [Mon, 9 May 2016 23:11:38 +0000 (23:11 +0000)]
Fix some Clang-tidy modernize-deprecated-headers and Include What You Use warnings; other minor fixes.
Differential revision: http://reviews.llvm.org/D20042
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268989
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Adam Nemet [Mon, 9 May 2016 23:03:44 +0000 (23:03 +0000)]
[LV] Hint at the new loop distribution pragma in optimization remark
When we encounter unsafe memory dependencies, loop distribution could
help.
Even though, the diagnostics is in LAA, it's only currently emitted in
the vectorizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268987
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Adam Nemet [Mon, 9 May 2016 23:03:06 +0000 (23:03 +0000)]
[IndirectCallPromotion] Remove duplicate comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268986
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Adrian Prantl [Mon, 9 May 2016 22:59:55 +0000 (22:59 +0000)]
Disable this unit test on MSVC, which crashes while compiling it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268985
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Rong Xu [Mon, 9 May 2016 22:45:47 +0000 (22:45 +0000)]
Fix buildbot failure from r268968.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268984
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Quentin Colombet [Mon, 9 May 2016 22:37:05 +0000 (22:37 +0000)]
[X86] Fix the AllRegs AVX calling convention.
We used to list registers that were not in the AVX space. In other
words, we were pushing registers that the ISA cannot encode
(YMM16-YMM31).
This is part of llvm.org/PR27481.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268983
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Sanjay Patel [Mon, 9 May 2016 21:51:53 +0000 (21:51 +0000)]
[Inliner] don't assume that a Constant alloca size is a ConstantInt (PR27277)
Differential Revision: http://reviews.llvm.org/D20077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268980
91177308-0d34-0410-b5e6-
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Rong Xu [Mon, 9 May 2016 21:51:50 +0000 (21:51 +0000)]
Fix buildbot failure from r268968.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268979
91177308-0d34-0410-b5e6-
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Chad Rosier [Mon, 9 May 2016 21:37:43 +0000 (21:37 +0000)]
Typo. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268975
91177308-0d34-0410-b5e6-
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Xinliang David Li [Mon, 9 May 2016 21:37:12 +0000 (21:37 +0000)]
Cleanup followup of r268710 - [PM] port IR based PGO prof-gen pass to new pass manager
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268974
91177308-0d34-0410-b5e6-
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Quentin Colombet [Mon, 9 May 2016 21:24:31 +0000 (21:24 +0000)]
[X86] Strengthen the setting of inline asm constraints for fp regclasses.
This is similar to r268953, but for floating point and vector register
classes.
Explanations:
The setting of the inline asm constraints was implicitly relying on the
order of the register classes in the file generated by tablegen.
Since, we do not have any control on that order, make sure we do not
depend on it anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268973
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Mon, 9 May 2016 21:14:38 +0000 (21:14 +0000)]
[X86][SSE] Improve cost model for i64 vector comparisons on pre-SSE42 targets
As discussed on PR24888, until SSE42 we don't have access to PCMPGTQ for v2i64 comparisons, but the cost models don't reflect this, resulting in over-optimistic vectorizaton.
This patch adds SSE2 'base level' costs that match what a typical target is capable of and only reduces the v2i64 costs at SSE42.
Technically SSE41 provides a PCMPEQQ v2i64 equality test, but as getCmpSelInstrCost doesn't give us a way to discriminate between comparison test types we can't easily make use of this, otherwise we could split the cost of integer equality and greater-than tests to give better costings of each.
Differential Revision: http://reviews.llvm.org/D20057
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268972
91177308-0d34-0410-b5e6-
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Rong Xu [Mon, 9 May 2016 21:03:06 +0000 (21:03 +0000)]
[PGO] Fix __llvm_profile_raw_version linkage in MACHO
IR instrumentation generates a COMDAT symbol __llvm_profile_raw_version to
overwrite the same symbol in profile run-time to distinguish IR profiles from
Clang generated profiles. In MACHO, LinkOnceODR linkage is used due to the
lack of COMDAT support.
But LinkOnceODR linkage might have .weak_def_can_be_hidden assembly directive,
while the weak variable in run-time has a .weak_definition directive. Linker
will not merge these two symbols even they have the same name. The end result
is IR profiles are not properly flagged in MACHO.
This patch changes the linkage for __llvm_profile_raw_version in each module to
LinkOnceAny so that it has same .weak_definition directive as in the run-time.
Differential Revision: http://reviews.llvm.org/D20078
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268969
91177308-0d34-0410-b5e6-
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Kostya Serebryany [Mon, 9 May 2016 21:02:36 +0000 (21:02 +0000)]
[libFuzzer] add a test for libFuzzer+ubsan, extend the docs on using libFuzzer+ubsan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268968
91177308-0d34-0410-b5e6-
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Marcin Koscielnicki [Mon, 9 May 2016 20:57:36 +0000 (20:57 +0000)]
[MSan] [AArch64] Fix vararg helper for >1 or non-int fixed arguments.
This fixes http://llvm.org/PR27646 on AArch64.
There are three issues here:
- The GR save area is 7 words in size, instead of 8. This is not enough
if none of the fixed arguments is passed in GRs (they're all floats or
aggregates).
- The first argument is ignored (which counteracts the above if it's passed
in GR).
- Like x86_64, fixed arguments landing in the overflow area are wrongly
counted towards the overflow offset.
Differential Revision: http://reviews.llvm.org/D20023
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268967
91177308-0d34-0410-b5e6-
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Adrian Prantl [Mon, 9 May 2016 19:57:29 +0000 (19:57 +0000)]
Separate the Verifier into an analysis and a transformation pass and
allow the transformation to strip invalid debug info.
This patch separates the Verifier into an analysis and a transformation
pass, with the transformation pass optionally stripping malformed
debug info.
The problem I'm trying to solve with this sequence of patches is that
historically we've done a really bad job at verifying debug info. We want
to be able to make the verifier stricter without having to worry about
breaking bitcode compatibility with existing producers. For example, we
don't necessarily want IR produced by an older version of clang to be
rejected by an LTO link just because of malformed debug info, and rather
provide an option to strip it. Note that merely outdated (but well-formed)
debug info would continue to be auto-upgraded in this scenario.
http://reviews.llvm.org/D19988
rdar://problem/
25818489
This reapplies r268937 without modifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268966
91177308-0d34-0410-b5e6-
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Adrian Prantl [Mon, 9 May 2016 19:57:15 +0000 (19:57 +0000)]
Allow the LTO code generator to strip invalid debug info from the input.
This patch introduces a new option -lto-strip-invalid-debug-info, which
drops malformed debug info from the input.
The problem I'm trying to solve with this sequence of patches is that
historically we've done a really bad job at verifying debug info. We want
to be able to make the verifier stricter without having to worry about
breaking bitcode compatibility with existing producers. For example, we
don't necessarily want IR produced by an older version of clang to be
rejected by an LTO link just because of malformed debug info, and rather
provide an option to strip it. Note that merely outdated (but well-formed)
debug info would continue to be auto-upgraded in this scenario.
rdar://problem/
25818489
http://reviews.llvm.org/D19987
This reapplies 268936 with a test case fix for Linux (-exported-symbol foo)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268965
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Quentin Colombet [Mon, 9 May 2016 19:50:30 +0000 (19:50 +0000)]
[X86] Drop the 64-bit alignment for LOW32_ADDR_ACCESS register class.
The only 64-bit register in that register class is RIP and it will not
get spilled in the current ABIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268963
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Kostya Serebryany [Mon, 9 May 2016 19:32:10 +0000 (19:32 +0000)]
[libFuzzer] reshuffle docs more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268961
91177308-0d34-0410-b5e6-
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Chad Rosier [Mon, 9 May 2016 19:30:20 +0000 (19:30 +0000)]
[InstCombine] Fold icmp eq/ne (udiv i32 A, B), 0 -> icmp ugt/ule B, A.
Differential Revision: http://reviews.llvm.org/D20036
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268960
91177308-0d34-0410-b5e6-
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Kostya Serebryany [Mon, 9 May 2016 19:29:53 +0000 (19:29 +0000)]
[libFuzzer] reshuffle docs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268959
91177308-0d34-0410-b5e6-
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Kostya Serebryany [Mon, 9 May 2016 19:23:28 +0000 (19:23 +0000)]
[libFuzzer] better document the -merge=1 flag, part 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268958
91177308-0d34-0410-b5e6-
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Kostya Serebryany [Mon, 9 May 2016 19:11:36 +0000 (19:11 +0000)]
[libFuzzer] better document the -merge=1 flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268957
91177308-0d34-0410-b5e6-
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Quentin Colombet [Mon, 9 May 2016 19:01:46 +0000 (19:01 +0000)]
Reapply [X86] Add a new LOW32_ADDR_ACCESS_RBP register class.
This reapplies commit r268796, with a fix for the setting of the inline asm
constraints. I.e., "mark" LOW32_ADDR_ACCESS_RBP as a GR variant, so that the
regular processing of the GR operands (setting of the subregisters) happens.
Original commit log:
[X86] Add a new LOW32_ADDR_ACCESS_RBP register class.
ABIs like NaCl uses 32-bit addresses but have 64-bit frame.
The new register class reflects those constraints when choosing a
register class for a address access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268955
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Quentin Colombet [Mon, 9 May 2016 19:01:42 +0000 (19:01 +0000)]
[X86] Update a regexp in a test case to resist register allocation
changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268954
91177308-0d34-0410-b5e6-
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Quentin Colombet [Mon, 9 May 2016 19:01:35 +0000 (19:01 +0000)]
[X86] Strengthen the setting of inline asm constraints.
The setting of the inline asm constraints was implicitly relying on the
order of the register classes in the file generated by tablegen.
Since, we do not have any control on that order, make sure we do not
depend on it anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268953
91177308-0d34-0410-b5e6-
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Nemanja Ivanovic [Mon, 9 May 2016 18:54:58 +0000 (18:54 +0000)]
[Power9] Add support for -mcpu=pwr9 in the back end
This patch corresponds to review:
http://reviews.llvm.org/D19683
Simply adds the bits for being able to specify -mcpu=pwr9 to the back end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268950
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Sanjay Patel [Mon, 9 May 2016 18:54:14 +0000 (18:54 +0000)]
clean up; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268949
91177308-0d34-0410-b5e6-
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Zachary Turner [Mon, 9 May 2016 18:45:21 +0000 (18:45 +0000)]
Fix build error with ambiguity of size_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268948
91177308-0d34-0410-b5e6-
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Krzysztof Parzyszek [Mon, 9 May 2016 18:22:07 +0000 (18:22 +0000)]
[Hexagon] Treat all conditional branches as predicted (not-taken by default)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268946
91177308-0d34-0410-b5e6-
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Konstantin Zhuravlyov [Mon, 9 May 2016 18:05:42 +0000 (18:05 +0000)]
[AMDGPU] Clean up debugger tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268944
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Mon, 9 May 2016 18:05:28 +0000 (18:05 +0000)]
Unbreak the non-windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268943
91177308-0d34-0410-b5e6-
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Zachary Turner [Mon, 9 May 2016 17:45:21 +0000 (17:45 +0000)]
[pdb] Parse the module info stream for each module.
Differential Revision: http://reviews.llvm.org/D20026
Reviewed By: rnk
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268942
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Zachary Turner [Mon, 9 May 2016 17:44:58 +0000 (17:44 +0000)]
Make TypeIterator generic so it can iterate symbols too.
Reviewed By: amccarth
Differential Revision: http://reviews.llvm.org/D20038
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268941
91177308-0d34-0410-b5e6-
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Adrian Prantl [Mon, 9 May 2016 17:43:30 +0000 (17:43 +0000)]
Revert "Allow the LTO code generator to strip invalid debug info from the input."
This reverts commit 268936 while investigating buildbot breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268940
91177308-0d34-0410-b5e6-
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Adrian Prantl [Mon, 9 May 2016 17:43:24 +0000 (17:43 +0000)]
Revert "Separate the Verifier into an analysis and a transformation pass and"
This reverts commit 268937 while investigating build bot breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268939
91177308-0d34-0410-b5e6-
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Daniel Sanders [Mon, 9 May 2016 17:42:04 +0000 (17:42 +0000)]
[mips] Fix a partially initialized member variable that was introduced in r268896.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268938
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Mon, 9 May 2016 17:37:42 +0000 (17:37 +0000)]
Separate the Verifier into an analysis and a transformation pass and
allow the transformation to strip invalid debug info.
This patch separates the Verifier into an analysis and a transformation
pass, with the transformation pass optionally stripping malformed
debug info.
The problem I'm trying to solve with this sequence of patches is that
historically we've done a really bad job at verifying debug info. We want
to be able to make the verifier stricter without having to worry about
breaking bitcode compatibility with existing producers. For example, we
don't necessarily want IR produced by an older version of clang to be
rejected by an LTO link just because of malformed debug info, and rather
provide an option to strip it. Note that merely outdated (but well-formed)
debug info would continue to be auto-upgraded in this scenario.
http://reviews.llvm.org/D19988
rdar://problem/
25818489
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268937
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Mon, 9 May 2016 17:37:33 +0000 (17:37 +0000)]
Allow the LTO code generator to strip invalid debug info from the input.
This patch introduces a new option -lto-strip-invalid-debug-info, which
drops malformed debug info from the input.
The problem I'm trying to solve with this sequence of patches is that
historically we've done a really bad job at verifying debug info. We want
to be able to make the verifier stricter without having to worry about
breaking bitcode compatibility with existing producers. For example, we
don't necessarily want IR produced by an older version of clang to be
rejected by an LTO link just because of malformed debug info, and rather
provide an option to strip it. Note that merely outdated (but well-formed)
debug info would continue to be auto-upgraded in this scenario.
rdar://problem/
25818489
http://reviews.llvm.org/D19987
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268936
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 9 May 2016 17:31:55 +0000 (17:31 +0000)]
[CGP] avoid crashing from weightlessness
It's possible that we have branch weights with 0 values.
In that case, don't try to create an impossible BranchProbability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268935
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Matt Arsenault [Mon, 9 May 2016 16:57:08 +0000 (16:57 +0000)]
DivergenceAnalysis: Fix crash with no return blocks
The post dominator tree does not have a root node in this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268933
91177308-0d34-0410-b5e6-
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Sanjay Patel [Mon, 9 May 2016 16:42:50 +0000 (16:42 +0000)]
[TargetLowering] make helper function for SetCC + and optimizations (NFC)
After looking at D19087 again, it occurred to me that we can do better. If we consolidate
the valueHasExactlyOneBitSet() transforms, we won't incur extra overhead from calling it a
2nd time, and we can shrink SimplifySetCC() a bit. No functional change intended.
Differential Revision: http://reviews.llvm.org/D20050
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268932
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Mon, 9 May 2016 16:42:23 +0000 (16:42 +0000)]
Fixed unused but set variable warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268931
91177308-0d34-0410-b5e6-
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Matt Arsenault [Mon, 9 May 2016 16:29:50 +0000 (16:29 +0000)]
AMDGPU: Fold shift into cvt_f32_ubyteN
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268930
91177308-0d34-0410-b5e6-
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Sanjay Patel [Mon, 9 May 2016 16:07:45 +0000 (16:07 +0000)]
fix spelling; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268929
91177308-0d34-0410-b5e6-
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Daniel Sanders [Mon, 9 May 2016 15:50:15 +0000 (15:50 +0000)]
[mips] Try to fix 'truncation from FindBestPredicateResult to bool' reported by MSVC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268928
91177308-0d34-0410-b5e6-
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Daniel Sanders [Mon, 9 May 2016 15:37:52 +0000 (15:37 +0000)]
[mips][ias] Attempt to fix 'not all control paths return a value' reported by MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268927
91177308-0d34-0410-b5e6-
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Frederic Riss [Mon, 9 May 2016 14:44:14 +0000 (14:44 +0000)]
[dsymutil] Prevent use-after-free
The BinaryHolder would query the archive member MemoryBuffer name
to check if the current open archive also contains the next requested
objectfile. This comparison was using a StringRef to a temporary
buffer. It only happened with fat archives. This commit adds long-lived
storage along with the MemoryBuffers for the fat archive filename.
The added test would fail during an ASAN build without the fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268924
91177308-0d34-0410-b5e6-
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Joerg Sonnenberger [Mon, 9 May 2016 14:36:16 +0000 (14:36 +0000)]
Optimize a printf with a double procent to putchar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268922
91177308-0d34-0410-b5e6-
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James Molloy [Mon, 9 May 2016 14:32:30 +0000 (14:32 +0000)]
[VectorUtils] Query number of sign bits to allow more truncations
When deciding if a vector calculation can be done in a smaller bitwidth, use sign bit information from ValueTracking to add more information and allow more truncations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268921
91177308-0d34-0410-b5e6-
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Daniel Sanders [Mon, 9 May 2016 13:38:25 +0000 (13:38 +0000)]
[mips][micromips] Make getPointerRegClass() result depend on the instruction.
Summary:
Previously, it returned the GPR16MMRegClass for all instructions which was
incorrect for instructions like lwsp/lwgp and unnecesarily restricted the
permitted registers for instructions like lw32.
This fixes quite a few of the -verify-machineinstrs errors reported in PR27458.
I've only added -verify-machineinstrs to one test in this change since I
understand there is a plan to enable the verifier by default.
Reviewers: hvarga, zbuljan, zoran.jovanovic, sdardis
Subscribers: dsanders, llvm-commits, sdardis
Differential Revision: http://reviews.llvm.org/D19873
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268918
91177308-0d34-0410-b5e6-
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Rafael Espindola [Mon, 9 May 2016 13:31:11 +0000 (13:31 +0000)]
Fix bug where temporary file would be left behind every time an archive was updated.
When updating an existing archive, llvm-ar opens the old archive into a
`MemoryBuffer`, does its thing, and writes the results to a temporary
file. That file is then renamed to the original archive filename, thus
replacing it with the updated contents. However, on Windows at least,
what would happen is that the `MemoryBuffer` for the old archive would
actually be an mmap'ed view of the file, so when it came time to do the
rename via Win32's `ReplaceFile`, it would succeed but would be unable
to fully replace the file since there would still be a handle open on
it; instead, the old version got renamed to a random temporary name and
left behind.
Patch by Cameron!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268916
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Mon, 9 May 2016 13:30:16 +0000 (13:30 +0000)]
[X86][SSE] Added TODO comment to add support for AVX512 mask registers to shuffle comments
This came up in discussion on D19198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268915
91177308-0d34-0410-b5e6-
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Daniel Sanders [Mon, 9 May 2016 13:10:57 +0000 (13:10 +0000)]
[mips] Fix use after free and an unnecessary copy introduced in r268896.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268913
91177308-0d34-0410-b5e6-
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Strahinja Petrovic [Mon, 9 May 2016 12:27:39 +0000 (12:27 +0000)]
[PowerPC] fix register alignment for long double type
This patch fixes register alignment for long double type in
soft float mode. Before this patch alignment was 8 and this
patch changes it to 4.
Differential Revision: http://reviews.llvm.org/D18034
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268909
91177308-0d34-0410-b5e6-
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Chris Dewhurst [Mon, 9 May 2016 11:55:15 +0000 (11:55 +0000)]
[Sparc][LEON] Add UMAC and SMAC instruction support for Sparc LEON subtargets
This change adds SMAC (signed multiply-accumulate) and UMAC (unsigned multiply-accumulate) for LEON subtargets of the Sparc processor.
The new files LeonFeatures.td and leon-instructions.ll will both be expanded in future, so I want to leave them separate as small files for this review, to be expanded in future check-ins.
Note: The functions are provided only for inline-assembly provision. No DAG selection is provided.
Differential Revision: http://reviews.llvm.org/D19911
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268908
91177308-0d34-0410-b5e6-
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