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Hans de Goede [Mon, 6 Feb 2017 11:13:17 +0000 (12:13 +0100)]
glx/glvnd: Fix GLXdispatchIndex sorting
Commit
8bca8d89ef3b ("glx/glvnd: Fix dispatch function names and indices")
fixed the sorting of the array initializers in g_glxglvnddispatchfuncs.c
because FindGLXFunction's binary search needs these to be sorted
alphabetically.
That commit also mostly fixed the sorting of the DI_foo defines in
g_glxglvnddispatchindices.h, which is what actually matters as the
arrays are initialized using "[DI_foo] = glXfoo," but a small error
crept in which at least causes glXGetVisualFromFBConfigSGIX to not
resolve, breaking games such as "The Binding of Isaac: Rebirth" and
"Crypt of the NecroDancer" from Steam not working and possible causes
other problems too.
This commit fixes the last of the sorting errors, fixing these mentioned
games not working.
Fixes:
8bca8d89ef3b ("glx/glvnd: Fix dispatch function names and indices")
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Cc: Adam Jackson <ajax@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dave Airlie [Wed, 15 Feb 2017 00:15:39 +0000 (00:15 +0000)]
radv: also fixup event emission to not get culled.
This is possibly a bad idea, I might have to consider a better one.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Jason Ekstrand [Tue, 14 Feb 2017 22:29:19 +0000 (14:29 -0800)]
anv: Use vk_foreach_struct for handling extension structs
Reviewed-by: Dave Airlie <airlied@redhat.com>
Jason Ekstrand [Tue, 14 Feb 2017 23:56:54 +0000 (15:56 -0800)]
util: Add helpers for iterating over Vulkan extension structs
Reviewed-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 14 Feb 2017 23:58:09 +0000 (23:58 +0000)]
radv: query cmds should mark a cmd buffer as having draws.
This fixes a regression with the remove non-draw cmd buffers in
queries.
Fixes:
8b47b97215a radv: detect command buffers that do no work and drop them (v2)
Signed-off-by: Dave Airlie <airlied@redhat.com>
Kenneth Graunke [Sat, 11 Feb 2017 08:25:57 +0000 (00:25 -0800)]
glsl: Handle packed_type == ivec4[] in lower_packed_varyings().
For GS input arrays, we may turn a packed_type of ivec4 into an
array of ivec4s. We still want flat qualification.
Found by inspection. Not known to help anything.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Jason Ekstrand [Thu, 2 Feb 2017 00:41:04 +0000 (16:41 -0800)]
anv: Implement the Skylake stencil PMA optimization
Unfortunately, this doesn't substantially improve the performance of any
known apps. With Dota 2 on my Sky Lake gt4, it seems help by somewhere
between 0% and 1% but there's enough noise that it's hard to get a clear
picture.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Jason Ekstrand [Thu, 2 Feb 2017 00:39:32 +0000 (16:39 -0800)]
genxml: Add the CACHE_MODE_0 register on gen9
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Fri, 9 Dec 2016 01:39:14 +0000 (17:39 -0800)]
anv/pipeline: Be smarter about depth/stencil state
It's a bit hard to measure because it almost gets lost in the noise,
but this seemed to help Dota 2 by a percent or two on my Broadwell
GT3e desktop.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Jason Ekstrand [Fri, 9 Dec 2016 02:34:24 +0000 (18:34 -0800)]
anv/pipeline: Make a copy of VkPipelineDepthStencilStateCreateinfo
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Jason Ekstrand [Wed, 7 Dec 2016 01:52:14 +0000 (17:52 -0800)]
anv: Add support for the PMA fix on Broadwell
This helps Dota 2 on Broadwell by 8-9%. I also hacked up the driver and
used the Sascha "shadowmapping" demo to get some results. Setting
uses_kill to true dropped the framerate on the demo by 25-30%. Enabling
the PMA fix brought it back up to around 90% of the original framerate.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Jason Ekstrand [Wed, 7 Dec 2016 01:51:26 +0000 (17:51 -0800)]
genxml: Add the CACHE_MODE_1 register on gen8
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Thu, 8 Dec 2016 04:31:12 +0000 (20:31 -0800)]
anv: Disable stencil writes when both write masks are zero
Vulkan doesn't have a stencilWriteEnable bit like it does for depth.
Instead, you have a stencil mask. Since the stencil mask is handled as
dynamic state, we have to handle it later during command buffer
construction. This, combined with a later commit, seems to help Dota2
on my Broadwell GT3e desktop by a couple percent because it allows the
hardware to move the depth and stencil writes to early in more cases.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Jason Ekstrand [Tue, 14 Feb 2017 18:24:14 +0000 (10:24 -0800)]
anv/entrypoints: Only generate entrypoints for supported features
This changes the way anv_entrypoints_gen.py works from generating a
table containing every single entrypoint in the XML to just the ones
that we actually need. There's no reason for us to burn entrypoint
table space on a bunch of NV extensions we never plan to implement.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Connor Abbott [Tue, 14 Feb 2017 17:23:59 +0000 (12:23 -0500)]
anv: fix Get*MemoryRequirements for !LLC
Even though we supported both coherent and non-coherent memory types, we
effectively forced apps to use the coherent types by accident. Found by
inspection, only compile tested.
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Marek Olšák [Sat, 11 Feb 2017 12:12:22 +0000 (13:12 +0100)]
radeonsi: implement uploading zero-stride vertex attribs
This is the only kind of user buffer we can get with the GL core profile.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 11 Feb 2017 20:21:10 +0000 (21:21 +0100)]
gallium/radeon: include SDMA in the GPU load query
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 11 Feb 2017 19:46:02 +0000 (20:46 +0100)]
gallium/hud: add monitoring of API thread busy status
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 11 Feb 2017 19:51:41 +0000 (20:51 +0100)]
gallium/u_queue: add util_queue_get_thread_time_nano
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 11 Feb 2017 19:48:13 +0000 (20:48 +0100)]
gallium/os: add per-thread time clock queries
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 10 Feb 2017 00:12:22 +0000 (01:12 +0100)]
st/mesa: tell u_vbuf that GL core doesn't have user VBOs
I think this only affects radeonsi - VI, because all other drivers using
u_vbuf probably don't support GL_DOUBLE, so they won't be affected by this.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 10 Feb 2017 00:09:27 +0000 (01:09 +0100)]
gallium: let state trackers tell u_vbuf whether user VBOs are possible
This can affect whether u_vbuf will be enabled or not.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 12 Feb 2017 14:48:48 +0000 (15:48 +0100)]
vdpau: skip vlVdpOutputSurfacePutBitsNative with a zero-area rectangle
This prevents errors:
"EE r600_texture.c:1571 r600_texture_transfer_map - failed to create
temporary texture to hold untiled copy"
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99542
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Sun, 12 Feb 2017 14:48:31 +0000 (15:48 +0100)]
gallium/radeon: add an assertion to texture_transfer_map for app bugs
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Marek Olšák [Fri, 10 Feb 2017 00:16:34 +0000 (01:16 +0100)]
radeonsi: implement legacy GL_DOUBLE vertex formats
so that we can disable u_vbuf for GL core profiles.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 11 Feb 2017 16:21:04 +0000 (17:21 +0100)]
radeonsi: clean up si_get_param
has_streamout is always true
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 11 Feb 2017 22:43:20 +0000 (23:43 +0100)]
gallium/hud: don't use user vertex buffers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 11 Feb 2017 22:20:37 +0000 (23:20 +0100)]
gallium/hud: call u_upload_alloc only once
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 8 Feb 2017 19:36:26 +0000 (20:36 +0100)]
gallium/u_upload_mgr: remove deprecated function u_upload_buffer
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Charmaine Lee <charmainel@vmware.com>
Marek Olšák [Fri, 27 Jan 2017 00:42:41 +0000 (01:42 +0100)]
gallium/radeon: remove the internal u_upload_mgr pointer
also remove the BIND flags
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Tested-by: Charmaine Lee <charmainel@vmware.com>
Marek Olšák [Fri, 27 Jan 2017 01:20:04 +0000 (02:20 +0100)]
st/mesa: use the common uploader (v2)
v2: use const_uploader
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> (v1)
Tested-by: Charmaine Lee <charmainel@vmware.com>
Marek Olšák [Fri, 27 Jan 2017 01:06:12 +0000 (02:06 +0100)]
gallium/vl: use the common uploader
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Tested-by: Charmaine Lee <charmainel@vmware.com>
Marek Olšák [Fri, 27 Jan 2017 01:04:27 +0000 (02:04 +0100)]
gallium/vbuf: use the common uploader
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Tested-by: Charmaine Lee <charmainel@vmware.com>
Marek Olšák [Fri, 27 Jan 2017 01:03:16 +0000 (02:03 +0100)]
gallium/blitter: use the common uploader
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Tested-by: Charmaine Lee <charmainel@vmware.com>
Marek Olšák [Fri, 27 Jan 2017 01:01:38 +0000 (02:01 +0100)]
gallium/primconvert: use the common uploader
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Tested-by: Charmaine Lee <charmainel@vmware.com>
Marek Olšák [Fri, 27 Jan 2017 00:59:20 +0000 (01:59 +0100)]
gallium/hud: use the common uploader
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Tested-by: Charmaine Lee <charmainel@vmware.com>
Marek Olšák [Thu, 26 Jan 2017 23:12:37 +0000 (00:12 +0100)]
gallium: set pipe_context uploaders in drivers (v3)
Notes:
- make sure the default size is large enough to handle all state trackers
- pipe wrappers don't receive transfer calls from stream_uploader, because
pipe_context::stream_uploader points directly to the underlying driver's
stream_uploader (to keep it simple for now)
v2: add error handling to nv50, nvc0, noop
v3: set const_uploader
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com> (v1)
Tested-by: Charmaine Lee <charmainel@vmware.com>
Marek Olšák [Thu, 26 Jan 2017 22:27:36 +0000 (23:27 +0100)]
gallium/u_upload_mgr: add a helper that creates the default uploader
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Tested-by: Charmaine Lee <charmainel@vmware.com>
Marek Olšák [Thu, 26 Jan 2017 21:24:13 +0000 (22:24 +0100)]
gallium: add common uploaders into pipe_context (v2)
For lower memory usage and more efficient updates of the buffer residency
list. (e.g. if drivers keep seeing the same buffer for many consecutive
"add" calls, the calls can be turned into no-ops trivially)
v2: add const_uploader, add documentation
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Tested-by: Charmaine Lee <charmainel@vmware.com>
Dave Airlie [Mon, 13 Feb 2017 07:30:29 +0000 (07:30 +0000)]
radv: fixup IA_MULTI_VGT_PARAM handling.
This ports the remains of the workarounds from radeonsi for
the non-TESS cases. It should provide equivalent workarounds
for hawaii and bonarie.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 14 Feb 2017 20:00:29 +0000 (20:00 +0000)]
radv: fix warning since using common gs emit code
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 14 Feb 2017 03:45:20 +0000 (22:45 -0500)]
radv: adopt some init config workarounds from radeonsi.
Just one bonaire fix.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 14 Feb 2017 06:09:25 +0000 (16:09 +1000)]
radv: re-enable init gfx state on CIK.
Once the color alignment was fixed this works fine now.
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 14 Feb 2017 03:54:53 +0000 (22:54 -0500)]
radv: align the initial state command buffer.
This just adds the padding to align this to an 8 dword boundary.
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 14 Feb 2017 06:05:43 +0000 (16:05 +1000)]
radv: fix cik macroModeIndex.
This just a CIK fix ported from radeonsi.
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 14 Feb 2017 06:04:16 +0000 (16:04 +1000)]
radv: change base aligmment for allocated memory.
On some CIK (Hawaii) this needs to be at least 64k, I'm not 100% sure
it doesn't need to be 128k.
This was causing fast clear eliminate to overwrite the previous buffer,
which since my gfx init code, was the indirect buffer.
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=99692
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Alex Smith [Tue, 14 Feb 2017 10:34:49 +0000 (10:34 +0000)]
anv: Add support for shaderStorageImageWriteWithoutFormat
This allows shaders to write to storage images declared with unknown
format if they are decorated with NonReadable ("writeonly" in GLSL).
Previously an image view would always use a lowered format for its
surface state, however when a shader declares a write-only image, we
should use the real format. Since we don't know at view creation time
whether it will be used with only write-only images in shaders, create
two surface states using both the original format and the lowered
format. When emitting the binding table, choose between the states
based on whether the image is declared write-only in the shader.
Tested on both Sascha Willems' computeshader sample (with the original
shaders and ones modified to declare images writeonly and omit their
format qualifiers) and on our own shaders for which we need support
for this.
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Alex Smith [Tue, 14 Feb 2017 10:34:48 +0000 (10:34 +0000)]
spirv: Add support for SpvCapabilityStorageImageWriteWithoutFormat
Allow that capability if the driver indicates that it is supported, and
flag whether images are read-only/write-only in the nir_variable (based
on the NonReadable and NonWritable decorations), which drivers may need
to implement this.
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Iago Toral Quiroga [Tue, 14 Feb 2017 10:32:18 +0000 (11:32 +0100)]
nir/spirv: do not require a format with images that are not sampled
As soon as we support shaderStorageImageWriteWithoutFormat we can see
write-only images (sampled == 2) that don't have a format specified.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Mon, 13 Feb 2017 16:30:14 +0000 (08:30 -0800)]
anv/apply_pipeline_layout: Set image.write_only to false
This makes our driver robust to changes in spirv_to_nir which would set
this flag on the variable. Right now, our driver relies on spirv_to_nir
*not* setting var->data.image.write_only for correctness. Any patch
which implements the shaderStorageImageWriteWithoutFormat will need to
effectively revert this commit.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Mon, 13 Feb 2017 17:14:07 +0000 (09:14 -0800)]
intel/isl: Add format metadata for typed reads/writes
This adds two columns to the format table as well as two helpers for
determining whether or not a given format is supported for typed reads
and writes.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Sat, 11 Feb 2017 04:47:18 +0000 (20:47 -0800)]
anv/cmd_buffer: Return a VkResult from verify_cmd_parser
This fixes a "statement with no effect" compiler warning
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Ilia Mirkin [Mon, 13 Feb 2017 16:14:51 +0000 (11:14 -0500)]
nvc0: disable linked tsc mode in compute launch descriptor
Empirically, this makes things work. Presumably this was originally
copied from the blob, which does make use of linked tsc mode.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99532
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Anuj Phogat [Fri, 10 Feb 2017 21:43:57 +0000 (13:43 -0800)]
mesa: Add EXT_frag_depth bits and enable it on all drivers
Passes the newly added piglit test for this extension on i965.
V2: Fix comments by Ilia.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Dave Airlie [Mon, 13 Feb 2017 22:13:39 +0000 (22:13 +0000)]
radeonsi: use common sendmsg emission function.
This just ports radeonsi to use the sendmsg common code.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 13 Feb 2017 22:09:10 +0000 (22:09 +0000)]
radv/ac: use sendmsg emission interface.
This uses the common code to emit the correct intrinsic.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 13 Feb 2017 22:08:30 +0000 (22:08 +0000)]
radeon/ac/llvm: add support for sendmsg emission
This lets us use the new intrinsic on the correct
version of llvm.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 13 Feb 2017 22:01:39 +0000 (08:01 +1000)]
radv: disable gfx init on CIK for now
Luzipher on irc report this hangs his Hawaii, disable for now
until I get time to debug.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 10 Feb 2017 04:03:51 +0000 (14:03 +1000)]
tgsi: fix memory leak in tgsi sanity check
This just fixes this without repeating the code.
Reported-by: Li Qiang
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 13 Feb 2017 19:52:48 +0000 (19:52 +0000)]
radv/ac: use common interp code for new intrinsics
This uses the common fs interp code to use the new
llvm intrinsics so llvm can drop the old ones.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 13 Feb 2017 04:00:24 +0000 (04:00 +0000)]
radv: use indirect buffer for initial gfx state.
This puts the common gfx state for the device into an
indirect buffer, and just calls out to it, on CIK and above.
This is taken from what radeonsi does.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 13 Feb 2017 03:09:09 +0000 (03:09 +0000)]
radv: start splitting init config up
This is just prep work for the following patch to use
a common gfx init indirect buffer.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 13 Feb 2017 03:35:37 +0000 (03:35 +0000)]
radv: don't pass physical device to si_init_ fns.
This is just a trivial cleanup.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 10 Feb 2017 00:20:44 +0000 (00:20 +0000)]
radv: detect command buffers that do no work and drop them (v2)
If a buffer is just full of flushes we flush things on command
buffer submission, so don't bother submitting these.
This will reduce some CPU overhead on dota2, which submits a fair
few command streams that don't end up drawing anything.
v2: reorganise loop to count first then malloc,
rename some vars (Bas)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Jason Ekstrand [Thu, 9 Feb 2017 20:00:51 +0000 (12:00 -0800)]
anv/blorp: Don't sanitize the swizzle for blorp_clear
BLORP is now smart enough to handle any swizzle (even those that contain
ZERO or ONE) in a reasonable manner. Just let BLORP handle it. This
fixes the following Vulkan CTS tests on Haswell:
- dEQP-VK.api.image_clearing.clear_color_image.1d_b4g4r4a4_unorm_pack16
- dEQP-VK.api.image_clearing.clear_color_image.2d_b4g4r4a4_unorm_pack16
- dEQP-VK.api.image_clearing.clear_color_image.3d_b4g4r4a4_unorm_pack16
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 8 Feb 2017 20:47:01 +0000 (12:47 -0800)]
intel/blorp: Swizzle clear colors on the CPU
It's trivial to swizzle clear colors on the CPU, easily deals with the
hardware restrictions for render target swizzles, and makes swizzled
clears work on all hardware as opposed to just HSW+.
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Emil Velikov [Mon, 13 Feb 2017 12:05:34 +0000 (12:05 +0000)]
docs: add news item and link release notes for 17.0.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 13 Feb 2017 12:02:19 +0000 (12:02 +0000)]
docs: add sha256 checksums for 17.0.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
80b41d9899f37e58b197f55897115d2cb6e13af9)
Emil Velikov [Mon, 13 Feb 2017 11:53:28 +0000 (11:53 +0000)]
docs: Update 17.0.0 release notes
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
683462e680326ee0cd7a794f018178b7b5573c4f)
Emil Velikov [Thu, 9 Feb 2017 13:35:53 +0000 (13:35 +0000)]
st/xlib: remove always true ifdef GLX_EXTENSION guards
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 9 Feb 2017 13:35:52 +0000 (13:35 +0000)]
xlib: remove always true ifdef GLX_EXTENSION guards
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 9 Feb 2017 13:35:51 +0000 (13:35 +0000)]
glx: remove always true XDAMAGE_1_1_INTERFACE guard
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 9 Feb 2017 13:35:50 +0000 (13:35 +0000)]
scons: check for libXdamage 1.1 or later
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 9 Feb 2017 13:35:49 +0000 (13:35 +0000)]
configure.ac: check for libXdamage 1.1 or later
Released back in 2007 so it should not be an issue for anyone building
from git.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 9 Feb 2017 13:35:48 +0000 (13:35 +0000)]
glx: remove DRI2DriverPrimeShift compile guards
DRI2DriverPrimeShift was added in dri2proto-2.8, which we now require
as of the previous commit.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 9 Feb 2017 13:35:47 +0000 (13:35 +0000)]
vl: remove DRI2DriverPrimeShift compile guards
DRI2DriverPrimeShift was added in dri2proto-2.8, which we now require as
of the previous commit.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 9 Feb 2017 13:35:46 +0000 (13:35 +0000)]
scons: add missing dri2proto requirement
Noticed while skimming through, although admittedly there's many other
dependencies that are not tracked by the scons build.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 9 Feb 2017 13:35:45 +0000 (13:35 +0000)]
configure.ac: dump dri2proto requirement to 2.8
dri2proto 2.8 was released 4+ years ago, so it must be of no surprise
for anyone building mesa from git.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 9 Feb 2017 13:35:44 +0000 (13:35 +0000)]
glx: remove always true ifdef guards
The two symbols referenced were introduced with v2.2 and 2.3 of
the dri2proto package and we require dri2proto >= 2.6.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Tue, 7 Feb 2017 14:19:06 +0000 (14:19 +0000)]
winsys/intel: remove unused winsys - ilo was its only user
Cc: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Tue, 7 Feb 2017 13:10:34 +0000 (13:10 +0000)]
configure.ac: do not use deprecated macros - AC_HELP_STRING AC_ERROR
Replace with AS_HELP_STRING and AC_MSG_ERROR respectively, as spotted by
autoupdate.
Note that the suggested AC_CANONICAL_SYSTEM > AC_CANONICAL_TARGET change
is not addressed here since that requires very extensive testing.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Sat, 11 Feb 2017 11:32:47 +0000 (22:32 +1100)]
util/disk_cache: correctly use stat(3)
I forgot to error check stat() and also I wasn't using the subdir in
is_two_character_sub_directory().
Fixes:
d7b3707c612 "util/disk_cache: use stat() to check if entry is a directory"
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Michel Dänzer [Thu, 9 Feb 2017 04:00:03 +0000 (13:00 +0900)]
configure.ac: Drop LLVM compiler flags more radically
Drop all -m*, -W*, -O*, -g* and -f* flags, with the exception of
-fno-rtti, which must be used if it's part of the llvm-config --cxxflags
output. We don't want LLVM to dictate the flags we use, and it can even
cause build failures, e.g. if LLVM and Mesa are built with different
compilers.
While we're at it, eat any whitespace preceding dropped flags as well.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Kenneth Graunke [Sat, 11 Feb 2017 07:02:56 +0000 (23:02 -0800)]
glsl: Drop resize-to-MaxPatchVertices hack.
TCS and TES inputs without an array size are implicitly sized to
gl_MaxPatchVertices. But TCS outputs are apparently not:
"If no size is specified, it will be taken from the output patch size
(gl_VerticesOut) declared in the shader."
Fixes dEQP-GLES31.functional.program_interface_query.program_output.
array_size.separable_tess_ctrl.var.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Kenneth Graunke [Sat, 11 Feb 2017 01:54:01 +0000 (17:54 -0800)]
mesa: Ignore per-vertex array size in SSO pipeline validation.
We were already unwrapping types when the producer was a non-array
stage and the consumer was an arrayed-stage...but we ought to unwrap
both ends for TCS -> TES matching too.
This will allow us to drop the "resize to gl_MaxPatchVertices" check
shortly, which breaks some things.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Kenneth Graunke [Sat, 11 Feb 2017 04:56:38 +0000 (20:56 -0800)]
glsl: Update a comment about link errors for TCS && !TES.
OpenGL ES actually has spec text to prohibit this. It's just OpenGL
that's confusing.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Kenneth Graunke [Thu, 2 Feb 2017 07:02:03 +0000 (23:02 -0800)]
mesa: Do a draw time check for TES && !TCS in ES 3.x.
ES 3.x requires both TCS and TES to be present. We already checked
the TCS && !TES case above, so we just have to check !TCS && TES here.
Note that this is allowed in OpenGL, just not ES.
This fixes a subcase of:
dEQP-GLES31.functional.debug.negative_coverage.*.tessellation.single_tessellation_stage
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Kenneth Graunke [Sat, 11 Feb 2017 04:40:22 +0000 (20:40 -0800)]
mesa: Do (TCS && !TES) draw time validation in ES as well.
Now that we have OES_tessellation_shader, the same situation can occur
in ES too, not just GL core profile.
Having a TCS but no TES may confuse drivers - i965 crashes, for example.
This prevents regressions in
ES31-CTS.core.tessellation_shader.single.xfb_captures_data_from_correct_stage
with some SSO pipeline validation changes I'm making.
v2: Add an ES spec citation (suggested by Alejandro)
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Jason Ekstrand [Tue, 7 Feb 2017 03:48:46 +0000 (19:48 -0800)]
i965/sampler_state: Set the "Base Mip Level" field on Sandy Bridge
Fixes two GL ES 3.0 CTS tests on Sandy Bridge:
ES3-CTS.functional.texture.mipmap.cube.base_level.linear_linear
ES3-CTS.functional.texture.mipmap.cube.base_level.linear_nearest
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 7 Feb 2017 03:46:22 +0000 (19:46 -0800)]
i965/sampler_state: Pass texObj into update_sampler_state
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 7 Feb 2017 05:56:35 +0000 (21:56 -0800)]
i965/sampler_state: Clamp min/max LOD to 14 on gen7+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Sun, 12 Feb 2017 19:14:28 +0000 (14:14 -0500)]
st/mesa: don't pass compare mode for stencil-sampled textures
Fixes dEQP-GLES31.functional.stencil_texturing.misc.compare_mode_effect
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Ilia Mirkin [Sun, 12 Feb 2017 22:35:10 +0000 (17:35 -0500)]
nv50,nvc0: use alternate samplers for stencil
The blob uses these, and it fixes a bunch of dEQP stencil sampling tests
involving border colors. Probably the Z-based samplers work somehow
differently wrt border colors when using the stencil swizzle.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Bas Nieuwenhuizen [Fri, 10 Feb 2017 20:23:04 +0000 (21:23 +0100)]
radv: Fix radv_GetPhysicalDeviceQueueFamilyProperties2KHR.
The struct have different size, so the arrays have different stride.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Wladimir J. van der Laan [Thu, 9 Feb 2017 12:18:22 +0000 (13:18 +0100)]
etnaviv: Set shader instruction area correctly for GC3000
- Use the same instruction area on GC3000 as the Vivante driver.
This allows the same number of instructions on GC3000 as GC2000
instead of half.
- Makes sure that the "PE to FE" stall before updating the shader code
or constants is hit (which is conditional on vs_offset > 0x4000). This
is necessary on GC3000 too, it increases stability.
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Wladimir J. van der Laan [Thu, 9 Feb 2017 12:16:55 +0000 (13:16 +0100)]
etnaviv: Update hw header files
Update from etnaviv repository rnndb. This adds some newly
discovered state for GC3000 (and some GC2000) features.
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Dave Airlie [Fri, 10 Feb 2017 00:58:59 +0000 (00:58 +0000)]
radv: reduce CPU overhead merging bo lists.
Just noticed we do a fair bit of unneeded searching here.
Since we know that the buffers in a CS are unique already,
the first time we get any buffers, we can just memcpy those into
place, and when we are searching for subsequent CSes, we only
have to search up until where the previous unique buffers were.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Sat, 11 Feb 2017 23:37:41 +0000 (18:37 -0500)]
nvc0: set the render condition in the compute object
Fixes GL45-CTS.compute_shader.conditional-dispatching
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Ilia Mirkin [Sat, 11 Feb 2017 23:20:50 +0000 (18:20 -0500)]
gm107/ir: fix address offset bitfield for ATOMS
Fixes GL45-CTS.compute_shader.atomic-case1 on Maxwell
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Ilia Mirkin [Fri, 10 Feb 2017 06:55:08 +0000 (01:55 -0500)]
nv50/ir: convert an ATOM.EXCH without a destination into a store
On SM35 there does not appear to be a way to emit a ATOM.EXCH with a
null destination. This should be functionally equivalent to a plain
store however, so just do that.
Fixes GL45-CTS.compute_shader.atomic-case2 on SM35.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>