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Vedant Kumar [Tue, 22 Jan 2019 22:49:22 +0000 (22:49 +0000)]
[HotColdSplit] Calculate BFI lazily to reduce compile-time, NFC
The splitting pass does not need BFI unless the Module actually has a profile
summary. Do not calcualte BFI unless the summary is present.
For the sqlite3 amalgamation, this reduces time spent in the splitting pass
from 0.4% of the total to under 0.1%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351894
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Davide Italiano [Tue, 22 Jan 2019 22:49:19 +0000 (22:49 +0000)]
[Chrono] Remove ATTRIBUTE_ALWAYS inline from Chrono.h.
I discussed this with Pavel, who told me there was no real
thought behind this, and had no objection to remove the
attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351893
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Vedant Kumar [Tue, 22 Jan 2019 22:49:08 +0000 (22:49 +0000)]
[HotColdSplit] Calculate domtrees lazily to reduce compile-time, NFC
The splitting pass does not need (post)domtrees until after it's found a
cold block. Defer domtree calculation until a cold block is found.
For the sqlite3 amalgamation, this reduces time spent in the splitting
pass from 0.8% of the total to 0.4%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351892
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Davide Italiano [Tue, 22 Jan 2019 22:40:35 +0000 (22:40 +0000)]
[ADT] Move away from __attribute__((always_inline)).
Some member functions of StringRef/SmallVector/StringSwitch
are marked with the `always_inline` attribute. The result
is that the body of these functions is not emitted, hence the
debugger can't evaluate them (a typical example is
StringRef::size()), even if the code is built with `-O0`.
The main driver behind this was that of getting faster turnaround
when running `check-llvm`. A previous commit clarifies how to
get good performance when running the testsuite, so we can
get rid of the attribute here.
An alternative approach considered was that of using attribute `used`,
but in the end we preferred to not slap yet another attribute on
these functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351891
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Craig Topper [Tue, 22 Jan 2019 22:33:55 +0000 (22:33 +0000)]
[LegalizeTypes] Add debug prints to the top of PromoteFloatOperand and PromoteFloatResult.
Also add debug prints in the default case of the switches in these routines.
Most if not all of the type legalization handlers already do this so this makes promoting floats consistent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351890
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Matt Arsenault [Tue, 22 Jan 2019 22:00:19 +0000 (22:00 +0000)]
AMDGPU/GlobalISel: Start selectively legalizing 16-bit operations
It might be a bit nicer to use the fancy .legalIf and co. predicates,
but this was requiring more boilerplate and disables the coverage
assertions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351886
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Davide Italiano [Tue, 22 Jan 2019 21:52:50 +0000 (21:52 +0000)]
[Docs] Add a note clarifying how to get good test performances.
Differential Revision: https://reviews.llvm.org/D56337
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351885
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Matt Arsenault [Tue, 22 Jan 2019 21:51:38 +0000 (21:51 +0000)]
AMDGPU/GlobalISel: Handle legality/regbanks for 32/64-bit shifts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351884
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Rui Ueyama [Tue, 22 Jan 2019 21:49:56 +0000 (21:49 +0000)]
FileOutputBuffer: handle mmap(2) failure
If the underlying filesystem does not support mmap system call,
FileOutputBuffer may fail when it attempts to mmap an output temporary
file. This patch handles such situation.
Unfortunately, it looks like it is very hard to test this functionality
without a filesystem that doesn't support mmap using llvm-lit. I tested
this locally by passing an invalid parameter to mmap so that it fails and
falls back to the in-memory buffer. Maybe that's all what we can do.
I believe it is reasonable to submit this without a test.
Differential Revision: https://reviews.llvm.org/D56949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351883
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Matt Arsenault [Tue, 22 Jan 2019 21:42:11 +0000 (21:42 +0000)]
GlobalISel: Allow shift amount to be a different type
For AMDGPU the shift amount is never 64-bit, and
this needs to use a 32-bit shift.
X86 uses i8, but seemed to be hacking around this before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351882
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Joel E. Denny [Tue, 22 Jan 2019 21:41:42 +0000 (21:41 +0000)]
[FileCheck] Suppress old -v/-vv diags if dumping input
The old diagnostic form of the trace produced by -v and -vv looks
like:
```
check1:1:8: remark: CHECK: expected string found in input
CHECK: abc
^
<stdin>:1:3: note: found here
; abc def
^~~
```
When dumping annotated input is requested (via -dump-input), I find
that this old trace is not useful and is sometimes harmful:
1. The old trace is mostly redundant because the same basic
information also appears in the input dump's annotations.
2. The old trace buries any error diagnostic between it and the input
dump, but I find it useful to see any error diagnostic up front.
3. FILECHECK_OPTS=-dump-input=fail requests annotated input dumps only
for failed FileCheck calls. However, I have to also add -v or -vv
to get a full set of annotations, and that can produce massive
output from all FileCheck calls in all tests. That's a real
problem when I run this in the IDE I use, which grinds to a halt as
it tries to capture all that output.
When -dump-input=fail|always, this patch suppresses the old trace from
-v or -vv. Error diagnostics still print as usual. If you want the
old trace, perhaps to see variable expansions, you can set
-dump-input=none (the default).
Reviewed By: probinson
Differential Revision: https://reviews.llvm.org/D55825
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351881
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Matt Arsenault [Tue, 22 Jan 2019 21:31:02 +0000 (21:31 +0000)]
GlobalISel: Make buildConstant handle vectors
Produce a splat build_vector similar to how
SelectionDAG::getConstant does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351880
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Craig Topper [Tue, 22 Jan 2019 20:48:24 +0000 (20:48 +0000)]
[X86][AVX512F_SCALAR]: Adding full coverage of MC encoding for the AVX512F_SCALAR isa sets. NFC
Adding MC regressions tests to cover the AVX512F_SCALAR isa sets.
This patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952
Differential Revision: https://reviews.llvm.org/D41174
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351874
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Matt Arsenault [Tue, 22 Jan 2019 20:38:15 +0000 (20:38 +0000)]
GlobalISel: Implement widen for extract_vector_elt elt type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351871
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Matt Arsenault [Tue, 22 Jan 2019 20:14:29 +0000 (20:14 +0000)]
GlobalISel: Implement fewerElementsVector for basic FP ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351866
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Konstantin Zhuravlyov [Tue, 22 Jan 2019 19:18:18 +0000 (19:18 +0000)]
Add missing include (cstdlib) to Demangle.h
Differential Revision: https://reviews.llvm.org/D57035
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351861
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Matt Arsenault [Tue, 22 Jan 2019 19:04:51 +0000 (19:04 +0000)]
AMDGPU/GlobalISel: Remove vectors from legal constant types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351859
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Matt Arsenault [Tue, 22 Jan 2019 19:02:10 +0000 (19:02 +0000)]
GlobalISel: Support narrowing zextload/sextload
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351856
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Nirav Dave [Tue, 22 Jan 2019 18:57:49 +0000 (18:57 +0000)]
[SelectionDAGBuilder] Defer C_Register Assignments to be in line with
those of C_RegisterClass. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351854
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Matt Arsenault [Tue, 22 Jan 2019 18:53:41 +0000 (18:53 +0000)]
GlobalISel: Disallow vectors for G_CONSTANT/G_FCONSTANT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351853
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Rui Ueyama [Tue, 22 Jan 2019 18:44:04 +0000 (18:44 +0000)]
FileOutputBuffer: Handle "-" as stdout.
I was honestly a bit surprised that we didn't do this before. This
patch is to handle "-" as the stdout so that if you pass `-o -` to
lld, for example, it writes an output to stdout instead of file `-`.
I thought that we might want to handle this at a higher level than
FileOutputBuffer, because if we land this patch, we can no longer
create a file whose name is `-` (there's a workaround though; you can
pass `./-` instead of `-`). However, because raw_fd_ostream already
handles `-` as a special file name, I think it's okay and actually
consistent to handle `-` as a special name in FileOutputBuffer.
Differential Revision: https://reviews.llvm.org/D56940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351852
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Matt Arsenault [Tue, 22 Jan 2019 18:36:06 +0000 (18:36 +0000)]
Codegen support for atomicrmw fadd/fsub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351851
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Matt Arsenault [Tue, 22 Jan 2019 18:18:02 +0000 (18:18 +0000)]
Reapply "IR: Add fp operations to atomicrmw"
This reapplies commits r351778 and r351782 with
RISCV test fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351850
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Simon Pilgrim [Tue, 22 Jan 2019 17:52:15 +0000 (17:52 +0000)]
[llvm-mca][X86] Tidyup avx512 placeholder tests
Ensure we keep avx512f/bw/dq + vl versions separate, add example broadcast tests - this should allow us to better the test coverage of test\CodeGen\X86\avx512-schedule.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351848
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Alexey Bataev [Tue, 22 Jan 2019 17:43:37 +0000 (17:43 +0000)]
[DEBUGINFO, NVPTX] Enable support for the debug info on NVPTX target.
Summary: Enable full support for the debug info.
Reviewers: echristo
Subscribers: jholewinski, aprantl, JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D46189
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351846
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Jordan Rupprecht [Tue, 22 Jan 2019 17:39:02 +0000 (17:39 +0000)]
Revert r351520, "Re-enable terminator folding in LoopSimplifyCFG"
This is still causing compilation crashes in some targets. Will follow up shortly with a repro.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351845
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Alexey Bataev [Tue, 22 Jan 2019 17:24:16 +0000 (17:24 +0000)]
[DEBUG_INFO, NVPTX] Fix relocation info.
Summary: Initial function labels must follow the debug location for the correct relocation info generation.
Reviewers: tra, jlebar, echristo
Subscribers: jholewinski, llvm-commits
Differential Revision: https://reviews.llvm.org/D45784
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351843
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Simon Pilgrim [Tue, 22 Jan 2019 17:19:44 +0000 (17:19 +0000)]
[llvm-mca][X86] Add VPOPCNTDQ tests
Matches test coverage of test\CodeGen\X86\avx512vpopcntdq-schedule.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351842
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Sanjay Patel [Tue, 22 Jan 2019 17:01:06 +0000 (17:01 +0000)]
[x86] add partial undef 'and' test; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351840
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Kostya Kortchinsky [Tue, 22 Jan 2019 16:43:45 +0000 (16:43 +0000)]
[docs] Scudo: document error messages & their potential cause
Summary:
A couple of changes in the Scudo documentation:
- tag the shell code blocks as `console`;
- document error messages that are displayed in some termination conditions,
the reason they triggered, and potential causes.
Reviewers: eugenis, enh
Reviewed By: eugenis
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D56857
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351838
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Adrian Prantl [Tue, 22 Jan 2019 16:40:18 +0000 (16:40 +0000)]
Add DIGlobalVariableExpression to LangRef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351837
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Simon Pilgrim [Tue, 22 Jan 2019 16:39:28 +0000 (16:39 +0000)]
[llvm-mca][X86] Add missing CLWB/CLZERO/FSGSBASE/LWP/MWAITX/RDPID/SHA tests
We're getting pretty close to matching/exceeding test coverage of the test\CodeGen\X86\*-schedule.ll files, which should allow us to get rid of -print-schedule and fix PR37160
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351836
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Simon Pilgrim [Tue, 22 Jan 2019 16:29:26 +0000 (16:29 +0000)]
[llvm-mca][X86] Add missing enter/leave, invlpg/invlpga, rdmsr/wrmsr, rdpmc and rdtsc/rdtscp tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351835
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Sanjay Patel [Tue, 22 Jan 2019 16:26:09 +0000 (16:26 +0000)]
[x86] add another partial undef vector binop test; NFC
The existing test unintentionally shows that we have prematurely
optimized the shuffle into a vector concat and lost the undef info,
so it is not affected by a basic improvement to
SimplifyDemandedVectorElts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351834
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Serge Guelton [Tue, 22 Jan 2019 16:25:17 +0000 (16:25 +0000)]
Use response file when generating LLVM-C.dll
As discovered in D56774 the command line gets to long, so use a response file to give the script the libs. This change has been tested and is confirmed working for me.
Commited on behalf of Jakob Bornecrantz
Differential Revision: https://reviews.llvm.org/D56781
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351833
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Simon Pilgrim [Tue, 22 Jan 2019 16:01:08 +0000 (16:01 +0000)]
[llvm-mca][X86] Add missing mfence/pinsrw tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351831
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Simon Pilgrim [Tue, 22 Jan 2019 15:48:16 +0000 (15:48 +0000)]
[llvm-mca][X86] Add missing monitor/mwait tests
These technically should be under a MONITOR cpuid bit, but we tag them as SSE3 so I've done that here as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351829
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Simon Pilgrim [Tue, 22 Jan 2019 14:54:24 +0000 (14:54 +0000)]
[llvm-mca][X86] Add missing vperm2i128 tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351828
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Simon Pilgrim [Tue, 22 Jan 2019 14:53:52 +0000 (14:53 +0000)]
[llvm-mca][X86] Add missing tzcntw tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351827
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Sanjay Patel [Tue, 22 Jan 2019 14:24:13 +0000 (14:24 +0000)]
[DAGCombiner] narrow vector binop with 2 insert subvector operands
vecbo (insertsubv undef, X, Z), (insertsubv undef, Y, Z) --> insertsubv VecC, (vecbo X, Y), Z
This is another step in generic vector narrowing. It's also a step towards more horizontal op
formation specifically for x86 (although we still failed to match those in the affected tests).
The scalarization cases are also not optimal (we should be scalarizing those), but it's still
an improvement to use a narrower vector op when we know part of the result must be constant
because both inputs are undef in some vector lanes.
I think a similar match but checking for a constant operand might help some of the cases in
D51553.
Differential Revision: https://reviews.llvm.org/D56875
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351825
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George Rimar [Tue, 22 Jan 2019 14:09:37 +0000 (14:09 +0000)]
[llvm-objdump] - Introduce getRelocsMap() helper. NFCI.
Currently disassembleObject() is a ~550 lines length function.
This patch extracts the code that creates a section->their relocation
mapping into a new helper function to simplify/reduce it a bit.
Differential revision: https://reviews.llvm.org/D57019
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351824
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Alex Bradbury [Tue, 22 Jan 2019 14:05:11 +0000 (14:05 +0000)]
[RISCV][NFC] Change naming scheme for RISC-V specific DAG nodes
Previously we had names like 'Call' or 'Tail'. This potentially clashes with
the naming scheme used elsewhere in RISCVInstrInfo.td. Many other backends
would use names like AArch64call or PPCtail. I prefer the SystemZ approach,
which uses prefixed all-lowercase names. This matches the naming scheme used
for target-independent SelectionDAG nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351823
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Andrea Di Biagio [Tue, 22 Jan 2019 13:59:08 +0000 (13:59 +0000)]
[MCA] Add tests for int-to-fpu transfer delays. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351822
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Serge Guelton [Tue, 22 Jan 2019 13:57:29 +0000 (13:57 +0000)]
Slight fix for r351820
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351821
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Serge Guelton [Tue, 22 Jan 2019 13:48:55 +0000 (13:48 +0000)]
Fix llvm::is_trivially_copyable portability issues
llvm::is_trivially_copyable portability is verified at compile time using
std::is_trivially_copyable as the reference implementation.
Unfortunately, the latter is not available on all platforms, so introduce
a proper configure check to detect if it is available on the target platform.
In a similar manner, std::is_copy_assignable is not fully supported for gcc4.9.
Provide a portable (?) implementation instead.
Differential Revision: https://reviews.llvm.org/D57018
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351820
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Simon Pilgrim [Tue, 22 Jan 2019 13:44:49 +0000 (13:44 +0000)]
[X86][SSE] Canonicalize OR(AND(X,C),AND(Y,~C)) -> OR(AND(X,C),ANDNP(C,Y))
For constant bit select patterns, replace one AND with a ANDNP, allowing us to reuse the constant mask. Only do this if the mask has multiple uses (to avoid losing load folding) or if we have XOP as its VPCMOV can handle most folding commutations.
This also requires computeKnownBitsForTargetNode support for X86ISD::ANDNP and X86ISD::FOR to prevent regressions in fabs/fcopysign patterns.
Differential Revision: https://reviews.llvm.org/D55935
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351819
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Simon Pilgrim [Tue, 22 Jan 2019 13:27:18 +0000 (13:27 +0000)]
[X86][BtVer2] SSE2 vector shifts has local forwarding disabled
Similar to horizontal ops on D56777, the sse2 (but not mmx) bit shift ops has local forwarding disabled, adding +1cy to the use latency for the result.
Differential Revision: https://reviews.llvm.org/D57026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351817
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Simon Pilgrim [Tue, 22 Jan 2019 13:18:26 +0000 (13:18 +0000)]
Fix "comparison of unsigned expression >= 0 is always true" warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351816
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Simon Pilgrim [Tue, 22 Jan 2019 13:13:57 +0000 (13:13 +0000)]
[X86][BtVer2] X86ISD::VPERMILPV has local forwarding disabled
Similar to horizontal ops on D56777, the vpermilpd/vpermilps variable mask ops has local forwarding disabled, adding +1cy to the use latency for the result.
Differential Revision: https://reviews.llvm.org/D57022
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351815
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Martin Storsjo [Tue, 22 Jan 2019 12:35:34 +0000 (12:35 +0000)]
Revert "[llvm-objcopy] [COFF] Implement --add-gnu-debuglink"
This reverts commit r351801, as it caused errors on (so far)
ppc64be and aarch64 buildbots - the reason is yet unknown.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351811
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Simon Pilgrim [Tue, 22 Jan 2019 12:29:38 +0000 (12:29 +0000)]
[CostModel][X86] Add ICMP Predicate specific costs
First step towards PR40376, this patch adds support for getCmpSelInstrCost to use the (optional) Instruction CmpInst predicate to indicate the type of integer comparison we're performing and alter the costs accordingly.
Differential Revision: https://reviews.llvm.org/D57013
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351810
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Simon Pilgrim [Tue, 22 Jan 2019 12:17:48 +0000 (12:17 +0000)]
[X86][SSE] Add selective commutation support for insertps (PR40340)
When we are inserting 1 "inline" element, and zeroing 2 of the other elements then we can safely commute the insertps source inputs to improve memory folding.
Differential Revision: https://reviews.llvm.org/D56843
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351807
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Alex Bradbury [Tue, 22 Jan 2019 12:11:53 +0000 (12:11 +0000)]
[RISCV] Quick fix for PR40333
Avoid the infinite loop caused by the target DAG combine converting ANYEXT to
SIGNEXT and the target-independent DAG combine logic converting back to
ANYEXT. Do this by not adding the new node to the worklist.
Committing directly as this definitely doesn't make the problem any worse, and
I intend to follow-up with a patch that avoids this custom combiner logic
altogether and just lowers the i32 operations to a target-specific
SelectionDAG node. This should be easier to reason about and improve codegen
quality in some cases (though may miss out on some later DAG combines).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351806
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Max Kazantsev [Tue, 22 Jan 2019 11:49:06 +0000 (11:49 +0000)]
[LoopPredication] Support guards expressed as branches by widenable condition
This patch adds support of guards expressed as branches by widenable
conditions in Loop Predication.
Differential Revision: https://reviews.llvm.org/D56081
Reviewed By: reames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351805
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Simon Pilgrim [Tue, 22 Jan 2019 11:39:21 +0000 (11:39 +0000)]
[X86] Add test for matchAddressRecursively's MUL handling
Noticed in code coverage tests that this isn't tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351804
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Max Kazantsev [Tue, 22 Jan 2019 11:21:32 +0000 (11:21 +0000)]
[NFC] Add function to parse widenable conditional branches
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351803
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Martin Storsjo [Tue, 22 Jan 2019 10:58:18 +0000 (10:58 +0000)]
[llvm-objcopy] [COFF] Implement --add-gnu-debuglink
Differential Revision: https://reviews.llvm.org/D57007
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351801
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Martin Storsjo [Tue, 22 Jan 2019 10:58:09 +0000 (10:58 +0000)]
[llvm-objcopy] [COFF] Update symbol indices in weak externals
Differential Revision: https://reviews.llvm.org/D57006
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351800
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Martin Storsjo [Tue, 22 Jan 2019 10:57:59 +0000 (10:57 +0000)]
[llvm-objcopy] Consistently use createStringError instead of make_error<StringError>
This was requested in the review of D57006.
Also add missing quotes around symbol names in error messages.
Differential Revision: https://reviews.llvm.org/D57014
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351799
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James Henderson [Tue, 22 Jan 2019 10:57:21 +0000 (10:57 +0000)]
[NFC][llvm-readobj]Normalise --/- inconsistency in test options
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351798
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Simon Pilgrim [Tue, 22 Jan 2019 10:49:41 +0000 (10:49 +0000)]
[X86] HADDPS/HADDPD scalar lowering was added at rL350421
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351797
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Chandler Carruth [Tue, 22 Jan 2019 10:29:58 +0000 (10:29 +0000)]
Revert r351778: IR: Add fp operations to atomicrmw
This broke the RISCV build, and even with that fixed, one of the RISCV
tests behaves surprisingly differently with asserts than without,
leaving there no clear test pattern to use. Generally it seems bad for
hte IR to differ substantially due to asserts (as in, an alloca is used
with asserts that isn't needed without!) and nothing I did simply would
fix it so I'm reverting back to green.
This also required reverting the RISCV build fix in r351782.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351796
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James Henderson [Tue, 22 Jan 2019 10:24:32 +0000 (10:24 +0000)]
[llvm-symbolizer] Add support for --basenames/-s
This fixes https://bugs.llvm.org/show_bug.cgi?id=40068.
--basenames is a GNU addr2line switch which strips the directory names
from the file path in the output.
Reviewed by: ruiu
Differential Revision: https://reviews.llvm.org/D56919
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351795
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Max Kazantsev [Tue, 22 Jan 2019 10:13:36 +0000 (10:13 +0000)]
[NFC] Factor out some reusable logic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351794
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Max Kazantsev [Tue, 22 Jan 2019 09:36:22 +0000 (09:36 +0000)]
[NFC] Add detector for guards expressed as branch by widenable conditions
This patch adds a function to detect guards expressed in explicit control
flow form as branch by `and` with widenable condition intrinsic call:
%wc = call i1 @llvm.experimental.widenable.condition()
%guard_cond = and i1, %some_cond, %wc
br i1 %guard_cond, label %guarded, label %deopt
deopt:
<maybe some non-side-effecting instructions>
deoptimize()
This form can be used as alternative to implicit control flow guard
representation expressed by `experimental_guard` intrinsic.
Differential Revision: https://reviews.llvm.org/D56074
Reviewed By: reames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351791
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James Henderson [Tue, 22 Jan 2019 09:35:35 +0000 (09:35 +0000)]
[llvm-readelf]Revert --dyn-symbols behaviour to make it GNU compatible, and add new --hash-symbols switch for old behaviour
In r287786, the behaviour of --dyn-symbols in llvm-readelf (but not
llvm-readobj) was changed to print the dynamic symbols as derived from
the hash table, rather than to print the dynamic symbol table contents
directly. The original change was initially submitted without review,
and some comments were made on the commit mailing list implying that the
new behavious is GNU compatible. I argue that it is not:
1) It does not include a null symbol.
2) It prints the symbols based on an order derived from the hash
table.
3) It prints an extra column indicating which bucket it came from.
This could break parsers that expect a fixed number of columns,
with the first column being the symbol index.
4) If the input happens to have both .hash and .gnu.hash section, it
prints interpretations of them both, resulting in most symbols
being printed twice.
5) There is no way of just printing the raw dynamic symbol table,
because --symbols also prints the static symbol table.
This patch reverts the --dyn-symbols behaviour back to its old behaviour
of just printing the contents of the dynamic symbol table, similar to
what is printed by --symbols. As the hashed interpretation is still
desirable to validate the hash table, it puts it under a new switch
"--hash-symbols". This is a no-op on all output forms except for GNU
output style for ELF. If there is no hash table, it does nothing,
unlike the previous behaviour which printed the raw dynamic symbol
table, since the raw dynsym is available under --dyn-symbols.
The yaml input for the test is based on that in
test/tools/llvm-readobj/demangle.test, but stripped down to the bare
minimum to provide a valid dynamic symbol.
Note: some LLD tests needed updating. I will commit a separate patch for
those.
Reviewed by: grimar, rupprecht
Differential Revision: https://reviews.llvm.org/D56910
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351789
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Vitaly Buka [Tue, 22 Jan 2019 07:22:45 +0000 (07:22 +0000)]
Revert "Remove static_assert(value == std::is_trivially_copyable<T>::value)"
Upgraded the bot as workaround.
This reverts commit r351784.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351786
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Alex Bradbury [Tue, 22 Jan 2019 07:22:00 +0000 (07:22 +0000)]
[RISCV][NFC] Add break to case statement in RISCVDAGToDAGISel::Select
The break isn't strictly needed yet as there is no subsequent entry in the
case. But adding to prevent mistakes further down the road.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351785
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Vitaly Buka [Tue, 22 Jan 2019 06:26:50 +0000 (06:26 +0000)]
Remove static_assert(value == std::is_trivially_copyable<T>::value)
This fails to compile with clang ang libstdc++ 4.6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351784
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Alex Bradbury [Tue, 22 Jan 2019 05:06:57 +0000 (05:06 +0000)]
[RISCV] Fix build after r351778
Also add a comment to explain the expansion strategy for atomicrmw
{fadd,fsub}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351782
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Matt Arsenault [Tue, 22 Jan 2019 03:32:36 +0000 (03:32 +0000)]
IR: Add fp operations to atomicrmw
Add just fadd/fsub for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351778
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Eli Friedman [Tue, 22 Jan 2019 01:51:37 +0000 (01:51 +0000)]
[ARM] Combine ands+lsls to lsls+lsrs for Thumb1.
This patch may seem familiar... but my previous patch handled the
equivalent lsls+and, not this case. Usually instcombine puts the
"and" after the shift, so this case doesn't come up. However, if the
shift comes out of a GEP, it won't get canonicalized by instcombine,
and DAGCombine doesn't have an equivalent transform.
This also modifies isDesirableToCommuteWithShift to suppress DAGCombine
transforms which would make the overall code worse.
I'm not really happy adding a bunch of code to handle this, but it would
probably be tricky to substantially improve the behavior of DAGCombine
here.
Differential Revision: https://reviews.llvm.org/D56032
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351776
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Philip Reames [Tue, 22 Jan 2019 01:34:33 +0000 (01:34 +0000)]
[CVP] Use LVI to constant fold deopt operands
Deopt operands are generally intended to record information about a site in code with minimal perturbation of the surrounding code. Idiomatically, they also tend to appear down rare paths. Putting these together, we have an obvious case for extending CVP w/deopt operand constant folding. Arguably, we should be doing this for all operands on all instructions, but that's definitely a much larger and risky change.
Differential Revision: https://reviews.llvm.org/D55678
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351774
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Eli Friedman [Tue, 22 Jan 2019 00:42:20 +0000 (00:42 +0000)]
[LangRef] Clarify semantics of volatile operations.
Specifically, clarify the following:
1. Volatile load and store may access addresses that are not memory.
2. Volatile load and store do not modify arbitrary memory.
3. Volatile load and store do not trap.
Prompted by recent volatile discussion on llvmdev.
Currently, there's sort of a split in the source code about whether
volatile operations are allowed to trap; this resolves that dispute in
favor of not allowing them to trap.
Differential Revision: https://reviews.llvm.org/D53184
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351772
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Matt Arsenault [Tue, 22 Jan 2019 00:29:37 +0000 (00:29 +0000)]
GlobalISel: Fix out of bounds crashes in verifier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351769
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Eli Friedman [Tue, 22 Jan 2019 00:21:35 +0000 (00:21 +0000)]
[AArch64] Add patterns for zext/sext of shift amount.
Not sure this is the best fix, but it saves an instruction for certain
constructs involving variable shifts.
Differential Revision: https://reviews.llvm.org/D55572
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351768
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Matt Arsenault [Tue, 22 Jan 2019 00:20:17 +0000 (00:20 +0000)]
AMDGPU/GlobalISel: Legalize more fp<->int conversions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351767
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JF Bastien [Mon, 21 Jan 2019 23:53:52 +0000 (23:53 +0000)]
Document toolchain update policy
Summary:
Capture the current agreed-upon toolchain update policy based on the following
discussions:
- LLVM dev meeting 2018 BoF "Migrating to C++14, and beyond!"
llvm.org/devmtg/2018-10/talk-abstracts.html#bof3
- A Short Policy Proposal Regarding Host Compilers
lists.llvm.org/pipermail/llvm-dev/2018-May/123238.html
- Using C++14 code in LLVM (2018)
lists.llvm.org/pipermail/llvm-dev/2018-May/123182.html
- Using C++14 code in LLVM (2017)
lists.llvm.org/pipermail/llvm-dev/2017-October/118673.html
- Using C++14 code in LLVM (2016)
lists.llvm.org/pipermail/llvm-dev/2016-October/105483.html
- Document and Enforce new Host Compiler Policy
llvm.org/D47073
- Require GCC 5.1 and LLVM 3.5 at a minimum
llvm.org/D46723
Subscribers: jkorous, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D56819
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351765
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Sanjay Patel [Mon, 21 Jan 2019 22:12:35 +0000 (22:12 +0000)]
[x86] add another test for xor with undefs; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351764
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Sanjay Patel [Mon, 21 Jan 2019 21:52:27 +0000 (21:52 +0000)]
[x86] add tests for vector ops with undef lanes; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351763
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Craig Topper [Mon, 21 Jan 2019 20:14:09 +0000 (20:14 +0000)]
[X86] Use X86ISD::VFPROUND instead of ISD::FP_ROUND for 256 and 512 bit cvtpd2ps intrinsics.
Summary:
Use X86ISD::VFPROUND in the instruction isel patterns. Add new patterns for ISD::FP_ROUND to maintain support for fptrunc in IR.
In the process I found a couple duplicate isel patterns which I also deleted in this patch.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D56991
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351762
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Craig Topper [Mon, 21 Jan 2019 20:02:28 +0000 (20:02 +0000)]
[X86] Change avx512 COMPRESS and EXPAND lowering to use a single masked node instead of expand/compress+select.
Summary:
For compress, a select node doesn't semantically reflect the behavior of the instruction. The mask would have holes in it, but the resulting write is to contiguous elements at the bottom of the vector.
Furthermore, as far as the compressing and expanding is concerned the behavior is depended on the mask. You can't just have an expand/compress node that only reads the input vector. That node would have no meaning by itself.
This all only works because we pattern match the compress/expand+select back to the instruction. But conceivably an optimization of the select could break the pattern and leave something meaningless.
This patch modifies the expand and compress node to take the mask and passthru as additional inputs and gets rid of the select all together.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D57002
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351761
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Stanislav Mekhanoshin [Mon, 21 Jan 2019 19:11:26 +0000 (19:11 +0000)]
[AMDGPU] Fixed hazard recognizer to walk predecessors
Fixes two problems with GCNHazardRecognizer:
1. It only scans up to 5 instructions emitted earlier.
2. It does not take control flow into account. An earlier instruction
from the previous basic block is not necessarily a predecessor.
At the same time a real predecessor block is not scanned.
The patch provides a way to distinguish between scheduler and
hazard recognizer mode. It is OK to work with emitted instructions
in the scheduler because we do not really know what will be emitted
later and its order. However, when pass works as a hazard recognizer
the schedule is already finalized, and we have full access to the
instructions for the whole function, so we can properly traverse
predecessors and their instructions.
Differential Revision: https://reviews.llvm.org/D56923
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351759
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Nico Weber [Mon, 21 Jan 2019 18:59:11 +0000 (18:59 +0000)]
gn build: Stop passing -DLLVM_LIBXML2_ENABLED to some targets
This is a remnant from before the gn build had a working config.h.
Defining LLVM_LIBXML2_ENABLED only for targets that depend on build/libs/xml is
nice in that only some of the codebase needs to be rebuilt when
llvm_enable_libxml2 changes -- but config.h already defines it and defining it
there and then redundantly a second time for some targets is worse than having
it just in config.h.
No behavior change.
Differential Revision: https://reviews.llvm.org/D56908
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351758
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Nico Weber [Mon, 21 Jan 2019 18:56:39 +0000 (18:56 +0000)]
gn build: Merge r351627, r351548, r351701
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351757
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Pavel Labath [Mon, 21 Jan 2019 18:21:03 +0000 (18:21 +0000)]
Fix compilation error with gcc 4.8
This version of gcc seems to be having issues with raw literals inside macro
arguments. I change the string to use regular string literals instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351756
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Simon Pilgrim [Mon, 21 Jan 2019 18:04:25 +0000 (18:04 +0000)]
[X86][BtVer2] Update latency of mmx horizontal operations
D56777 added +1cy local forwarding penalty for horizontal operations, but this penalty only affects sse2/xmm variants, the mmx variants don't suffer the penalty.
Confirmed with @andreadb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351755
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Sanjay Patel [Mon, 21 Jan 2019 17:46:35 +0000 (17:46 +0000)]
[AArch64] add more tests for buildvec to shuffle transform; NFC
These are copied from the sibling x86 file. I'm not sure which
of the current outputs (if any) is considered optimal, but
someone more familiar with AArch may want to take a look.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351754
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Sanjay Patel [Mon, 21 Jan 2019 17:30:14 +0000 (17:30 +0000)]
[DAGCombiner] fix crash when converting build vector to shuffle
The regression test is reduced from the example shown in D56281.
This does raise a question as noted in the test file: do we want
to handle this pattern? I don't have a motivating example for
that on x86 yet, but it seems like we could have that pattern
there too, so we could avoid the back-and-forth using a shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351753
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Andrea Di Biagio [Mon, 21 Jan 2019 12:04:10 +0000 (12:04 +0000)]
[X86][BtVer2] Update the WriteLoad latency.
r327630 introduced new write definitions for float/vector loads.
Before that revision, WriteLoad was used by both integer/float (scalar/vector)
load. So, WriteLoad had to conservatively declare a latency to 5cy. That is
because the load-to-use latency for float/vector load is 5cy.
Now that we have dedicated writes for float/vector loads, there is no reason why
we should keep the latency of WriteLoad to 5cy. At the moment, WriteLoad is only
used by scalar integer loads only; we can assume an optimstic 3cy latency for
them.
This patch changes that latency from 5cy to 3cy, and regenerates the affected
scheduling/mca tests.
Differential Revision: https://reviews.llvm.org/D56922
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351742
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Simon Pilgrim [Mon, 21 Jan 2019 11:33:52 +0000 (11:33 +0000)]
[CostModel][X86] Add XOP icmp cost tests (PR40376)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351741
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Dmitry Venikov [Mon, 21 Jan 2019 10:00:57 +0000 (10:00 +0000)]
[llvm-symbolizer] Add -no-demangle as alias for -demangle=false
Summary: Provides -no-demangle as alias for -demangle=false. Motivation: https://bugs.llvm.org/show_bug.cgi?id=40075
Reviewers: jhenderson, ruiu
Reviewed By: jhenderson
Subscribers: erik.pilkington, rupprecht, llvm-commits
Differential Revision: https://reviews.llvm.org/D56773
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351735
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Chandler Carruth [Mon, 21 Jan 2019 09:52:34 +0000 (09:52 +0000)]
Fix typos throughout the license files that somehow I and my reviewers
all missed!
Thanks to Alex Bradbury for pointing this out, and the fact that I never
added the intended `legacy` anchor to the developer policy. Add that
anchor too. With hope, this will cause the links to all resolve
successfully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351731
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Craig Topper [Mon, 21 Jan 2019 08:16:59 +0000 (08:16 +0000)]
[X86] Remove and autoupgrade vpmovqd/vpmovwb intrinsics using trunc+select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351729
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Max Kazantsev [Mon, 21 Jan 2019 07:36:55 +0000 (07:36 +0000)]
[NFC] Make getExpressionSize unsigned short
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351727
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Max Kazantsev [Mon, 21 Jan 2019 07:27:47 +0000 (07:27 +0000)]
[NFC] Fix warnings in unit test of r351725
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351726
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Max Kazantsev [Mon, 21 Jan 2019 06:19:50 +0000 (06:19 +0000)]
[SCEV][NFC] Introduces expression sizes estimation
This patch introduces the field `ExpressionSize` in SCEV. This field is
calculated only once on SCEV creation, and it represents the complexity of
this SCEV from arithmetical point of view (not from the point of the number
of actual different SCEV nodes that are used in the expression). Roughly
saying, it is the number of operands and operations symbols when we print this
SCEV.
A formal definition is following: if SCEV `X` has operands
`Op1`, `Op2`, ..., `OpN`,
then
Size(X) = 1 + Size(Op1) + Size(Op2) + ... + Size(OpN).
Size of SCEVConstant and SCEVUnknown is one.
Expression size may be used as a universal way to limit SCEV transformations
for huge SCEVs. Currently, we have a bunch of options that represents various
limits (such as recursion depth limit) that may not make any sense from the
point of view of a LLVM users who is not familiar with SCEV internals, and all
these different options pursue one goal. A more general rule that may
potentially allow us to get rid of this redundancy in options is "do not make
transformations with SCEVs of huge size". It can apply to all SCEV traversals
and transformations that may need to visit a SCEV node more than once, hence
they are prone to combinatorial explosions.
This patch only introduces SCEV sizes calculation as NFC, its utilization will
be introduced in follow-up patches.
Differential Revision: https://reviews.llvm.org/D35989
Reviewed By: reames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351725
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Kito Cheng [Mon, 21 Jan 2019 05:27:09 +0000 (05:27 +0000)]
[RISCV] Add R_RISCV_RELAX relocation to all possible relax candidates.
Summary:
Add R_RISCV_RELAX relocation to all possible relax candidates and
update corresponding testcase.
Reviewers: asb, apazos
Differential Revision: https://reviews.llvm.org/D46677
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351723
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Dylan McKay [Mon, 21 Jan 2019 04:32:02 +0000 (04:32 +0000)]
[AVR] Insert unconditional branch when inserting MBBs between blocks with fallthrough
This updates the AVR Select8/Select16 expansion code so that, when
inserting the two basic blocks for true and false conditions, any
existing fallthrough on the previous block is preserved.
Prior to this patch, if the block before the Select pseudo fell through
to the subsequent block, two new basic blocks would be inserted at the
prior fallthrough point, changing the fallthrough destination.
The predecessor or successor lists were not updated, causing the
BranchFolding pass at -O1 and above the rearrange basic blocks, causing
an infinite loop. Not to mention the unconditional fallthrough to the
true block is incorrect in of itself.
This patch modifies the Select8/16 expansion so that, if inserting true
and false basic blocks at a fallthrough point, the implicit branch is
preserved by means of an explicit, unconditional branch to the previous
fallthrough destination.
Thanks to Carl Peto for reporting this bug.
This fixes avr-rust bug https://github.com/avr-rust/rust/issues/123.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351721
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Dylan McKay [Mon, 21 Jan 2019 04:27:08 +0000 (04:27 +0000)]
[AVR] Enable emission of debug information
Prior to this, the code was missing AVR-specific relocation logic in
RelocVisitor.h.
This patch teaches RelocVisitor about R_AVR_16 and R_AVR_32.
Debug information is emitted in the final object file, and understood by
'avr-readelf --debug-dump' from AVR-GCC.
llvm-dwarfdump is yet to understand how to dump AVR DWARF symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351720
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