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Michael Liao [Mon, 2 Oct 2017 21:00:52 +0000 (21:00 +0000)]
Remove dead file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314720
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Konstantin Zhuravlyov [Mon, 2 Oct 2017 20:49:58 +0000 (20:49 +0000)]
Add ELFOSABI_FIRST_ARCH, ELFOSABI_LAST_ARCH and start using those in llvm-readobj
Differential Revision: https://reviews.llvm.org/D38418
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314717
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Matt Arsenault [Mon, 2 Oct 2017 20:31:18 +0000 (20:31 +0000)]
AMDGPU: Fix typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314715
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Matt Arsenault [Mon, 2 Oct 2017 20:31:16 +0000 (20:31 +0000)]
AMDGPU: Fix potentially incorrectly matching check lines
These check lines are supposed to make sure the new d16
load instructions aren't used, but the expected instruction
name is a prefix of the incorrect instruction name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314714
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Sanjay Patel [Mon, 2 Oct 2017 20:16:59 +0000 (20:16 +0000)]
[InstCombine] auto-generate complete checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314712
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Sanjay Patel [Mon, 2 Oct 2017 20:07:15 +0000 (20:07 +0000)]
[InstCombine] add icmp (shr X, Y), 0 test; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314710
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Hans Wennborg [Mon, 2 Oct 2017 19:48:28 +0000 (19:48 +0000)]
Fix two header comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314709
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Walter Lee [Mon, 2 Oct 2017 18:50:48 +0000 (18:50 +0000)]
Add support for Myriad ma2x8x series of CPUs
Summary: Also add support for some older Myriad CPUs that were missing.
Reviewers: jyknight
Subscribers: fedor.sergeev
Differential Revision: https://reviews.llvm.org/D37552
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314705
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Adrian Prantl [Mon, 2 Oct 2017 18:31:29 +0000 (18:31 +0000)]
Move the stripping of invalid debug info from the Verifier to AutoUpgrade.
This came out of a recent discussion on llvm-dev
(https://reviews.llvm.org/D38042). Currently the Verifier will strip
the debug info metadata from a module if it finds the dbeug info to be
malformed. This feature is very valuable since it allows us to improve
the Verifier by making it stricter without breaking bcompatibility,
but arguable the Verifier pass should not be modifying the IR. This
patch moves the stripping of broken debug info into AutoUpgrade
(UpgradeDebugInfo to be precise), which is a much better location for
this since the stripping of malformed (i.e., produced by older, buggy
versions of Clang) is a (harsh) form of AutoUpgrade.
This change is mostly NFC in nature, the one big difference is the
behavior when LLVM module passes are introducing malformed debug
info. Prior to this patch, a NoAsserts build would have printed a
warning and stripped the debug info, after this patch the Verifier
will report a fatal error. I believe this behavior is actually more
desirable anyway.
Differential Revision: https://reviews.llvm.org/D38184
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314699
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Sanjay Patel [Mon, 2 Oct 2017 18:26:44 +0000 (18:26 +0000)]
[InstCombine] remove one-use restriction for icmp (shr exact X, C1), C2 --> icmp X, (C2<<C1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314698
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Sanjay Patel [Mon, 2 Oct 2017 18:16:17 +0000 (18:16 +0000)]
[InstCombine] add icmp (lshr X, C1), C2 test; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314696
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Dehao Chen [Mon, 2 Oct 2017 18:13:14 +0000 (18:13 +0000)]
Update getMergedLocation to check the instruction type and merge properly.
Summary: If the merged instruction is call instruction, we need to set the scope to the closes common scope between 2 locations, otherwise it will cause trouble when the call is getting inlined.
Reviewers: dblaikie, aprantl
Reviewed By: dblaikie, aprantl
Subscribers: llvm-commits, sanjoy
Differential Revision: https://reviews.llvm.org/D37877
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314694
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Hans Wennborg [Mon, 2 Oct 2017 17:44:47 +0000 (17:44 +0000)]
CodeView symbol dumper: use symbolic names for registers
https://reviews.llvm.org/D38469
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314690
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Stanislav Mekhanoshin [Mon, 2 Oct 2017 16:57:07 +0000 (16:57 +0000)]
Eliminate ftrunc if source is know to be rounded
Differential Revision: https://reviews.llvm.org/D38421
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314688
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Jonas Devlieghere [Mon, 2 Oct 2017 16:02:04 +0000 (16:02 +0000)]
[dwarfdump] Add -show-form
This enables printing of DWARF form types after the DWARF attribute
types.
Differential revision: https://reviews.llvm.org/D38459
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314685
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Simon Pilgrim [Mon, 2 Oct 2017 15:43:26 +0000 (15:43 +0000)]
[X86][SSE] Add PACKSS/PACKUS constant folding tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314682
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Simon Pilgrim [Mon, 2 Oct 2017 15:22:35 +0000 (15:22 +0000)]
Regenerate test (missing broadcast constant comments). NFCI.
Still avoiding the floating point comments to prevent linux/windows discrepancies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314681
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Simon Pilgrim [Mon, 2 Oct 2017 15:21:14 +0000 (15:21 +0000)]
Regenerate test (missing broadcast constant comments). NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314680
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Simon Pilgrim [Mon, 2 Oct 2017 15:16:30 +0000 (15:16 +0000)]
Regenerate test. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314679
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Sanjay Patel [Mon, 2 Oct 2017 15:02:06 +0000 (15:02 +0000)]
use range-for-loops; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314676
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Coby Tayree [Mon, 2 Oct 2017 14:36:31 +0000 (14:36 +0000)]
[AsmParser] Support GAS's .print directive
Differential Revision: https://reviews.llvm.org/D38448
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314674
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Sanjay Patel [Mon, 2 Oct 2017 14:03:17 +0000 (14:03 +0000)]
remove duplicate comments, reposition related functions; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314669
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Bjorn Pettersson [Mon, 2 Oct 2017 12:46:38 +0000 (12:46 +0000)]
[X86][SSE] Fix -Wsign-compare problems introduced in r314658
The refactoring in
"[X86][SSE] Add createPackShuffleMask helper function. NFCI."
resulted in warning when compiling the code (seen in build bots).
This patch restores some types from int to unsigned to avoid
those warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314667
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Bjorn Pettersson [Mon, 2 Oct 2017 12:46:32 +0000 (12:46 +0000)]
[Debug info] Handle endianness when moving debug info for split integer values
Summary:
Take the target's endianness into account when splitting the
debug information in DAGTypeLegalizer::SetExpandedInteger.
This patch fixes so that, for big-endian targets, the fragment
expression corresponding to the high part of a split integer
value is placed at offset 0, in order to correctly represent
the memory address order.
I have attached a PPC32 reproducer where the resulting DWARF
pieces for a 64-bit integer were incorrectly reversed.
Patch by: dstenb
Reviewers: JDevlieghere, aprantl, dblaikie
Reviewed By: JDevlieghere, aprantl, dblaikie
Subscribers: nemanjai
Differential Revision: https://reviews.llvm.org/D38172
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314666
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Simon Pilgrim [Mon, 2 Oct 2017 10:12:51 +0000 (10:12 +0000)]
[X86][SSE] Add createPackShuffleMask helper function. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314658
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Simon Pilgrim [Mon, 2 Oct 2017 09:45:08 +0000 (09:45 +0000)]
[X86][SSE] matchBinaryVectorShuffle - add support for different src/dst value shuffle types
Preparation for support for combining to PACKSS/PACKUS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314656
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Hiroshi Inoue [Mon, 2 Oct 2017 09:24:00 +0000 (09:24 +0000)]
[PowerPC] support ZERO_EXTEND in tryBitPermutation
This patch add a support of ISD::ZERO_EXTEND in PPCDAGToDAGISel::tryBitPermutation to increase the opportunity to use rotate-and-mask by reordering ZEXT and ANDI.
Since tryBitPermutation stops analyzing nodes if it hits a ZEXT node while traversing SDNodes, we want to avoid ZEXT between two nodes that can be folded into a rotate-and-mask instruction.
For example, we allow these nodes
t9: i32 = add t7, Constant:i32<1>
t11: i32 = and t9, Constant:i32<255>
t12: i64 = zero_extend t11
t14: i64 = shl t12, Constant:i64<2>
to be folded into a rotate-and-mask instruction.
Such case often happens in array accesses with logical AND operation in the index, e.g. array[i & 0xFF];
Differential Revision: https://reviews.llvm.org/D37514
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314655
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Simon Pilgrim [Mon, 2 Oct 2017 09:10:50 +0000 (09:10 +0000)]
Fix typo in comment. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314653
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Simon Pilgrim [Mon, 2 Oct 2017 09:08:45 +0000 (09:08 +0000)]
[X86] Cleanup uses of computeKnownBits by using MaskedValueIsZero helper instead. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314652
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Michael Zuckerman [Mon, 2 Oct 2017 07:35:25 +0000 (07:35 +0000)]
[X86][LLVM]Expanding Supports lowerInterleaved{store|load}() in X86InterleavedAccess (VF64 stride 3-4)
I continue to support different VF interleaved and in this pass for this patch,
I added the vf64 stride3 support for both load and store.
I also added support fot the stride4 store.
Reviewers:
1. zvi
2. dorit
3. igorb
4. guyblank
Differential Revision: https://reviews.llvm.org/D37687
Change-Id: I3d238efedf217d1768b348d710de1efa2f19d27b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314651
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Craig Topper [Mon, 2 Oct 2017 05:46:53 +0000 (05:46 +0000)]
[X86] Fix copy pasto in X86FastISel::fastEmitInst_rrrr.
The 4th operand was not being constrained and the third operand was being constrained twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314648
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Craig Topper [Mon, 2 Oct 2017 05:46:52 +0000 (05:46 +0000)]
[X86] Use a bool flag instead of assigning an unsigned to two different values that we only use in an equality comparison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314647
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Craig Topper [Mon, 2 Oct 2017 00:44:50 +0000 (00:44 +0000)]
[X86] Use _NOREX MOVZX instructions for some patterns even in 32-bit mode.
This unifies the patterns between both modes. This should be effectively NFC since all the available registers in 32-bit mode statisfy this constraint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314643
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Ron Lieberman [Mon, 2 Oct 2017 00:34:07 +0000 (00:34 +0000)]
[Hexagon] Check vector elements for equivalence in the HexagonVectorLoopCarriedReuse pass
If the two instructions being compared for equivalence have corresponding operands
that are integer constants, then check their values to determine equivalence.
Patch by Suyog Sarda!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314642
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Ron Lieberman [Mon, 2 Oct 2017 00:16:15 +0000 (00:16 +0000)]
[Hexagon] Patch to Extract i1 element from vector of i1
This patch extracts 1 element from vector consisting
of elements of size 1 bit at given index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314641
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Craig Topper [Sun, 1 Oct 2017 23:53:54 +0000 (23:53 +0000)]
[InstCombine] Use APInt for all the math in foldICmpDivConstant
Summary: This currently uses ConstantExpr to do its math, but as noted in a TODO it can all be done directly on APInt.
Reviewers: spatel, majnemer
Reviewed By: majnemer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38440
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314640
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Craig Topper [Sun, 1 Oct 2017 23:53:53 +0000 (23:53 +0000)]
[X86] Change register&memory TEST instructions from MRMSrcMem to MRMDstMem
Summary:
Intel documentation shows the memory operand as the first operand. But we currently treat it as the second operand. Conceptually the order doesn't matter since it doesn't write memory. We have aliases to parse with the operands in either order and the isel matching is commutable.
For the register®ister form order does matter for the assembly parser. PR22995 was previously filed and fixed by changing the register®ister form from MRMSrcReg to MRMDestReg to match gas. Ideally the memory form should match by using MRMDestMem.
I believe this supercedes D38025 which was trying to switch the register®ister form back to pre-PR22995.
Reviewers: aymanmus, RKSimon, zvi
Reviewed By: aymanmus
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38120
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314639
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Craig Topper [Sun, 1 Oct 2017 23:53:50 +0000 (23:53 +0000)]
[X86] Remove a couple unnecessary COPY_TO_REGCLASS from some output patterns where the instruction already produces the correct register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314638
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Simon Pilgrim [Sun, 1 Oct 2017 18:43:48 +0000 (18:43 +0000)]
[X86][SSE] Add faux shuffle combining support for PACKUS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314631
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Simon Pilgrim [Sun, 1 Oct 2017 18:17:39 +0000 (18:17 +0000)]
[X86][AVX2] Simplify PACKUS combine test
Trying to use a AND mask is tricky as after legalization its nigh impossible for computeKnownBits to do anything with it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314630
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Simon Pilgrim [Sun, 1 Oct 2017 17:54:55 +0000 (17:54 +0000)]
[X86][SSE] Improve shuffle combining of PACKSS instructions.
Support unary packing and fix the faux shuffle mask for vectors larger than 128 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314629
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Simon Pilgrim [Sun, 1 Oct 2017 17:30:44 +0000 (17:30 +0000)]
[X86][SSE] Add shuffle combining tests with PACKSS/PACKUS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314628
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Sanjay Patel [Sun, 1 Oct 2017 14:39:10 +0000 (14:39 +0000)]
[x86] formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314627
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Jina Nahias [Sun, 1 Oct 2017 14:25:21 +0000 (14:25 +0000)]
pre-commit adding test for broadcastm pattern
Differential Revision: https://reviews.llvm.org/D38312
Change-Id: Ifbc4189549f2f59995019a86f85f989c04e4d37d
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314626
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Daniel Jasper [Sun, 1 Oct 2017 09:53:53 +0000 (09:53 +0000)]
Revert r314579: "Recommi r314561 after fixing over-debug assertion".
And follow-up r314585.
Leads to segfaults. I'll forward reproduction instructions to the patch
author.
Also, for a recommit, still add the original patch description.
Otherwise, it becomes really tedious to find out what a patch actually
does. The fact that it is a recommit with a fix is somewhat secondary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314622
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Michael Zuckerman [Sun, 1 Oct 2017 09:37:38 +0000 (09:37 +0000)]
Adding test for interleved, case stride 4 vf64 store<NFC>.
Change-Id: I9ea62aac81b763c83d26613dca6fcd846997a017
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314621
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Michal Gorny [Sun, 1 Oct 2017 07:13:25 +0000 (07:13 +0000)]
[lit] Fix running lit tests in unconfigured source dir
Fix llvm_tools_dir attribute access not to fail when the variable is not
present. This directory is not really necessary to run lit tests,
and the code already accounts for it being None.
The reference was added in r313407, and it breaks the stand-alone lit
package in Gentoo.
Differential Revision: https://reviews.llvm.org/D38442
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314620
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Dehao Chen [Sun, 1 Oct 2017 05:24:51 +0000 (05:24 +0000)]
Separate the logic when handling indirect calls in SamplePGO ThinLTO compile phase and other phases.
Summary: In SamplePGO ThinLTO compile phase, we will not invoke ICP as it may introduce confusion to the 2nd annotation. This patch extracted that logic and makes it clearer before profile annotation. In the mean time, we need to make function importing process both inlined callsites as well as not promoted indirect callsites.
Reviewers: tejohnson
Reviewed By: tejohnson
Subscribers: sanjoy, mehdi_amini, llvm-commits, inglorion
Differential Revision: https://reviews.llvm.org/D38094
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314619
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Xin Tong [Sun, 1 Oct 2017 00:10:52 +0000 (00:10 +0000)]
Fix typo. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314615
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Xin Tong [Sun, 1 Oct 2017 00:09:53 +0000 (00:09 +0000)]
Revert "Fix typo [NFC]"
This reverts commit
e60b5028619be1c81bd039d63a0627dac32d38f9.
Incorrectly include changes that are not typo fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314614
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Xin Tong [Sun, 1 Oct 2017 00:07:24 +0000 (00:07 +0000)]
Fix typo [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314613
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Daniel Berlin [Sat, 30 Sep 2017 23:51:55 +0000 (23:51 +0000)]
NewGVN: Fix PR 34473, by not using ExactlyEqualsExpression for finding
phi of ops users.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314612
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Daniel Berlin [Sat, 30 Sep 2017 23:51:54 +0000 (23:51 +0000)]
NewGVN: Evaluate phi of ops expressions before creating phi node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314611
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Daniel Berlin [Sat, 30 Sep 2017 23:51:53 +0000 (23:51 +0000)]
NewGVN: Allow dependent PHI of ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314610
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Daniel Berlin [Sat, 30 Sep 2017 23:51:04 +0000 (23:51 +0000)]
NewGVN: Make OpIsSafeForPhiOfOps non-recursive
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314609
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Simon Pilgrim [Sat, 30 Sep 2017 22:27:46 +0000 (22:27 +0000)]
Regenerate mul combine tests to update broadcast comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314607
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Dehao Chen [Sat, 30 Sep 2017 20:46:15 +0000 (20:46 +0000)]
Refactor the SamplePGO profile annotation logic to extract inlineCallInstruction. (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314601
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Simon Pilgrim [Sat, 30 Sep 2017 17:57:34 +0000 (17:57 +0000)]
[X86][SSE] Fold (VSRAI (VSHLI X, C1), C1) --> X iff NumSignBits(X) > C1
Remove sign extend in register style pattern if the sign is already extended enough
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314599
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Craig Topper [Sat, 30 Sep 2017 17:02:39 +0000 (17:02 +0000)]
[AVX-512] Add patterns to make fp compare instructions commutable during isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314598
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Simon Pilgrim [Sat, 30 Sep 2017 16:14:59 +0000 (16:14 +0000)]
[X86][SSE] Add vector truncation cases inspired by PR34773
We should be using PACKSS/PACKUS more aggressively when we know the state of the upper bits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314597
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Michael Zuckerman [Sat, 30 Sep 2017 14:55:03 +0000 (14:55 +0000)]
Code refactoring for the interleaved code <NFC>
Change-Id: I7831c9febad8e14278a5bc87584a0053dc837be1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314596
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Gadi Haber [Sat, 30 Sep 2017 14:30:23 +0000 (14:30 +0000)]
[X86][SKX] Added codegen regression test for avx512 instructions scheduling.NFC.
NFC.
Added code gen regression tests for avx512 instructions scheduling called avx512-schedule.ll and
avx512-shuffle-schedule.ll.
This patch is in preparation of a larger patch of adding all SKX instruction scheduling and therefore
the scheduling for the avx512 instructions are still missing.
Reviewers: zvi, delena, RKSimon, igorb
Differential Revision: https://reviews.llvm.org/D38035
Change-Id: I792762763127a921b9e13684b58af03646536533
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314594
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Daniel Jasper [Sat, 30 Sep 2017 11:57:19 +0000 (11:57 +0000)]
Revert r314435: "[JumpThreading] Preserve DT and LVI across the pass"
Causes a segfault on a builtbot (and in our internal bootstrapping of
Clang). See Eli's response on the commit thread.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314589
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Xinliang David Li [Sat, 30 Sep 2017 05:27:46 +0000 (05:27 +0000)]
Fix buildbot failure -- tighten type check for matching phi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314585
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Craig Topper [Sat, 30 Sep 2017 04:21:46 +0000 (04:21 +0000)]
[X86] Support v64i8 mulhu/mulhs
Implemented by splitting into two v32i8 mulhu/mulhs and concatenating the results.
Differential Revision: https://reviews.llvm.org/D38307
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314584
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Xinliang David Li [Sat, 30 Sep 2017 00:46:32 +0000 (00:46 +0000)]
Recommi r314561 after fixing over-debug assertion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314579
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Marek Sokolowski [Sat, 30 Sep 2017 00:38:52 +0000 (00:38 +0000)]
[llvm-rc] Serialize DIALOG(EX) to .res files (serialization, pt 4).
This is now able to serialize DIALOG and DIALOGEX resources to .res
files. It still can't parse dialog-specific CAPTION, FONT, and STYLE
optional statement - these will be added in the following patch.
A limited set of controls is included. However, more can be easily added
by extending SupportedCtls map defined in ResourceScriptStmt.cpp.
Differential Revision: https://reviews.llvm.org/D37862
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314578
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Adrian Prantl [Sat, 30 Sep 2017 00:31:15 +0000 (00:31 +0000)]
typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314577
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Adrian Prantl [Sat, 30 Sep 2017 00:22:25 +0000 (00:22 +0000)]
llvm-dwarfdump: implement the --name lookup option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314576
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Adrian Prantl [Sat, 30 Sep 2017 00:22:24 +0000 (00:22 +0000)]
Fix 80 column violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314575
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Adrian Prantl [Sat, 30 Sep 2017 00:22:21 +0000 (00:22 +0000)]
Add comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314574
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Stanislav Mekhanoshin [Fri, 29 Sep 2017 23:40:19 +0000 (23:40 +0000)]
[AMDGPU] Set fast-math flags on functions given the options
We have a single library build without relaxation options.
When inlined library functions remove fast math attributes
from the functions they are integrated into.
This patch sets relaxation attributes on the functions after
linking provided corresponding relaxation options are given.
Math instructions inside the inlined functions remain to have
no fast flags, but inlining does not prevent fast math
transformations of a surrounding caller code anymore.
Differential Revision: https://reviews.llvm.org/D38325
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314568
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Yaxun Liu [Fri, 29 Sep 2017 23:31:14 +0000 (23:31 +0000)]
CodeGen: Fix pointer info in expandUnalignedLoad/Store
Currently expandUnalignedLoad/Store uses place holder pointer info for temporary memory operand
in stack, which does not have correct address space. This causes unaligned private double16 load/store to be
lowered to flat_load instead of buffer_load for amdgcn target.
This fixes failures of OpenCL conformance test basic/vload_private/vstore_private on target amdgcn---amdgizcl.
Differential Revision: https://reviews.llvm.org/D35361
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314566
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Adrian Prantl [Fri, 29 Sep 2017 22:46:22 +0000 (22:46 +0000)]
fix 80 column violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314564
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Xinliang David Li [Fri, 29 Sep 2017 22:30:34 +0000 (22:30 +0000)]
Revert 314561 due to debug build assertion failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314563
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Marek Sokolowski [Fri, 29 Sep 2017 22:25:05 +0000 (22:25 +0000)]
[llvm-rc] Serialize MENU resources to .res files (serialization, pt 3).
This allows MENU resources to be serialized.
MENU resource statement doc:
msdn.microsoft.com/en-us/library/windows/desktop/
aa381025.aspx
POPUP sub-statement doc:
msdn.microsoft.com/en-us/library/windows/desktop/
aa381030.aspx
MENUITEM sub-statement doc:
msdn.microsoft.com/en-us/library/windows/desktop/
aa381024.aspx
MENUHEADER structure:
msdn.microsoft.com/en-us/library/windows/desktop/ms648018.aspx (and
NORMALMENUITEM, POPUPMENUITEM structs).
Thanks for Nico Weber for his original work in this area.
Differential Revision: https://reviews.llvm.org/D37828
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314562
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Xinliang David Li [Fri, 29 Sep 2017 22:10:15 +0000 (22:10 +0000)]
Eliminate PHI (int typed) which has only one use by intptr
This patch will eliminate redundant intptr/ptrtoint that pessimizes
analyses such as SCEV, AA and will make optimization passes such
as auto-vectorization more powerful.
Differential revision: http://reviews.llvm.org/D37832
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314561
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Alex Shlyapnikov [Fri, 29 Sep 2017 22:04:45 +0000 (22:04 +0000)]
Revert "Use the basic cost if a GEP is not used as addressing mode"
This reverts commit r314517.
This commit crashes sanitizer bots, for example:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/4167
Stack snippet:
...
/mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/Support/Casting.h:255:0
llvm::TargetTransformInfoImplCRTPBase<llvm::X86TTIImpl>::getGEPCost(llvm::GEPOperator const*, llvm::ArrayRef<llvm::Value const*>)
/mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h:742:0
llvm::TargetTransformInfoImplCRTPBase<llvm::X86TTIImpl>::getUserCost(llvm::User const*, llvm::ArrayRef<llvm::Value const*>)
/mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h:782:0
/mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/lib/Analysis/TargetTransformInfo.cpp:116:0
/mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/ADT/SmallVector.h:116:0
/mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/ADT/SmallVector.h:343:0
/mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/ADT/SmallVector.h:864:0
/mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/Analysis/TargetTransformInfo.h:285:0
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314560
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Eugene Zelenko [Fri, 29 Sep 2017 21:55:49 +0000 (21:55 +0000)]
[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314559
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Brian Gesiak [Fri, 29 Sep 2017 19:50:41 +0000 (19:50 +0000)]
Revert "[CMake] Remove `CMAKE_.*_OUTPUT_DIRECTORY` (NFCI)"
Summary:
It appears polly makes use of the `CMAKE_RUNTIME_OUTPUT_DIRECTORY` variable
when configuring its lit test suite. Reverting this for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314551
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Brian Gesiak [Fri, 29 Sep 2017 19:34:57 +0000 (19:34 +0000)]
[CMake] Remove `CMAKE_.*_OUTPUT_DIRECTORY` (NFCI)
Summary:
Three `CMAKE_.*_OUTPUT_DIRECTORY` variables used to be set in CMake and
referenced in various other parts of the project. However, in r198205
chapuni added a note to "don't set them anymore", and any remaining
references to them were subsequently removed in r198316 and r199592.
Now that the variables are no longer used anywhere, remove them, along
with the comments advising against using them any longer.
Test Plan:
I ran `check-all` and confirmed the tests built and passed.
Reviewers: beanz, chapuni
Reviewed By: beanz
Subscribers: mgorny
Differential Revision: https://reviews.llvm.org/D38389
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314550
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Marek Sokolowski [Fri, 29 Sep 2017 19:07:44 +0000 (19:07 +0000)]
[llvm-rc] Serialize ACCELERATORS to .res files (serialization, pt 2).
This allows llvm-rc to serialize ACCELERATORS resources.
Additionally, as this is the first type of resource to support basic
optional resource statements (LANGUAGE, CHARACTERISTICS, VERSION),
ACCELERATORS statement documentation:
msdn.microsoft.com/en-us/library/windows/desktop/
aa380610.aspx
Accelerator table structure documentation:
msdn.microsoft.com/en-us/library/windows/desktop/ms648010.aspx
Optional resource statement fields are described in:
msdn.microsoft.com/en-us/library/windows/desktop/ms648027.aspx
Thanks for Nico Weber for his original work in this area.
Differential Revision: https://reviews.llvm.org/D37824
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314549
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Matthew Simpson [Fri, 29 Sep 2017 18:07:39 +0000 (18:07 +0000)]
[LV] Use correct insertion point when type shrinking reductions
When type shrinking reductions, we should insert the truncations and extends at
the end of the loop latch block. Previously, these instructions were inserted
at the end of the loop header block. The difference is only a problem for loops
with predicated instructions (e.g., conditional stores and instructions that
may divide by zero). For these instructions, we create new basic blocks inside
the vectorized loop, which cause the loop header and latch to no longer be the
same block. This should fix PR34687.
Reference: https://bugs.llvm.org/show_bug.cgi?id=34687
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314542
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Marek Sokolowski [Fri, 29 Sep 2017 17:46:32 +0000 (17:46 +0000)]
[llvm-rc] Refactoring needed for ACCELERATORS and MENU resources.
This is a part of llvm-rc serialization patch set (serialization, pt 1.5).
This:
* Unifies the internal representation of flags in ACCELERATORS and MENU
with the corresponding representation in .res files (noticed in
https://reviews.llvm.org/D37828#inline-329828).
* Creates an RCResource subclass, OptStatementsRCResource, describing
resource statements that can declare resource-local optional statements
(proposed in https://reviews.llvm.org/D37824#inline-329775).
These modifications don't fit to any of the current patches, so I'm
submitting them as a separate patch.
Differential Revision: https://reviews.llvm.org/D37841
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314541
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Sanjoy Das [Fri, 29 Sep 2017 17:17:54 +0000 (17:17 +0000)]
Use LLVM_ENABLE_ABI_BREAKING_CHECKS correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314539
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Marek Sokolowski [Fri, 29 Sep 2017 17:14:09 +0000 (17:14 +0000)]
[llvm-rc] Serialize HTML resources to .res files (serialization, pt 1).
This allows to process HTML resources defined in .rc scripts and output
them to resulting .res files. Additionally, some infrastructure allowing
to output these files is created.
This is the first resource type we can operate on.
Thanks to Nico Weber for his original work in this area.
Differential Revision: reviews.llvm.org/D37283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314538
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Adam Nemet [Fri, 29 Sep 2017 16:56:54 +0000 (16:56 +0000)]
Display relative hotness with two decimal digits after the decimal point
I've seen cases where tiny inlined functions have such a high execution count
that most everything would show up with a relative of hotness of 0%. Since
the inlined functions effectively disappear you need to tune in the lower
range, thus we need more precision.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314537
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Simon Pilgrim [Fri, 29 Sep 2017 16:52:27 +0000 (16:52 +0000)]
Fix Wmismatched-tags warning.
InlineAsmIdentifierInfo was declared a class in some places and a struct in others.
Partial reversion of rL314508
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314536
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Francis Ricci [Fri, 29 Sep 2017 16:51:50 +0000 (16:51 +0000)]
[test] Enable LeakSanitizer on 64-bit Darwin ASan llvm builds
Summary:
Also disables leak checking on lto tests, due to many leaks reported
in the system's ld64.
Reviewers: kcc, pcc, bogner, kubamracek
Subscribers: mehdi_amini, llvm-commits
Differential Revision: https://reviews.llvm.org/D37781
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314535
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Sam Clegg [Fri, 29 Sep 2017 16:50:08 +0000 (16:50 +0000)]
[WebAssembly] Allow each data segment to specify its own alignment
Also, add a flags field as we will almost certainly
be needing that soon too.
Differential Revision: https://reviews.llvm.org/D38296
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314534
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Hongbin Zheng [Fri, 29 Sep 2017 16:32:12 +0000 (16:32 +0000)]
[SimplifyIndVar] Do not fail when we constant fold an IV user to ConstantPointerNull
The type of a SCEVConstant may not match the corresponding LLVM Value.
In this case, we skip the constant folding for now.
TODO: Replace ConstantInt Zero by ConstantPointerNull
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314531
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Nicolai Haehnle [Fri, 29 Sep 2017 16:07:05 +0000 (16:07 +0000)]
AMDGPU: fix bad test exposed by r314522
The test attempts to use -1 as carry-in for v_addc_*.
Before writing r314522, I did actually test this on real hardware,
and found that it doesn't work. So r314522 is correct in restricting
the carry-in operand: just remove those tests to make things pass
again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314530
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Teresa Johnson [Fri, 29 Sep 2017 15:55:42 +0000 (15:55 +0000)]
[ThinLTO] Use decimal suffix for promoted values to match demanglers
Summary:
Demanglers such as libiberty know how to strip suffixes of the form
\.[a-zA-Z]+\.\d+, but our current promoted value suffixes are
.llvm.${modulehash}, where the module hash is in hex. Change the
module hash to decimal to allow demanglers to handle this.
Reviewers: danielcdh
Subscribers: llvm-commits, inglorion
Differential Revision: https://reviews.llvm.org/D38405
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314527
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Jonas Devlieghere [Fri, 29 Sep 2017 15:41:22 +0000 (15:41 +0000)]
[dwarfdump][NFC] Consistent printing of address ranges
This implement the insertion operator for DWARF address ranges so they
are consistently printed as [LowPC, HighPC).
While a dump method might have felt more consistent, it is used
exclusively for printing error messages in the verifier and never used
for actual dumping. Hence this approach is more intuitive and creates
less clutter at the call sites.
Differential revision: https://reviews.llvm.org/D38395
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314523
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Nicolai Haehnle [Fri, 29 Sep 2017 15:37:31 +0000 (15:37 +0000)]
AMDGPU: VALU carry-in and v_cndmask condition cannot be EXEC
The hardware will only forward EXEC_LO; the high 32 bits will be zero.
Additionally, inline constants do not work. At least,
v_addc_u32_e64 v0, vcc, v0, v1, -1
which could conceivably be used to combine (v0 + v1 + 1) into a single
instruction, acts as if all carry-in bits are zero.
The llvm.amdgcn.ps.live test is adjusted; it would be nice to combine
s_mov_b64 s[0:1], exec
v_cndmask_b32_e64 v0, v1, v2, s[0:1]
into
v_mov_b32 v0, v3
but it's not particularly high priority.
Fixes dEQP-GLES31.functional.shaders.helper_invocation.value.*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314522
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Jun Bum Lim [Fri, 29 Sep 2017 14:50:16 +0000 (14:50 +0000)]
Use the basic cost if a GEP is not used as addressing mode
Summary:
Currently, getGEPCost() returns TCC_FREE whenever a GEP is a legal addressing mode in the target.
However, since it doesn't check its actual users, it will return FREE even in cases
where the GEP cannot be folded away as a part of actual addressing mode.
For example, if an user of the GEP is a call instruction taking the GEP as a parameter,
then the GEP may not be folded in isel.
Reviewers: hfinkel, efriedma, mcrosier, jingyue, haicheng
Reviewed By: hfinkel
Subscribers: javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D38085
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314517
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Jonas Paulsson [Fri, 29 Sep 2017 14:31:39 +0000 (14:31 +0000)]
[SystemZ] implement shouldCoalesce()
Implement shouldCoalesce() to help regalloc avoid running out of GR128
registers.
If a COPY involving a subreg of a GR128 is coalesced, the live range of the
GR128 virtual register will be extended. If this happens where there are
enough phys-reg clobbers present, regalloc will run out of registers (if
there is not a single GR128 allocatable register available).
This patch tries to allow coalescing only when it can prove that this will be
safe by checking the (local) interval in question.
Review: Ulrich Weigand, Quentin Colombet
https://reviews.llvm.org/D37899
https://bugs.llvm.org/show_bug.cgi?id=34610
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314516
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Simon Pilgrim [Fri, 29 Sep 2017 14:13:47 +0000 (14:13 +0000)]
Fix spelling in comments. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314515
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Amara Emerson [Fri, 29 Sep 2017 13:53:44 +0000 (13:53 +0000)]
[X86] Improve codegen for inverted overflow checking intrinsics.
Adds a new combine for: xor(setcc cc, val), 1 --> setcc (invert(cc), val)
Differential Revision: https://reviews.llvm.org/D38161
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314514
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Sam Parker [Fri, 29 Sep 2017 13:11:33 +0000 (13:11 +0000)]
[ARM] v8.3-a complex number support
New instructions are added to AArch32 and AArch64 to aid
floating-point multiplication and addition of complex numbers, where
the complex numbers are packed in a vector register as a pair of
elements. The Imaginary part of the number is placed in the more
significant element, and the Real part of the number is placed in the
less significant element.
This patch adds assembler for the ARM target.
Differential Revision: https://reviews.llvm.org/D36789
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314511
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