OSDN Git Service
Jonas Devlieghere [Fri, 29 Jun 2018 16:50:41 +0000 (16:50 +0000)]
[dsymutil] Introduce a new CachedBinaryHolder
The original binary holder has an optimization where it caches a static
library (archive) between consecutive calls to GetObjects. However, the
actual memory buffer wasn't cached between calls.
This made sense when dsymutil was processing objects one after each
other, but when processing them in parallel, several binaries have to be
in memory at the same time. For this reason, every link context
contained a binary holder.
Having one binary holder per context is problematic, because the same
static archive was cached for every object file. Luckily, when the file
is mmap'ed, this was only costing us virtual memory.
This patch introduces a new BinaryHolder variant that is fully cached,
for all the object files it load, as well as the static archives. This
way, we don't have to give up on this optimization of bypassing the
file system.
Differential revision: https://reviews.llvm.org/D48501
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335990
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Petar Jovanovic [Fri, 29 Jun 2018 16:37:16 +0000 (16:37 +0000)]
[mips] Support shrink-wrapping
Except for -O0, it's enabled by default.
Patch by Vladimir Stefanovic.
Differential Revision: https://reviews.llvm.org/D47947
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335989
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Stanislav Mekhanoshin [Fri, 29 Jun 2018 16:26:53 +0000 (16:26 +0000)]
[AMDGPU] Enable LICM in the BE pipeline
This allows to hoist code portion to compute reciprocal of loop
invariant denominator in integer division after codegen prepare
expansion.
Differential Revision: https://reviews.llvm.org/D48604
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335988
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Jessica Paquette [Fri, 29 Jun 2018 16:12:45 +0000 (16:12 +0000)]
[MachineOutliner] Add always and never options to -enable-machine-outliner
This is a recommit of r335887, which was erroneously committed earlier.
To enable the MachineOutliner by default on AArch64, we need to be able to
disable the MachineOutliner and also provide an option to "always" enable the
outliner.
This adds that capability. It allows the user to still use the old
-enable-machine-outliner option, which defaults to "always". This is building
up to allowing the user to specify "always" versus the target default
outlining behaviour.
https://reviews.llvm.org/D48682
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335986
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Sanjay Patel [Fri, 29 Jun 2018 15:28:11 +0000 (15:28 +0000)]
[InstCombine] add more tests for shuffle-binop folds; NFC
The mul+shl tests add coverage for the fold enabled with D48678.
The and+or tests are not handled yet; that's D48662.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335984
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Andrea Di Biagio [Fri, 29 Jun 2018 14:24:46 +0000 (14:24 +0000)]
[llvm-mca] Remove field HasReadAdvanceEntries from class ReadDescriptor.
This simplifies the logic that updates RAW dependencies in the DispatchStage.
There is no advantage in storing that flag in the ReadDescriptor; we should
simply rely on the call to `STI.getReadAdvanceCycles()` to obtain the
ReadAdvance cycles. If there are no read-advance entries, then method
`getReadAdvanceCycles()` quickly returns 0.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335977
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Alexey Bataev [Fri, 29 Jun 2018 14:23:28 +0000 (14:23 +0000)]
[DEBUG_INFO, NVPTX] Do not emit .debug_loc section.
Summary:
.debug_loc section is not supported for NVPTX target. If there is an
object whose location can change during its lifetime, we do not generate
debug location info for this variable.
Reviewers: echristo
Subscribers: jholewinski, JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D48730
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335976
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Krzysztof Parzyszek [Fri, 29 Jun 2018 13:55:28 +0000 (13:55 +0000)]
[Hexagon] Remove unused instruction itineraties, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335975
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Sanjay Patel [Fri, 29 Jun 2018 13:44:06 +0000 (13:44 +0000)]
[InstCombine] enhance shuffle-of-binops to allow different variable ops (PR37806)
This was discussed in D48401 as another improvement for:
https://bugs.llvm.org/show_bug.cgi?id=37806
If we have 2 different variable values, then we shuffle (select) those lanes,
shuffle (select) the constants, and then perform the binop. This eliminates a binop.
The new shuffle uses the same shuffle mask as the existing shuffle, so there's no
danger of creating a difficult shuffle.
All of the earlier constraints still apply, but we also check for extra uses to
avoid creating more instructions than we'll remove.
Additionally, we're disallowing the fold for div/rem because that could expose a
UB hole.
Differential Revision: https://reviews.llvm.org/D48678
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335974
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Roman Shirokiy [Fri, 29 Jun 2018 11:46:30 +0000 (11:46 +0000)]
Fix overconfident assert in ScalarEvolution::isImpliedViaMerge
We can have AddRec with loops having many predecessors.
This changes an assert to an early return.
Differential Revision: https://reviews.llvm.org/D48766
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335965
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Sjoerd Meijer [Fri, 29 Jun 2018 11:03:15 +0000 (11:03 +0000)]
[AArch64] Armv8.4-A: Virtualization system registers
This adds the Secure EL2 extension.
Differential Revision: https://reviews.llvm.org/D48711
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335962
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Filipe Cabecinhas [Fri, 29 Jun 2018 10:34:37 +0000 (10:34 +0000)]
[cmake] Change WIN32 test to CMAKE_HOST_WIN32
The test is about what can be run on the host, not the cmake target.
When cross-compiling (compiler-rt at least) on Windows, we end up with
lit being unable to run llvm-lit because it can't find the llvm-lit
module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335961
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Simon Pilgrim [Fri, 29 Jun 2018 09:36:39 +0000 (09:36 +0000)]
[X86][SSE] Support v16i8/v32i8 vector rotations
This uses the same technique as for shifts - split the rotation into 4/2/1-bit partial rotations and select those partials based on the amount bit, making use of PBLENDVB if available. This halves the use of PBLENDVB compared to expanding to shifts, which can be a slow op.
Unfortunately I haven't found a decent way to share much of this code with the shift equivalent.
Differential Revision: https://reviews.llvm.org/D48655
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335957
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Sjoerd Meijer [Fri, 29 Jun 2018 08:43:19 +0000 (08:43 +0000)]
[ARM][AArch64] Armv8.4-A Enablement
Initial patch adding assembly support for Armv8.4-A.
Besides adding v8.4 as a supported architecture to the usual places, this also
adds target features for the different crypto algorithms. Armv8.4-A introduced
new crypto algorithms, made them optional, and allows different combinations:
- none of the v8.4 crypto functions are supported, which is independent of the
implementation of the Armv8.0 SHA1 and SHA2 instructions.
- the v8.4 SHA512 and SHA3 support is implemented, in this case the Armv8.0
SHA1 and SHA2 instructions must also be implemented.
- the v8.4 SM3 and SM4 support is implemented, which is independent of the
implementation of the Armv8.0 SHA1 and SHA2 instructions.
- all of the v8.4 crypto functions are supported, in this case the Armv8.0 SHA1
and SHA2 instructions must also be implemented.
The v8.4 crypto instructions are added to AArch64 only, and not AArch32,
and are made optional extensions to Armv8.2-A.
The user-facing Clang options will map on these new target features, their
naming will be compatible with GCC and added in follow-up patches.
The Armv8.4-A instruction sets can be downloaded here:
https://developer.arm.com/products/architecture/a-profile/exploration-tools
Differential Revision: https://reviews.llvm.org/D48625
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335953
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Roman Lebedev [Fri, 29 Jun 2018 07:44:20 +0000 (07:44 +0000)]
SCEVExpander::expandAddRecExprLiterally(): check before casting as Instruction
Summary:
An alternative to D48597.
Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=37936 | PR37936 ]].
The problem is as follows:
1. `indvars` marks `%dec` as `NUW`.
2. `loop-instsimplify` runs `instsimplify`, which constant-folds `%dec` to -1 (D47908)
3. `loop-reduce` tries to do some further modification, but crashes
with an type assertion in cast, because `%dec` is no longer an `Instruction`,
If the runline is split into two, i.e. you first run `-indvars -loop-instsimplify`,
store that into a file, and then run `-loop-reduce`, there is no crash.
So it looks like the problem is due to `-loop-instsimplify` not discarding SCEV.
But in this case we can just not crash if it's not an `Instruction`.
This is just a local fix, unlike D48597, so there may very well be other problems.
Reviewers: mkazantsev, uabelho, sanjoy, silviu.baranga, wmi
Reviewed By: mkazantsev
Subscribers: evstupac, javed.absar, spatel, llvm-commits
Differential Revision: https://reviews.llvm.org/D48599
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335950
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Kristof Beyls [Fri, 29 Jun 2018 07:16:27 +0000 (07:16 +0000)]
Make email options of find_interesting_reviews more flexible.
This enables a few requested improvements on the original review of this
script at https://reviews.llvm.org/D46192.
This introduces 2 new command line options:
* --email-report: This option enables specifying who to email the generated
report to. This also enables not sending any email and only printing out
the report on stdout by not specifying this option on the command line.
* --sender: this allows specifying the email address that will be used in
the "From" email header.
I believe that with these options the script starts having the basic
features needed to run it well on a regular basis for a group of
developers.
Differential Revision: https://reviews.llvm.org/D47930
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335948
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Craig Topper [Fri, 29 Jun 2018 05:43:26 +0000 (05:43 +0000)]
[X86] Remove masking from the avx512 packed sqrt intrinsics. Use select in IR instead.
While there improve the coverage of the intrinsic testing and add fast-isel tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335944
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Tom Stellard [Thu, 28 Jun 2018 23:47:12 +0000 (23:47 +0000)]
AMDGPU: Separate R600 and GCN TableGen files
Summary:
We now have two sets of generated TableGen files, one for R600 and one
for GCN, so each sub-target now has its own tables of instructions,
registers, ISel patterns, etc. This should help reduce compile time
since each sub-target now only has to consider information that
is specific to itself. This will also help prevent the R600
sub-target from slowing down new features for GCN, like disassembler
support, GlobalISel, etc.
Reviewers: arsenm, nhaehnle, jvesely
Reviewed By: arsenm
Subscribers: MatzeB, kzhuravl, wdng, mgorny, yaxunl, dstuttard, tpr, t-tye, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D46365
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335942
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Sterling Augustine [Thu, 28 Jun 2018 23:22:14 +0000 (23:22 +0000)]
Require x86 for this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335939
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Eli Friedman [Thu, 28 Jun 2018 21:49:41 +0000 (21:49 +0000)]
[ARM] Assert that ARMDAGToDAGISel creates valid UBFX/SBFX nodes.
We don't ever check these again (unless you're using
-fno-integrated-as), so make sure the extracted bits are well-defined.
I don't think it's possible to trigger any of the assertions on trunk,
but it's difficult to prove. (The first one depends on DAGCombine to
minimize the number of set bits in AND masks; I think the others are
mathematically impossible to hit.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335931
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Jessica Paquette [Thu, 28 Jun 2018 21:49:24 +0000 (21:49 +0000)]
[MachineOutliner] Never add the outliner in -O0
This is a recommit of r335879.
We shouldn't add the outliner when compiling at -O0 even if
-enable-machine-outliner is passed in. This makes sure that we
don't add it in this case.
This also removes -O0 from the outliner DWARF test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335930
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Sanjay Patel [Thu, 28 Jun 2018 21:14:02 +0000 (21:14 +0000)]
[InstCombine] adjust shuffle tests; NFC
Use xor for the extra uses test because div/rem have other problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335924
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Jake Ehrlich [Thu, 28 Jun 2018 21:07:34 +0000 (21:07 +0000)]
[llvm-readobj] Add experimental support for SHT_RELR sections
This change adds experimental support for SHT_RELR sections, proposed
here: https://groups.google.com/forum/#!topic/generic-abi/bX460iggiKg
Definitions for the new ELF section type and dynamic array tags, as well
as the encoding used in the new section are all under discussion and are
subject to change. Use with caution!
Author: rahulchaudhry
Differential Revision: https://reviews.llvm.org/D47919
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335922
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Benjamin Kramer [Thu, 28 Jun 2018 21:03:24 +0000 (21:03 +0000)]
[SupportTests] Silence -Wsign-compare warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335921
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Sanjay Patel [Thu, 28 Jun 2018 20:52:43 +0000 (20:52 +0000)]
[InstCombine] fix opcode check in shuffle fold
There's no way to expose this difference currently,
but we should use the updated variable because the
original opcodes can go stale if we transform into
something new.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335920
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Martin Storsjo [Thu, 28 Jun 2018 20:28:29 +0000 (20:28 +0000)]
[COFF] Fix constant sharing regression for MinGW
This fixes a regression since SVN r334523, where the object files
built targeting MinGW were rejected by GNU binutils tools. Prior to
that commit, we only put constants in comdat for MSVC configurations.
Differential Revision: https://reviews.llvm.org/D48567
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335918
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Zachary Turner [Thu, 28 Jun 2018 20:09:37 +0000 (20:09 +0000)]
Fix padding with custom character in formatv.
The format string for formatv allows to specify a custom padding
character instead of the default space. This custom character was
parsed correctly, but not passed on to the formatter.
Patch by Marcel Köppe
Differential Revision: https://reviews.llvm.org/D48140
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335915
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Teresa Johnson [Thu, 28 Jun 2018 20:07:47 +0000 (20:07 +0000)]
[ThinLTO] Port InlinerFunctionImportStats handling to new PM
Summary:
The InlinerFunctionImportStats will collect and dump stats regarding how
many function inlined into the module were imported by ThinLTO.
Reviewers: wmi, dexonsmith
Subscribers: mehdi_amini, inglorion, llvm-commits, eraman
Differential Revision: https://reviews.llvm.org/D48729
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335914
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Benjamin Kramer [Thu, 28 Jun 2018 20:05:35 +0000 (20:05 +0000)]
[NVPTX] Delete dead code
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335913
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Eli Friedman [Thu, 28 Jun 2018 19:53:12 +0000 (19:53 +0000)]
[ARM] Add missing Thumb2 assembler diagnostics.
Mostly just adding checks for Thumb2 instructions which correspond to
ARM instructions which already had diagnostics. While I'm here, also fix
ARM-mode strd to check the input registers correctly.
Differential Revision: https://reviews.llvm.org/D48610
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335909
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Sterling Augustine [Thu, 28 Jun 2018 19:47:23 +0000 (19:47 +0000)]
Some targets don't have lld built, so just use a binary copy
of the input file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335908
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Anastasis Grammenos [Thu, 28 Jun 2018 18:58:30 +0000 (18:58 +0000)]
[SROA] Preserve DebugLoc when rewriting alloca partitions
When rewriting an alloca partition copy the DL from the
old alloca over the the new one.
Differential Revision: https://reviews.llvm.org/D48640
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335904
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Sterling Augustine [Thu, 28 Jun 2018 18:57:13 +0000 (18:57 +0000)]
Handle absolute symbols as branch targets in disassembly.
https://reviews.llvm.org/D48554
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335903
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Zachary Turner [Thu, 28 Jun 2018 18:49:09 +0000 (18:49 +0000)]
Add a flag to FileOutputBuffer that allows modification.
FileOutputBuffer creates a temp file and on commit atomically
renames the temp file to the destination file. Sometimes we
want to modify an existing file in place, but still have the
atomicity guarantee. To do this we can initialize the contents
of the temp file from the destination file (if it exists), that
way the resulting FileOutputBuffer can have only selective
bytes modified. Committing will then atomically replace the
destination file as desired.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335902
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Simon Pilgrim [Thu, 28 Jun 2018 18:37:16 +0000 (18:37 +0000)]
Remove unnecessary semicolon. NFCI.
Fixes -Wpedantic warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335901
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Justin Bogner [Thu, 28 Jun 2018 18:36:52 +0000 (18:36 +0000)]
[CMake] Respect CMAKE_STRIP and CMAKE_DSYMUTIL on apple platforms
This allows overriding the strip and dsymutil tools, and updates
iOS.cmake to do so. I've also added libtool to iOS.cmake, but it was
already respecting CMAKE_LIBTOOL if set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335900
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Vedant Kumar [Thu, 28 Jun 2018 18:21:11 +0000 (18:21 +0000)]
[Debugify] Do not report line 0 locations as errors
The checking logic should not treat artificial locations as being
somehow problematic. Producing these locations can be the desired
behavior of some passes.
See llvm.org/PR37961.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335897
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Craig Topper [Thu, 28 Jun 2018 17:58:01 +0000 (17:58 +0000)]
[X86] Suppress load folding into and/or/xor if it will prevent matching btr/bts/btc.
This is a follow up to r335753. At the time I forgot about isProfitableToFold which makes this pretty easy.
Differential Revision: https://reviews.llvm.org/D48706
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335895
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Jonas Devlieghere [Thu, 28 Jun 2018 17:56:43 +0000 (17:56 +0000)]
Revert "Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models""
Reverting because this is causing failures in the LLDB test suite on
GreenDragon.
LLVM ERROR: unsupported relocation with subtraction expression, symbol
'__GLOBAL_OFFSET_TABLE_' can not be undefined in a subtraction
expression
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335894
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Jonas Devlieghere [Thu, 28 Jun 2018 17:56:27 +0000 (17:56 +0000)]
Revert "[OrcMCJIT] Fix test after r335508 causing it to fail on green dragon"
This reverts commit
a6b904daa1d55e31187c85e5b54ef2ddc37fa713.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335893
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Zachary Turner [Thu, 28 Jun 2018 17:55:54 +0000 (17:55 +0000)]
2 VS natvis improvements.
Optional<T> was broken due to a change in the class's internals.
That is fixed, and additionally a visualizer is added for
Expected<T>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335892
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Zachary Turner [Thu, 28 Jun 2018 17:52:06 +0000 (17:52 +0000)]
Set line ending style of llvm.natvis to CRLF.
This file is used by MSVC which is obviously a Windows-only tool and prefers windows line endings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335889
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Sanjay Patel [Thu, 28 Jun 2018 17:48:04 +0000 (17:48 +0000)]
[InstCombine] allow shl+mul combos with shuffle (select) fold (PR37806)
This is an enhancement to D48401 that was discussed in:
https://bugs.llvm.org/show_bug.cgi?id=37806
We can convert a shift-left-by-constant into a multiply (we canonicalize IR in the other
direction because that's generally better of course). This allows us to remove the shuffle
as we do in the regular opcodes-are-the-same cases.
This requires a small hack to make sure we don't introduce any extra poison:
https://rise4fun.com/Alive/ZGv
Other examples of opcodes where this would work are add+sub and fadd+fsub, but we already
canonicalize those subs into adds, so there's nothing to do for those cases AFAICT. There
are planned enhancements for opcode transforms such or -> add.
Note that there's a different fold needed if we've already managed to simplify away a binop
as seen in the test based on PR37806, but we manage to get that one case here because this
fold is positioned above the demanded elements fold currently.
Differential Revision: https://reviews.llvm.org/D48485
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335888
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Jessica Paquette [Thu, 28 Jun 2018 17:45:43 +0000 (17:45 +0000)]
[MachineOutliner] Define MachineOutliner support in TargetOptions
Targets should be able to define whether or not they support the outliner
without the outliner being added to the pass pipeline. Before this, the
outliner pass would be added, and ask the target whether or not it supports the
outliner.
After this, it's possible to query the target in TargetPassConfig, before the
outliner pass is created. This ensures that passing -enable-machine-outliner
will not modify the pass pipeline of any target that does not support it.
https://reviews.llvm.org/D48683
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335887
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Simon Pilgrim [Thu, 28 Jun 2018 17:33:41 +0000 (17:33 +0000)]
[DAGCombiner] Ensure we use the correct CC result type in visitSDIV (REAPPLIED)
We could get away with it for constant folded cases, but not for rL335719.
Thanks to Krzysztof Parzyszek for noticing.
Reapply original commit rL335821 which was reverted at rL335871 due to a WebAssembly bug that was fixed at rL335884.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335886
91177308-0d34-0410-b5e6-
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Matt Davis [Thu, 28 Jun 2018 17:33:24 +0000 (17:33 +0000)]
[llvm-mca] Delete Pipeline's copy ctor and assignement operator.
Prevent copying of the Pipeline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335885
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Thu, 28 Jun 2018 17:27:09 +0000 (17:27 +0000)]
[WebAssembly] Add getSetCCResultType placeholder override to handle vector compare results.
Necessary to get the rL335821 bugfix (which was reverted at rL335871) un-reverted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335884
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Jessica Paquette [Thu, 28 Jun 2018 17:26:19 +0000 (17:26 +0000)]
Revert "[MachineOutliner] Add always and never options to -enable-machine-outliner"
I accidentally committed this instead of D48683 because I haven't had coffee
yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335883
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Jessica Paquette [Thu, 28 Jun 2018 17:26:18 +0000 (17:26 +0000)]
Revert "[MachineOutliner] Never add the outliner in -O0"
This reverts commit
9c7c10e4073a0bc6a759ce5cd33afbac74930091.
It relies on r335872 since that introduces the machine outliner
flags test. I meant to commit D48683 in that commit, but got mixed
up and committed D48682 instead. So, I'm reverting this and
r335872, since D48682 hasn't made it through review yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335882
91177308-0d34-0410-b5e6-
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Jessica Paquette [Thu, 28 Jun 2018 17:05:57 +0000 (17:05 +0000)]
[MachineOutliner] Never add the outliner in -O0
We shouldn't add the outliner when compiling at -O0 even if
-enable-machine-outliner is passed in. This makes sure that we
don't add it in this case.
This also updates machine-outliner-flags to reflect the change
and improves the comment describing what that test does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335879
91177308-0d34-0410-b5e6-
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Matthias Braun [Thu, 28 Jun 2018 17:00:45 +0000 (17:00 +0000)]
SelectionDAGBuilder, mach-o: Skip trap after noreturn call (for Mach-O)
Add NoTrapAfterNoreturn target option which skips emission of traps
behind noreturn calls even if TrapUnreachable is enabled.
Enable the feature on Mach-O to save code size; Comments suggest it is
not possible to enable it for the other users of TrapUnreachable.
rdar://
41530228
DifferentialRevision: https://reviews.llvm.org/D48674
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335877
91177308-0d34-0410-b5e6-
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Jessica Paquette [Thu, 28 Jun 2018 16:39:42 +0000 (16:39 +0000)]
[MachineOutliner] Add always and never options to -enable-machine-outliner
To enable the MachineOutliner by default on AArch64, we need to be able to
disable the MachineOutliner and also provide an option to "always" enable the
outliner.
This adds that capability. It allows the user to still use the old
-enable-machine-outliner option, which defaults to "always". This is building
up to allowing the user to specify "always" versus the target-default
outlining behaviour.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335872
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Haojian Wu [Thu, 28 Jun 2018 16:25:57 +0000 (16:25 +0000)]
Revert "[DAGCombiner] Ensure we use the correct CC result type in visitSDIV"
This reverts commit r335821.
This crashes the webassembly test, run "ninja check-llvm-codegen-webassembly" to reproduce.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335871
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Thu, 28 Jun 2018 16:24:13 +0000 (16:24 +0000)]
[llvm-mca][x86] Add FMA4 resource tests
We should be ensuring we have (near) complete test coverage of instructions, at least for the generic model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335870
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Thu, 28 Jun 2018 16:21:22 +0000 (16:21 +0000)]
[llvm-mca][x86] Add 3dnow! resource tests
We should be ensuring we have (near) complete test coverage of instructions, at least for the generic model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335869
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Stanislav Mekhanoshin [Thu, 28 Jun 2018 15:59:18 +0000 (15:59 +0000)]
[AMDGPU] Early expansion of 32 bit udiv/urem
This allows hoisting of a common code, for instance if denominator
is loop invariant. Current change is expansion only, adding licm to
the target pass list going to be a separate patch. Given this patch
changes to codegen are minor as the expansion is similar to that on
DAG. DAG expansion still must remain for R600.
Differential Revision: https://reviews.llvm.org/D48586
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335868
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Andrea Di Biagio [Thu, 28 Jun 2018 15:50:26 +0000 (15:50 +0000)]
[llvm-mca] Use a WriteRef to describe register writes in class RegisterFile.
This patch introduces a new class named WriteRef. A WriteRef is used by the
RegisterFile to keep track of register definitions. Internally it wraps a
WriteState, as well as the source index of the defining instruction.
This patch allows the tool to propagate additional information to support future
analysis on data dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335867
91177308-0d34-0410-b5e6-
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Stanislav Mekhanoshin [Thu, 28 Jun 2018 15:24:46 +0000 (15:24 +0000)]
[AMDGPU] Overload llvm.amdgcn.fmad.ftz to support f16
Differential Revision: https://reviews.llvm.org/D48677
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335866
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John Brawn [Thu, 28 Jun 2018 15:17:07 +0000 (15:17 +0000)]
[PhiValues] Adjust unit test to invalidate instructions before deleting them
This should fix a sanitizer buildbot failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335862
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Alexey Bataev [Thu, 28 Jun 2018 15:14:58 +0000 (15:14 +0000)]
[DEBUG_INFO, NVPTX] Add test for .debug_loc section, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335861
91177308-0d34-0410-b5e6-
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Jonas Devlieghere [Thu, 28 Jun 2018 15:01:42 +0000 (15:01 +0000)]
[dsymutil] Use UnitListTy consistently (NFC)
Use the UnitListTy typedef consistently throughout the Dwarf linker and
pass it by const reference where possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335860
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John Brawn [Thu, 28 Jun 2018 14:13:06 +0000 (14:13 +0000)]
Add a PhiValuesAnalysis pass to calculate the underlying values of phis
This pass is being added in order to make the information available to BasicAA,
which can't do caching of this information itself, but possibly this information
may be useful for other passes.
Incorporates code based on Daniel Berlin's implementation of Tarjan's algorithm.
Differential Revision: https://reviews.llvm.org/D47893
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335857
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Benjamin Kramer [Thu, 28 Jun 2018 13:15:03 +0000 (13:15 +0000)]
Revert "Add support for generating a call graph profile from Branch Frequency Info."
This reverts commits r335794 and r335797. Breaks ThinLTO+FDO selfhost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335851
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Sjoerd Meijer [Thu, 28 Jun 2018 12:55:29 +0000 (12:55 +0000)]
[ARM] Parallel DSP Pass
Armv6 introduced instructions to perform 32-bit SIMD operations. The purpose of
this pass is to do some straightforward IR pattern matching to create ACLE DSP
intrinsics, which map on these 32-bit SIMD operations.
Currently, only the SMLAD instruction gets recognised. This instruction
performs two multiplications with 16-bit operands, and stores the result in an
accumulator. We will follow this up with patches to recognise SMLAD in more
cases, and also to generate other DSP instructions (like e.g. SADD16).
Patch by: Sam Parker and Sjoerd Meijer
Differential Revision: https://reviews.llvm.org/D48128
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335850
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Pavel Labath [Thu, 28 Jun 2018 12:10:21 +0000 (12:10 +0000)]
Revert "ADT: Move ArrayRef comparison operators into the class"
This reverts commit r335839, because it breaks the MSVC build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335844
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Pavel Labath [Thu, 28 Jun 2018 11:45:28 +0000 (11:45 +0000)]
ADT: Move ArrayRef comparison operators into the class
Summary:
This allows the implicit ArrayRef conversions to kick in when e.g.
comparing ArrayRef to a SmallVector.
Reviewers: zturner, dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48632
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335839
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Andrea Di Biagio [Thu, 28 Jun 2018 11:20:14 +0000 (11:20 +0000)]
[llvm-mca] Refactor method RegisterFile::collectWrites(). NFCI
Rather than calling std::find in a loop, just sort the vector and remove
duplicate entries at the end of the function.
Also, move the debug print at the end of the function, and query the
MCRegisterInfo to print register names rather than physreg IDs.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335837
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Jesper Antonsson [Thu, 28 Jun 2018 10:55:04 +0000 (10:55 +0000)]
Comment change to verify commit rights. NFC.
Summary: Just a silly one-character correction.
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48709
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335832
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Hans Wennborg [Thu, 28 Jun 2018 10:24:38 +0000 (10:24 +0000)]
s/TablesChecked/TableChecked/ after r335823
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335831
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Matt Arsenault [Thu, 28 Jun 2018 10:18:55 +0000 (10:18 +0000)]
AMDGPU: Remove MFI::ABIArgOffset
We have too many mechanisms for tracking the various offsets
used for kernel arguments, so remove one. There's still a lot of
confusion with these because there are two different "implicit"
argument areas located at the beginning and end of the kernarg
segment.
Additionally, the offset was determined based on the memory
size of the split element types. This would break in a future
commit where v3i32 is decomposed into separate i32 pieces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335830
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Matt Arsenault [Thu, 28 Jun 2018 10:18:36 +0000 (10:18 +0000)]
AMDGPU: Error on calls from graphics shaders
In principle nothing should stop these from working, but
work is necessary to create an ABI for dealing with the stack
related registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335829
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Matt Arsenault [Thu, 28 Jun 2018 10:18:23 +0000 (10:18 +0000)]
AMDGPU: Fix AMDGPUCodeGenPrepare using uninitialized AMDGPUAS struct
Not sure how this wasn't noticed before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335828
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Matt Arsenault [Thu, 28 Jun 2018 10:18:11 +0000 (10:18 +0000)]
AMDGPU: Fix assert on aggregate type kernel arguments
Just fix the crash for now by not doing the optimization since
figuring out how to properly convert the bits for an arbitrary
struct is a pain.
Also fix a crash when there is only an empty struct argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335827
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Benjamin Kramer [Thu, 28 Jun 2018 10:03:45 +0000 (10:03 +0000)]
Unify sorted asserts to use the existing atomic pattern
These are all benign races and only visible in !NDEBUG. tsan complains
about it, but a simple atomic bool is sufficient to make it happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335823
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Simon Pilgrim [Thu, 28 Jun 2018 09:54:28 +0000 (09:54 +0000)]
[DAGCombiner] Ensure we use the correct CC result type in visitSDIV
We could get away with it for constant folded cases, but not for rL335719.
Thanks to Krzysztof Parzyszek for noticing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335821
91177308-0d34-0410-b5e6-
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Florian Hahn [Thu, 28 Jun 2018 09:53:38 +0000 (09:53 +0000)]
[SCCP] Mark CFG as preserved.
SCCP does not change the CFG, so we can mark it as preserved.
Reviewers: dberlin, efriedma, davide
Reviewed By: davide
Differential Revision: https://reviews.llvm.org/D47149
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335820
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Simon Pilgrim [Thu, 28 Jun 2018 09:29:08 +0000 (09:29 +0000)]
[DAGCombiner] Remove unused variable. NFCI.
Noticed in D45806 review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335817
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Max Kazantsev [Thu, 28 Jun 2018 08:20:03 +0000 (08:20 +0000)]
[IndVarSimplify] Ignore unreachable users of truncs
If a trunc has a user in a block which is not reachable from entry,
we can safely perform trunc elimination as if this user didn't exist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335816
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Clement Courbet [Thu, 28 Jun 2018 07:41:16 +0000 (07:41 +0000)]
[llvm-exegesis] Add partial X87 support.
Summary:
This enables the X86-specific X86FloatingPointStackifierPass, and allow
llvm-exegesis to generate and measure X87 latency/uops for some FP ops.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335815
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Petar Jovanovic [Thu, 28 Jun 2018 04:50:40 +0000 (04:50 +0000)]
[DwarfDebug] Remove unused argument (NFC)
Remove unused ByteStreamer argument from function emitDebugLocValue.
Patch by Nikola Prica.
Differential Revision: https://reviews.llvm.org/D48590
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335811
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Petr Hosek [Thu, 28 Jun 2018 03:11:52 +0000 (03:11 +0000)]
Support for multiarch runtimes layout
This change adds a support for multiarch style runtimes layout, so in
addition to the existing layout where runtimes get installed to:
lib/clang/$version/lib/$os
Clang now allows runtimes to be installed to:
lib/clang/$version/$target/lib
This also includes libc++, libc++abi and libunwind; today those are
assumed to be in Clang library directory built for host, with the
new layout it is possible to install libc++, libc++abi and libunwind
into the runtime directory built for different targets.
The use of new layout is enabled by setting the
LLVM_ENABLE_RUNTIME_TARGET_DIR CMake variable and is supported by both
projects and runtimes layouts. The runtimes CMake build has been further
modified to use the new layout when building runtimes for multiple
targets.
Differential Revision: https://reviews.llvm.org/D45604
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335809
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Craig Topper [Thu, 28 Jun 2018 01:45:44 +0000 (01:45 +0000)]
[X86] Use PatFrag with hardcoded numbers for FROUND_NO_EXC/FROUND_CURRENT instead of ImmLeafs with predicates where one of the two numbers was hardcoded.
This more efficient for the isel table generator since we can use CheckChildInteger instead of MoveChild, CheckPredicate, MoveParent. This reduced the table size by 1-2K.
I wish there was a way to share the values with X86BaseInfo.h and still use a PatFrag like this. These numbers are fixed by the X86 intrinsic spec going back many years and we should never need to change them. So we shouldn't waste table bytes to support sharing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335806
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Craig Topper [Thu, 28 Jun 2018 00:47:41 +0000 (00:47 +0000)]
[X86] Change how we prefer shift by immediate over folding a load into a shift.
BMI2 added new shift by register instructions that have the ability to fold a load.
Normally without doing anything special isel would prefer folding a load over folding an immediate because the load folding pattern has higher "complexity". This would require an instruction to move the immediate into a register. We would rather fold the immediate instead and have a separate instruction for the load.
We used to enforce this priority by artificially lowering the complexity of the load pattern.
This patch changes this to instead reject the load fold in isProfitableToFoldLoad if there is an immediate. This is more consistent with other binops and feels less hacky.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335804
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Alex Lorenz [Thu, 28 Jun 2018 00:39:09 +0000 (00:39 +0000)]
[cmake][xcode-toolchain] add support for major Xcode version >= 10
The regex that extracts the Xcode version should support major versions with two
digits.
rdar://
41465184
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335801
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Michael J. Spencer [Thu, 28 Jun 2018 00:12:04 +0000 (00:12 +0000)]
[CGProfile] Fix unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335797
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Michael J. Spencer [Wed, 27 Jun 2018 23:58:08 +0000 (23:58 +0000)]
Add support for generating a call graph profile from Branch Frequency Info.
=== Generating the CG Profile ===
The CGProfile module pass simply gets the block profile count for each BB and scans for call instructions. For each call instruction it adds an edge from the current function to the called function with the current BB block profile count as the weight.
After scanning all the functions, it generates an appending module flag containing the data. The format looks like:
```
!llvm.module.flags = !{!0}
!0 = !{i32 5, !"CG Profile", !1}
!1 = !{!2, !3, !4} ; List of edges
!2 = !{void ()* @a, void ()* @b, i64 32} ; Edge from a to b with a weight of 32
!3 = !{void (i1)* @freq, void ()* @a, i64 11}
!4 = !{void (i1)* @freq, void ()* @b, i64 20}
```
Differential Revision: https://reviews.llvm.org/D48105
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335794
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Zachary Turner [Wed, 27 Jun 2018 21:18:15 +0000 (21:18 +0000)]
Move some code from PDBFileBuilder to MSFBuilder.
The code to emit the pieces of the MSF file were actually in
PDBFileBuilder. Move this to MSFBuilder so that we can
theoretically emit an MSF without having a PDB file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335789
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Benjamin Kramer [Wed, 27 Jun 2018 21:01:53 +0000 (21:01 +0000)]
[X86] Make folding table checking threadsafe
This is a benign race, but tsan likes to complain about it. Just make it
happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335788
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Craig Topper [Wed, 27 Jun 2018 20:58:46 +0000 (20:58 +0000)]
[X86] In X86DAGToDAGISel::PreprocessISelDAG, make sure we don't access N after we delete it.
If we turn X86ISD::AND into ISD::AND, we delete N. But we were continuing onto the next block of code even though N no longer existed.
Just happened to notice it. I assume asan didn't notice it because we explicitly unpoison deleted nodes and give them a DELETE_NODE opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335787
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Sameer AbuAsal [Wed, 27 Jun 2018 20:51:42 +0000 (20:51 +0000)]
[RISCV] Add machine function pass to merge base + offset
Summary:
In r333455 we added a peephole to fix the corner cases that result
from separating base + offset lowering of global address.The
peephole didn't handle some of the cases because it only has a basic
block view instead of a function level view.
This patch replaces that logic with a machine function pass. In
addition to handling the original cases it handles uses of the global
address across blocks in function and folding an offset from LW\SW
instruction. This pass won't run for OptNone compilation, so there
will be a negative impact overall vs the old approach at O0.
Reviewers: asb, apazos, mgrang
Reviewed By: asb
Subscribers: MartinMosbeck, brucehoult, the_o, rogfer01, mgorny, rbar, johnrusso, simoncook, niosHD, kito-cheng, shiva0217, zzheng, llvm-commits, edward-jones
Differential Revision: https://reviews.llvm.org/D47857
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335786
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Fangrui Song [Wed, 27 Jun 2018 20:45:11 +0000 (20:45 +0000)]
[llvm-objdump] Add -x --all-headers options
Reviewers: paulsemel, echristo
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48622
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335785
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Sanjay Patel [Wed, 27 Jun 2018 20:23:47 +0000 (20:23 +0000)]
[InstCombine] add tests for vector-select-of-binops with 2 variables; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335778
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Paul Robinson [Wed, 27 Jun 2018 19:58:28 +0000 (19:58 +0000)]
Document the git config for Windows to do line-endings correctly.
Differential Revision: https://reviews.llvm.org/D48494
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335775
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Nirav Dave [Wed, 27 Jun 2018 19:41:25 +0000 (19:41 +0000)]
[DAGCombine] Disable TokenFactor simplifications when optnone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335773
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Michael Kruse [Wed, 27 Jun 2018 19:39:03 +0000 (19:39 +0000)]
[ADT] drop_begin: use adl_begin/adl_end. NFC.
Summary:
The instantiation of the drop_begin function template usually fails because the functions begin() and end() do not exist. Only when using on a container from the std namespace (or `llvm::iterator_range`s of something derived from `std::iterator`), they are matched to std::begin() and std::end() due to Koenig-lookup.
Explicitly use llvm::adl_begin and llvm::adl_end to make drop_begin applicable to anything iterable (including C-style arrays).
A solution for general `llvm::iterator_range`s was already tried in r244620, but got reverted in r244621 due to MSVC not liking it.
Reviewers: dblaikie, grosbach, aaron.ballman, ruiu
Reviewed By: dblaikie, aaron.ballman
Subscribers: aaron.ballman, llvm-commits
Differential Revision: https://reviews.llvm.org/D48598
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335772
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Fangrui Song [Wed, 27 Jun 2018 19:35:50 +0000 (19:35 +0000)]
[WebAssembly] Try fixing test/CodeGen/WebAssembly/vector_sdiv.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335771
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Fangrui Song [Wed, 27 Jun 2018 19:12:07 +0000 (19:12 +0000)]
[X86] Fix unmatched parenthesis in r335768
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335769
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Craig Topper [Wed, 27 Jun 2018 19:03:36 +0000 (19:03 +0000)]
[X86] Teach the disassembler to use %eiz/%riz instead of NoRegister when the SIB byte is present, but doesn't encode an index register and there was another shorter encoding that would achieve the same result.
The %eiz/%riz are dummy registers that force the encoder to emit a SIB byte when it normally wouldn't. By emitting them in the disassembly output we ensure that assembling the disassembler output would also produce a SIB byte.
This should match the behavior of objdump from binutils.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335768
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Daniel Sanders [Wed, 27 Jun 2018 19:03:21 +0000 (19:03 +0000)]
[globalisel][legalizer] Add AtomicOrdering to LegalityQuery and use it in AArch64
Now that we have the ability to legalize based on MMO's. Add support for
legalizing based on AtomicOrdering and use it to correct the legalization
of the atomic instructions.
Also extend all() to be a variadic template as this ruleset now requires
3 and 4 argument versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335767
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Teresa Johnson [Wed, 27 Jun 2018 19:00:35 +0000 (19:00 +0000)]
[ThinLTO] Fix test
Fix test changes added in r335760. Even though we are invoking llvm-lto2
in single threaded mode, the order of processing the modules in the
backend is apparently not deterministic. Handle the expected debug
messages in any order. (The determinism would be good to fix, but not
related to this change.)
This also undoes the change I made in r335764 to help debug this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335766
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