OSDN Git Service
Evan Cheng [Fri, 1 Jul 2011 17:57:27 +0000 (17:57 +0000)]
Hide the call to InitMCInstrInfo into tblgen generated ctor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134244
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Jim Grosbach [Fri, 1 Jul 2011 17:14:11 +0000 (17:14 +0000)]
Pseudo-ize t2MOVCC[ri].
t2MOVCC[ri] are just t2MOV[ri] instructions, so properly pseudo-ize them.
The Thumb1 versions, tMOVCC[ri] were only present for use by the size-
reduction pass, so they're no longer necessary at all and can be deleted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134242
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Evan Cheng [Fri, 1 Jul 2011 16:59:30 +0000 (16:59 +0000)]
Eliminate one extra conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134240
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Duncan Sands [Fri, 1 Jul 2011 12:01:00 +0000 (12:01 +0000)]
Disable commit 134216 ("Add 134199 back, but disable the optimization when the second
copy is a kill") to see if it fixes the i386 dragonegg buildbot, which is timing out
because gcc built with dragonegg is going into an infinite loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134237
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Francois Pichet [Fri, 1 Jul 2011 09:23:41 +0000 (09:23 +0000)]
Another misuse of StringRef. MSVC is very sensitive to that kind of error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134236
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Nick Lewycky [Fri, 1 Jul 2011 06:27:03 +0000 (06:27 +0000)]
Fix likely typo, reduce number of instruction name collisions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134235
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Rafael Espindola [Fri, 1 Jul 2011 04:40:50 +0000 (04:40 +0000)]
Fix use after free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134234
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Rafael Espindola [Fri, 1 Jul 2011 04:15:02 +0000 (04:15 +0000)]
Avoid DenseMap lookup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134231
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Rafael Espindola [Fri, 1 Jul 2011 03:31:29 +0000 (03:31 +0000)]
Fix off by one error. I misunderstood the comment about killedAt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134229
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Rafael Espindola [Fri, 1 Jul 2011 02:35:06 +0000 (02:35 +0000)]
Check the liveinterval, not the kill flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134228
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Jakob Stoklund Olesen [Fri, 1 Jul 2011 01:24:25 +0000 (01:24 +0000)]
Don't inflate register classes used by inline asm.
The constraints are represented by the register class of the original
virtual register created for the inline asm. If the register class were
included in the operand descriptor, we might be able to do this.
For now, just give up on regclass inflation when inline asm is involved.
No test case, this bug hasn't happened yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134226
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Akira Hatanaka [Fri, 1 Jul 2011 01:04:43 +0000 (01:04 +0000)]
Improve Mips back-end's handling of DBG_VALUE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134224
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Dan Gohman [Fri, 1 Jul 2011 01:03:43 +0000 (01:03 +0000)]
Improve constant folding of undef for cmp and select operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134223
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Eric Christopher [Fri, 1 Jul 2011 01:00:07 +0000 (01:00 +0000)]
Add support for the 'j' immediate constraint. This is conditionalized on
supporting the instruction that the constraint is for 'movw'.
Part of rdar://
9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134222
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Dan Gohman [Fri, 1 Jul 2011 00:42:17 +0000 (00:42 +0000)]
Improve constant folding of undef for binary operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134221
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Eric Christopher [Fri, 1 Jul 2011 00:30:46 +0000 (00:30 +0000)]
Add support for the ARM 't' register constraint. And another testcase
for the 'x' register constraint.
Part of rdar://
9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134220
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Evan Cheng [Fri, 1 Jul 2011 00:23:10 +0000 (00:23 +0000)]
Switch SubtargetFeatures from std::string to StringRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134219
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Eric Christopher [Fri, 1 Jul 2011 00:19:27 +0000 (00:19 +0000)]
We'll return a null RC by default if we can't match.
Part of rdar://
9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134217
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Rafael Espindola [Fri, 1 Jul 2011 00:16:54 +0000 (00:16 +0000)]
Add 134199 back, but disable the optimization when the second copy is a kill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134216
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Eric Christopher [Fri, 1 Jul 2011 00:14:47 +0000 (00:14 +0000)]
Add support for the 'x' constraint.
Part of rdar://
9307836 and rdar://
9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134215
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Bill Wendling [Thu, 30 Jun 2011 23:59:38 +0000 (23:59 +0000)]
Remove tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134212
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Eric Christopher [Thu, 30 Jun 2011 23:59:16 +0000 (23:59 +0000)]
Capitalize the unsigned part of the initializer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134211
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Eric Christopher [Thu, 30 Jun 2011 23:50:52 +0000 (23:50 +0000)]
Rename Pair to RCPair lacking any better naming ideas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134210
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Bill Wendling [Thu, 30 Jun 2011 23:47:40 +0000 (23:47 +0000)]
Improve comment: Show the register the DWARF label is added to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134209
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Bill Wendling [Thu, 30 Jun 2011 23:47:14 +0000 (23:47 +0000)]
Use the correct registers on X86_64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134208
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Jakob Stoklund Olesen [Thu, 30 Jun 2011 23:42:18 +0000 (23:42 +0000)]
Fix a problem with fast-isel return values introduced in r134018.
We would put the return value from long double functions in the wrong
register.
This fixes gcc.c-torture/execute/conversion.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134205
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Jim Grosbach [Thu, 30 Jun 2011 23:38:17 +0000 (23:38 +0000)]
Refact ARM Thumb1 tMOVr instruction family.
Merge the tMOVr, tMOVgpr2tgpr, tMOVtgpr2gpr, and tMOVgpr2gpr instructions
into tMOVr. There's no need to keep them separate. Giving the tMOVr
instruction the proper GPR register class for its operands is sufficient
to give the register allocator enough information to do the right thing
directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134204
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Eric Christopher [Thu, 30 Jun 2011 23:23:01 +0000 (23:23 +0000)]
Add support for the 'h' constraint.
Part of rdar://
9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134203
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Bill Wendling [Thu, 30 Jun 2011 23:20:32 +0000 (23:20 +0000)]
Add target a target hook to get the register number used by the compact unwind
encoding for the registers it knows about. Return -1 if it can't handle that
register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134202
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Rafael Espindola [Thu, 30 Jun 2011 22:58:17 +0000 (22:58 +0000)]
Revert my previous patch while I debug llvm-gcc bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134201
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Bill Wendling [Thu, 30 Jun 2011 22:35:49 +0000 (22:35 +0000)]
Add one more comment to the FDE verbose asm output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134200
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Rafael Espindola [Thu, 30 Jun 2011 22:24:13 +0000 (22:24 +0000)]
Don't give up on coalescing A and B when we find
A = X
B = X
Instead, proceed as if we had found
A = X
B = A
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134199
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Eric Christopher [Thu, 30 Jun 2011 22:17:01 +0000 (22:17 +0000)]
Add a convenience typedef for std::pair<unsigned, const TargetRegisterClass*>.
No functional change.
Part of rdar://
9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134198
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Jim Grosbach [Thu, 30 Jun 2011 22:10:46 +0000 (22:10 +0000)]
Thumb1 register to register MOV instruction is predicable.
Fix a FIXME and allow predication (in Thumb2) for the T1 register to
register MOV instructions. This allows some better codegen with
if-conversion (as seen in the test updates), plus it lays the groundwork
for pseudo-izing the tMOVCC instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134197
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Bill Wendling [Thu, 30 Jun 2011 22:02:20 +0000 (22:02 +0000)]
Add comments to the FDE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134196
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Bill Wendling [Thu, 30 Jun 2011 21:45:12 +0000 (21:45 +0000)]
Add more comments to the ASM output for the CIE's "moves".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134194
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Jakob Stoklund Olesen [Thu, 30 Jun 2011 21:30:30 +0000 (21:30 +0000)]
Tweak error messages to match GCC. Should fix gcc.target/i386/pr30848.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134193
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Bill Wendling [Thu, 30 Jun 2011 21:25:51 +0000 (21:25 +0000)]
Add comments to the ASM output to help understand the compact unwind and CIE tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134191
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Rafael Espindola [Thu, 30 Jun 2011 21:15:52 +0000 (21:15 +0000)]
Create a isFullCopy predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134189
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Rafael Espindola [Thu, 30 Jun 2011 20:14:24 +0000 (20:14 +0000)]
Add r134057 back, but splice the predecessor after the successors phi
nodes.
Original message:
Let simplify cfg simplify bb with only debug and lifetime intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134182
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Jim Grosbach [Thu, 30 Jun 2011 19:38:01 +0000 (19:38 +0000)]
Pseudo-ize the Thumb tTPsoft instruction.
It's just a call to a special helper function. Get rid of the T2 variant
entirely, as it's identical to the Thumb1 version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134178
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Andrew Trick [Thu, 30 Jun 2011 19:02:17 +0000 (19:02 +0000)]
indvars -disable-iv-rewrite: handle cloning binary operators that cannot overflow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134177
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Jim Grosbach [Thu, 30 Jun 2011 18:25:42 +0000 (18:25 +0000)]
Pseudo-ize the t2LDMIA_RET instruction.
It's just a t2LDMIA_UPD instruction with extra codegen properties, so it
doesn't need the encoding information. As a side-benefit, we now correctly
recognize for instruction printing as a 'pop' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134173
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Jim Grosbach [Thu, 30 Jun 2011 17:34:04 +0000 (17:34 +0000)]
Pseudo-ize the Thumb tPOP_RET instruction.
It's just a tPOP instruction with additional code-gen properties, so it
doesn't need encoding information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134172
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Rafael Espindola [Thu, 30 Jun 2011 13:17:24 +0000 (13:17 +0000)]
Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134148
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Duncan Sands [Thu, 30 Jun 2011 06:37:07 +0000 (06:37 +0000)]
The enum was moved to ISDOpcodes.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134134
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Jim Grosbach [Thu, 30 Jun 2011 02:23:05 +0000 (02:23 +0000)]
Kill dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134131
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Jim Grosbach [Thu, 30 Jun 2011 02:22:49 +0000 (02:22 +0000)]
Size reducing SP adjusting t2ADDri needs to check predication.
tADDrSPi is not predicable, so we can't size-reduce a t2ADDri to it if the
predicate is anything other than "always."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134130
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Evan Cheng [Thu, 30 Jun 2011 02:12:44 +0000 (02:12 +0000)]
Fix ARMSubtarget feature parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134129
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Evan Cheng [Thu, 30 Jun 2011 01:53:36 +0000 (01:53 +0000)]
Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.
The fix is to just have the clients explictly pass the CPU name!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127
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Joerg Sonnenberger [Thu, 30 Jun 2011 01:38:03 +0000 (01:38 +0000)]
Recognize the xstorerng alias for VIA PadLock's xstore instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134126
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Jakob Stoklund Olesen [Thu, 30 Jun 2011 01:30:39 +0000 (01:30 +0000)]
Reapply r134047 now that the world is ready for it.
This patch will sometimes choose live range split points next to
interference instead of always splitting next to a register point. That
means spill code can now appear almost anywhere, and it was necessary
to fix code that didn't expect that.
The difficult places were:
- Between a CALL returning a value on the x87 stack and the
corresponding FpPOP_RETVAL (was FpGET_ST0). Probably also near x87
inline assembly, but that didn't actually show up in testing.
- Between a CALL popping arguments off the stack and the corresponding
ADJCALLSTACKUP.
Both are fixed now. The only place spill code can't appear is after
terminators, see SplitAnalysis::getLastSplitPoint.
Original commit message:
Rewrite RAGreedy::splitAroundRegion, now with cool ASCII art.
This function has to deal with a lot of special cases, and the old
version got it wrong sometimes. In particular, it would sometimes leave
multiple uses in the stack interval in a single block. That causes bad
code with multiple reloads in the same basic block.
The new version handles block entry and exit in a single pass. It first
eliminates all the easy cases, and then goes on to create a local
interval for the blocks with difficult interference. Previously, we
would only create the local interval for completely isolated blocks.
It can happen that the stack interval becomes completely empty because
we could allocate a register in all edge bundles, and the new local
intervals deal with the interference. The empty stack interval is
harmless, but we need to remove a SplitKit assertion that checks for
empty intervals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134125
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Andrew Trick [Thu, 30 Jun 2011 01:27:23 +0000 (01:27 +0000)]
indvars -disable-iv-rewrite: handle an edge case involving identity phis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134124
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Eric Christopher [Thu, 30 Jun 2011 01:20:03 +0000 (01:20 +0000)]
Remove getRegClassForInlineAsmConstraint and all dependencies.
Fixes rdar://
9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134123
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Eric Christopher [Thu, 30 Jun 2011 01:05:46 +0000 (01:05 +0000)]
Make sure we use the correct register class here since we'll need to
care about spill values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134122
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Eric Christopher [Thu, 30 Jun 2011 00:48:30 +0000 (00:48 +0000)]
Fix a small thinko for constant i64 lock/orq optimization where we
we didn't have an opcode for 64-bit constant or expressions.
Fixes rdar://
9692967
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134121
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Bill Wendling [Thu, 30 Jun 2011 00:30:52 +0000 (00:30 +0000)]
* Use the proper size to output the range size.
* Rough in the compact encoding part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134119
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Bill Wendling [Wed, 29 Jun 2011 23:53:16 +0000 (23:53 +0000)]
Stupid error: If the LSDA and Personality functions aren't there, emit 0 instead
of the encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134117
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Devang Patel [Wed, 29 Jun 2011 23:50:13 +0000 (23:50 +0000)]
Revert r133953 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134116
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Bill Wendling [Wed, 29 Jun 2011 23:49:12 +0000 (23:49 +0000)]
We don't want to use relocations inside the compact unwind section. Just use the
symbols instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134115
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Jim Grosbach [Wed, 29 Jun 2011 23:25:04 +0000 (23:25 +0000)]
Remove redundant Thumb2 ADD/SUB SP instruction definitions.
Unlike Thumb1, Thumb2 does not have dedicated encodings for adjusting the
stack pointer. It can just use the normal add-register-immediate encoding
since it can use all registers as a source, not just R0-R7. The extra
instruction definitions are just duplicates of the normal instructions with
the (not well enforced) constraint that the source register was SP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134114
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Jakob Stoklund Olesen [Wed, 29 Jun 2011 23:11:39 +0000 (23:11 +0000)]
Always adjust the stack pointer immediately after the call.
Some x86-32 calls pop values off the stack, and we need to readjust the
stack pointer after the call. This happens when ADJCALLSTACKUP is
eliminated.
It could happen that spill code was inserted between the CALL and
ADJCALLSTACKUP instructions, and we would compute wrong stack pointer
offsets for those frame index references.
Fix this by inserting the stack pointer adjustment immediately after the
call instead of where the ADJCALLSTACKUP instruction was erased.
I don't have a test case since we don't currently insert code in that
position. We will soon, though. I am testing a regalloc patch that
didn't work on Linux because of this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134113
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Andrew Trick [Wed, 29 Jun 2011 23:03:57 +0000 (23:03 +0000)]
indvars -disable-iv-rewrite: insert new trunc instructions carefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134112
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Andrew Trick [Wed, 29 Jun 2011 23:01:52 +0000 (23:01 +0000)]
Added IRBuilder::SetInsertPoint(Use) to find a valid insertion point
that dominates the given Use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134111
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Andrew Trick [Wed, 29 Jun 2011 22:52:51 +0000 (22:52 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134110
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Cameron Zwarich [Wed, 29 Jun 2011 22:24:25 +0000 (22:24 +0000)]
In the ARM global merging pass, allow extraneous alignment specifiers. This pass
already makes the assumption, which is correct on ARM, that a type's alignment is
less than its alloc size. This improves codegen with Clang (which inserts a lot of
extraneous alignment specifiers) and fixes <rdar://problem/
9695089>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134106
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Jim Grosbach [Wed, 29 Jun 2011 22:01:15 +0000 (22:01 +0000)]
ARM RSCS* don't need explicit TableGen decoder checks.
They've been pseudos for a while now, so the decoder will never see
them in the first place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134101
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Evan Cheng [Wed, 29 Jun 2011 21:58:37 +0000 (21:58 +0000)]
Indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134100
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Eric Christopher [Wed, 29 Jun 2011 21:10:36 +0000 (21:10 +0000)]
Remove getRegClassForInlineAsmConstraint from the ARM port.
Part of rdar://
9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134095
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Eric Christopher [Wed, 29 Jun 2011 21:05:54 +0000 (21:05 +0000)]
Remove todo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134094
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Rafael Espindola [Wed, 29 Jun 2011 20:55:48 +0000 (20:55 +0000)]
make compose and isMoveInstr static functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134093
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Jim Grosbach [Wed, 29 Jun 2011 20:26:39 +0000 (20:26 +0000)]
Refactor away tSpill and tRestore pseudos in ARM backend.
The tSpill and tRestore instructions are just copies of the tSTRspi and
tLDRspi instructions, respectively. Just use those directly instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134092
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Eric Christopher [Wed, 29 Jun 2011 19:41:27 +0000 (19:41 +0000)]
Add a TODO for the Alpha port inline asm constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134089
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Eric Christopher [Wed, 29 Jun 2011 19:40:01 +0000 (19:40 +0000)]
Move Alpha from getRegClassForInlineAsmConstraint to
getRegForInlineAsmConstraint.
Part of rdar://
9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134088
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Eric Christopher [Wed, 29 Jun 2011 19:33:04 +0000 (19:33 +0000)]
Update comment for getRegForInlineAsmConstraint for Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134087
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Eric Christopher [Wed, 29 Jun 2011 19:30:29 +0000 (19:30 +0000)]
Move the Blackfin port away from getRegClassForInlineAsmConstraint by
creating a few specific register classes.
Part of rdar://
9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134086
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Eric Christopher [Wed, 29 Jun 2011 19:12:24 +0000 (19:12 +0000)]
Remove getRegClassForInlineAsmConstraint from MBlaze. Add a TODO comment
for the port.
Part of rdar://
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134085
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Eric Christopher [Wed, 29 Jun 2011 19:04:31 +0000 (19:04 +0000)]
Remove getRegClassForInlineAsmConstraint for Mips.
Part of rdar://
9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134084
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Eric Christopher [Wed, 29 Jun 2011 18:53:10 +0000 (18:53 +0000)]
Remove getRegClassForInlineAsmConstraint from sparc.
Part of rdar://
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134083
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Eric Christopher [Wed, 29 Jun 2011 17:53:29 +0000 (17:53 +0000)]
Move XCore from getRegClassForInlineAsmConstraint to
getRegForInlineAsmConstraint.
Part of rdar://
9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134080
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Eric Christopher [Wed, 29 Jun 2011 17:23:50 +0000 (17:23 +0000)]
Use getRegForInlineAsmConstraint instead of custom defining regclasses
via vectors.
Part of rdar://
9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134079
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Evan Cheng [Wed, 29 Jun 2011 17:14:00 +0000 (17:14 +0000)]
Add missing operand. rdar://
9694169
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134078
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Chad Rosier [Wed, 29 Jun 2011 16:22:11 +0000 (16:22 +0000)]
Temporarily revert r134057: "Let simplify cfg simplify bb with only debug and
lifetime intrinsics" due to buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134071
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Jim Grosbach [Wed, 29 Jun 2011 16:05:14 +0000 (16:05 +0000)]
Asm parser range checking on .<size> <value> directives.
For example, ".byte 256" would previously assert() when emitting an object
file. Now it generates a diagnostic that the literal value is out of range.
rdar://
9686950
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134069
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Benjamin Kramer [Wed, 29 Jun 2011 14:07:18 +0000 (14:07 +0000)]
Don't depend on the optimization reverted in r134067.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134068
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Benjamin Kramer [Wed, 29 Jun 2011 13:47:25 +0000 (13:47 +0000)]
Revert a part of r126557 which could create unschedulable DAGs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134067
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Francois Pichet [Wed, 29 Jun 2011 11:25:34 +0000 (11:25 +0000)]
Change AsmName's type from StringRef to std::string. AsmName was pointing to a temporary string object that was destroyed. This is undefined behavior and MSVC didn't like it.
This fixes over 300+ failing tests on MSVC.
Credit for this fix goes to chapuni.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134064
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Rafael Espindola [Wed, 29 Jun 2011 05:25:47 +0000 (05:25 +0000)]
Let simplify cfg simplify bb with only debug and lifetime intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134057
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NAKAMURA Takumi [Wed, 29 Jun 2011 03:26:17 +0000 (03:26 +0000)]
Fix CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134055
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Andrew Trick [Wed, 29 Jun 2011 03:13:40 +0000 (03:13 +0000)]
indvars -disable-iv-rewrite: just because SCEV ignores casts doesn't
mean they can be removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134054
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Jakob Stoklund Olesen [Wed, 29 Jun 2011 02:03:36 +0000 (02:03 +0000)]
Revert r134047 while investigating a llvm-gcc-i386-linux-selfhost
miscompile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134053
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Evan Cheng [Wed, 29 Jun 2011 01:14:12 +0000 (01:14 +0000)]
Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134049
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Evan Cheng [Wed, 29 Jun 2011 00:35:31 +0000 (00:35 +0000)]
Trim include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134048
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Jakob Stoklund Olesen [Wed, 29 Jun 2011 00:24:24 +0000 (00:24 +0000)]
Rewrite RAGreedy::splitAroundRegion, now with cool ASCII art.
This function has to deal with a lot of special cases, and the old
version got it wrong sometimes. In particular, it would sometimes leave
multiple uses in the stack interval in a single block. That causes bad
code with multiple reloads in the same basic block.
The new version handles block entry and exit in a single pass. It first
eliminates all the easy cases, and then goes on to create a local
interval for the blocks with difficult interference. Previously, we
would only create the local interval for completely isolated blocks.
It can happen that the stack interval becomes completely empty because
we could allocate a register in all edge bundles, and the new local
intervals deal with the interference. The empty stack interval is
harmless, but we need to remove a SplitKit assertion that checks for
empty intervals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134047
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Daniel Dunbar [Tue, 28 Jun 2011 22:30:17 +0000 (22:30 +0000)]
build/Darwin: Fix epic typo fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134036
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NAKAMURA Takumi [Tue, 28 Jun 2011 21:46:21 +0000 (21:46 +0000)]
Fix a CMake warning, following up to r134008.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134033
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Evan Cheng [Tue, 28 Jun 2011 21:33:11 +0000 (21:33 +0000)]
Unbreak every backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134031
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Evan Cheng [Tue, 28 Jun 2011 21:14:33 +0000 (21:14 +0000)]
Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030
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Evan Cheng [Tue, 28 Jun 2011 20:44:22 +0000 (20:44 +0000)]
Hide more details in tablegen generated MCRegisterInfo ctor function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134027
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Evan Cheng [Tue, 28 Jun 2011 20:29:03 +0000 (20:29 +0000)]
Add MCInstrInfo registeration machinery.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134026
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