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Vladimir Marko [Thu, 19 Feb 2015 17:54:45 +0000 (17:54 +0000)]
am
5ec3cda1: am
8fb13085: Merge "Add suspend checks to special methods."
* commit '
5ec3cda158064a2fdec563d3c185d1fd6f95b3a3':
Add suspend checks to special methods.
Vladimir Marko [Thu, 19 Feb 2015 17:49:08 +0000 (17:49 +0000)]
am
8fb13085: Merge "Add suspend checks to special methods."
* commit '
8fb1308578cfea07ebe6c55312821480c9cc1e80':
Add suspend checks to special methods.
Vladimir Marko [Thu, 19 Feb 2015 17:42:06 +0000 (17:42 +0000)]
Merge "Add suspend checks to special methods."
Vladimir Marko [Mon, 16 Feb 2015 13:05:59 +0000 (13:05 +0000)]
Add suspend checks to special methods.
Generate suspend checks at the beginning of special methods.
If we need to call to runtime, go to the slow path where we
create a simplified but valid frame, spill all arguments,
call art_quick_test_suspend, restore necessary arguments and
return back to the fast path. This keeps the fast path
overhead to a minimum.
Bug:
19245639
Change-Id: I3de5aee783943941322a49c4cf2c4c94411dbaa2
Nicolas Geoffray [Thu, 19 Feb 2015 14:10:43 +0000 (14:10 +0000)]
am
bd57a340: am
39109a06: Merge "Ensure the graph is correctly typed."
* commit '
bd57a340040be90888e1645377db7536f0b2d6f0':
Ensure the graph is correctly typed.
Nicolas Geoffray [Thu, 19 Feb 2015 14:05:30 +0000 (14:05 +0000)]
am
39109a06: Merge "Ensure the graph is correctly typed."
* commit '
39109a06015c91188232e59fa9e60e0915d24cd7':
Ensure the graph is correctly typed.
Nicolas Geoffray [Thu, 19 Feb 2015 14:01:59 +0000 (14:01 +0000)]
Merge "Ensure the graph is correctly typed."
Nicolas Geoffray [Wed, 18 Feb 2015 14:48:53 +0000 (14:48 +0000)]
Ensure the graph is correctly typed.
We used to be forgiving because of HIntConstant(0) also being
used for null. We now create a special HNullConstant for such uses.
Also, we need to run the dead phi elimination twice during ssa
building to ensure the correctness.
Change-Id: If479efa3680d3358800aebb1cca692fa2d94f6e5
Roland Levillain [Thu, 19 Feb 2015 12:23:22 +0000 (12:23 +0000)]
am
3a14c8b0: am
92095533: Merge "Have the opt. compiler set the size of "empty" frames to zero."
* commit '
3a14c8b0c05b0597099f3ae9818df9afa1fd7771':
Have the opt. compiler set the size of "empty" frames to zero.
Roland Levillain [Thu, 19 Feb 2015 12:20:04 +0000 (12:20 +0000)]
am
92095533: Merge "Have the opt. compiler set the size of "empty" frames to zero."
* commit '
92095533ac28879ddd8b44b559d700527ca12b8a':
Have the opt. compiler set the size of "empty" frames to zero.
Roland Levillain [Thu, 19 Feb 2015 12:15:55 +0000 (12:15 +0000)]
Merge "Have the opt. compiler set the size of "empty" frames to zero."
Roland Levillain [Tue, 17 Feb 2015 15:40:09 +0000 (15:40 +0000)]
Have the opt. compiler set the size of "empty" frames to zero.
This is to mimic Quick's behavior and honor stack frame
alignment constraints after changes introduced by Change-Id
I0fdb31e8c631e99091b818874a558c9aa04b1628.
This issue use to make oatdump crash on oat files produced by
the optimized compiler (e.g.
out/host/linux-x86/framework/x86_64/core-optimizing.oat).
Change-Id: I8ba52601edb0a0993eaf8923eba55aafdce5043e
Sebastien Hertz [Thu, 19 Feb 2015 10:21:12 +0000 (10:21 +0000)]
am
b66251a1: am
cf3fb94a: Merge "Fix art_quick_instrumentation_entry for x86"
* commit '
b66251a15e65a20ac79359a100cef7f890c77af8':
Fix art_quick_instrumentation_entry for x86
Sebastien Hertz [Thu, 19 Feb 2015 10:17:22 +0000 (10:17 +0000)]
am
cf3fb94a: Merge "Fix art_quick_instrumentation_entry for x86"
* commit '
cf3fb94a90d74361b13e7bae5aa6e0e4ae58479d':
Fix art_quick_instrumentation_entry for x86
Sebastien Hertz [Thu, 19 Feb 2015 09:59:54 +0000 (09:59 +0000)]
Merge "Fix art_quick_instrumentation_entry for x86"
Sebastien Hertz [Thu, 19 Feb 2015 09:30:48 +0000 (10:30 +0100)]
Fix art_quick_instrumentation_entry for x86
Fixes the stack offset used to restore edx.
Bug:
19402798
Change-Id: Ic3636cd362684564196997c4a3b3bebdc1be9a4e
Andreas Gampe [Thu, 19 Feb 2015 05:07:26 +0000 (05:07 +0000)]
am
065fe0b2: am
1b472546: Merge "ART: Fix run-test 099-vmdebug for device"
* commit '
065fe0b26742eeed0956a510fd73ffebe088e08d':
ART: Fix run-test 099-vmdebug for device
Andreas Gampe [Thu, 19 Feb 2015 05:02:35 +0000 (05:02 +0000)]
am
1b472546: Merge "ART: Fix run-test 099-vmdebug for device"
* commit '
1b472546657d31d38883373d8340d1441281a6a5':
ART: Fix run-test 099-vmdebug for device
Andreas Gampe [Thu, 19 Feb 2015 04:54:59 +0000 (04:54 +0000)]
Merge "ART: Fix run-test 099-vmdebug for device"
Andreas Gampe [Thu, 19 Feb 2015 02:30:05 +0000 (18:30 -0800)]
ART: Fix run-test 099-vmdebug for device
We can't expect logcat errors on device. So just swallow them whole.
Bug:
18713034
Change-Id: I58d8595e86f112442a5a1c4c6ef0d614871d890f
Andreas Gampe [Thu, 19 Feb 2015 01:28:51 +0000 (01:28 +0000)]
am
ff3ef3da: am
627fbe31: Merge "ART: Blacklist run-test 802 for tracing"
* commit '
ff3ef3da61fe7a472f61adb5f43d86aba20a3b1f':
ART: Blacklist run-test 802 for tracing
Andreas Gampe [Thu, 19 Feb 2015 01:28:50 +0000 (01:28 +0000)]
am
b3c21298: am
2ee8837c: Merge "ART: Templatize IsInt & IsUint"
* commit '
b3c212984e380ae17211acf6174a64371e49eece':
ART: Templatize IsInt & IsUint
Andreas Gampe [Thu, 19 Feb 2015 01:23:48 +0000 (01:23 +0000)]
am
627fbe31: Merge "ART: Blacklist run-test 802 for tracing"
* commit '
627fbe3137995904c2d67822d79201e17225e797':
ART: Blacklist run-test 802 for tracing
Andreas Gampe [Thu, 19 Feb 2015 01:23:47 +0000 (01:23 +0000)]
am
2ee8837c: Merge "ART: Templatize IsInt & IsUint"
* commit '
2ee8837c49680fa0c928fb5d5fc6ef7ae6532eea':
ART: Templatize IsInt & IsUint
Andreas Gampe [Thu, 19 Feb 2015 01:20:33 +0000 (01:20 +0000)]
Merge "ART: Blacklist run-test 802 for tracing"
Andreas Gampe [Thu, 19 Feb 2015 01:18:01 +0000 (01:18 +0000)]
Merge "ART: Templatize IsInt & IsUint"
Andreas Gampe [Thu, 19 Feb 2015 01:08:27 +0000 (17:08 -0800)]
ART: Blacklist run-test 802 for tracing
When in tracing mode, the test is meaningless as it won't force
deoptimization.
Bug:
18713034
Change-Id: I8bf2861c2937c5da73e3d7642e638818d2544fa8
Andreas Gampe [Sat, 14 Feb 2015 03:23:55 +0000 (19:23 -0800)]
ART: Templatize IsInt & IsUint
Ensure that things are used correctly.
Change-Id: I76f082b32dcee28bbfb4c519daa401ac595873b3
Jeff Hao [Wed, 18 Feb 2015 22:57:32 +0000 (22:57 +0000)]
am
8ceac608: am
887653c2: Merge "Default to 64-bit for tests of methods with varying ISAs for valgrind."
* commit '
8ceac608892950035d7ab2bdf760a57add1cb643':
Default to 64-bit for tests of methods with varying ISAs for valgrind.
Andreas Gampe [Wed, 18 Feb 2015 22:57:31 +0000 (22:57 +0000)]
am
f3707494: am
a56f1195: Merge "ART: Make run-tests more verbose"
* commit '
f3707494933ab09ba05305dddb31aada32f7192c':
ART: Make run-tests more verbose
Vladimir Marko [Wed, 18 Feb 2015 22:57:30 +0000 (22:57 +0000)]
am
a0c5a8c0: am
698e4a89: Merge "Distinguish FP and integral constants in LVN."
* commit '
a0c5a8c04b00b4ab65391b9e2862025e5aaa79d4':
Distinguish FP and integral constants in LVN.
Bill Buzbee [Wed, 18 Feb 2015 22:57:28 +0000 (22:57 +0000)]
am
6b00d770: am
a5c81189: Merge "ART: Fix InsertCaseLabel to return boundary_lir always"
* commit '
6b00d7700b710fd21a007d75aaee5feb2f93325c':
ART: Fix InsertCaseLabel to return boundary_lir always
Bill Buzbee [Wed, 18 Feb 2015 22:57:27 +0000 (22:57 +0000)]
am
a92cda03: am
3dbce6f8: Merge "ART: Promoted register may be wrong after the load of zero fp constant"
* commit '
a92cda032ff71f7c5ad54673b09e89aebebd999f':
ART: Promoted register may be wrong after the load of zero fp constant
Jeff Hao [Wed, 18 Feb 2015 22:50:56 +0000 (22:50 +0000)]
am
887653c2: Merge "Default to 64-bit for tests of methods with varying ISAs for valgrind."
* commit '
887653c253e9d049d0817867db02392a9a3db40e':
Default to 64-bit for tests of methods with varying ISAs for valgrind.
Andreas Gampe [Wed, 18 Feb 2015 22:50:55 +0000 (22:50 +0000)]
am
a56f1195: Merge "ART: Make run-tests more verbose"
* commit '
a56f11956c3ee2c18e98078737549494638e08aa':
ART: Make run-tests more verbose
Vladimir Marko [Wed, 18 Feb 2015 22:50:37 +0000 (22:50 +0000)]
am
698e4a89: Merge "Distinguish FP and integral constants in LVN."
* commit '
698e4a8942b6f6005dd247a73347f8086c8e7e6e':
Distinguish FP and integral constants in LVN.
Bill Buzbee [Wed, 18 Feb 2015 22:50:31 +0000 (22:50 +0000)]
am
a5c81189: Merge "ART: Fix InsertCaseLabel to return boundary_lir always"
* commit '
a5c81189a5075c53d649135e0417fc075eeead5a':
ART: Fix InsertCaseLabel to return boundary_lir always
Bill Buzbee [Wed, 18 Feb 2015 22:50:30 +0000 (22:50 +0000)]
am
3dbce6f8: Merge "ART: Promoted register may be wrong after the load of zero fp constant"
* commit '
3dbce6f822cc9fa49505adde0a556fd67996268e':
ART: Promoted register may be wrong after the load of zero fp constant
Jeff Hao [Wed, 18 Feb 2015 21:41:11 +0000 (21:41 +0000)]
Merge "Default to 64-bit for tests of methods with varying ISAs for valgrind."
Andreas Gampe [Wed, 18 Feb 2015 21:41:10 +0000 (21:41 +0000)]
Merge "ART: Make run-tests more verbose"
Vladimir Marko [Wed, 18 Feb 2015 18:54:15 +0000 (18:54 +0000)]
Merge "Distinguish FP and integral constants in LVN."
Bill Buzbee [Wed, 18 Feb 2015 17:54:10 +0000 (17:54 +0000)]
Merge "ART: Fix InsertCaseLabel to return boundary_lir always"
Bill Buzbee [Wed, 18 Feb 2015 17:54:00 +0000 (17:54 +0000)]
Merge "ART: Promoted register may be wrong after the load of zero fp constant"
Vladimir Marko [Wed, 18 Feb 2015 17:52:39 +0000 (17:52 +0000)]
Distinguish FP and integral constants in LVN.
Change-Id: I31a58ff19fb95a2f56420359e50332c1dce6cbc7
Vladimir Marko [Wed, 18 Feb 2015 14:47:58 +0000 (14:47 +0000)]
am
203c13f7: am
ca47c2ec: Merge "Quick: Disable DCE until we fix FP/Core reg mismatches."
* commit '
203c13f7b8c6669bbee020088f0c3da7b3a677a3':
Quick: Disable DCE until we fix FP/Core reg mismatches.
Vladimir Marko [Wed, 18 Feb 2015 14:41:59 +0000 (14:41 +0000)]
am
ca47c2ec: Merge "Quick: Disable DCE until we fix FP/Core reg mismatches."
* commit '
ca47c2ece95c9ea511864c51c5c3923e087d4499':
Quick: Disable DCE until we fix FP/Core reg mismatches.
Vladimir Marko [Wed, 18 Feb 2015 14:36:59 +0000 (14:36 +0000)]
Merge "Quick: Disable DCE until we fix FP/Core reg mismatches."
Vladimir Marko [Wed, 18 Feb 2015 14:06:43 +0000 (14:06 +0000)]
Quick: Disable DCE until we fix FP/Core reg mismatches.
GVN and TypeInference can miss some FP/Core register
mismatch:
const v0, #X ; marked as float
invoke-virtual v0, void foo(float)
const v0, #X ; marked as core
aput v0, v1, v2 ; float[] not used
The second const is eliminated by the DCE because it writes
the same value to the same dalvik reg. We replace the SSA
register name defined by the first const and used by the
invoke-virtual with the one defined by the second const.
When we generate code for the invoke-virtual, we get a core
location and may need a temporary to set up the FP argument
and we may not have an available temporary.
This may affect the bug below (more investigation needed).
Bug:
19419671
Change-Id: I44abd390706b980c346b36c9828a3bcb4e96726d
Nicolas Geoffray [Wed, 18 Feb 2015 10:21:55 +0000 (10:21 +0000)]
am
0a42770b: am
35757740: Merge "Avoid generating jmp +0."
* commit '
0a42770bbbdb22688512d3ad45c01e503889dd72':
Avoid generating jmp +0.
Nicolas Geoffray [Wed, 18 Feb 2015 10:14:00 +0000 (10:14 +0000)]
am
35757740: Merge "Avoid generating jmp +0."
* commit '
35757740da77220dc51d5cff3bc3a779f2eea9ef':
Avoid generating jmp +0.
Nicolas Geoffray [Wed, 18 Feb 2015 09:54:39 +0000 (09:54 +0000)]
Merge "Avoid generating jmp +0."
Nicolas Geoffray [Mon, 16 Feb 2015 11:15:43 +0000 (11:15 +0000)]
Avoid generating jmp +0.
When a block branches to a non-following block, but blocks
in-between do branch to it, we can avoid doing the branch.
Change-Id: I9b343f662a4efc718cd4b58168f93162a24e1219
Sebastien Hertz [Wed, 18 Feb 2015 08:40:38 +0000 (08:40 +0000)]
am
9b717aab: am
de740218: Merge "Follow up 129144"
* commit '
9b717aabe20cf4de8f9c6f6ac35ebc1b9542def9':
Follow up 129144
Sebastien Hertz [Wed, 18 Feb 2015 08:34:36 +0000 (08:34 +0000)]
am
de740218: Merge "Follow up 129144"
* commit '
de7402182c1b020dec43aa38d62fa369a4ef52b8':
Follow up 129144
Sebastien Hertz [Wed, 18 Feb 2015 08:28:34 +0000 (08:28 +0000)]
Merge "Follow up 129144"
Vladimir [Wed, 11 Feb 2015 08:11:19 +0000 (14:11 +0600)]
ART: Promoted register may be wrong after the load of zero fp constant
Because of Dalvik byte code's lack of immediate typing,
the same vreg may be used in core, ref and fp operations.
To properly support GC, we must ensure that if a constant zero is loaded
into a fp view of a vreg, it must also be loaded into the core/ref view.
The code that was responsible for ensuring this failed to handle the case
of a vreg having a non-promoted fp view and a promoted core/ref view.
Change-Id: If77295aa93317e749ceacc8c1dd9e582122c368f
Signed-off-by: Vladimir <vladimir.a.ivanov@intel.com>
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Andreas Gampe [Wed, 18 Feb 2015 03:25:29 +0000 (19:25 -0800)]
ART: Make run-tests more verbose
Make run-tests log ERROR level on host. Adjust some internal LOG(ERROR)
to LOG(WARNING). Add check scripts to adjust for other LOG(ERROR)
messages.
Bug:
18713034
Change-Id: I2a3e055baa6a0e31f106364c300c20963a59ed94
Jeff Hao [Wed, 18 Feb 2015 02:01:00 +0000 (18:01 -0800)]
Default to 64-bit for tests of methods with varying ISAs for valgrind.
The size of the created methods will technically not be correct, but
they will be larger than necessary when the target is changed to 32-bit,
so valgrind will not complain.
Bug:
19368740
Change-Id: Ic78867b4700248ec6d70f5d7f6d87ce9447ac448
Vladimir Marko [Tue, 17 Feb 2015 22:41:31 +0000 (22:41 +0000)]
am
0b474276: am
afba6968: Merge "Dead code elimination based on GVN results."
* commit '
0b474276962ea845deccd904baebc5f5b3c0098f':
Dead code elimination based on GVN results.
Vladimir Marko [Tue, 17 Feb 2015 22:31:30 +0000 (22:31 +0000)]
am
afba6968: Merge "Dead code elimination based on GVN results."
* commit '
afba696823ec7c019de72f17cd198e91edd3bf4f':
Dead code elimination based on GVN results.
Vladimir Marko [Tue, 17 Feb 2015 22:25:06 +0000 (22:25 +0000)]
Merge "Dead code elimination based on GVN results."
Sebastien Hertz [Fri, 6 Feb 2015 08:16:32 +0000 (09:16 +0100)]
Follow up 129144
Passes JDWP options to debugger on runtime init so we no longer need
to keep them on the heap.
Updates ParseJdwpOption to return Result for consistency.
Bug:
19275792
Change-Id: I68b7e58908164d3e4cf9e3fbcc3dfab6ce0579a5
Vladimir Marko [Fri, 2 Jan 2015 17:00:44 +0000 (17:00 +0000)]
Dead code elimination based on GVN results.
Change-Id: I5b77411a8f088f0b561da14b123cf6b0501c9db5
Igor Murashkin [Tue, 17 Feb 2015 19:12:43 +0000 (19:12 +0000)]
am
911ad672: am
17609db4: Merge "art: Fix bug in VariantMap::Set"
* commit '
911ad67266aacea8a273dc3898b962f26aea0da6':
art: Fix bug in VariantMap::Set
Igor Murashkin [Tue, 17 Feb 2015 19:09:10 +0000 (19:09 +0000)]
am
17609db4: Merge "art: Fix bug in VariantMap::Set"
* commit '
17609db47537ea6da03db1be530ad13e67cf24db':
art: Fix bug in VariantMap::Set
Igor Murashkin [Tue, 17 Feb 2015 19:05:04 +0000 (19:05 +0000)]
Merge "art: Fix bug in VariantMap::Set"
Igor Murashkin [Sat, 7 Feb 2015 01:59:39 +0000 (17:59 -0800)]
art: Fix bug in VariantMap::Set
Bug:
19295410
Change-Id: I7827583846d710698c0e7bc0ec1a2c3bf901bd50
Nicolas Geoffray [Mon, 16 Feb 2015 11:45:00 +0000 (11:45 +0000)]
am
e431951e: am
6e27f821: Merge "Opt compiler: ARM64: Fix blocking fp registers."
* commit '
e431951ea5d963eb6072b6a620144023ab09c39a':
Opt compiler: ARM64: Fix blocking fp registers.
Nicolas Geoffray [Mon, 16 Feb 2015 11:39:45 +0000 (11:39 +0000)]
am
6e27f821: Merge "Opt compiler: ARM64: Fix blocking fp registers."
* commit '
6e27f82193a8f54cd8ecdc8fb2c4c1adadafbaf4':
Opt compiler: ARM64: Fix blocking fp registers.
Nicolas Geoffray [Mon, 16 Feb 2015 11:32:47 +0000 (11:32 +0000)]
Merge "Opt compiler: ARM64: Fix blocking fp registers."
Zheng Xu [Sun, 15 Feb 2015 10:39:46 +0000 (18:39 +0800)]
Opt compiler: ARM64: Fix blocking fp registers.
VIXL reserved float point registers has not been blocked correctly.
Change-Id: Ie7131d86bbaff48c431e3e26abd2fa26389ac687
Andreas Gampe [Fri, 13 Feb 2015 23:50:07 +0000 (23:50 +0000)]
am
199c461a: am
e5f5953e: Merge "ART: Rewrite ThreadStress for easier extensibility"
* commit '
199c461a81e6aa861a2b728497992d4898fd38e2':
ART: Rewrite ThreadStress for easier extensibility
Andreas Gampe [Fri, 13 Feb 2015 23:44:19 +0000 (23:44 +0000)]
am
e5f5953e: Merge "ART: Rewrite ThreadStress for easier extensibility"
* commit '
e5f5953e744060fde3b4489cea4d934d529e3e32':
ART: Rewrite ThreadStress for easier extensibility
Andreas Gampe [Fri, 13 Feb 2015 23:40:47 +0000 (23:40 +0000)]
am
0d7e11bd: am
6bf6ce19: Merge "ART: Add more details to LinkageError"
* commit '
0d7e11bd7ee4e2c0b18b7927d9326e5defaface4':
ART: Add more details to LinkageError
Andreas Gampe [Fri, 13 Feb 2015 23:38:25 +0000 (23:38 +0000)]
Merge "ART: Rewrite ThreadStress for easier extensibility"
Andreas Gampe [Fri, 13 Feb 2015 23:34:42 +0000 (23:34 +0000)]
am
6bf6ce19: Merge "ART: Add more details to LinkageError"
* commit '
6bf6ce19df0b165122d5e9a593943e3bfb97ad4d':
ART: Add more details to LinkageError
Andreas Gampe [Wed, 11 Jun 2014 15:20:47 +0000 (08:20 -0700)]
ART: Rewrite ThreadStress for easier extensibility
Change-Id: Ie29918bef048e9ef44877c6c601de113ca38790e
Andreas Gampe [Fri, 13 Feb 2015 23:29:33 +0000 (23:29 +0000)]
Merge "ART: Add more details to LinkageError"
Andreas Gampe [Fri, 13 Feb 2015 23:23:18 +0000 (15:23 -0800)]
ART: Add more details to LinkageError
Add the classes or method details that fail during linking to enable
better diagnosis of problems.
Bug:
19294695
Change-Id: Ifab48bc182cd801d44d3aead2168028f27043be0
Andreas Gampe [Fri, 13 Feb 2015 22:18:54 +0000 (22:18 +0000)]
am
4d56b61a: am
5b2c6ec4: Merge "ART: Allow class-loading during deopt"
* commit '
4d56b61a3e41eed613e3cf2bce5658dd09793db4':
ART: Allow class-loading during deopt
Andreas Gampe [Fri, 13 Feb 2015 22:12:35 +0000 (22:12 +0000)]
am
5b2c6ec4: Merge "ART: Allow class-loading during deopt"
* commit '
5b2c6ec47cb8585c9e15b8baf74809a07b4387a1':
ART: Allow class-loading during deopt
Andreas Gampe [Fri, 13 Feb 2015 22:06:58 +0000 (22:06 +0000)]
Merge "ART: Allow class-loading during deopt"
Andreas Gampe [Tue, 10 Feb 2015 23:37:27 +0000 (15:37 -0800)]
ART: Allow class-loading during deopt
When deoptimizing, we might touch code that uses unloaded classes.
Bug:
19290147
(cherry picked from commit
44fb719e5f0f5ee7dcf4b1eae703593f1043a169)
Change-Id: I5776f08ba366e9742336caba0d6af85f00629afc
Vladimir Marko [Fri, 13 Feb 2015 20:36:53 +0000 (20:36 +0000)]
am
e915b7ab: am
e032d5d4: Merge "Add tests for wide constants in LVN."
* commit '
e915b7ab34c4a7b2d2cc7726e9c3ccf02e59f635':
Add tests for wide constants in LVN.
Vladimir Marko [Fri, 13 Feb 2015 20:30:42 +0000 (20:30 +0000)]
am
e032d5d4: Merge "Add tests for wide constants in LVN."
* commit '
e032d5d40b361066088f3855b1e76bc9a740a826':
Add tests for wide constants in LVN.
Vladimir Marko [Fri, 13 Feb 2015 20:24:50 +0000 (20:24 +0000)]
Merge "Add tests for wide constants in LVN."
Vladimir Marko [Fri, 13 Feb 2015 19:47:13 +0000 (19:47 +0000)]
Add tests for wide constants in LVN.
Follow up to
https://android-review.googlesource.com/132210
Change-Id: I4e29483fb9931ae5670539954b69cdb078843e72
Vladimir Marko [Fri, 13 Feb 2015 18:19:59 +0000 (18:19 +0000)]
am
8762b64b: am
bce88994: Merge "Clean up Scoped-/ArenaAlocator array allocations."
* commit '
8762b64b4e03cb294fceb401049c744f847729c6':
Clean up Scoped-/ArenaAlocator array allocations.
Vladimir Marko [Fri, 13 Feb 2015 18:13:43 +0000 (18:13 +0000)]
am
bce88994: Merge "Clean up Scoped-/ArenaAlocator array allocations."
* commit '
bce889940f10319bf67bdc5630c84dd7f6e5c246':
Clean up Scoped-/ArenaAlocator array allocations.
Vladimir Marko [Fri, 13 Feb 2015 18:09:07 +0000 (18:09 +0000)]
Merge "Clean up Scoped-/ArenaAlocator array allocations."
Nicolas Geoffray [Fri, 13 Feb 2015 15:55:55 +0000 (15:55 +0000)]
am
b50a0ba7: am
58e42c6e: Merge "Optimize double/float immediate loading on arm."
* commit '
b50a0ba7bed846ed7fdb5997cecb26ae54483d74':
Optimize double/float immediate loading on arm.
Nicolas Geoffray [Fri, 13 Feb 2015 15:49:56 +0000 (15:49 +0000)]
am
58e42c6e: Merge "Optimize double/float immediate loading on arm."
* commit '
58e42c6e5571b1d3940561399faf163b9c219b57':
Optimize double/float immediate loading on arm.
Nicolas Geoffray [Fri, 13 Feb 2015 15:46:21 +0000 (15:46 +0000)]
Merge "Optimize double/float immediate loading on arm."
Nicolas Geoffray [Wed, 11 Feb 2015 01:10:39 +0000 (01:10 +0000)]
Optimize double/float immediate loading on arm.
Also reserve a D register for temp.
Change-Id: I6584d9005b0f5685c3afcd8e9153b4c87b56aa8e
Vladimir Marko [Fri, 13 Feb 2015 12:04:44 +0000 (12:04 +0000)]
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cfc3c213: am
94246d41: Merge "LVN handles const-wide/32 incorrectly"
* commit '
cfc3c213fc04c41074175e27f2959ec955ac90e3':
LVN handles const-wide/32 incorrectly
Vladimir Marko [Fri, 13 Feb 2015 11:57:53 +0000 (11:57 +0000)]
am
94246d41: Merge "LVN handles const-wide/32 incorrectly"
* commit '
94246d41c941bb3b04896a5e5beb4458fe528acf':
LVN handles const-wide/32 incorrectly
Vladimir Marko [Fri, 13 Feb 2015 11:53:08 +0000 (11:53 +0000)]
Merge "LVN handles const-wide/32 incorrectly"
Vladimir Marko [Fri, 13 Feb 2015 10:28:29 +0000 (10:28 +0000)]
Clean up Scoped-/ArenaAlocator array allocations.
Change-Id: Id718f8a4450adf1608306286fa4e6b9194022532
Serguei Katkov [Fri, 6 Feb 2015 11:15:36 +0000 (17:15 +0600)]
LVN handles const-wide/32 incorrectly
Redundant shift to 16 bit should be eliminated otherwise any
32 bit shift of 32 bit constant will result in 0.
Change-Id: I4969b54357bc2d9a836e89dd7919199fff966684
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Nicolas Geoffray [Fri, 13 Feb 2015 05:56:46 +0000 (05:56 +0000)]
am
280d1d54: am
8240a8af: Merge "Support hints for register pairs."
* commit '
280d1d54954068502adf38e8b5fd6dc51b085f5d':
Support hints for register pairs.