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8 years agoASoC: soc-core: change debug level for debugfs fail message
Banajit Goswami [Wed, 15 Jul 2015 22:36:49 +0000 (15:36 -0700)]
ASoC: soc-core: change debug level for debugfs fail message

Debugfs directory creation failure are not critical error.
However, the failure messages might be misleading and might
be interpreted as geniune failure in ASoC functionality.
Mark the failure messages as debug level.

Change-Id: Id61c81753d493b6508cbe87c59077adda4675ada
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
8 years agoclk: msm: osm: initialize PLL test control register
Osvaldo Banuelos [Wed, 27 Apr 2016 17:24:56 +0000 (10:24 -0700)]
clk: msm: osm: initialize PLL test control register

Program the PLL test control register for the power
cluster clock in agreement with hardware guidelines.

Change-Id: I102fd544ea0571d31d2ef9232195d4adbddda6d7
CRs-Fixed: 1009203
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
8 years agomsm: mdss: dsi: fix configuration for mode selection GPIO
Aravind Venkateswaran [Wed, 11 May 2016 21:38:13 +0000 (14:38 -0700)]
msm: mdss: dsi: fix configuration for mode selection GPIO

Configure the mode selection GPIO as direction output in order to
correctly configure the panel operating mode.

Change-Id: Ic79850674c42f3c59512467dbb608942b98cf74a
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
8 years agomsm: mdss: fix qseed3 op_mode register programming
Abhijit Kulkarni [Thu, 5 May 2016 18:45:43 +0000 (11:45 -0700)]
msm: mdss: fix qseed3 op_mode register programming

Initialize the op_mode register and program the direction_enable
field in this register correctly

CRs-Fixed: 1008505
Change-Id: I2dbcb8eb1ef5c6e0ebcbfb9f298a14344fbe7ce3
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
8 years agodefconfig: arm64: msmcortex: Enable VADC_HC and BTM driver
Siddartha Mohanadoss [Wed, 11 May 2016 19:21:21 +0000 (12:21 -0700)]
defconfig: arm64: msmcortex: Enable VADC_HC and BTM driver

Enable VADC_HC and BTM peripheral driver on PMcobalt
to support reading and setting thresholds on ADC
channel such as voltage phone power(vph_pwr) and
thermistors.

Change-Id: I783d87714145f58fefc9e1e6a09d1ecfab56744b
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
8 years agoregmap: improve debugfs interface to dump specific addresses
Abhijeet Dharmapurikar [Thu, 21 Jan 2016 18:58:22 +0000 (10:58 -0800)]
regmap: improve debugfs interface to dump specific addresses

The current method of cat-ing register file dumps the entire
address space. One can use dd command to dump a subrange within
the address space. However one needs to know the string length
of each line which is derived from max address, the character
length of each register entry and the format.

Provide simple means to dump a range by allowing user to specify
the start address and the count of registers. When the data is read
convert the dump address to a starting position in the file. Similarly
if the file offset goes beyond the dump range return 0 to indicate
that the data is already dumped.

Also provide means to write to a register address.

CRs-Fixed: 1001770
Change-Id: I3466ce89007d127151f6760328edad116d679db8
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
8 years agoslim: ngd: retention support in power-collapse
Sagar Dharia [Tue, 12 Apr 2016 20:14:33 +0000 (14:14 -0600)]
slim: ngd: retention support in power-collapse

Support retention by checking interrupt status rather than logical
address register. During retention, interrupt status is zero'ed but
logical address may be retained to avoid report-present generation.

Change-Id: I9e7f24c5f4eb722643bf3fac2d5c898ad107dd24
Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
8 years ago[media] v4l: Update v4l2 32bit structures
Arun Menon [Wed, 5 Feb 2014 21:44:21 +0000 (13:44 -0800)]
[media] v4l: Update v4l2 32bit structures

Update v4l2_event32 structure with updated elements
from v4l2_event structure. Also copy and update
reserved and other fields during 32 bit ioctl handling.

CRs-Fixed: 1013345
Change-Id: I3038a2c0c7f2b7f13c412dc04890744d8dbe37ee
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
8 years agodefconfig: arm64: enable Coresight drivers for msmcobalt
Shashank Mittal [Thu, 21 Apr 2016 16:41:27 +0000 (09:41 -0700)]
defconfig: arm64: enable Coresight drivers for msmcobalt

Enable Coresight drivers for msmcoblt. These devices can be used to
configure and enable trace functionality on msmcobalt.

Change-Id: Ib4b50d7df15114d417898c36b229441766bd5b42
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
8 years agomsm: kgsl: Add property to determine GPU bitness
Sunil Khatri [Fri, 29 Apr 2016 15:29:46 +0000 (09:29 -0600)]
msm: kgsl: Add property to determine GPU bitness

Add the property to determine GPU bitness which
is used by the clients via KGSL ioctl.

Certain clients of KGSL such as Open-CL driver
need to know explicitly about the GPU mode.

Change-Id: I77523d7816edb9776014aaf3aa85321af0d20aaf
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
8 years agomsm: kgsl: Use the crash dumper to read HLSQ/shader memory on 5XX
Jordan Crouse [Fri, 29 Apr 2016 15:29:27 +0000 (09:29 -0600)]
msm: kgsl: Use the crash dumper to read HLSQ/shader memory on 5XX

The host AHB aperture for reading the HSLQ/SP/TP and shader memory
blocks might be blocked on A5XX targets so use the CP crash dump
utility to read them instead.  Downside if the crashdumper goes boom
we'll have to skip those registers in the fallback.

Change-Id: Ic0dedbad3c7b485c696198bdfcb78d45e929ec22
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
8 years agomsm: kgsl: Add effuses read capabilities for A505 GPU
Hareesh Gundu [Fri, 29 Apr 2016 15:29:15 +0000 (09:29 -0600)]
msm: kgsl: Add effuses read capabilities for A505 GPU

A505 GPU is having two different frequency plans, for
loading a specific frequency plan add speed bin read
information capability to A505.

Change-Id: I259020d7e4613d043e213ab2cb41e80ceb11f46a
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
8 years agomsm: kgsl: Do not allocate memory for profiling and sync commands
Sunil Khatri [Fri, 29 Apr 2016 15:28:51 +0000 (09:28 -0600)]
msm: kgsl: Do not allocate memory for profiling and sync commands

Do not allocate memory for IB descriptors for commands
of types profiling buffers, sync and markers.

This fixes the memory leak due to allocation of
memory for such commands and these were never freed.

CRs-Fixed: 996651
Change-Id: Ib168d60ad89e0fd55cd1f10b773b7cdaa7400ace
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
8 years agomsm: kgsl: Add 1M and 8K pools to the allocator
Shrenuj Bansal [Fri, 29 Apr 2016 15:28:02 +0000 (09:28 -0600)]
msm: kgsl: Add 1M and 8K pools to the allocator

This change includes the below:
- Add 1M and 8k pools and structure the allocator to use all pools
from the largest page to the smallest
- Reserve a set number of pages for each of these pools at init time
- When allocating, use the reserved pools and then fall back to
allocating from system memory using only 8k and 4k pages
- Remove maximums on the pool sizes
- Zero the memory when we create the pool initially and add pages
back to the pool on free

CRs-Fixed: 995735
Change-Id: I9440bad62d3e13b434902f167c9d23467b1c4235
Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>
8 years agomsm: ipa: Fix to polling mode
Sridhar Ancha [Fri, 29 Apr 2016 13:31:03 +0000 (19:01 +0530)]
msm: ipa: Fix to polling mode

When IPA clock is enabled, suspend bit is cleared
and if pipe is non-empty EOT is posted internally.
At the same time, there is a possibility that SPS
driver posts EOT. This can result into incorrect
state of polling state and switch to intr mode is
tried repeatedly. Make a change to check if we are
in intr mode already in addition to the polling state.

Change-Id: I1af08605f7d2d234b0e5a4e3c8928db6cff5c7b4
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
8 years agoleds: leds-qpnp-flash-v2: create v2 QPNP flash LED driver
Chun Zhang [Tue, 1 Mar 2016 10:34:54 +0000 (02:34 -0800)]
leds: leds-qpnp-flash-v2: create v2 QPNP flash LED driver

There is a new Qualcomm Technology Inc. Plug-n-play(QPNP) PMIC chip,
which introduces brand new flash LED hardware. The new hardware
comes with up to 3 LEDs support, different register mapping layout,
and different torch enablement requirement. Therefore, a new driver
is introduced to cover this need.

Change-Id: Ic878f1a946955edff3a9228e7fe54b7a525e37b1
Signed-off-by: Chun Zhang <chunz@codeaurora.org>
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
8 years agoARM: dts: msm: Clock fixes and Secure context banks for msmcobalt
Chinmay Sawarkar [Wed, 20 Apr 2016 03:49:58 +0000 (20:49 -0700)]
ARM: dts: msm: Clock fixes and Secure context banks for msmcobalt

Update the Venus clock frequency for different Venus load. There
were kernel panic as the BIMC clocks were OFF. Add the bimc_smmu
gdsc to turn ON the BIMC clocks. Add secure context banks.

Change-Id: I120ce95ea20434b41ac88a5d686b994630516435
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
8 years agodefconfig: msm: enable rndis_ipa on cobalt
Skylar Chang [Thu, 5 May 2016 06:16:41 +0000 (23:16 -0700)]
defconfig: msm: enable rndis_ipa on cobalt

enable rndis_ipa on cobalt build to support
IPA-offload data path.

Change-Id: I98c462b56dbe01930456a16d5eeb6646b0a2db83
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
8 years agoARM: dts: msm: update touch screen resolution
Mohan Pallaka [Fri, 6 May 2016 00:05:04 +0000 (17:05 -0700)]
ARM: dts: msm: update touch screen resolution

Change the touch screen to match WQHD display

Change-Id: Ia0b77f23b26941ea2a53451ae61c46aa0ada731c
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
8 years agoslimbus: Add API to get matching ID table
Phani Kumar Uppalapati [Wed, 4 May 2016 17:33:42 +0000 (10:33 -0700)]
slimbus: Add API to get matching ID table

Add API in slimbus driver for clients to get the
matching ID table which helps in accessing driver
data and name fields.

CRs-fixed: 975738
Change-Id: I09c9f1de74e348b032d215cbb0fb9ba6c7aecf18
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
8 years agousb: gadget: f_gsi: Call ipa_usb_init_teth_prot() from gsi_bind
Hemant Kumar [Thu, 5 May 2016 04:23:59 +0000 (21:23 -0700)]
usb: gadget: f_gsi: Call ipa_usb_init_teth_prot() from gsi_bind

Currently ipa_usb_init_teth_prot() is called before gsi_bind()
gets called as a result of usb_add_function() call. gsi_bind()
is polulating ipa_init_params which is passed to
ipa_usb_init_teth_prot(). Since usb_add_function() is getting
called later after gsi_bind_config() returns, ipa_init_params
remains unpopulated and results into ipa_usb_init_teth_prot()
returning failure. Fix this issue by moving the call to
gsi_bind(). This also matches to ipa_usb_deinit_teth_prot()
call in gsi_unbind().

CRs-Fixed: 1013830
Change-Id: I824d3fa62e2736962680ae1c883b9a2916346331
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
8 years agousb: dwc3: Fix dep name handling upon ep disable
Hemant Kumar [Tue, 10 May 2016 22:23:00 +0000 (15:23 -0700)]
usb: dwc3: Fix dep name handling upon ep disable

dep name needs to be updated only for non-gsi endpoints
since gsi endpoints are statically assigned. Due to merge
from previous kernel dep name is updated twice upon ep
disable. This is causing gsi ep names to get modified
resulting into failure in finding the original gsi ep name
upon function bind. Hence update the dep name only once
at the end of ep disable and skip it for gsi eps.

CRs-Fixed: 1013830
Change-Id: Iea9282cc8fb4f13d066d25c63ccb1da1881c0a8a
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
8 years agousb: gadget: f_gsi: Use gsi ep ops to disable endpoint
Hemant Kumar [Tue, 10 May 2016 22:16:51 +0000 (15:16 -0700)]
usb: gadget: f_gsi: Use gsi ep ops to disable endpoint

gsi driver does not call the gadget API usb_ep_enable()
instead uses gsi ep operation call back to enable gsi ep.
As a result ep->enabled flag remains clear. Later function
driver calls usb_ep_disble() API from gadget framework and
ep disable operation gets skipped. This causes start transfer
command to fail next time when gsi ep gets enabled. Fix this
issue by calling gsi ep disable operation instead of calling
gadget API.

CRs-Fixed: 1013830
Change-Id: I06570dec368b430321ec196a5e4338f657c43b42
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
8 years agousb: dwc3: Add support for gsi endpoint disable operation
Hemant Kumar [Tue, 10 May 2016 22:01:44 +0000 (15:01 -0700)]
usb: dwc3: Add support for gsi endpoint disable operation

gsi driver does not call the gadget API usb_ep_enable()
instead uses gsi ep operation call back to enable gsi ep.
As a result ep->enabled flag remains clear. Later function
driver calls usb_ep_disble() API from gadget framework and
ep disable operation gets skipped. Fix this by adding gsi ep
operation for ep disable. This makes the enable and
disable ep operations both handled by gsi ep ops.

CRs-Fixed: 1013830
Change-Id: I5caa9a839b9fdd144af0a59a7c605777f7a3a659
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
8 years agousb: gadget: rndis: Add packet filter handling for hw accelerated path
Hemant Kumar [Tue, 10 May 2016 21:11:27 +0000 (14:11 -0700)]
usb: gadget: rndis: Add packet filter handling for hw accelerated path

Call flow control API when RNDIS packet filter control message is
received. This allows to call the registered flow control call back
from rndis clients supporting hw accelerated path.

CRs-Fixed: 1013824
Change-Id: I87793e31d4db10acf1103127a2d1ad942d253c67
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
8 years agousb: gadget: composite: Handle OS descriptor request properly
Hemant Kumar [Thu, 5 May 2016 02:30:23 +0000 (19:30 -0700)]
usb: gadget: composite: Handle OS descriptor request properly

In case w_index or w_value of an OS descriptor does not match
for a device or an interface, value remains set to -EOPNOTSUPP.
This is assigned to an unsigned request length and becomes a
large integer value. When driver tries to allocate a buffer
of this large integer value DMA allocator complaints for out of
SW-IOMMU space. Hence check this variable for negative value and
return without queuing ep0 request.

CRs-Fixed: 1013316
Change-Id: I705d0d54fb17ca3042533f0106f91912215bd52a
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
8 years agousb: gadget: composite: Fix double free memory bug
Hemant Kumar [Thu, 5 May 2016 01:22:14 +0000 (18:22 -0700)]
usb: gadget: composite: Fix double free memory bug

configfs_dev_cleanup function can double free os_desc
and buffer when called from different context. For
example, this can be called from composite_unbind() and
when composite_bind() fails. Fix this issue by setting
request and buffer pointer to NULL after kfree.

CRs-Fixed: 1013316
Change-Id: I6e87289627b23fc368f990fc7962854eeb3fbbc1
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
8 years agoclk: msm: clock-gcc-cobalt: Update the FMAXes for hmss_gpll0_clk_src
Deepak Katragadda [Mon, 9 May 2016 22:18:33 +0000 (15:18 -0700)]
clk: msm: clock-gcc-cobalt: Update the FMAXes for hmss_gpll0_clk_src

The hmss_gpll0_clk_src RCG only needs an SVS2 vote on CX
to run. Update the FMAXes in the linux clock driver.

CRs-Fixed: 1013237
Change-Id: I31aaeb7cf965bfbee4aa219936d8e298899b61a8
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
8 years agoregulator: cpr3-regulator: unregister CPR IRQ affinity notifier correctly
David Collins [Thu, 14 Apr 2016 19:04:31 +0000 (12:04 -0700)]
regulator: cpr3-regulator: unregister CPR IRQ affinity notifier correctly

Commit b7d5b597f16a ("regulator: cpr3-regulator: add support for
configuring CPR IRQ affinity") added a call to
register_hotcpu_notifier() but did not add a call to
unregister_hotcpu_notifier().  Correct this so that the IRQ
affinity notifier is unregistered when a cpr3-regulator device
is unregistered.

Change-Id: I6379559e201f14a0fd46c1e06761fae356ec9813
CRs-Fixed: 949650
Signed-off-by: David Collins <collinsd@codeaurora.org>
8 years agoregulator: cpr3-mmss-regulator: add support for msmcobalt partial binning
David Collins [Wed, 27 Apr 2016 00:33:50 +0000 (17:33 -0700)]
regulator: cpr3-mmss-regulator: add support for msmcobalt partial binning

Add support for the partial binning open-loop voltage fuse values
used on MSMCOBALT chips.  Raise the voltage applied for lower
corners when specified by the fuse values in order to ensure
stability.

Change-Id: Ia3f95778d0dab1be9d15fa95d1fc5624606689ec
CRs-Fixed: 1009279
Signed-off-by: David Collins <collinsd@codeaurora.org>
8 years agoicnss: Add support to configure voltage regulator
Hardik Kantilal Patel [Thu, 25 Feb 2016 04:05:46 +0000 (09:35 +0530)]
icnss: Add support to configure voltage regulator

Add voltage regulator support to power the WLAN hardware.

CRs-Fixed: 982993
Change-Id: Ic36ac920497d05131ef8162a42ee5318600a3473
Signed-off-by: Hardik Kantilal Patel <hkpatel@codeaurora.org>
8 years agomsm: mdss: Properly free memory in error case
Ping Li [Thu, 21 Apr 2016 00:09:36 +0000 (17:09 -0700)]
msm: mdss: Properly free memory in error case

Free previously allocated memory in error return cases to avoid
memory leak.

CRs-Fixed: 1005989
Change-Id: I9676eb2c75e7be42b1b1901194ba5c2a206dbeb3
Signed-off-by: Ping Li <pingli@codeaurora.org>
8 years agomsm: mdss: Add NULL check before de-allocating framebuffer
Ping Li [Fri, 15 Apr 2016 23:54:21 +0000 (16:54 -0700)]
msm: mdss: Add NULL check before de-allocating framebuffer

Add NULL check before de-allocating framebuffer to avoid NULL
pointer de-reference.

CRs-Fixed: 1003106
Change-Id: I0f3c44671d3ca1b665e91ad314513bb743f23d3c
Signed-off-by: Ping Li <pingli@codeaurora.org>
8 years agomsm: mdss: Fix memory leak in panel_debugfs_create_array func
Ping Li [Fri, 29 Apr 2016 21:42:46 +0000 (14:42 -0700)]
msm: mdss: Fix memory leak in panel_debugfs_create_array func

Fix the potential memory leak in panel_debugfs_create_array func
by freeing the allocated memory in error return case.

CRs-Fixed: 1005536
Change-Id: If2bf7dbe7caedfa42337639fea739974f99960b4
Signed-off-by: Ping Li <pingli@codeaurora.org>
8 years agoARM: dts: msm: Add Synaptics regulator voltage and current for msm8996
Alex Sarraf [Tue, 3 May 2016 00:42:18 +0000 (17:42 -0700)]
ARM: dts: msm: Add Synaptics regulator voltage and current for msm8996

Add voltage and current specs for regulators for the
Synaptics driver.

Change-Id: I94c7d5b20fc73ba49b0c8613297f0514fedb3d97
Signed-off-by: Alex Sarraf <asarraf@codeaurora.org>
8 years agomsm: mdss: Properly set the PP feature cfg_payload in layers
Ping Li [Wed, 20 Apr 2016 01:52:10 +0000 (18:52 -0700)]
msm: mdss: Properly set the PP feature cfg_payload in layers

Set the PP feature cfg_payload properly to avoid invalid pointer
cases.

CRs-Fixed: 1004933
Change-Id: I44314b49a6ebb5dedfdedfcddd88c12eabd1f125
Signed-off-by: Ping Li <pingli@codeaurora.org>
8 years agomsm: mdss: Correct block id check for mdss_mdp_misr_table
Ping Li [Fri, 15 Apr 2016 22:27:36 +0000 (15:27 -0700)]
msm: mdss: Correct block id check for mdss_mdp_misr_table

DISPLAY_MISR_LCDC block doesn't have corresponding mdss_mdp_misr_table,
this change corrects the block id check for mdss_mdp_misr_table.

CRs-Fixed: 1001224
Change-Id: I74b03c31542d4b239eb2ffdc4dc6345dff5eab86
Signed-off-by: Ping Li <pingli@codeaurora.org>
8 years agomsm: sde: Correct rotator chroma alignment for nv12 ubwc
Alan Kwong [Tue, 10 May 2016 01:07:43 +0000 (21:07 -0400)]
msm: sde: Correct rotator chroma alignment for nv12 ubwc

Correct rotator chroma alignment to 128 byte for nv12 ubwc format.  Chroma
block artifacts are seen without this correction.

CRs-Fixed: 1013358
Change-Id: I715094188dc2b61c04879f8f6ce7b2c8f2d815c5
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
8 years agoARM: dts: msm: Add apps port entries for audio slimbus on msmcobalt
Sagar Dharia [Fri, 29 Apr 2016 22:40:32 +0000 (16:40 -0600)]
ARM: dts: msm: Add apps port entries for audio slimbus on msmcobalt

Add apps side data port entries for audio slimbus instance based
on audio usecases.

CRs-Fixed: 1003083
Change-Id: I4fd83519ab75a1d979573b63761676f7c99593d4
Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
8 years agoARM: dts: msm: Add PD PHY peripheral to pmicobalt
Jack Pham [Fri, 1 Apr 2016 01:50:53 +0000 (18:50 -0700)]
ARM: dts: msm: Add PD PHY peripheral to pmicobalt

Add device node for the USB PD PHY peripheral found in PMICOBALT.
Reference this from the USB3 node as its extcon device as it
provides notifications of cable insertion/removal.

Change-Id: I42916b13e5d28dd3f3b0ed40c53767cbd7ae32b1
Signed-off-by: Jack Pham <jackp@codeaurora.org>
8 years agodefconfig: msmcortex: Enable USB PD drivers
Jack Pham [Fri, 1 Apr 2016 01:53:02 +0000 (18:53 -0700)]
defconfig: msmcortex: Enable USB PD drivers

Enable USB_PD_POLICY and QPNP_USB_PDPHY drivers which
support USB Power Delivery.

Change-Id: I44a385af5c68b0bf656fc705a07251850fb38fde
Signed-off-by: Jack Pham <jackp@codeaurora.org>
8 years agousb: pd: Add sysfs entries
Jack Pham [Fri, 4 Mar 2016 23:48:37 +0000 (15:48 -0800)]
usb: pd: Add sysfs entries

Add sysfs attributes that will live under /sys/class/usbpd/usbpd0
which will give state information such as:

   - received PDOs from the peer source
   - whether an explicit contract is established
   - selecting a new PDO (thereby sending a Request message)
   - current and supported power, data roles

Change-Id: I5c3cf9a0239c0274709a1771e4fda8c6f5baaa77
Signed-off-by: Jack Pham <jackp@codeaurora.org>
8 years agousb: pd: Add Protocol layer and Policy Engine
Jack Pham [Fri, 19 Feb 2016 21:04:37 +0000 (13:04 -0800)]
usb: pd: Add Protocol layer and Policy Engine

This change adds protocol layer handling as well as the
policy engine state machine.

Change-Id: I5323f82192960d1fd7d3a20baf040d6d80c06be5
Signed-off-by: Jack Pham <jackp@codeaurora.org>
8 years agousb: pd: Add QPNP Power Delivery PHY driver
Hemant Kumar [Mon, 29 Feb 2016 20:01:27 +0000 (12:01 -0800)]
usb: pd: Add QPNP Power Delivery PHY driver

The QPNP PD PHY resides in the PMIC and handles USB Power Delivery
data transmission and reception over the CC lines. This driver
communicates to this device over SPMI or I2C buses. Introduce APIs
that upper layers will use to implement the protocol layer and
policy engine.

Change-Id: I75dec23c297fd5e07d14741e6627b473012b7a01
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Signed-off-by: Jack Pham <jackp@codeaurora.org>
8 years agousb: pd: Add initial support for USB Power Delivery
Jack Pham [Thu, 17 Mar 2016 07:27:10 +0000 (00:27 -0700)]
usb: pd: Add initial support for USB Power Delivery

Add PD policy engine driver. This driver will interact
with the charger/Type-C module via power_supply framework,
and in turn notify the USB controller on when to begin/end
data operation using extcon. For this initial patch this
driver is simply acting as a pass-through between Type-C
connection states and relaying them as USB/USB_HOST
notifications.

Change-Id: Ieba8e68761beef83a572b75b6b5f3b7ab7802e9e
Signed-off-by: Jack Pham <jackp@codeaurora.org>
8 years agodefconfig: arm64: msmcortex: enable QPNP_SMB2 support for msmcobalt
Nicholas Troast [Fri, 8 Apr 2016 21:20:53 +0000 (14:20 -0700)]
defconfig: arm64: msmcortex: enable QPNP_SMB2 support for msmcobalt

Enable QPNP_SMB2 device support for the msmcobalt platform.

CRs-Fixed: 1005389
Change-Id: I0ecabc0febd38ad55cee69bb415a0856a3e83a73
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
8 years agoARM: dts: msm: add VBUS and VCONN regulators for msmcobalt
Harry Yang [Thu, 7 Apr 2016 01:26:53 +0000 (18:26 -0700)]
ARM: dts: msm: add VBUS and VCONN regulators for msmcobalt

QPNP SMB2 charger controls enabling VBUS and VCONN regulators.

- VBUS is used to support OTG connected devices
- VCONN is used to support Type-C powered cables

Add regulator devices for VBUS and VCONN.

CRs-Fixed: 1005389
Change-Id: Ia8dd2d6c8d51765dc49bdfa15565aed09c6a3893
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
8 years agoARM: dts: msm: add QPNP SMB2 charger device to PMICOBALT
Nicholas Troast [Fri, 8 Apr 2016 21:00:24 +0000 (14:00 -0700)]
ARM: dts: msm: add QPNP SMB2 charger device to PMICOBALT

Add the QPNP SMB2 charger device that is present in PMICOBALT.

CRs-Fixed: 1005389
Change-Id: I03be96c229095b666d8e1a84c718989d84ec506e
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
8 years agoqcom-charger: introduce QPNP SMB2 charger driver
Nicholas Troast [Thu, 25 Feb 2016 23:42:17 +0000 (15:42 -0800)]
qcom-charger: introduce QPNP SMB2 charger driver

The QPNP SMB2 charger driver supports the charger peripheral present in
the PMICOBALT chip.

This charger peripheral is common among other chips, therefore the
driver uses the smb library to support all common functionality.

Register access is provided by the parent device via regmap. Interrupts
are controlled by the parent device, and handlers are registered by the
QPNP SMB2 charger driver.

The power supply framework is used to communicate battery and usb
properties to userspace and other driver consumers such as fuel gauge,
USB, and USB-PD.

VBUS and VCONN regulators are registered for supporting OTG, and powered
Type-C cables respectively.

CRs-Fixed: 1005389
Change-Id: I160ce3c8caae6999f52590099cf6d1de957dbbaf
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Harry Yang <harryy@codeaurora.org>
8 years agoqcom-charger: introduce SMB charger library
Nicholas Troast [Mon, 28 Mar 2016 19:26:44 +0000 (12:26 -0700)]
qcom-charger: introduce SMB charger library

A library of common structures and functions that should be used by all
charger drivers that support an SMB charger peripheral.

The library includes high level register read/write access, interrupt
handlers, voter callbacks, and power supply property getters. It should be
extended with any functionality that can be leveraged by an SMB charger
peripheral.

All drivers that support an SMB charger peripheral should define their own
struct smb_charger to interface with the library.

CRs-Fixed: 1005389
Change-Id: I36796332af667874c1246ec35984122d45de6938
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Harry Yang <harryy@codeaurora.org>
8 years agoqcom-charger: pmic-voter: allow NULL callbacks
Nicholas Troast [Thu, 5 May 2016 17:59:01 +0000 (10:59 -0700)]
qcom-charger: pmic-voter: allow NULL callbacks

Consumers may not want to specify a callback, especially for boolean
votables which only care about the state of the client votes rather than
reacting to a change in the effective result.

CRs-Fixed: 1005389
Change-Id: I72274126a382ef8e32d89e1e8aa98348aaaac420
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
8 years agoandroid: binder: Don't use sched_preempt_enable_no_resched.
Riley Andrews [Wed, 2 Sep 2015 03:31:12 +0000 (20:31 -0700)]
android: binder: Don't use sched_preempt_enable_no_resched.

The correct function is prempt_enable_no_resched(). The other
function is reserved for the scheduler core.

Change-Id: Ib36697de003f6a59a608a0024d5351dc15ff8715
Signed-off-by: Todd Kjos <tkjos@google.com>
Git-commit: 776e5bca6446b3aac03b4685b4f4f72446ddcba0
Git-repo: https://android.googlesource.com/kernel/msm
[odhyade@codeaurora.org: resolve trivial merge conflicts]
Signed-off-by: Omprakash Dhyade <odhyade@codeaurora.org>
8 years agoandroid: binder: Use wake up hint for synchronous transactions.
Riley Andrews [Tue, 1 Sep 2015 19:42:07 +0000 (12:42 -0700)]
android: binder: Use wake up hint for synchronous transactions.

Use wake_up_interruptible_sync() to hint to the scheduler binder
transactions are synchronous wakeups. Disable premption while waking
to avoid ping-ponging on the binder lock.

Change-Id: Ic406a232d0873662f80148e37acefe5243d912a0
Signed-off-by: Todd Kjos <tkjos@google.com>
Git-commit: 443c026e90820170aa3db2c21d2933ae5922f900
Git-repo: https://android.googlesource.com/kernel/msm
Signed-off-by: Omprakash Dhyade <odhyade@codeaurora.org>
8 years agosoc: qcom: glink: Fix ssr race condition in glink_close
Chris Lew [Sat, 30 Apr 2016 23:11:26 +0000 (16:11 -0700)]
soc: qcom: glink: Fix ssr race condition in glink_close

Add else statement in glink_close for a race condition where the
xprt state is set to GLINK_XPRT_DOWN and glink_close runs before
the channel is migrated.

CRs-Fixed: 988266
Change-Id: I4de6530f1fbffd9f3acd1fa539cf756364ea32ac
Signed-off-by: Chris Lew <clew@codeaurora.org>
8 years agoicnss: Update icnss logs
Yuanyuan Liu [Sat, 7 May 2016 00:12:04 +0000 (17:12 -0700)]
icnss: Update icnss logs

Enable important kernel logs which are essential for cold boot debug.
Remove unnecessary log for normal behavior.

CRs-Fixed: 1013082
Change-Id: I5234f0511fa1c81072e740386e90e07f5e813dd0
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
8 years agoregulator: labibb: fix standalone mode configuration
Subbaraman Narayanamurthy [Fri, 1 Apr 2016 02:43:09 +0000 (19:43 -0700)]
regulator: labibb: fix standalone mode configuration

Currently, standalone mode is treated as a mode along with other
modes, LCD and AMOLED. Rather than keeping it like that, LCD and
AMOLED mode configurations should be allowed along with the way
LAB and IBB modules are controlled, i.e. standalone or dual.

Remove the standalone mode from the list of modes and keep it as
a configurable parameter via device tree. This way, LCD and
AMOLED modes can be configured along with the way LAB/IBB needs
to be controlled (dual or standalone).

Add support for parent supply to LABIBB device so that LAB and
IBB regulators can vote for MBG when operating in standalone
mode.

CRs-Fixed: 996961
Change-Id: I56882e3a5a01b017e1ba9cd63ab36933a3d469e7
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
8 years agoRevert "regulator: labibb: avail of simpler regulator registration api"
Subbaraman Narayanamurthy [Tue, 26 Apr 2016 02:02:49 +0000 (19:02 -0700)]
Revert "regulator: labibb: avail of simpler regulator registration api"

This reverts commit 0324b74b3953 ("regulator: labibb: avail of
simpler regulator registration api").

LABIBB regulator driver still needs to obtain init_data from
the device tree not just for the regulator name but it is for
a subsequent change which will pass the parent supply name via
init_data to register with the regulator framework. Hence bring
it back.

Since of_get_regulator_init_data() is brought back, we need to
pass rdesc to that function as the number of arguments got
changed.

CRs-Fixed: 1008400
Change-Id: I027a9ddbbbf6ff0ba7886151e5336d190ac3ce25
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
8 years agoregulator: qpnp-labibb: Add logic to skip second SWIRE command
Anirudh Ghayal [Tue, 1 Mar 2016 10:58:56 +0000 (16:28 +0530)]
regulator: qpnp-labibb: Add logic to skip second SWIRE command

On newer AMOLED panels the second SWIRE command is expected to
control the AVDD voltage. However, the PMI8950/PMI8994 IBB module
interprets this command for VDISN and incorrectly reduces its voltage.

Add DT properties 'qcom,skip-2nd-swire-cmd' to skip the second
SWIRE command and 'qcom,swire-2nd-cmd-delay' to explicitly specify
the delay between the first and second SWIRE command.

CRs-Fixed: 938038
Change-Id: I617a8490784efd760651b3ec8780cc4fd4b17bae
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
8 years agomsm: ipa3: Send limited chained descriptors to IPA
Ghanim Fodi [Thu, 5 May 2016 23:43:26 +0000 (16:43 -0700)]
msm: ipa3: Send limited chained descriptors to IPA

As part of SSR IPA driver code, Filtering and Routing Q6 tables
are being cleaned by pointing to empty tables.
This is done via DMA_SHARED_MEM IPA immediate command to change
SRAM tables pointers. Today code send one command per tables, but
all are chained in single transaction. This will hit the chain
size limitation defined by GSI IPA_IF TLV size.
Change the code to send the commands in smaller chains.

CRs-Fixed: 1012322
Change-Id: I03e9e92c2e01d1fece7e13dd412ea6128210f1fb
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
8 years agoARM: dts: msm: Add VADC_HC and BTM channels for msmcobalt
Siddartha Mohanadoss [Thu, 28 Apr 2016 21:58:56 +0000 (14:58 -0700)]
ARM: dts: msm: Add VADC_HC and BTM channels for msmcobalt

Clients of VADC_HC and BTM include reading voltage phone
power, system thermistors for thermal mitigation such as
msm_therm, case_therm, XO therm. Add the supported VADC
and BTM channels for the msmcobalt platforms.

Change-Id: I87d0b7c8280a57b88a9b9e7c6a2710e4694a2c0b
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
8 years agomsm: mdss: enable additonal clocks
Abhijit Kulkarni [Tue, 12 Apr 2016 22:48:52 +0000 (15:48 -0700)]
msm: mdss: enable additonal clocks

Need to enable clk_mmss_mnoc_ahb_clk before turning on the ahb_clk,
as there is a core fsm dependency between these clocks.

CRs-Fixed: 1008505
Change-Id: I9c87fee27c6a6ef875100c9fc1b9d0cb7c14a2b5
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
8 years agothermal: qpnp-adc-tm: Support refreshed BTM driver
Siddartha Mohanadoss [Thu, 28 Apr 2016 21:12:44 +0000 (14:12 -0700)]
thermal: qpnp-adc-tm: Support refreshed BTM driver

The BTM (Battery temperature module) peripheral driver
on the PMIC (Power management IC) supports threshold
monitoring and notifies clients when thresholds are crossed.
PMCOBALT supports refreshed BTM peripheral register interface
and the driver uses compatible property qpnp-adc-tm-hc to
distinguish using the refreshed peripheral. The external
client interface with the driver remains the same. Updates
include handling the interrupt when the thresholds are
crossed,programming the threholds and configuring
the hardware based on the refreshed design.

BTM peripheral needs the VADC_HC peripheral to compute the
gain/offset that are used to reverse compute the threhold
values to ADC code. Some of the reverse computation API's
such as calculating thermistor thresholds require the
gain and offset values before computing the ADC code to
be programmed. This requires modification to the existing
calibration API in the VADC_HC driver to calculate
the reference calibration points and store these values
for clients to use in the reverse computation

Change-Id: I989cfa4f40e7f1671f04dfa9d4c3fe2ccbbc44ab
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
8 years agoARM: dts: msm: Add clocks MNOC AHB/AXI for smmu
Abhijit Kulkarni [Wed, 13 Apr 2016 00:12:55 +0000 (17:12 -0700)]
ARM: dts: msm: Add clocks MNOC AHB/AXI for smmu

Add additional required clocks mdss device tree to enable
mmss smmu functionality.

Change-Id: I09a7268861663761df716dd18f07069f6b1152ce
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
8 years agoARM: dts: msm: Add VBIF/Hysteresis support for mdss
Abhijit Kulkarni [Tue, 12 Apr 2016 22:46:39 +0000 (15:46 -0700)]
ARM: dts: msm: Add VBIF/Hysteresis support for mdss

VBIF/Hysteresis registers have to be setup for mdss module
of msmcobalt. Add default values in the device tree.

Change-Id: I4f106a39529f5e77591431bc3b4883a16d7b37f1
Signed-off-by: Sushil Chauhan <sushilchauhan@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
8 years agospmi-pmic-arb: check apid enabled before calling the handler
Abhijeet Dharmapurikar [Thu, 28 Apr 2016 03:39:46 +0000 (20:39 -0700)]
spmi-pmic-arb: check apid enabled before calling the handler

The driver currently invokes the apid handler (periph_handler()) once it
sees that the summary status bit for that apid is set.

However the hardware is designed to set that bit even if the apid
interrupts are disabled. The driver should check whether the apid is
indeed enabled before calling the apid handler.

CRs-Fixed: 1001770
Change-Id: I1415c41ec99ca4b767392ea3443691760f967953
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
8 years agospmi: pmic_arb: add a print in cleanup_irq
Abhijeet Dharmapurikar [Wed, 27 Apr 2016 01:31:39 +0000 (18:31 -0700)]
spmi: pmic_arb: add a print in cleanup_irq

The cleanup_irq() was meant to clear and mask interrupts that were
left enabled in the hardware but there was no interrupt handler
registered for it. Add an error print when it gets invoked.

CRs-Fixed: 1001770
Change-Id: Iccf0daadeb82b0fca29829424439ac225e2b3b88
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
8 years agospmi: pmic_arb: use appropriate flow handler
Abhijeet Dharmapurikar [Wed, 20 Apr 2016 03:06:46 +0000 (20:06 -0700)]
spmi: pmic_arb: use appropriate flow handler

The current code uses handle_level_irq flow handler even if the trigger
type of the interrupt is edge. This can lead to missing of an edge
transition that happens when the interrupt is being handled. The level
flow handler masks the interrupt while it is being handled, so if an edge
transition happens at that time, that edge is lost.

Use an edge flow handler for edge type interrupts which ensures that the
interrupt stays enabled while being handled - at least until it triggers
at which point the flow handler sets the IRQF_PENDING flag and only then
masks the interrupt. That IRQF_PENDING state indicates an edge transition
happened while the interrupt was being handled and the handler is called
again.

CRs-Fixed: 1001770
Change-Id: Id2554c9e6ed79188fa1b64728be464bda45f07ec
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
8 years agomsm: camera: Avoid exposing kernel addresses
Azam Sadiq Pasha Kapatrala Syed [Thu, 10 Mar 2016 23:01:06 +0000 (15:01 -0800)]
msm: camera: Avoid exposing kernel addresses

Usage of %p exposes the kernel addresses, an easy target to
kernel write vulnerabilities. With this patch currently
%pK prints only Zeros as address. If you need actual address
echo 0 > /proc/sys/kernel/kptr_restrict

CRs-Fixed: 987011
Change-Id: I6c79f82376936fc646b723872a96a6694fe47cd9
Signed-off-by: Azam Sadiq Pasha Kapatrala Syed <akapatra@codeaurora.org>
8 years agoclk: msm: clock-gcc-cobalt: Add new hw_ctl_clk type UFS clocks
Deepak Katragadda [Tue, 3 May 2016 18:53:02 +0000 (11:53 -0700)]
clk: msm: clock-gcc-cobalt: Add new hw_ctl_clk type UFS clocks

Add new UFS clocks to support enabling/disabling the hardware
dynamic gating for their corresponding branch clocks.

CRs-Fixed: 1012355
Change-Id: I4836ad8a775b0ec0375e37d27fcbe380e661a7b2
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
8 years agoclk: msm: clock-local2: Add support for enabling clock HW_CTL
Deepak Katragadda [Tue, 3 May 2016 18:28:24 +0000 (11:28 -0700)]
clk: msm: clock-local2: Add support for enabling clock HW_CTL

Add a new hw_ctl_clk type to allow clock clients to enable
hardware dynamic gating of the clock branch.
Clients should use the clk_enable API on a separate hw_ctl_clk
clock structure to set this bit. Vice-versa for clearing it.
It is mandatory that the clients call clk_enable on the actual
branch clock before enabling the hw_ctl_clk clock.

CRs-Fixed: 1012355
Change-Id: I24e78353fa07f537bafc322dba6b1ffac913cd1d
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
8 years agosoc: qcom: Vote ATB clock before clear registers
Runmin Wang [Wed, 4 May 2016 17:51:19 +0000 (10:51 -0700)]
soc: qcom: Vote ATB clock before clear registers

Gladiator error driver depends on the ATB clocks to be voted.
Previously, clock voting is done after writing to gladiator
registers.

CRs-Fixed: 1011314
Change-Id: I4d18273c6fc63baf58db1a778a1aaf3cb55e4824
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
8 years agosoc: qcom: Add more details to error log for PIL debugging
Puja Gupta [Thu, 14 Apr 2016 22:46:44 +0000 (15:46 -0700)]
soc: qcom: Add more details to error log for PIL debugging

Add more detailed log to help debug when the ELF segments relocatable bit
is not set and pil_init_segment bails out.

Change-Id: Id8d941e69b70f1bcf709cedc969aa0500be92039
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
8 years agodefconfig: enable msm serial console on msmcortex perf config
Abhimanyu Kapur [Thu, 21 Apr 2016 18:19:31 +0000 (11:19 -0700)]
defconfig: enable msm serial console on msmcortex perf config

Enable serial uart console on the msmcortex perf config.

CRs-Fixed: 1008594
Change-Id: I928ddfb44dfd52e8ba70d637219e3b5fbcdf8fa7
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
8 years agosoc: qcom: add support for the socinfo v0.12 format
Se Wang (Patrick) Oh [Tue, 6 Oct 2015 23:41:47 +0000 (16:41 -0700)]
soc: qcom: add support for the socinfo v0.12 format

The v0.12 format adds three new fields:
uint32_t chip_family;
uint32_t raw_device_family;
uint32_t raw_device_number;

CRs-Fixed: 1013110
Change-Id: I1699ee96c65809a46331f94938c12fc1dd4d5384
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
8 years agoARM: dts: msm: Update the emergency hotplug threshold for MSMcobalt
Ram Chandrasekar [Thu, 5 May 2016 16:10:06 +0000 (10:10 -0600)]
ARM: dts: msm: Update the emergency hotplug threshold for MSMcobalt

As per recommendation update the emergency hotplug threshold
for MSMcobalt to 105C from 70C.

CRs-Fixed: 1010111
Change-Id: I69a5583e4e15499c54ce5b2ab0fe0538de303391
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agoARM: dts: msm: Configure low voltage restricion for msmcobalt
Ram Chandrasekar [Mon, 25 Apr 2016 22:34:18 +0000 (16:34 -0600)]
ARM: dts: msm: Configure low voltage restricion for msmcobalt

Configure thermal driver to do low voltage restriction for CX,
APSS and graphics rails, when temperature goes below 5 degree C.
This restriction will be cleared if the tsens temperature goes
above 10 degree C.

CRs-Fixed: 1010111
Change-Id: I36a1ba6adb9ce847ae552d904dff1bbd0ce3cb77
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agoARM: dts: msm: Configure lmh hardware for msmcobalt
Ram Chandrasekar [Fri, 15 Apr 2016 21:54:08 +0000 (15:54 -0600)]
ARM: dts: msm: Configure lmh hardware for msmcobalt

Configure the limits hardware with the interrupt to listen for.
limits hardware driver will interact with the trustzone to get
throttling information from the hardware.

CRs-Fixed: 1010120
Change-Id: I56a8396a12e9b96cbed554bb1aed5d6243e6240a
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agoARM: dts: msm: Remove boot frequency mitigation for msmcobalt
Ram Chandrasekar [Fri, 15 Apr 2016 18:16:30 +0000 (12:16 -0600)]
ARM: dts: msm: Remove boot frequency mitigation for msmcobalt

With the LMH-DCVSh hardware the frequency mitigation in
the HLOS is not needed. Remove the boot-up frequency mitigation
in KTM for msmcobalt.

CRs-Fixed: 1010111
Change-Id: I105e98968b911f08b67c4e686e74ae6f7555d7be
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agoARM: dts: msm: Remove wrong pop_mem sensor alias for msmcobalt
Ram Chandrasekar [Thu, 7 Apr 2016 17:20:43 +0000 (11:20 -0600)]
ARM: dts: msm: Remove wrong pop_mem sensor alias for msmcobalt

temperature sensor 1 maps to cpu1 and not pop_mem. Remove
the pop_mem alias name defined for temperature sensor 1
in msmcobalt.

CRs-Fixed: 1010111
Change-Id: I69803580c9f747a0e2e5effa43d33f7a9a0d4e73
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agodefconfig: msmcortex: Enable LMH hardware and interface driver
Ram Chandrasekar [Mon, 9 May 2016 18:37:51 +0000 (12:37 -0600)]
defconfig: msmcortex: Enable LMH hardware and interface driver

Enable the LMH hardware and the LMH interface driver.
LMH hardware driver interacts with the LMH hardware and
uses the interface driver to register with thermal core.

CRs-Fixed: 1010120
Change-Id: I2e6f6a181902bee7e3bcb0f366e6ee21f8a4c442
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agodefconfig: msmcortex: Enable thermal drivers for msmcobalt
Ram Chandrasekar [Mon, 9 May 2016 18:26:37 +0000 (12:26 -0600)]
defconfig: msmcortex: Enable thermal drivers for msmcobalt

Enable kernel thermal driver.
kernel thermal driver can monitor, mitigate and provide interface
to thermal-engine to mitigate.

CRs-Fixed: 1010111
Change-Id: I02b4bc9cf66b2734be99c986d4a200f604145e0a
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agoARM: dts: msm: define LMh SW override values for OSM device for msmcobalt
Osvaldo Banuelos [Wed, 27 Apr 2016 00:53:36 +0000 (17:53 -0700)]
ARM: dts: msm: define LMh SW override values for OSM device for msmcobalt

Define the three LMh SW override values per cluster to be used
by the OSM device.

Change-Id: I6279cdbc92d4e0d5786854722474e1dfb14e7198
CRs-Fixed: 1009097
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
8 years agoclk: msm: osm: support programming LMh SW override values in set_rate()
Osvaldo Banuelos [Wed, 27 Apr 2016 00:48:47 +0000 (17:48 -0700)]
clk: msm: osm: support programming LMh SW override values in set_rate()

To ensure stable operation, it is necessary to place LMh SW override
votes when setting the new rate of the power and performance
CPU clocks. Add support for parsing these values from Device Tree
and programming them in clk_set_rate().

Change-Id: I60d90d546f155edb6c13c46e6c59c75e95848d6c
CRs-Fixed: 1009097
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
8 years agomsm: mdss: update CSC 10 bit matrix table with appropriate values
Ramkumar Radhakrishnan [Fri, 6 May 2016 22:21:44 +0000 (15:21 -0700)]
msm: mdss: update CSC 10 bit matrix table with appropriate values

Update CSC 10 bit YUV2RGB matrix table with appropriate values to
avoid any color conversion issues.

Change-Id: Iaf740873a6814cd9211acf4de4042c7cefecd64d
CRs-Fixed: 997593
Signed-off-by: Ramkumar Radhakrishnan <ramkumar@codeaurora.org>
8 years agomsm: mdss: align yuv bitstream plane size and stride appropriately.
Ramkumar Radhakrishnan [Fri, 6 May 2016 22:19:03 +0000 (15:19 -0700)]
msm: mdss: align yuv bitstream plane size and stride appropriately.

Add align function to align the values to non power of 2 and align
yuv bitstream plane size and stride appropriately.

Change-Id: I40695e9e7a99fe7c814d26fa7b5205370b7f9f64
CRs-Fixed: 997601
Signed-off-by: Ramkumar Radhakrishnan <ramkumar@codeaurora.org>
8 years agomsm: lmh_lite: Use dynamic memory for getting sensor list
Ram Chandrasekar [Fri, 29 Apr 2016 17:38:18 +0000 (11:38 -0600)]
msm: lmh_lite: Use dynamic memory for getting sensor list

LMH lite driver allocates DMA memory for getting the
sensor list from trustzone. DMA memory is not needed for
this operation, so use dynamic memory.

CRs-Fixed: 1010120
Change-Id: Ia7ef920a0f34334e49d76efc5ba233aa58aeb273
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agomsm: lmh_interface: Support new thermal core framework APIs
Ram Chandrasekar [Mon, 25 Apr 2016 21:54:17 +0000 (15:54 -0600)]
msm: lmh_interface: Support new thermal core framework APIs

Thermal core framework allows reading negative temperature and to
support that, thermal core APIs will read temperature in integer.

Inline with thermal core changes, modify the parameters to read
temperature to integer from signed long.

CRs-Fixed: 1010120
Change-Id: I975c11aa4e63e01ee3274a577b51b37c1c0f78cd
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agokernel: Restrict permissions of /proc/iomem.
Biswajit Paul [Mon, 9 Feb 2015 23:21:12 +0000 (15:21 -0800)]
kernel: Restrict permissions of /proc/iomem.

The permissions of /proc/iomem currently are -r--r--r--. Everyone can
see its content. As iomem contains information about the physical memory
content of the device, restrict the information only to root.

Change-Id: If0be35c3fac5274151bea87b738a48e6ec0ae891
CRs-Fixed: 786116
Signed-off-by: Biswajit Paul <biswajitpaul@codeaurora.org>
Signed-off-by: Avijit Kanti Das <avijitnsec@codeaurora.org>
8 years agomsm: ipa3: drain UL data for ECM/RNDIS tethering
Skylar Chang [Thu, 5 May 2016 17:08:09 +0000 (10:08 -0700)]
msm: ipa3: drain UL data for ECM/RNDIS tethering

In some cases modem will delay USB uplink pipe
for flow control. This will happen regardless of
tethering protocol. This change sends a QMI message
to modem to remove the delay on USB pipe in case
of USB cable disconnect.

CRs-Fixed: 1009199
Change-Id: I42cd716dcb87b814256a81418fecdff020f37d9d
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
8 years agoARM: dts: msm: Add WCN3990 slimbus device tree
Sungjun Park [Wed, 6 Apr 2016 05:04:38 +0000 (22:04 -0700)]
ARM: dts: msm: Add WCN3990 slimbus device tree

Add WCN3990 slimbus slave device tree to support
bluetooth and FM audio.

Change-Id: I15a0abe365555a6695a7317e4d9cfae13a56c49e
Signed-off-by: Sungjun Park <sjpark@codeaurora.org>
8 years agomsm: mdss: hdmi: separate out hdmi panel functionalities
Ajay Singh Parmar [Wed, 20 Apr 2016 02:48:42 +0000 (19:48 -0700)]
msm: mdss: hdmi: separate out hdmi panel functionalities

Create a new file for hdmi panel related functionalities
for a cleaner approach. Move all the video, infoframe and
timing related programming to hdmi panel. Expose its
functionalities for other modules. Register the panel with
hdmi transmitter core so that it can access and program it.

Change-Id: Iff1cb13d7b42b6ecfe6fd1fc88a111875c3d6cfa
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
8 years agoARM: dts: msm: setup external clock sources for DP clock on msmcobalt
Chandan Uddaraju [Wed, 4 May 2016 22:49:26 +0000 (15:49 -0700)]
ARM: dts: msm: setup external clock sources for DP clock on msmcobalt

The DP RCGs exported by the MMSS clock controller (MMSS-CC)
can be sourced out of the DP PLL which is outside the MMSS-CC. Set up
these external clock sources to point to the DP PLL clocks.

CRs-Fixed: 1009740
Change-Id: Ia8f60ba711770c26e5b5919d2c39d7986403ece6
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
8 years agomsm: ipa3: enable rndis_ipa on msm-4.4
Skylar Chang [Thu, 5 May 2016 06:10:48 +0000 (23:10 -0700)]
msm: ipa3: enable rndis_ipa on msm-4.4

Change the feature flag to compile rndis_ipa
on cobalt target with msm-4.4 kernel, also
fix the compile warnings.

Change-Id: I82d3dd00e003d8eab63ca6bcc3bb91d51f122606
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
8 years agoARM: dts: msm: add MDSS Display-Port PLL device node for msmcobalt
Chandan Uddaraju [Wed, 27 Apr 2016 22:16:25 +0000 (15:16 -0700)]
ARM: dts: msm: add MDSS Display-Port PLL device node for msmcobalt

List all the resources needed by the MDSS DP PLL device and add the
corresponding device node for msmcobalt. The DP PLL is the source for
all the branch clocks needed to drive pixel data over the DP interface.

CRs-Fixed: 1009740
Change-Id: I1a373a7602f8dbad3fb547690a87a28aea73aadd
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
8 years agoclk: qcom: mdss: add Display-port pll clock driver support
Chandan Uddaraju [Tue, 23 Feb 2016 00:43:23 +0000 (16:43 -0800)]
clk: qcom: mdss: add Display-port pll clock driver support

Add support for new Display-port  PLL clock driver to handle
different DP panel resolutions in msmcobalt. Add separate files
to support this new PHY PLL block.

CRs-Fixed: 1009740
Change-Id: Ic282c7e14fc6e23f4d044cb6a58249bdb4c8c2d8
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
8 years agoARM: dts: msm: define primary display interface for msmcobalt CDP
Aravind Venkateswaran [Fri, 1 Apr 2016 01:24:18 +0000 (18:24 -0700)]
ARM: dts: msm: define primary display interface for msmcobalt CDP

Set the primary display interface as the DSI device and the preferred
primary panel to be nt35597 dual-DSI (non-DSC) panel on msmcobalt CDP.

CRs-Fixed: 1000724
Change-Id: I8caa21c7b6a5f1e57cbd4c2bffeaa34e1e59d9c2
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
8 years agoARM: dts: msmcobalt: update CPU DAI list with SLIMBUS_7/8 DAIs
Banajit Goswami [Sat, 23 Apr 2016 01:56:03 +0000 (18:56 -0700)]
ARM: dts: msmcobalt: update CPU DAI list with SLIMBUS_7/8 DAIs

MSMCOBALT supports SLIMBUS_7 RX/Tx and SLIMBUS_8 Tx ports.
Add these ports to the CPU DAI list for passing to machine
driver.

Change-Id: I91306af6a2376fc76d51c62497e9723e6ec716e1
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
8 years agoARM: dts: msm: add new CPU DAIs for SLIMBUS_7/8 Rx/Tx
Banajit Goswami [Wed, 20 Apr 2016 19:44:16 +0000 (12:44 -0700)]
ARM: dts: msm: add new CPU DAIs for SLIMBUS_7/8 Rx/Tx

Support for SLIMBUS_7 and SLIMBUS_8 Rx/Tx ports added to MSM audio
drivers. Add the right devices to probe/register these ports with
kernel at device bootup.

Change-Id: Id28b3d2fc5db4ec88ddbfa20b36047804d1fbdb6
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
8 years agomsm: lmh_interface: support new sequence print functions
Ram Chandrasekar [Thu, 14 Apr 2016 18:05:27 +0000 (12:05 -0600)]
msm: lmh_interface: support new sequence print functions

New sequence print functions doesn't return error on overflow.
Use the new API to check for overflow and then return error
from LMH interface driver.

CRS-FIxed: 1010120
Change-Id: I12c496f3c72398845a9039607b27112196afe38a
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
8 years agomsm: thermal: Remove support for asynchronous cluster
Ram Chandrasekar [Tue, 3 May 2016 23:19:31 +0000 (17:19 -0600)]
msm: thermal: Remove support for asynchronous cluster

KTM has support for handling cluster with asynchronous cores within
a cluster. KTM can get the individual clock plans for the cores and
mitigate them separately. This feature is not supported in
hardware.

So remove the asynchronous cluster support from KTM.

CRs-Fixed: 1010111
Change-Id: I13348a16e2e1c11053cf5b99b921fd8ea65c7d89
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>