OSDN Git Service
Craig Topper [Sun, 3 Jul 2016 19:37:12 +0000 (19:37 +0000)]
[CodeGen] Teach OR combine of shuffles involving zero vectors to better handle undef indices.
Undef indices can now be treated as zeros. Or if its undef ORed with zero, we will keep the undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274472
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Craig Topper [Sun, 3 Jul 2016 19:37:10 +0000 (19:37 +0000)]
[X86] Add tests to show that the DAG combine for OR of shuffles with zero vectors doesn't handle undefs as well as it could. Fix coming in another commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274471
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Haicheng Wu [Sun, 3 Jul 2016 19:14:17 +0000 (19:14 +0000)]
[MBB] add a missing corner case in UpdateTerminator()
After the block placement, if a block ends with a conditional branch, but the
next block is not its successor. The conditional branch should be changed to
unconditional branch. This patch fixes PR28307, PR28297, PR28402.
Differential Revision: http://reviews.llvm.org/D21811
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274470
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Simon Pilgrim [Sun, 3 Jul 2016 18:40:24 +0000 (18:40 +0000)]
[X86][AVX512] Add support for VPERMPD/VPERMQ masked shuffle comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274469
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Simon Pilgrim [Sun, 3 Jul 2016 18:27:37 +0000 (18:27 +0000)]
[X86][AVX512] Add support for 512-bit shuffle decoding of VPERMPD/VPERMQ
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274468
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Simon Pilgrim [Sun, 3 Jul 2016 18:02:43 +0000 (18:02 +0000)]
[X86][AVX] Renamed VPERMILPI shuffle comment macros to be more specific
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274467
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Simon Pilgrim [Sun, 3 Jul 2016 15:00:51 +0000 (15:00 +0000)]
[X86][AVX512] Add support for VPALIGNR/PSHUFD/PSHUFHW/PSHUFLW masked shuffle comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274466
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Sanjay Patel [Sun, 3 Jul 2016 14:34:39 +0000 (14:34 +0000)]
[InstCombine] enable vector select of bools -> logic folds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274465
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Simon Pilgrim [Sun, 3 Jul 2016 14:26:21 +0000 (14:26 +0000)]
[X86][AVX512] Add support for UNPCK masked shuffle comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274464
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Sanjay Patel [Sun, 3 Jul 2016 14:08:19 +0000 (14:08 +0000)]
fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274463
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Simon Pilgrim [Sun, 3 Jul 2016 13:55:41 +0000 (13:55 +0000)]
[X86][AVX512] Add support for VPERM/VSHUF masked shuffle comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274462
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Simon Pilgrim [Sun, 3 Jul 2016 13:33:28 +0000 (13:33 +0000)]
[X86][AVX512] Add support for PMOVZX masked shuffle comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274461
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Sanjay Patel [Sun, 3 Jul 2016 13:26:02 +0000 (13:26 +0000)]
add vector bool select tests and regenerate checks for scalar bool select tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274460
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Simon Pilgrim [Sun, 3 Jul 2016 13:08:29 +0000 (13:08 +0000)]
[X86][AVX512] Add support for masked shuffle comments
This patch adds support for including the avx512 mask register information in the mask/maskz versions of shuffle instruction comments.
This initial version just adds support for MOVDDUP/MOVSHDUP/MOVSLDUP to reduce the mass of test regenerations, other shuffle instructions can be added in due course.
Differential Revision: http://reviews.llvm.org/D21953
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274459
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Simon Pilgrim [Sun, 3 Jul 2016 12:47:21 +0000 (12:47 +0000)]
[X86][AVX512] Add support for lowering shuffles to VPERMILPS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274458
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Sean Silva [Sun, 3 Jul 2016 03:35:06 +0000 (03:35 +0000)]
PR28400: Partly undo r274440 to bring test-suite back to life with the new PM
PR28400 seems to be not an isolated issue, but a general problem related
to caching analyses. We will need to discuss on llvm-dev.
A test case is in the PR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274457
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Sean Silva [Sun, 3 Jul 2016 03:35:03 +0000 (03:35 +0000)]
[PM] Some preparatory refactoring to minimize the diff of D21921
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274456
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Sean Silva [Sat, 2 Jul 2016 23:47:27 +0000 (23:47 +0000)]
Remove dead TLI arg of isKnownNonNull and propagate deadness. NFC.
This actually uncovered a surprisingly large chain of ultimately unused
TLI args.
From what I can gather, this argument is a remnant of when
isKnownNonNull would look at the TLI directly.
The current approach seems to be that InferFunctionAttrs runs early in
the pipeline and uses TLI to annotate the TLI-dependent non-null
information as return attributes.
This also removes the dependence of functionattrs on TLI altogether.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274455
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Xinliang David Li [Sat, 2 Jul 2016 21:25:12 +0000 (21:25 +0000)]
Fix wrong comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274453
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Xinliang David Li [Sat, 2 Jul 2016 21:18:40 +0000 (21:18 +0000)]
[PM] Port LoopAccessInfo analysis to new PM
It is implemented as a LoopAnalysis pass as
discussed and agreed upon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274452
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Simon Pilgrim [Sat, 2 Jul 2016 20:21:39 +0000 (20:21 +0000)]
Fix spelling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274451
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Simon Pilgrim [Sat, 2 Jul 2016 20:20:12 +0000 (20:20 +0000)]
[X86][AVX512] Add support for lowering shuffles to VPERMILPD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274450
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Sylvestre Ledru [Sat, 2 Jul 2016 19:28:40 +0000 (19:28 +0000)]
fix some various typos in the doc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274449
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Simon Pilgrim [Sat, 2 Jul 2016 19:22:46 +0000 (19:22 +0000)]
[X86][AVX512VL] Add fast-isel MOVDDUP/MOVSLDUP/MOVSHDUP shuffle tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274448
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Sean Silva [Sat, 2 Jul 2016 19:12:56 +0000 (19:12 +0000)]
[PM] Some preparatory refactoring to minimize the diff of D21921
The main change here is just moving stuff to static functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274446
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Sean Silva [Sat, 2 Jul 2016 18:59:51 +0000 (18:59 +0000)]
[PM] Preparatory cleanups to ArgumentPromotion.
This pulls some obvious changes out of http://reviews.llvm.org/D21921 to
minimize the diff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274445
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Simon Pilgrim [Sat, 2 Jul 2016 18:14:31 +0000 (18:14 +0000)]
[X86][AVX512] Add support for 512-bit PSHUFB lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274444
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Simon Pilgrim [Sat, 2 Jul 2016 17:16:41 +0000 (17:16 +0000)]
[X86][AVX512] Converted the MOVDDUP/MOVSLDUP/MOVSHDUP masked intrinsics to generic IR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274443
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Wilfred Hughes [Sat, 2 Jul 2016 17:01:59 +0000 (17:01 +0000)]
New Kaleidoscope chapter: Creating object files
This new chapter describes compiling LLVM IR to object files.
The new chaper is chapter 8, so later chapters have been renumbered.
Since this brings us to 10 chapters total, I've also needed to rename
the other chapters to use two digit numbering.
Differential Revision: http://reviews.llvm.org/D18070
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274441
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Sean Silva [Sat, 2 Jul 2016 16:16:44 +0000 (16:16 +0000)]
[PM] Fix a small typo from when I ported JumpThreading
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274440
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Simon Pilgrim [Sat, 2 Jul 2016 14:42:35 +0000 (14:42 +0000)]
[X86][AVX512] Autoupgrade the MOVDDUP/MOVSLDUP/MOVSHDUP intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274439
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Benjamin Kramer [Sat, 2 Jul 2016 13:18:38 +0000 (13:18 +0000)]
[DIBuilder] Remove dead code. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274438
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Benjamin Kramer [Sat, 2 Jul 2016 13:05:12 +0000 (13:05 +0000)]
[Hexagon] Create global std::map lazily.
This could of course be a simple binary search with no global state
involved at all if someone cares enough. Just don't make everyone
linking the hexagon backend pay for it on process startup and shutdown.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274437
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Simon Pilgrim [Sat, 2 Jul 2016 12:45:03 +0000 (12:45 +0000)]
[X86][AVX512] Add support for lowering shuffles to MOVDDUP/MOVSLDUP/MOVSHDUP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274436
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Simon Pilgrim [Sat, 2 Jul 2016 12:20:35 +0000 (12:20 +0000)]
[X86][AVX512] Add test cases that should lower to MOVSLDUP/MOVSHDUP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274435
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Simon Pilgrim [Sat, 2 Jul 2016 12:13:29 +0000 (12:13 +0000)]
[X86][AVX512] Add fast-isel shuffle tests
Its not worth trying to write out tests for all the avx512f builtins yet, just adding tests for lowering of generic IR as we transition to it (shuffles mainly right now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274434
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Benjamin Kramer [Sat, 2 Jul 2016 11:41:39 +0000 (11:41 +0000)]
Use arrays or initializer lists to feed ArrayRefs instead of SmallVector where possible.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274431
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Qin Zhao [Sat, 2 Jul 2016 03:25:37 +0000 (03:25 +0000)]
[esan|cfrag] Add counters for struct array accesses
Summary:
Adds one counter to the struct counter array for counting struct
array accesses.
Adds instrumentation to insert counter update for struct array
accesses.
Reviewers: aizatsky
Subscribers: llvm-commits, bruening, eugenis, kcc, zhaoqin, vitalybuka
Differential Revision: http://reviews.llvm.org/D21594
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274420
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Marcin Koscielnicki [Sat, 2 Jul 2016 02:20:40 +0000 (02:20 +0000)]
[SystemZ] Move misplaced SystemZ::TDC to non-memory opcode range.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274417
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Pirama Arumuga Nainar [Sat, 2 Jul 2016 00:23:09 +0000 (00:23 +0000)]
Add RenderScript ArchType
Summary:
Add renderscript32 and renderscript64 ArchTypes. This is to configure
the ABI requirement on 32-bit RenderScript that 'long' types have 64-bit
size and alignment. 64-bit RenderScript is the same as AArch64, but is
added here for completeness.
Reviewers: echristo, rsmith
Subscribers: aemerson, jfb, rampitec, dschuff, mehdi_amini, llvm-commits, srhines
Differential Revision: http://reviews.llvm.org/D21333
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274412
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Michael Kuperstein [Sat, 2 Jul 2016 00:16:47 +0000 (00:16 +0000)]
[PM] Port ConstantHoisting to the new Pass Manager
Differential Revision: http://reviews.llvm.org/D21945
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274411
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Reid Kleckner [Sat, 2 Jul 2016 00:11:07 +0000 (00:11 +0000)]
[codeview] Set the Nested and Scoped ClassOptions based on the scope chain
These are set on both the declaration record and the definition record.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274410
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Matt Arsenault [Fri, 1 Jul 2016 23:26:54 +0000 (23:26 +0000)]
LoadStoreVectorizer: Fix warning about extra semicolon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274406
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Matt Arsenault [Fri, 1 Jul 2016 23:26:50 +0000 (23:26 +0000)]
TII: Fix inlineasm size counting comments as insts
The main problem was counting comments on their own
line as instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274405
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Matt Arsenault [Fri, 1 Jul 2016 23:15:06 +0000 (23:15 +0000)]
PeepholeOptimizer: Relax assert
Allow implicit defs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274402
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David Majnemer [Fri, 1 Jul 2016 23:12:48 +0000 (23:12 +0000)]
[CodeView] Include the offset of nested members
Given something like:
struct S {
int a;
struct { int b; };
};
We would fail to give 'b' offset 4. Instead, we would give it the
offset it has inside of it's struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274400
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David Majnemer [Fri, 1 Jul 2016 23:12:45 +0000 (23:12 +0000)]
[CodeView] Pretty print anonymous scopes
A namespace without a name should be written out as `anonymous
namespace' while a tag type without a name should be written out as
<unnamed-tag>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274399
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Matt Arsenault [Fri, 1 Jul 2016 23:03:44 +0000 (23:03 +0000)]
AMDGPU: Add feature for unaligned access
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274398
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Matt Arsenault [Fri, 1 Jul 2016 22:55:55 +0000 (22:55 +0000)]
AMDGPU: Expand unaligned accesses early
Due to visit order problems, in the case of an unaligned copy
the legalized DAG fails to eliminate extra instructions introduced
by the expansion of both unaligned parts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274397
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Evgeniy Stepanov [Fri, 1 Jul 2016 22:49:59 +0000 (22:49 +0000)]
[msan] Fix __msan_maybe_ for non-standard type sizes.
Fix incorrect calculation of the type size for __msan_maybe_warning_N
call that resulted in an invalid (narrowing) zext instruction and
"Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed."
Only happens in very large functions (with more than 3500 MSan
checks) operating on integer types that are not power-of-two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274395
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Matt Arsenault [Fri, 1 Jul 2016 22:47:50 +0000 (22:47 +0000)]
AMDGPU: Improve load/store of illegal types.
There was a combine before to handle the simple copy case.
Split this into handling loads and stores separately.
We might want to change how this handles some of the vector
extloads, since this can result in large code size increases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274394
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Reid Kleckner [Fri, 1 Jul 2016 22:24:51 +0000 (22:24 +0000)]
[codeview] Don't record UDTs for anonymous structs
MSVC makes up names for these anonymous structs, but we don't (yet).
Eventually Clang should use getTypedefNameForAnonDecl() to put some name
in the debug info, and we can update the test case when that happens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274391
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Justin Bogner [Fri, 1 Jul 2016 22:07:11 +0000 (22:07 +0000)]
IR: Set TargetPrefix for some X86 and AArch64 intrinsics where it was missing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274390
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Alina Sbirlea [Fri, 1 Jul 2016 21:44:12 +0000 (21:44 +0000)]
Address two correctness issues in LoadStoreVectorizer
Summary:
GetBoundryInstruction returns the last instruction as the instruction which follows or end(). Otherwise the last instruction in the boundry set is not being tested by isVectorizable().
Partially solve reordering of instructions. More extensive solution to follow.
Reviewers: tstellarAMD, llvm-commits, jlebar
Subscribers: escha, arsenm, mzolotukhin
Differential Revision: http://reviews.llvm.org/D21934
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274389
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Krzysztof Parzyszek [Fri, 1 Jul 2016 20:45:19 +0000 (20:45 +0000)]
[Hexagon] Revert r274381: that was actually wrong
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274384
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Krzysztof Parzyszek [Fri, 1 Jul 2016 20:28:30 +0000 (20:28 +0000)]
[Hexagon] Use MachineOperand::readsReg instead of isUse
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274381
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Reid Kleckner [Fri, 1 Jul 2016 18:43:29 +0000 (18:43 +0000)]
[pdb] Check the display name for <unnamed-tag>, not the linkage name
This issue was encountered on libcmt.pdb, which has a type record that
looks like this:
Struct (0x1094) {
TypeLeafKind: LF_STRUCTURE (0x1505)
MemberCount: 3
Properties [ (0x200)
HasUniqueName (0x200)
]
FieldList: <field list> (0x1093)
DerivedFrom: 0x0
VShape: 0x0
SizeOf: 4
Name: <unnamed-tag>
LinkageName: .?AU<unnamed-tag>@@
}
The checks for startswith/endswith "<unnamed-tag>" should look at the
display name, not the linkage name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274376
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Reid Kleckner [Fri, 1 Jul 2016 18:05:56 +0000 (18:05 +0000)]
[codeview] Assert that our CV type records are valid
We were asserting that our type records were valid when emitting
assembly, but not when emitting an object file.
I've been seeing lots of LNK1285 errors (corrupt PDB) during incremental
debug self-host builds with the MSVC linker, and hopefully this will
catch some of them earlier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274373
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Matt Arsenault [Fri, 1 Jul 2016 18:03:46 +0000 (18:03 +0000)]
AMDGPU/SI: Enable testing several variants for si scheduler
Enable testing different scheduling variants if sgpr usage
is very high. It was previously disabled because of a bug
in handleMove, but it has been fixed since.
Patch by Axel Davy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274372
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Dehao Chen [Fri, 1 Jul 2016 17:35:13 +0000 (17:35 +0000)]
Specify mtriple for the frame-order.ll test.
Summary: original test may have different bahavior on different bot, specifically it broke llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast
Reviewers: majnemer
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D21931
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274368
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Hans Wennborg [Fri, 1 Jul 2016 17:26:42 +0000 (17:26 +0000)]
Revert r274347 "[ARM] Refactor Thumb2 mul instruction descs"
This caused PR28387: Assertion "#operands for dag node doesn't match .td file!"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274367
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John Brawn [Fri, 1 Jul 2016 17:05:58 +0000 (17:05 +0000)]
Make extract_symbols.py be compatible with Python 3
This involved running 2to3 on it and adjusting all uses of subprocess to use
universal_newlines=True so the output is text instead of binary. It remains
compatible with Python 2.7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274365
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Duncan P. N. Exon Smith [Fri, 1 Jul 2016 16:43:13 +0000 (16:43 +0000)]
CodeGen: Use MachineInstr& in RegisterCoalescer, NFC
Remove a few more implicit iterator to pointer conversions by preferring
MachineInstr&.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274363
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Sanjay Patel [Fri, 1 Jul 2016 16:41:59 +0000 (16:41 +0000)]
fix documentation comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274362
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Duncan P. N. Exon Smith [Fri, 1 Jul 2016 16:38:28 +0000 (16:38 +0000)]
CodeGen: Avoid implicit conversions in TargetInstrInfo, NFC
Avoid implicit conversions from MachineBasicBlock::iterator to
MachineInstr* in TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274361
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Duncan P. N. Exon Smith [Fri, 1 Jul 2016 16:21:48 +0000 (16:21 +0000)]
CodeGen: Use MachineInstr& in ScheduleDAGIntrs, NFC
Use MachineInstr& to avoid implicit conversions from
MachineBasicBlock::iterator to MachineInstr*. In one case, this could
use a range-based for loop, but the other loops iterated in reverse
order.
One of the reverse-loops checked the MachineInstr* for nullptr, a
condition that is provably unreachable. (And even if my proof has a
flaw, UBSan would catch the bug.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274360
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Adrian Prantl [Fri, 1 Jul 2016 15:54:46 +0000 (15:54 +0000)]
Reapply "Define a module map entry for DebugInfo/CodeView."
This reapplies r274313 with two additional #include directives needed
when submodule visibility is enabled.
Fixes PR28384.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274358
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Dehao Chen [Fri, 1 Jul 2016 15:40:25 +0000 (15:40 +0000)]
Do not count debug instructions when counting number of uses to reorder frame objects.
Summary: The code generation should be independent of the debug info.
Reviewers: zansari, davidxl, mkuper, majnemer
Subscribers: majnemer, llvm-commits
Differential Revision: http://reviews.llvm.org/D21911
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274357
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Duncan P. N. Exon Smith [Fri, 1 Jul 2016 15:13:09 +0000 (15:13 +0000)]
CodeGen: Avoid iterator conversion in UnreachableBlockElim, NFC
Avoid an unnecessary (and implicit) iterator to pointer conversion in
UnreachableBlockElim by using the post-increment operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274355
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Duncan P. N. Exon Smith [Fri, 1 Jul 2016 15:08:52 +0000 (15:08 +0000)]
CodeGen: Use MachineInstr& in SlotIndexes.cpp, NFC
Avoid implicit conversions from iterator to pointer by preferring
MachineInstr& and using range-based for loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274354
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Duncan P. N. Exon Smith [Fri, 1 Jul 2016 15:03:37 +0000 (15:03 +0000)]
CodeGen: Use MachineInstr& in RegAllocFast, NFC
Use MachineInstr& instead of MachineInstr* in RegAllocFast to avoid
implicit conversions from MachineInstrBundleIterator. RAFast::spillAll
and RAFast::spillVirtReg still take iterators, since their argument may
be an end iterator from MachineBasicBlock::getFirstTerminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274353
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John Brawn [Fri, 1 Jul 2016 14:22:52 +0000 (14:22 +0000)]
[CMake] Add LLVM_BUILD_32_BITS to LLVMConfig.cmake
Previously out-of-tree passes could detect if LLVM was built with
LLVM_BUILD_32_BITS by looking for -m32 in LLVM_DEFINITIONS, but as of r271871
it no longer appears there. Resolve this by instead emitting LLVM_BUILD_32_BITS
in LLVMConfig so it can be checked for directly.
Differential Revision: http://reviews.llvm.org/D21434
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274351
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Sam Parker [Fri, 1 Jul 2016 12:55:49 +0000 (12:55 +0000)]
[ARM] Refactor Thumb2 mul instruction descs
No functional changes. Just created wrapper classes around the 3
and 4 reg mult and mac instruction classes.
Differential Revision: http://reviews.llvm.org/D21549
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274347
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Benjamin Kramer [Fri, 1 Jul 2016 11:05:15 +0000 (11:05 +0000)]
function_refify. NFC.
While there use emplace_back to create an expensive pair.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274344
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Nikolay Haustov [Fri, 1 Jul 2016 10:00:58 +0000 (10:00 +0000)]
Resubmit r268719 - AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2.
This was reverted in r268740 because of problems with corresponding Clang change.
Clang change was updated and resubmitted in r274220.
Check calling convention in AMDGPUMachineFunction::isKernel
This will be used for AMDGPU_HSA_KERNEL symbol type in output ELF.
Also, in the future unused non-kernels may be optimized.
Reviewers: tstellarAMD, arsenm
Subscribers: arsenm, joker.eph, llvm-commits
Differential Revision: http://reviews.llvm.org/D19917
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274341
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Sam Kolton [Fri, 1 Jul 2016 09:59:21 +0000 (09:59 +0000)]
[AMDGPU] Assembler: support SDWA for VOPC instructions
Summary: dst_sel and dst_unused disabled for VOPC as they have no effect on result
Reviewers: artem.tamazov, tstellarAMD, vpykhtin
Subscribers: arsenm, kzhuravl
Differential Revision: http://reviews.llvm.org/D21376
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274340
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NAKAMURA Takumi [Fri, 1 Jul 2016 09:55:23 +0000 (09:55 +0000)]
Update libdeps; AMDGPUCodeGen requires LLVMVectorize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274339
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Craig Topper [Fri, 1 Jul 2016 06:54:51 +0000 (06:54 +0000)]
[CodeGen] Cleanup getVectorShuffle a bit to take advantage of its new ArrayRef argument and its begin/end iterators. Also use 'int' type for number of elements and loop iterators to remove several typecasts. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274338
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Craig Topper [Fri, 1 Jul 2016 06:54:47 +0000 (06:54 +0000)]
[CodeGen,Target] Remove the version of DAG.getVectorShuffle that takes a pointer to a mask array. Convert all callers to use the ArrayRef version. No functional change intended.
For the most part this simplifies all callers. There were two places in X86 that needed an explicit makeArrayRef to shorten a statically sized array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274337
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Eric Christopher [Fri, 1 Jul 2016 06:07:38 +0000 (06:07 +0000)]
Add support for allowing us to create uniquely identified "COMDAT" or "ELF
Group" sections while lowering. In particular, for ELF sections this is
useful for creating function-specific groups that get merged into the
same named section.
Also use const Twine& instead of StringRef for the getELF functions
while we're here.
Differential Revision: http://reviews.llvm.org/D21743
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274336
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Eric Christopher [Fri, 1 Jul 2016 06:07:31 +0000 (06:07 +0000)]
80-column and comment fixups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274335
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Xinliang David Li [Fri, 1 Jul 2016 05:59:55 +0000 (05:59 +0000)]
[PM] refactor LoopAccessInfo code part-2
Differential Revision: http://reviews.llvm.org/D21636
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274334
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Xinliang David Li [Fri, 1 Jul 2016 05:46:48 +0000 (05:46 +0000)]
[MBP] method interface cleanup
Make worklist and ehworklist member of the
class so that they don't need to be passed around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274333
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Duncan P. N. Exon Smith [Fri, 1 Jul 2016 04:55:13 +0000 (04:55 +0000)]
Revert "add tests for bugs fixed by the GVN hoist pass"
This reverts commit r274327 since the tests fail. E.g.:
http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules/builds/17240
It looks like this commit is building on r274305, but that commit caused
a miscompile and was reverted in r274320.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274332
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Matt Arsenault [Fri, 1 Jul 2016 03:33:52 +0000 (03:33 +0000)]
AMDGPU: Add option to run the load/store vectorizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274329
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Adrian Prantl [Fri, 1 Jul 2016 03:17:02 +0000 (03:17 +0000)]
Revert "Define a module map entry for DebugInfo/CodeView."
This reverts commit r274313.
While this fixed the build on Darwin, it broke Linux with local submodule
visibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274328
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Sebastian Pop [Fri, 1 Jul 2016 03:03:19 +0000 (03:03 +0000)]
add tests for bugs fixed by the GVN hoist pass
https://llvm.org/bugs/show_bug.cgi?id=20242
https://llvm.org/bugs/show_bug.cgi?id=22005
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274327
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Reid Kleckner [Fri, 1 Jul 2016 02:41:21 +0000 (02:41 +0000)]
[codeview] Add DISubprogram::ThisAdjustment
Summary:
This represents the adjustment applied to the implicit 'this' parameter
in the prologue of a virtual method in the MS C++ ABI. The adjustment is
always zero unless multiple inheritance is involved.
This increases the size of DISubprogram by 8 bytes, unfortunately. The
adjustment really is a signed 32-bit integer. If this size increase is
too much, we could probably win it back by splitting out a subclass with
info specific to virtual methods (virtuality, vindex, thisadjustment,
containingType).
Reviewers: aprantl, dexonsmith
Subscribers: aaboud, amccarth, llvm-commits
Differential Revision: http://reviews.llvm.org/D21614
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274325
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Matt Arsenault [Fri, 1 Jul 2016 02:16:24 +0000 (02:16 +0000)]
LoadStoreVectorizer: improvements: better pointer analysis
If OpB has an ADD NSW/NUW, we can use that to prove that adding 1
to OpA won't wrap if OpA + 1 == OpB.
Patch by Fiona Glaser
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274324
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Matt Arsenault [Fri, 1 Jul 2016 02:09:38 +0000 (02:09 +0000)]
LoadStoreVectorizer: Don't increase alignment with no align set
If no alignment was set on the load/stores, it would vectorize
to the new type even though this increases the default alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274323
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Matt Arsenault [Fri, 1 Jul 2016 02:07:22 +0000 (02:07 +0000)]
LoadStoreVectorizer: Check TTI for vec reg bit width
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274322
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Matt Arsenault [Fri, 1 Jul 2016 01:55:52 +0000 (01:55 +0000)]
LoadStoreVectorizer: Fix assert when merging pointer ops
This needs to use inttoptr/ptrtoint if combining an int and pointer
load. If a pointer is used always do an integer load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274321
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Duncan P. N. Exon Smith [Fri, 1 Jul 2016 01:51:40 +0000 (01:51 +0000)]
Revert "code hoisting pass based on GVN"
This reverts commit r274305, since it breaks self-hosting:
http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_build/22349/
http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules/builds/17232
Note that the blamelist on lab.llvm.org:8011 is incorrect. The previous
build was r274299, but somehow r274305 wasn't included in the blamelist:
http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274320
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Duncan P. N. Exon Smith [Fri, 1 Jul 2016 01:51:32 +0000 (01:51 +0000)]
CodeGen: Use MachineInstr& in LiveVariables API, NFC
Change all the methods in LiveVariables that expect non-null
MachineInstr* to take MachineInstr& and update the call sites. This
clarifies the API, and designs away a class of iterator to pointer
implicit conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274319
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Matt Arsenault [Fri, 1 Jul 2016 01:47:46 +0000 (01:47 +0000)]
LoadStoreVectorizer: Use AA metadata
This was not passing the full instruction with metadata
to the alias query.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274318
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Duncan P. N. Exon Smith [Fri, 1 Jul 2016 01:27:19 +0000 (01:27 +0000)]
CodeGen: Remove implicit iterator conversions in PHIElimination, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274317
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Duncan P. N. Exon Smith [Fri, 1 Jul 2016 01:18:53 +0000 (01:18 +0000)]
CodeGen: Use MachineInstr& in PostRASchedulerList, NFC
Remove another unnecessary iterator to pointer conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274315
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Adrian Prantl [Fri, 1 Jul 2016 01:16:17 +0000 (01:16 +0000)]
Define a module map entry for DebugInfo/CodeView.
This fixes the -fmodules build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274313
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Matt Arsenault [Fri, 1 Jul 2016 00:56:27 +0000 (00:56 +0000)]
AMDGPU: Implement getLoadStoreVecRegBitWidth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274312
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Duncan P. N. Exon Smith [Fri, 1 Jul 2016 00:50:29 +0000 (00:50 +0000)]
CodeGen: Use MachineInstr& in PostRAHazardRecognizer, NFC
Convert a loop to a range-based for, using MachineInstr& instead of
MachineInstr* and removing an implicit conversion from iterator to
pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274311
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