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Nico Weber [Wed, 24 Apr 2019 00:59:24 +0000 (00:59 +0000)]
gn build: Merge r359050 more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359058
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Nico Weber [Wed, 24 Apr 2019 00:44:14 +0000 (00:44 +0000)]
gn build: Merge r359050
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359056
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Alina Sbirlea [Wed, 24 Apr 2019 00:28:29 +0000 (00:28 +0000)]
Revert [AliasAnalysis] AAResults preserves AAManager.
Triggers use-after-free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359055
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Francis Visoiu Mistrih [Wed, 24 Apr 2019 00:27:59 +0000 (00:27 +0000)]
[Remarks] Fix documentation indentation
Fix the documentation bot:
http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/30450/steps/docs-llvm-html/logs/stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359053
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Francis Visoiu Mistrih [Wed, 24 Apr 2019 00:06:24 +0000 (00:06 +0000)]
[Remarks] Add string deduplication using a string table
* Add support for uniquing strings in the remark streamer and emitting the string table in the remarks section.
* Add parsing support for the string table in the RemarkParser.
From this remark:
```
--- !Missed
Pass: inline
Name: NoDefinition
DebugLoc: { File: 'test-suite/SingleSource/UnitTests/2002-04-17-PrintfChar.c',
Line: 7, Column: 3 }
Function: printArgsNoRet
Args:
- Callee: printf
- String: ' will not be inlined into '
- Caller: printArgsNoRet
DebugLoc: { File: 'test-suite/SingleSource/UnitTests/2002-04-17-PrintfChar.c',
Line: 6, Column: 0 }
- String: ' because its definition is unavailable'
...
```
to:
```
--- !Missed
Pass: 0
Name: 1
DebugLoc: { File: 3, Line: 7, Column: 3 }
Function: 2
Args:
- Callee: 4
- String: 5
- Caller: 2
DebugLoc: { File: 3, Line: 6, Column: 0 }
- String: 6
...
```
And the string table in the .remarks/__remarks section containing:
```
inline\0NoDefinition\0printArgsNoRet\0
test-suite/SingleSource/UnitTests/2002-04-17-PrintfChar.c\0printf\0
will not be inlined into \0 because its definition is unavailable\0
```
This is mostly supposed to be used for testing purposes, but it gives us
a 2x reduction in the remark size, and is an incremental change for the
updates to the remarks file format.
Differential Revision: https://reviews.llvm.org/D60227
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359050
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Josh Stone [Tue, 23 Apr 2019 23:43:47 +0000 (23:43 +0000)]
[Lint] Permit aliasing noalias readonly arguments
Summary:
If two arguments are both readonly, then they have no memory dependency
that would violate noalias, even if they do actually overlap.
Reviewers: hfinkel, efriedma
Reviewed By: efriedma
Subscribers: efriedma, hiraditya, llvm-commits, tstellar
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60239
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359047
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Jessica Paquette [Tue, 23 Apr 2019 23:03:03 +0000 (23:03 +0000)]
[AArch64][GlobalISel] Select G_INTRINSIC_ROUND
Add selection support for G_INTRINSIC_ROUND, add a selection test, and add
check lines to arm64-vfloatintrinsics.ll and f16-instructions.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359046
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Jessica Paquette [Tue, 23 Apr 2019 22:47:00 +0000 (22:47 +0000)]
[AArch64][GlobalISel] Mark G_INTRINSIC_ROUND as a pre-isel floating point opcode
Add G_INTRINSIC_ROUND to isPreISelGenericFloatingPointOpcode to ensure that its
input and output are assigned the correct register bank.
Add a regbankselect test to verify that we get what we expect here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359044
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Dmitry Mikulin [Tue, 23 Apr 2019 22:26:55 +0000 (22:26 +0000)]
The error message for mismatched value sites is very cryptic.
Make it more readable for an average user.
Differential Revision: https://reviews.llvm.org/D60896
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359043
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Alex Langford [Tue, 23 Apr 2019 21:59:07 +0000 (21:59 +0000)]
[CMake] Use add_dependencies in add_llvm_install_targets
Summary:
The CMake documentation says that the `DEPENDS` field of
add_custom_target is for files and output of custom commands. Adding a
dependency on a target should be done with `add_dependency`.
Differential Revision: https://reviews.llvm.org/D60879
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359042
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Francis Visoiu Mistrih [Tue, 23 Apr 2019 21:57:46 +0000 (21:57 +0000)]
[CGP] Look through bitcasts when duplicating returns for tail calls
The simple case of:
```
int *callee();
void *caller(void *a) {
if (a == NULL)
return callee();
return a;
}
```
would generate a regular call instead of a tail call because we don't
look through the bitcast of the call to `callee` when duplicating the
return blocks.
Differential Revision: https://reviews.llvm.org/D60837
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359041
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Francis Visoiu Mistrih [Tue, 23 Apr 2019 21:57:43 +0000 (21:57 +0000)]
[X86] Add codegen prepare test exercising a bitcast + tail call
In preparation of https://reviews.llvm.org/D60837, add this test where
we don't perform a tail call because we don't look through a bitcast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359040
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Heejin Ahn [Tue, 23 Apr 2019 21:30:30 +0000 (21:30 +0000)]
[WebAssembly] Emit br_table for most switch instructions
Summary:
Always convert switches to br_tables unless there is only one case,
which is equivalent to a simple branch. This reduces code size for wasm,
and we defer possible jump table optimizations to the VM.
Addresses PR41502.
Reviewers: kripken, sunfish
Subscribers: dschuff, sbc100, jgravelle-google, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60966
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359038
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Heejin Ahn [Tue, 23 Apr 2019 21:17:03 +0000 (21:17 +0000)]
[WebAssembly] Make LBB markers not affected by test order
Summary:
This way we can change the order of tests or delete some of them without
affecting tests for other functions.
Reviewers: tlively
Subscribers: sunfish, dschuff, sbc100, jgravelle-google, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60929
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359036
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Amy Huang [Tue, 23 Apr 2019 21:12:58 +0000 (21:12 +0000)]
Revert "[MS] Emit S_HEAPALLOCSITE debug info" because of ToTWin64(db)
buildbot failure.
This reverts commit
d07d6d617713bececf57f3547434dd52f0f13f9e and
c774f687b6880484a126ed3e3d737e74c926f0ae.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359034
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Jessica Paquette [Tue, 23 Apr 2019 21:11:57 +0000 (21:11 +0000)]
[AArch64][GlobalISel] Legalize G_INTRINSIC_ROUND
Add it to the same rule as G_FCEIL etc. Add a legalizer test, and add a missing
switch case to AArch64LegalizerInfo.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359033
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Alina Sbirlea [Tue, 23 Apr 2019 20:59:44 +0000 (20:59 +0000)]
[MemorySSA] LCSSA preserves MemorySSA.
Summary:
Enabling MemorySSA in the old pass manager leads to MemorySSA being run
twice due to the fact that LCSSA and LoopSimplify do not preserve
MemorySSA. This is the first step to address that: target LCSSA.
LCSSA does not make any changes that invalidate MemorySSA, so it
preserves it by design. It must preserve AA as well, for this to hold.
After this patch, MemorySSA is still run twice in the old pass manager.
Step two follows: target LoopSimplify.
Subscribers: mehdi_amini, jlebar, Prazek, llvm-commits, george.burgess.iv, chandlerc
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60832
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359032
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Craig Topper [Tue, 23 Apr 2019 20:52:00 +0000 (20:52 +0000)]
[X86] Autogenerate complete checks. NFC
Prep for D60993
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359031
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Jessica Paquette [Tue, 23 Apr 2019 20:46:19 +0000 (20:46 +0000)]
[AArch64][GlobalISel] Actually select G_INTRINSIC_TRUNC
Apparently FileCheck wasn't actually matching the fallback check lines in
arm64-vfloatintrinsics.ll properly. So, there were selection fallbacks for
G_INTRINSIC_TRUNC there.
Actually hook it up into AArch64InstructionSelector.cpp and write a proper
selection test.
I guess I'll figure out the FileCheck magic to make the fallback checks work
properly in arm64-vfloatintrinsics.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359030
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Akira Hatanaka [Tue, 23 Apr 2019 19:49:03 +0000 (19:49 +0000)]
[ObjC][ARC] Check the basic block size before calling
DominatorTree::dominate.
ARC contract pass has an optimization that replaces the uses of the
argument of an ObjC runtime function call with the call result.
For example:
; Before optimization
%1 = tail call i8* @foo1()
%2 = tail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* %1)
store i8* %1, i8** @g0, align 8
; After optimization
%1 = tail call i8* @foo1()
%2 = tail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* %1)
store i8* %2, i8** @g0, align 8 // %1 is replaced with %2
Before replacing the argument use, DominatorTree::dominate is called to
determine whether the user instruction is dominated by the ObjC runtime
function call instruction. The call to DominatorTree::dominate can be
expensive if the two instructions belong to the same basic block and the
size of the basic block is large. This patch checks the basic block size
and just bails out if the size exceeds the limit set by command line
option "arc-contract-max-bb-size".
rdar://problem/
49477063
Differential Revision: https://reviews.llvm.org/D60900
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359027
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David Blaikie [Tue, 23 Apr 2019 19:00:45 +0000 (19:00 +0000)]
Reapply: "DebugInfo: Emit only one kind of accelerated access/name table""
Originally committed in r358931
Reverted in r358997
Seems this change made Apple accelerator tables miss names (because
names started respecting the CU NameTableKind GNU & assuming that
shouldn't produce accelerated names too), which is never correct (apple
accelerator tables don't have separators or CU lists - if present, they
must describe all names in all CUs).
Original Description:
Currently to opt in to debug_names in DWARFv5, the IR must contain
'nameTableKind: Default' which also enables debug_pubnames.
Instead, only allow one of {debug_names, apple_names, debug_pubnames,
debug_gnu_pubnames}.
nameTableKind: Default gives debug_names in DWARFv5 and greater,
debug_pubnames in v4 and earlier - and apple_names when tuning for lldb
on MachO.
nameTableKind: GNU always gives gnu_pubnames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359026
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Teresa Johnson [Tue, 23 Apr 2019 18:56:19 +0000 (18:56 +0000)]
[ThinLTO] Pass down opt level to LTO backend and handle -O0 LTO in new PM
Summary:
The opt level was not being passed down to the ThinLTO backend when
invoked via clang (for distributed ThinLTO).
This exposed an issue where the new PM was asserting if the Thin or
regular LTO backend pipelines were invoked with -O0 (not a new issue,
could be provoked by invoking in-process *LTO backends via linker using
new PM and -O0). Fix this similar to the old PM where -O0 only does the
necessary lowering of type metadata (WPD and LowerTypeTest passes) and
then quits, rather than asserting.
Reviewers: xur
Subscribers: mehdi_amini, inglorion, eraman, hiraditya, steven_wu, dexonsmith, cfe-commits, llvm-commits, pcc
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D61022
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359025
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Nico Weber [Tue, 23 Apr 2019 18:46:53 +0000 (18:46 +0000)]
llvm-cvtres: Split addChild(ID) into two functions
Before, there was an IsData parameter. Now, there are two different
functions for data nodes and ID nodes. No behavior change, needed for a
follow-up change to make two data nodes (but not two ID nodes) with the
same ID an error.
For consistency, rename another addChild() overload to addNameChild().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359024
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Jessica Paquette [Tue, 23 Apr 2019 18:20:47 +0000 (18:20 +0000)]
[AArch64][GlobalISel] Teach regbankselect about G_INTRINSIC_TRUNC
Add it to isPreISelGenericFloatingPointOpcode, and add a regbankselect test.
Update arm64-vfloatintrinsics.ll now that we can select it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359022
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Jessica Paquette [Tue, 23 Apr 2019 18:20:44 +0000 (18:20 +0000)]
[AArch64][GlobalISel] Legalize G_INTRINSIC_TRUNC
Same patch as G_FCEIL etc.
Add the missing switch case in widenScalar, add G_INTRINSIC_TRUNC to the correct
rule in AArch64LegalizerInfo.cpp, and add a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359021
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Nikita Popov [Tue, 23 Apr 2019 18:00:17 +0000 (18:00 +0000)]
[ConstantRange] Add urem support
Add urem support to ConstantRange, so we can handle in in LVI. This
is an approximate implementation that tries to capture the most useful
conditions: If the LHS is always strictly smaller than the RHS, then
the urem is a no-op and the result is the same as the LHS range.
Otherwise the lower bound is zero and the upper bound is
min(LHSMax, RHSMax - 1).
Differential Revision: https://reviews.llvm.org/D60952
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359019
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Nikita Popov [Tue, 23 Apr 2019 18:00:02 +0000 (18:00 +0000)]
[ConstantRangeTest] Move helper methods; NFC
Move Test(Unsigned|Signed)BinOpExhaustive() towards the top of the
file, so they're easier to reuse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359018
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Stanislav Mekhanoshin [Tue, 23 Apr 2019 17:59:26 +0000 (17:59 +0000)]
[AMDGPU] Fixed addReg() in SIOptimizeExecMaskingPreRA.cpp
The second argument is flags, not subreg.
Differential Revision: https://reviews.llvm.org/D61031
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359017
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Jessica Paquette [Tue, 23 Apr 2019 17:37:56 +0000 (17:37 +0000)]
[AArch64][GlobalISel] Legalize G_FMA for more vector types
Same as G_FCEIL, G_FABS, etc. Just move it into that rule.
Add a legalizer test for G_FMA, which we didn't have before and update
arm64-vfloatintrinsics.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359015
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Alina Sbirlea [Tue, 23 Apr 2019 17:21:18 +0000 (17:21 +0000)]
[AliasAnalysis] AAResults preserves AAManager.
Summary:
AAResults should not invalidate AAManager.
Update tests.
Reviewers: chandlerc
Subscribers: mehdi_amini, jlebar, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60914
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359014
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Jessica Paquette [Tue, 23 Apr 2019 17:17:06 +0000 (17:17 +0000)]
[AArch64][GlobalISel] Add G_FMA to isPreISelGenericFloatingPointOpcode
Noticed an unnecessary fallback in arm64-vmul caused by this.
Also add a regbankselect test for G_FMA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359013
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Joel E. Denny [Tue, 23 Apr 2019 17:04:15 +0000 (17:04 +0000)]
[APSInt][OpenMP] Fix isNegative, etc. for unsigned types
Without this patch, APSInt inherits APInt::isNegative, which merely
checks the sign bit without regard to whether the type is actually
signed. isNonNegative and isStrictlyPositive call isNegative and so
are also affected.
This patch adjusts APSInt to override isNegative, isNonNegative, and
isStrictlyPositive with implementations that consider whether the type
is signed.
A large set of Clang OpenMP tests are affected. Without this patch,
these tests assume that `true` is not a valid argument for clauses
like `collapse`. Indeed, `true` fails APInt::isStrictlyPositive but
not APSInt::isStrictlyPositive. This patch adjusts those tests to
assume `true` should be accepted.
This patch also adds tests revealing various other similar fixes due
to APSInt::isNegative calls in Clang's ExprConstant.cpp and
SemaExpr.cpp: `++` and `--` overflow in `constexpr`, evaluated object
size based on `alloc_size`, `<<` and `>>` shift count validation, and
OpenMP array section validation.
Reviewed By: lebedev.ri, ABataev, hfinkel
Differential Revision: https://reviews.llvm.org/D59712
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359012
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Adrian Prantl [Tue, 23 Apr 2019 16:42:35 +0000 (16:42 +0000)]
[dsymutil] Put Swift interface files into a per-arch subdirectory.
This was meant to be part of the original commit r358921, but somehow
got lost.
<rdar://problem/
49751748>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359010
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Sanjay Patel [Tue, 23 Apr 2019 16:31:30 +0000 (16:31 +0000)]
[x86] fix test checks for fdiv combine; NFC
Must have picked up some transient code changes when originally generating this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359008
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Nico Weber [Tue, 23 Apr 2019 16:20:27 +0000 (16:20 +0000)]
llvm-undname: Support demangling the spaceship operator
Also add a test for demanling the co_await operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359007
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Sanjay Patel [Tue, 23 Apr 2019 16:16:16 +0000 (16:16 +0000)]
[x86] add tests for vector fdiv with splat divisor; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359006
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Adrian Prantl [Tue, 23 Apr 2019 15:44:22 +0000 (15:44 +0000)]
[dsymutil] Fix use-after-free when sys::path::append grows the buffer.
<rdar://problem/
50117620>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359003
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Adrian Prantl [Tue, 23 Apr 2019 15:44:19 +0000 (15:44 +0000)]
Revert "[dsymutil] Fix use-after-free when sys::path::append grows the buffer."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359002
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Adrian Prantl [Tue, 23 Apr 2019 15:39:13 +0000 (15:39 +0000)]
[dsymutil] Fix use-after-free when sys::path::append grows the buffer.
<rdar://problem/
50117620>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359001
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Philip Reames [Tue, 23 Apr 2019 15:25:14 +0000 (15:25 +0000)]
[InstCombine] Convert a masked.load of a dereferenceable address to an unconditional load
If we have a masked.load from a location we know to be dereferenceable, we can simply issue a speculative unconditional load against that address. The key advantage is that it produces IR which is well understood by the optimizer. The select (cnd, load, passthrough) form produced should be pattern matchable back to hardware predication if profitable.
Differential Revision: https://reviews.llvm.org/D59703
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359000
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Sanjay Patel [Tue, 23 Apr 2019 15:20:17 +0000 (15:20 +0000)]
[x86] use psubus for more vsetcc lowering (PR39859)
Circling back to a leftover bit from PR39859:
https://bugs.llvm.org/show_bug.cgi?id=39859#c1
...we have this counter-intuitive (based on the test diffs) opportunity to use 'psubus'.
This appears to be the better perf option for both Haswell and Jaguar based on llvm-mca.
We already do this transform for the SETULT predicate, so this makes the code more
symmetrical too. If we have pminub/pminuw, we prefer those, so this should not affect
anything but pre-SSE4.1 subtargets.
$ cat before.s
movdqa -16(%rip), %xmm2 ## xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
pxor %xmm0, %xmm2
pcmpgtw -32(%rip), %xmm2 ## xmm2 = [255,255,255,255,255,255,255,255]
pand %xmm2, %xmm0
pandn %xmm1, %xmm2
por %xmm2, %xmm0
$ cat after.s
movdqa -16(%rip), %xmm2 ## xmm2 = [256,256,256,256,256,256,256,256]
psubusw %xmm0, %xmm2
pxor %xmm3, %xmm3
pcmpeqw %xmm2, %xmm3
pand %xmm3, %xmm0
pandn %xmm1, %xmm3
por %xmm3, %xmm0
$ llvm-mca before.s -mcpu=haswell
Iterations: 100
Instructions: 600
Total Cycles: 909
Total uOps: 700
Dispatch Width: 4
uOps Per Cycle: 0.77
IPC: 0.66
Block RThroughput: 1.8
$ llvm-mca after.s -mcpu=haswell
Iterations: 100
Instructions: 700
Total Cycles: 409
Total uOps: 700
Dispatch Width: 4
uOps Per Cycle: 1.71
IPC: 1.71
Block RThroughput: 1.8
Differential Revision: https://reviews.llvm.org/D60838
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358999
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Joerg Sonnenberger [Tue, 23 Apr 2019 15:15:33 +0000 (15:15 +0000)]
[SPARC] Use the correct register set for the "r" asm constraint.
64bit mode must use 64bit registers, otherwise assumptions about the top
half of the registers are made. Problem found by Takeshi Nakayama in
NetBSD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358998
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David Blaikie [Tue, 23 Apr 2019 15:03:24 +0000 (15:03 +0000)]
Revert "DebugInfo: Emit only one kind of accelerated access/name table"
Regresses some apple_names situations - still investigating.
This reverts commit r358931.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358997
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Fangrui Song [Tue, 23 Apr 2019 14:51:27 +0000 (14:51 +0000)]
Use llvm::stable_sort
While touching the code, simplify if feasible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358996
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Lewis Revill [Tue, 23 Apr 2019 14:46:13 +0000 (14:46 +0000)]
[RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers
This patch adds support for parsing and assembling the %tls_ie_pcrel_hi
and %tls_gd_pcrel_hi modifiers.
Differential Revision: https://reviews.llvm.org/D55342
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358994
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Nico Weber [Tue, 23 Apr 2019 14:32:18 +0000 (14:32 +0000)]
gn build: Merge r358944
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358993
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Scott Linder [Tue, 23 Apr 2019 14:31:17 +0000 (14:31 +0000)]
[AMDGPU] Fix hidden argument metadata duplication for V3
Essentially complete a proper rebase of the V3 metadata change over
https://reviews.llvm.org/D49096.
Minimize the diff between the V2 and V3 variants of the relevant lit
tests, and clean up some trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358992
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Nico Weber [Tue, 23 Apr 2019 14:31:15 +0000 (14:31 +0000)]
gn build: Merge r358949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358991
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Simon Pilgrim [Tue, 23 Apr 2019 14:07:49 +0000 (14:07 +0000)]
[X86] Pull out collectConcatOps helper. NFCI.
Create collectConcatOps helper that returns all the subvector ops for CONCAT_VECTORS or a INSERT_SUBVECTOR series.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358989
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Tim Northover [Tue, 23 Apr 2019 13:50:13 +0000 (13:50 +0000)]
ARM: disallow add/sub to sp unless Rn is also sp.
The manual says that Thumb2 add/sub instructions are only allowed to modify sp
if the first source is also sp. This is slightly different from the usual rGPR
restriction since it's context-sensitive, so implement it in C++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358987
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Roman Lebedev [Tue, 23 Apr 2019 13:46:18 +0000 (13:46 +0000)]
[Docs] ReleaseNotes: fixup markup in memcmp()->bcmp() entry
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358986
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Sanjay Patel [Tue, 23 Apr 2019 13:16:41 +0000 (13:16 +0000)]
[DAGCombiner] generalize binop-of-splats scalarization
If we only match build vectors, we can miss some patterns
that use shuffles as seen in the affected tests.
Note that the underlying calls within getSplatSourceVector()
have the potential for compile-time explosion because of
exponential recursion looking through binop opcodes, but
currently the list of supported opcodes is very limited.
Both of those problems should be addressed in follow-up
patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358984
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Nicolai Haehnle [Tue, 23 Apr 2019 13:12:52 +0000 (13:12 +0000)]
AMDGPU: Fix LCSSA phi lowering in SILowerI1Copies
Summary:
When an LCSSA phi survives through instruction selection, the pass
ends up removing that phi entirely because it is dominated by the
logic that does the lanemask merging.
This then used to trigger an assertion when processing a dependent
phi instruction.
Change-Id: Id4949719f8298062fe476a25718acccc109113b6
Reviewers: llvm-commits
Subscribers: kzhuravl, jvesely, wdng, yaxunl, t-tye, tpr, dstuttard, rtaylor, arsenm
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60999
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358983
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Fedor Sergeev [Tue, 23 Apr 2019 12:43:27 +0000 (12:43 +0000)]
[CallSite removal] move InlineCost to CallBase usage
Converting InlineCost interface and its internals into CallBase usage.
Inliners themselves are still not converted.
Reviewed By: reames
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60636
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358982
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Aaron Ballman [Tue, 23 Apr 2019 12:16:28 +0000 (12:16 +0000)]
Removing the explicit specifier from some default constructors; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358978
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David Green [Tue, 23 Apr 2019 12:11:26 +0000 (12:11 +0000)]
[ARM] Update check for CBZ in Ifcvt
The check for creating CBZ in constant island pass recently obtained the
ability to search backwards to find a Cmp instruction. The code in IfCvt should
mirror this to allow more conversions to the smaller form. The common code has
been pulled out into a separate function to be shared between the two places.
Differential Revision: https://reviews.llvm.org/D60090
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358977
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David Green [Tue, 23 Apr 2019 11:46:58 +0000 (11:46 +0000)]
[ARM] Don't replicate instructions in Ifcvt at minsize
Ifcvt can replicate instructions as it converts them to be predicated. This
stops that from happening on thumb2 targets at minsize where an extra IT
instruction is likely needed.
Differential Revision: https://reviews.llvm.org/D60089
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358974
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Simon Pilgrim [Tue, 23 Apr 2019 11:16:16 +0000 (11:16 +0000)]
Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358970
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Tue, 23 Apr 2019 11:11:34 +0000 (11:11 +0000)]
Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358969
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Bjorn Pettersson [Tue, 23 Apr 2019 10:01:08 +0000 (10:01 +0000)]
[DAGCombiner] Combine OR as ADD when no common bits are set
Summary:
The DAGCombiner is rewriting (canonicalizing) an ISD::ADD
with no common bits set in the operands as an ISD::OR node.
This could sometimes result in "missing out" on some
combines that normally are performed for ADD. To be more
specific this could happen if we already have rewritten an
ADD into OR, and later (after legalizations or combines)
we expose patterns that could have been optimized if we
had seen the OR as an ADD (e.g. reassociations based on ADD).
To make the DAG combiner less sensitive to if ADD or OR is
used for these "no common bits set" ADD/OR operations we
now apply most of the ADD combines also to an OR operation,
when value tracking indicates that the operands have no
common bits set.
Reviewers: spatel, RKSimon, craig.topper, kparzysz
Reviewed By: spatel
Subscribers: arsenm, rampitec, lebedev.ri, jvesely, nhaehnle, hiraditya, javed.absar, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358965
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Javed Absar [Tue, 23 Apr 2019 09:39:58 +0000 (09:39 +0000)]
[AArch64] Add support for MTE intrinsics
This patch provides intrinsics support for Memory Tagging Extension (MTE),
which was introduced with the Armv8.5-a architecture.
The intrinsics are described in detail in the latest
ACLE Q1 2019 documentation: https://developer.arm.com/docs/101028/latest
Reviewed by: David Spickett
Differential Revision: https://reviews.llvm.org/D60486
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358963
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Diogo N. Sampaio [Tue, 23 Apr 2019 09:36:39 +0000 (09:36 +0000)]
[ARM][FIX] Add missing f16.lane.vldN/vstN lowering
Summary:
Add missing D and Q lane VLDSTLane lowering
for fp16 elements.
Reviewers: efriedma, kosarev, SjoerdMeijer, ostannard
Reviewed By: efriedma
Subscribers: javed.absar, kristof.beyls, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60874
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358962
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George Rimar [Tue, 23 Apr 2019 09:16:53 +0000 (09:16 +0000)]
[llvm-mc] - Properly set the the address align field of the compressed sections.
About the compressed sections spec says:
(https://docs.oracle.com/cd/E37838_01/html/E36783/section_compression.html)
sh_addralign fields of the section header for a compressed section
reflect the requirements of the compressed section.
Currently, llvm-mc always puts uncompressed section alignment to sh_addralign.
It is not correct. zlib styled section contains an Elfxx_Chdr header,
so we should either use 4 or 8 values depending on the target
(Uncompressed section alignment is stored in ch_addralign field of the compression header).
GNU assembler version 2.31.1 also has this issue,
but in 2.32.51 it was already fixed. This is how it was found
during debugging of the https://bugs.llvm.org/show_bug.cgi?id=40482
actually.
Differential revision: https://reviews.llvm.org/D60965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358960
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David Green [Tue, 23 Apr 2019 08:52:21 +0000 (08:52 +0000)]
[LSR] Limit the recursion for setup cost
In some circumstances we can end up with setup costs that are very complex to
compute, even though the scevs are not very complex to create. This can also
lead to setupcosts that are calculated to be exactly -1, which LSR treats as an
invalid cost. This patch puts a limit on the recursion depth for setup cost to
prevent them taking too long.
Thanks to @reames for the report and test case.
Differential Revision: https://reviews.llvm.org/D60944
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358958
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Sam Clegg [Tue, 23 Apr 2019 03:43:26 +0000 (03:43 +0000)]
[WebAssembly] Bail out of fastisel earlier when computing PIC addresses
This change partially reverts https://reviews.llvm.org/D54647 in favor
of bailing out during computeAddress instead.
This catches the condition earlier and handles more cases.
Differential Revision: https://reviews.llvm.org/D60986
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358948
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Qiu Chaofan [Tue, 23 Apr 2019 02:37:48 +0000 (02:37 +0000)]
add Qiu Chaofan (qiucf@cn.ibm.com) to the CREDITS.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358942
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Chandler Carruth [Tue, 23 Apr 2019 01:42:07 +0000 (01:42 +0000)]
Revert "Use const DebugLoc&"
This reverts r358910 (git commit
2b744665308fc8d30a3baecb4947f2bd81aa7d30)
While this patch *seems* trivial and safe and correct, it is not. The
copies are actually load bearing copies. You can observe this with MSan
or other ways of checking for use-after-destroy, but otherwise this may
result in ... difficult to debug inexplicable behavior.
I suspect the issue is that the debug location is used after the
original reference to it is removed. The metadata backing it gets
destroyed as its last references goes away, and then we reference it
later through these const references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358940
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Petr Hosek [Mon, 22 Apr 2019 23:31:39 +0000 (23:31 +0000)]
[CMake] Replace the sanitizer support in runtimes build with multilib
This is a more generic solution; while the sanitizer support can be used
only for sanitizer instrumented builds, the multilib support can be used
to build other variants such as noexcept which is what we would like to use
in Fuchsia.
The name CMake target name uses the target name, same as for the regular
runtimes build and the name of the multilib, concatenated with '+'. The
libraries are installed in a subdirectory named after the multilib.
Differential Revision: https://reviews.llvm.org/D60926
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358935
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Adrian Prantl [Mon, 22 Apr 2019 22:51:34 +0000 (22:51 +0000)]
Fully qualify llvm::Optional, some compilers complain otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358933
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David Blaikie [Mon, 22 Apr 2019 22:45:11 +0000 (22:45 +0000)]
DebugInfo: Emit only one kind of accelerated access/name table
Currently to opt in to debug_names in DWARFv5, the IR must contain
'nameTableKind: Default' which also enables debug_pubnames.
Instead, only allow one of {debug_names, apple_names, debug_pubnames,
debug_gnu_pubnames}.
nameTableKind: Default gives debug_names in DWARFv5 and greater,
debug_pubnames in v4 and earlier - and apple_names when tuning for lldb
on MachO.
nameTableKind: GNU always gives gnu_pubnames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358931
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Sanjay Patel [Mon, 22 Apr 2019 22:43:36 +0000 (22:43 +0000)]
[SelectionDAG] move splat util functions up from x86 lowering
This was supposed to be NFC, but the change in SDLoc
definitions causes instruction scheduling changes.
There's nothing x86-specific in this code, and it can
likely be used from DAGCombiner's simplifyVBinOp().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358930
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Adrian Prantl [Mon, 22 Apr 2019 22:40:37 +0000 (22:40 +0000)]
Try to work around compile errors with older versions of GCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358927
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Douglas Yung [Mon, 22 Apr 2019 22:31:57 +0000 (22:31 +0000)]
Relax test to check for a valid number instead of a specific number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358926
91177308-0d34-0410-b5e6-
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Michael Liao [Mon, 22 Apr 2019 22:05:49 +0000 (22:05 +0000)]
[AMDGPU] Fix an issue in `op_sel_hi` skipping.
Summary:
- Only apply packed literal `op_sel_hi` skipping on operands requiring
packed literals. Even an instruction is `packed`, it may have operand
requiring non-packed literal, such as `v_dot2_f32_f16`.
Reviewers: rampitec, arsenm, kzhuravl
Subscribers: jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358922
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Adrian Prantl [Mon, 22 Apr 2019 21:33:22 +0000 (21:33 +0000)]
[dsymutil] Collect parseable Swift interfaces in the .dSYM bundle.
When a Swift module built with debug info imports a library without
debug info from a textual interface, the textual interface is
necessary to reconstruct types defined in the library's interface. By
recording the Swift interface files in DWARF dsymutil can collect them
and LLDB can find them.
This patch teaches dsymutil to look for DW_TAG_imported_modules and
records all references to parseable Swift ingterfrace files and copies
them to
a.out.dSYM/Contents/Resources/<Arch>/<ModuleName>.swiftinterface
<rdar://problem/
49751748>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358921
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Philip Reames [Mon, 22 Apr 2019 20:28:19 +0000 (20:28 +0000)]
[InstCombine] Eliminate stores to constant memory
If we have a store to a piece of memory which is known constant, then we know the store must be storing back the same value. As a result, the store (or memset, or memmove) must either be down a dead path, or a noop. In either case, it is valid to simply remove the store.
The motivating case for this involves a memmove to a buffer which is constant down a path which is dynamically dead.
Note that I'm choosing to implement the less aggressive of two possible semantics here. We could simply say that the store *is undefined*, and prune the path. Consensus in the review was that the more aggressive form might be a good follow on change at a later date.
Differential Revision: https://reviews.llvm.org/D60659
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358919
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Bob Haarman [Mon, 22 Apr 2019 19:46:25 +0000 (19:46 +0000)]
[Support] unflake TempFileCollisions test
Summary:
This test was added to verify that createUniqueEntity() does
not enter an infinite loop when all possible names are taken. However,
it also checked that all possible names are generated, which is flaky
(because the names are generated randomly). This change increases the
number of attempts we make to make flakes exceedingly
unlikely (3.88e-62).
Reviewers: fedor.sergeev, rsmith
Reviewed By: fedor.sergeev
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D56336
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358914
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Philip Reames [Mon, 22 Apr 2019 19:30:01 +0000 (19:30 +0000)]
[InstSimplify] Move masked.gather w/no active lanes handling to InstSimplify from InstCombine
In the process, use the existing masked.load combine which is slightly stronger, and handles a mix of zero and undef elements in the mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358913
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Nico Weber [Mon, 22 Apr 2019 19:25:40 +0000 (19:25 +0000)]
gn build: Merge r358869
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358912
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Matt Arsenault [Mon, 22 Apr 2019 19:14:27 +0000 (19:14 +0000)]
Use const DebugLoc&
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358910
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Matt Arsenault [Mon, 22 Apr 2019 19:14:26 +0000 (19:14 +0000)]
AMDGPU: Skip debug instructions in assert
These are inserted after branch relaxation, and for some reason it's
decided to put them in the long branch expansion block. It's probably
not great to rely on the source block address, so this should probably
be switched to being PC relative instead of relying on the block
address
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358909
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Philip Reames [Mon, 22 Apr 2019 18:51:58 +0000 (18:51 +0000)]
[Tests] Revise a test as requested by reviewer in D59703
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358907
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Philip Reames [Mon, 22 Apr 2019 18:28:44 +0000 (18:28 +0000)]
[Tests] Add a negative test for masked.gather part of D59703
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358906
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Justin Bogner [Mon, 22 Apr 2019 17:38:29 +0000 (17:38 +0000)]
[IPSCCP] Add missing `AssumptionCacheTracker` dependency
Back in August, r340525 introduced a dependency on the assumption
cache tracker in the ipsccp pass, but that commit missed a call to
INITIALIZE_PASS_DEPENDENCY, which leaves the assumption cache
improperly registered if SCCP is the only thing that pulls it in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358903
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Philip Reames [Mon, 22 Apr 2019 17:13:43 +0000 (17:13 +0000)]
[LPM/BPI] Preserve BPI through trivial loop pass pipeline (e.g. LCSSA, LoopSimplify)
Currently, we do not expose BPI to loop passes at all. In the old pass manager, we appear to have been ignoring the fact that LCSSA and/or LoopSimplify didn't preserve BPI, and making it available to the following loop passes anyways. In the new one, it's invalidated before running any loop pass if either LCSSA or LoopSimplify actually make changes. If they don't make changes, then BPI is valid and available. So, we go ahead and teach LCSSA and LoopSimplify how to preserve BPI for consistency between old and new pass managers.
This patch avoids an invalidation between the two requires in the following trivial pass pipeline:
opt -passes="requires<branch-prob>,loop(no-op-loop),requires<branch-prob>"
(when the input file is one which requires either LCSSA or LoopSimplify to canonicalize the loops)
Differential Revision: https://reviews.llvm.org/D60790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358901
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Wei Mi [Mon, 22 Apr 2019 17:04:51 +0000 (17:04 +0000)]
[PGO/SamplePGO][NFC] Move the function updateProfWeight from Instruction
to CallInst.
The issue was raised here: https://reviews.llvm.org/D60903#
1472783
The function Instruction::updateProfWeight is only used for CallInst in
profile update. From the current interface, it is very easy to think that
the function can also be used for branch instruction. However, Branch
instruction does't need the scaling the function provides for
branch_weights and VP (value profile), in addition, scaling may introduce
inaccuracy for branch probablity.
The patch moves the function updateProfWeight from Instruction class to
CallInst to remove the confusion. The patch also changes the scaling of
branch_weights from a loop to a block because we know that ProfileData
for branch_weights of CallInst will only have two operands at most.
Differential Revision: https://reviews.llvm.org/D60911
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358900
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Fangrui Song [Mon, 22 Apr 2019 15:53:43 +0000 (15:53 +0000)]
Use llvm::stable_sort. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358897
91177308-0d34-0410-b5e6-
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Aaron Ballman [Mon, 22 Apr 2019 15:31:09 +0000 (15:31 +0000)]
Remove spurious semicolons; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358895
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Matt Arsenault [Mon, 22 Apr 2019 15:22:46 +0000 (15:22 +0000)]
AMDGPU/GlobalISel: Fix non-power-of-2 G_EXTRACT sources
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358894
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Fangrui Song [Mon, 22 Apr 2019 15:19:13 +0000 (15:19 +0000)]
STLExtras: add stable_sort wrappers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358893
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Matt Arsenault [Mon, 22 Apr 2019 15:10:42 +0000 (15:10 +0000)]
GlobalISel: Legalize scalar G_EXTRACT sources
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358892
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Nico Weber [Mon, 22 Apr 2019 15:05:18 +0000 (15:05 +0000)]
llvm-undname: Fix an assert-on-invalid, found by oss-fuzz
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358891
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Matt Arsenault [Mon, 22 Apr 2019 14:54:39 +0000 (14:54 +0000)]
AMDGPU: Fix not checking for copy when looking at copy src
Effectively reverts r356956. The check for isFullCopy was excessive,
but there still needs to be a check that this is a copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358890
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Dmitry Preobrazhensky [Mon, 22 Apr 2019 14:35:47 +0000 (14:35 +0000)]
[AMDGPU][MC] Corrected parsing of SP3 'neg' modifier
See bug 41156: https://bugs.llvm.org/show_bug.cgi?id=41156
Reviewers: artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D60624
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358888
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Simon Pilgrim [Mon, 22 Apr 2019 14:04:35 +0000 (14:04 +0000)]
[TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits bitcast handling
This patch adds support for BigBitWidth -> SmallBitWidth bitcasts, splitting the DemandedBits/Elts accordingly.
The AMDGPU backend needed an extra (srl (and x, c1 << c2), c2) -> (and (srl(x, c2), c1) combine to encourage BFE creation, I investigated putting this in DAGCombine but it caused a lot of noise on other targets - some improvements, some regressions.
The X86 changes are all definite wins.
Differential Revision: https://reviews.llvm.org/D60462
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358887
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Sanjay Patel [Mon, 22 Apr 2019 13:42:50 +0000 (13:42 +0000)]
[DAGCombiner] make variable name less ambiguous; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358886
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Sanjay Patel [Mon, 22 Apr 2019 13:36:07 +0000 (13:36 +0000)]
[DAGCombiner] prepare shuffle-of-splat to handle more patterns; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358884
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Robert Widmann [Mon, 22 Apr 2019 13:13:22 +0000 (13:13 +0000)]
[LLVM-C] Add accessors to the default floating-point metadata node
Summary: Add a getter and setter pair for floating-point accuracy metadata.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60527
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358883
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Serguei Katkov [Mon, 22 Apr 2019 10:35:07 +0000 (10:35 +0000)]
[NewPM] Add Option handling for SimpleLoopUnswitch
This patch enables passing options to SimpleLoopUnswitch via the passes pipeline.
Reviewers: chandlerc, fedor.sergeev, leonardchan, philip.pfaffe
Reviewed By: fedor.sergeev
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D60676
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358880
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Simon Pilgrim [Mon, 22 Apr 2019 10:19:09 +0000 (10:19 +0000)]
[AMDGPU] Regenerate uitofp i8 to float conversion tests.
Prep work for D60462
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358879
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