2006-05-24  Paul Brook  <paul@codesourcery.com>

* elf32-arm.c (put_arm_insn, put_thumb_insn): New functions.
(elf32_thumb_to_arm_stub, elf32_arm_to_thumb_stub,
elf32_arm_finish_dynamic_symbol): Use them.

Enable gprof for cross builds.

Add TLS support for hppa-linux

Updated Frewnch translation

Updated Vietnamese and Irish translations

Add support for AVR6 family

2006-05-23  H.J. Lu  <hongjiu.lu@intel.com>

PR ld/2655
PR ld/2657
* ld-elf/eh1.d: New file.
* ld-elf/eh1.s: Likewise.
* ld-elf/eh1a.s: Likewise.
* ld-elf/eh2.d: Likewise.
* ld-elf/eh2a.s: Likewise.
* ld-elf/eh3.d: Likewise.
* ld-elf/eh3.s: Likewise.
* ld-elf/eh3a.s: Likewise.

2006-05-23  H.J. Lu  <hongjiu.lu@intel.com>

PR ld/2655
PR ld/2657
* elf-eh-frame.c (_bfd_elf_write_section_eh_frame): Properly
update CIE/FDE length.  Don't pad to the section alignment.

merge from gcc

daily update

[ gas/ChangeLog ]
* config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
(ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
ISA_HAS_MXHC1): New macros.
(HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
ISA_HAS_64BIT_REGS.  Formatting fixes.  Improved comments.
(mips_cpu_info): Change to use combined ASE/IS_ISA flag.
(MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
(mips_after_parse_args): Change default handling of float register
size to account for 32bit code with 64bit FP. Better sanity checking
of ISA/ASE/ABI option combinations.
(s_mipsset): Support switching of GPR and FPR sizes via
.set {g,f}p={32,64,default}. Better sanity checking for .set ASE
options.
(mips_elf_final_processing): We should record the use of 64bit FP
registers in 32bit code but we don't, because ELF header flags are
a scarce ressource.
(mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
(mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
* doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
missing -march options. Document .set arch=CPU. Move .set smartmips
to ASE page. Use @code for .set FOO examples.

[ gas/testsuite/Changelog ]
* gas/mips/mips-gp32-fp64-pic.d, mips/mips-gp32-fp64.d,
gas/mips/mips-gp64-fp32-pic.d, gas/mips/mips-gp64-fp32.l,
gas/mips/mips-gp64-fp64.d: Adjust test cases to the changes assembler
output.
* gas/mips/mips-gp32-fp64.l, gas/mips/mips-gp64-fp32-pic.l: New files,
catch assembler warnings.

Updated translation

* config/tc-bfin.c (bfin_start_line_hook): Bump line counters
if needed.

* elf32-bfin.c (bfinfdpic_relocate_section): Clear reloc for
deteted entries in .eh_frame section.

Commit the missing bits of my last patch.

* config/bfin-defs.h (bfin_equals): Remove declaration.
* config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
* config/tc-bfin.c (bfin_name_is_register): Remove.
(bfin_equals): Remove.
* config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
(bfin_name_is_register): Remove declaration.

* elf32-bfin.c (bfin_check_relocs): Use __GLOBAL_OFFSET_TABLE_
instead of _GLOBAL_OFFSET_TABLE_.
(bfin_relocate_section): Ditto.
(_bfin_create_got_section): Ditto.
(elf32_bfinfdpic_create_dynamic_sections): Use
__PROCEDURE_LINKAGE_TABLE_ instead of _PROCEDURE_LINKAGE_TABLE_.
(bfin_finish_dynamic_symbol): Use __DYNAMIC instead of _DYNAMIC.

* elf64-ppc.c (compare_symbols): Prefer strong dynamic global
function syms over other syms.

daily update

2006-05-22  Steve Ellcey  <sje@cup.hp.com>

* MAINTAINERS: Change intl updating instructions.
* config.rpath: Copy from GCC tree.
* intl: Replace contents of intl directory with intl from GCC tree.

bfd/
* elflink.c (_bfd_elf_add_dynamic_entry): Remove DT_TEXTREL
check.
(bfd_elf_final_link): Add a late DT_TEXTREL check.
* elfxx-mips.c (MIPS_ELF_READONLY_SECTION): Define.
(mips_elf_create_dynamic_relocation): Set DF_TEXTREL.
(_bfd_mips_elf_check_relocs): Delete MIPS_READONLY_SECTION.
Use MIPS_ELF_READONLY_SECTION.
(_bfd_mips_elf_size_dynamic_sections): Clear DF_TEXTREL after
creating DT_TEXTREL.
(_bfd_mips_elf_finish_dynamic_sections): Clear textrel markers
if no text relocations were generated.
ld/testsuite/
* ld-mips-elf/textrel-1.d: Relax some patterns.

* po/ru.po: Updated translation.

* iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.

* gas/mips/mips32-dsp.l: Fix expected unsigned decoding of -1 in warning messages.
* gas/mips/mips32-mt.l: Likewise.

* scripttempl/elf32crx.sc (.rdata): Add .rodata.*.

fix typo

* ld-eld/start.s (start): Add this symbol for SH targets.
  (main): Add this symbol for HPPA targets.

* crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.

Updated Dutch translation

Remove ChangeLog entries, since the template files were already up to date.

Update translation templates

daily update

daily update

daily update

* gas/mips/vxworks1-el.d, gas/mips/vxworks1-xgot-el.d: Add little
endian testcases.
* gas/mips/vxworks1.d, gas/mips/vxworks1-xgot.d: Build as big endian.
* gas/mips/mips.exp: Run new testcases.

2006-05-19  H.J. Lu  <hongjiu.lu@intel.com>

* elfxx-ia64.c (ELF_MAXPAGESIZE): Fix a typo in comment.

* doc/Makefile.in: Regenerated.

* doc/Makefile.am (addr2line.1): Depend on $(binutils_TEXINFOS).
(ar.1): Likewise.
(dlltool.1): Likewise.
(nlmconv.1): Likewise.
(nm.1): Likewise.
(objcopy.1): Likewise.
(objdump.1): Likewise.
(ranlib.1): Likewise.
(readelf.1): Likewise.
(size.1): Likewise.
(strings.1): Likewise.
(strip.1): Likewise.
(windres.1): Likewise.
(cxxfilt.man): Likewise.
* doc/Makefile.in: Regenerated.

* config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
(mips_oddfpreg_ok): New function.
(mips_ip): Use it.
-------------------------------------------------------------------

* config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
* config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
(regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
reg_names_o32, reg_names_n32n64): Define register classes.
(reg_lookup): New function, use register classes.
(md_begin): Reserve register names in the symbol table. Simplify
OBJ_ELF defines.
(mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
Use reg_lookup.
(mips16_ip): Use reg_lookup.
(tc_get_register): Likewise.
(tc_mips_regname_to_dw2regnum): New function.
-------------------------------------------------------------------

* ld-scripts/empty-orphan.d: Update again.

* config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
Un-constify string argument.
* config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
Likewise.
* config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
Likewise.
* config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
Likewise.
* config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
Likewise.
* config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
Likewise.
* config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
Likewise.
-------------------------------------------------------------------

* gas/config/tc-m68k.c (m68k_init_arch): Move checking of
cfloat/m68881 to correct architecture before using it.

* ld-scripts/empty-orphan.t: Discard .reginfo.
* ld-scripts/empty-orphan.d: Update.

* ldlang.c (lang_size_sections_1): Don't check mem regions for
os->ignored sections.

* elf.c (elf_fake_sections): Formatting.
(assign_file_positions_for_load_sections): Only add SEC_ALLOC
sections to p_memsz.  Remove hack for PT_NOTE sections.  Allow
section alignment to increase p_align for PT_LOAD.
(assign_file_positions_for_non_load_sections): Remove ARM BPABI
hack for PT_DYNAMIC.  Instead, set p_filesz for all segments
other than PT_LOAD, and PT_NOTE in core.

daily update

daily update

* avr-dis.c: Formatting fix.

2006-05-17  Carlos O'Donell  <carlos@codesourcery.com>

* doc/binutils.texi: Use "Binutils Index" for index name.

* src-release (MAKEINFOFLAGS): Define.
(do-proto-toplev): Pass MAKEINFOFLAGS to submakes.

* ldlang.c (lang_size_sections): Call lang_reset_memory_regions
before redoing one_lang_size_sections_pass.

Fix a typo.

* ld-elfweak/size2.d, ld-elfweak/size2a.s, ld-elfweak/size2b.s:
Add __start as entry symbol.

* elf.c (assign_file_positions_for_segments): Split into..
(assign_file_positions_for_load_sections): ..this, and..
(assign_file_positions_for_non_load_sections): ..this new function,..
(assign_file_positions_except_relocs): ..writing program headers here.

* elflink.c (elf_gc_sweep): Don't specially keep non-alloc,
non-load sections if they have relocs.

daily update

* ld-elf/orphan.ld: Add placement for MIPS .reginfo section.

* config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate constant values.

daily update

2006-05-15  Paul Brook  <paul@codesourcery.com>

bfd/
* cpu-arm.c (bfd_is_arm_mapping_symbol_name): Rename ...
(bfd_is_arm_special_symbol_name): ... to this.  Add type argument.
Check symbol name is of specified type.
* elf32-arm.c (elf32_arm_is_target_special_symbol,
arm_elf_find_function, elf32_arm_output_symbol_hook): Use
bfd_is_arm_special_symbol_name.
* bfd-in.h (BFD_ARM_SPECIAL_SYM_TYPE_MAP,
BFD_ARM_SPECIAL_SYM_TYPE_TAG, BFD_ARM_SPECIAL_SYM_TYPE_OTHER,
BFD_ARM_SPECIAL_SYM_TYPE_ANY): Define.
(bfd_is_arm_mapping_symbol_name): Remove prototype.
(bfd_is_arm_special_symbol_name): Add prototype.
* bfd-in2.h: Regenerate.
gas/
* config/tc-arm.c (arm_adjust_symtab): Use
bfd_is_arm_special_symbol_name.
ld/testsuite/
* ld-arm/arm-be8.d: New test.
* ld-arm/arm-be8.s: New test.
* ld-arm/arm-elf.exp: Add arm-be8.

bfd:
        * elf32-xtensa.c (check_loop_aligned): Fix reversed check for
        undefined opcode.  Clean up assertions.
        (narrow_instruction, widen_instruction): Remove "do_it" parameters.
        Factor most of the code into separate functions....
        (can_narrow_instruction, can_widen_instruction): New.
        (prev_instr_is_a_loop): New.
        (compute_ebb_proposed_actions): Combine error handling code for
        decode errors.  Replace call to insn_decode_len with inline code.
        Use can_narrow_instruction and can_widen_instruction.  Handle errors
        from call to xtensa_opcode_is_loop.
        (relax_section): Adjust calls to narrow_instruction and
        widen_instruction.
gas:
        * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
        xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
        xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
        Handle errors from calls to xtensa_opcode_is_* functions.

2006-05-15  H.J. Lu  <hongjiu.lu@intel.com>

* dwarf.c (display_debug_frames): Don't return on ZERO
terminator.

PR 2658
* elf32-ppc.c (ppc_elf_relax_section): Don't segfault on non-pic
-shared link.

2006-05-14  H.J. Lu  <hongjiu.lu@intel.com>

* ld-elf/stab.d: Skip ia64-*-*.

daily update

[ gas/ChangeLog ]
* config/tc-mips.c (macro_build): Test for currently active
mips16 option.
(mips16_ip): Reject invalid opcodes.

[ opcodes/ChangeLog ]
* mips16-opc.c (I1, I32, I64): New shortcut defines.
(mips16_opcodes): Change membership of instructions to their
lowest baseline ISA.

[ gas/testsuite/ChangeLog ]
* gas/mips/mips.exp: Run new tests.
* gas/mips/mips16e.s, gas/mips/mips16e.d, gas/mips/mips16e-64.s,
gas/mips/mips16e-64.d, gas/mips/mips16e-64.l: New tests.

* config.sub, config.guess: Update from upstream sources.

daily update

daily update

merge from gcc

    * config.sub, config.guess: Update from upstream sources.

daily update

bfd/doc/

2006-05-11  Carlos O'Donell  <carlos@codesourcery.com>

* bfd.texinfo: Rename "Index" to "BFD Index"

gas/

2006-05-11  Carlos O'Donell  <carlos@codesourcery.com>

* doc/as.texinfo: Rename "Index" to "AS Index",
and "ABORT" to "ABORT (COFF)".

ld/

2006-05-11  Carlos O'Donell  <carlos@codesourcery.com>

* ld.texinfo: Rename "Index" to "LD Index"

2006-05-11  Michael Matz  <matz@suse.de>

* elflink.c (match_group_member): Correctly iterate group
members.

2006-05-11  Paul Brook  <paul@codesourcery.com>

bfd/
* elf32-arm.c (elf32_arm_reloc_map): Add MOVW and MOVT relocs.
(elf32_arm_final_link_relocate): Handle MOVW and MOVT relocs.
(elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto.
* reloc.c: Ditto.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* libcoff.h: Regenerate.
gas/
* config/tc-arm.c (parse_half): New function.
(operand_parse_code): Remove OP_Iffff.  Add OP_HALF.
(parse_operands): Ditto.
(do_mov16): Reject invalid relocations.
(do_t_mov16): Ditto.  Use Thumb reloc numbers.
(insns): Replace Iffff with HALF.
(md_apply_fix): Add MOVW and MOVT relocs.
(tc_gen_reloc): Ditto.
* doc/c-arm.texi: Document relocation operators
ld/testsuite/
* ld-arm/arm-elf.exp: Add arm-movwt.
* ld-arm/arm-movwt.d: New test.
* ld-arm/arm-movwt.s: New test.
* ld-arm/arm.ld: Add .far.

2006-05-11  Paul Brook  <paul@codesourcery.com>

gas/
* config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
gas/testsuite/
* gas/arm/local_function.d: New test.
* gas/arm/local_function.s: New test.

[ gas/ChangeLog ]
* config/tc-mips.c (append_insn): Don't check the range of j or
jal addresses.

[ gas/testsuite/ChangeLog ]
* gas/mips/jal-range.l: Don't check the range of j or jal
addresses.

* ld-elf/stab.d: New.

* elf.c (_bfd_elf_init_private_section_data): Don't change
section type if already set.

PR ld/2607
* elfcode.h (valid_section_index_p): New function: Checks for a valid section
  index.  Allows indicies in the range SHN_LOPROC to SHN_HIOS.
  (elf_object_p): Use valid_section_index_p.

Apply fixes to allow arm WinCE toolchain to produce working executables.

daily update

* ld-elf/sec64k.exp: Extend for MIPS ELF.

PR 2342
* elflink.c (_bfd_elf_default_action_discarded): Revert 2006-02-16.

daily update

2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>

* gas/i386/x86-64-gidt.d: Adjusted.

gas/testsuite/

2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>

* gas/i386/i386.exp: Run x86-64-gidt.

* gas/i386/x86-64-gidt.d: New file.
* gas/i386/x86-64-gidt.s: Likewise.

opcodes/

2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>

* i386-dis.c (grps): Update sgdt/sidt for 64bit.

Revised test (that is not O(n2)) for checking for orphaned cloned symbols

[ gas/ChangeLog ]
* config/tc-mips.c (append_insn): Only warn about an out-of-range
j or jal address.

[ gas/testsuite/ChangeLog ]
* gas/mips/jal-range.l: Only warn about an out-of-range j or jal
        address.

* config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups against
   symbols which are not going to be placed into the symbol table.
* coffcode.h (coff_write_relocs): Produce an error message if a an
   out-of-range symbol index is detected in a reloc.

    * expr.c (operand): Remove `if (0 && ..)' statement and
        subsequently unused target_op label.  Collapse `if (1 || ..)'
        statement.
        * app.c (do_scrub_chars): Remove unused case 0, as it is handled
        separately above the switch.

    * elf64-ppc.c (ppc64_elf_finish_dynamic_symbol): Remove unused
        local variable `dynobj'.

daily update

* gas/mips/mips32.s, gas/mips/mips32.d: Extend testcase to check
larger offset arguments for cache instructions.

PR gas/2623b
* config/tc-msp430.c (line_separator_character): Define as |.

[ gas/ChangeLog ]
* config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
(mips_opts): Likewise.
(file_ase_smartmips): New variable.
(ISA_HAS_ROR): SmartMIPS implements rotate instructions.
(macro_build): Handle SmartMIPS instructions.
(mips_ip): Likewise.
(md_longopts): Add argument handling for smartmips.
(md_parse_options, mips_after_parse_args): Likewise.
(s_mipsset): Add .set smartmips support.
(md_show_usage): Document -msmartmips/-mno-smartmips.
* doc/as.texinfo: Document -msmartmips/-mno-smartmips and
.set smartmips.
* doc/c-mips.texi: Likewise.

[ gas/testsuite/ChangeLog ]
* gas/mips/smartmips.s, gas/mips/smartmips.d: New smartmips test.
* gas/mips/mips.exp: Run smartmips test.

Remove bfd/ in ChangeLog entry.

daily update

* write.c (relax_segment): Add pass count arg.  Don't error on
negative org/space on first two passes.
(relax_seg_info): New struct.
(relax_seg, write_object_file): Adjust.
* write.h (relax_segment): Update prototype.