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Simon Dardis [Thu, 28 Sep 2017 15:24:07 +0000 (15:24 +0000)]
[mips] Remove codegen support for branch likely instructions.
This patch disables codegen support for branch likely instructions to
address a potential bug. These branches were unselectable as
they had the same patterns as the normal branches but came after them
when ISel was concerned.
The branch likely instructions were marked as having no delay
slots when they have annulling delay slots. The delay slot filler
does not currently handle annulling delay slot branches, so this
would lead to wrong codegen if these branches were generated.
Reviewers: atanasyan, nitesh.jain
Differential Revision: https://reviews.llvm.org/D38169
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314421
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Hans Wennborg [Thu, 28 Sep 2017 15:16:37 +0000 (15:16 +0000)]
Docs: fix link to Debugger intrinsic functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314420
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Benjamin Kramer [Thu, 28 Sep 2017 14:47:39 +0000 (14:47 +0000)]
[LoopUnroll] Fix use after poison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314418
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Amara Emerson [Thu, 28 Sep 2017 13:43:48 +0000 (13:43 +0000)]
[X86] Add overflow intrinsic test in preparation for D38161.
This commit adds the test file before codegen changes as requested in
D38161 to make it easier to see the difference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314416
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Bjorn Pettersson [Thu, 28 Sep 2017 13:10:06 +0000 (13:10 +0000)]
[DebugInfo] Do not extend range for physreg in LiveDebugVariables
Summary:
A DBG_VALUE that is referring to a physical register is
valid up until the next def of the register, or the end
of the basic block that it belongs to.
LiveDebugVariables is computing live intervals (slot index
ranges) for DBG_VALUE instructions, before regalloc, in order
to be able to re-insert DBG_VALUE instructions again after
regalloc. When the DBG_VALUE is mapping a variable to a
physical register we do not need to compute the range. We
should simply re-insert the DBG_VALUE at the start position.
The problem that was found, resulting in this patch, was a
situation when the DBG_VALUE was the last real use of the
physical register. The computeIntervals/extendDef methods
extended the range to cover the whole basic block, even though
the physical register very well could be allocated to some
virtual register inside the basic block. So the extended
range could not be trusted.
This patch is a preparation for https://reviews.llvm.org/D38229,
where the goal is to insert DBG_VALUE after each new definition
of a variable, even if the virtual registers that the variable
was connected to has been coalesced into using the same physical
register (e.g. due to two address instructions). For more info
see https://bugs.llvm.org/show_bug.cgi?id=34545
Reviewers: aprantl, rnk, echristo
Reviewed By: aprantl
Subscribers: Ka-Ka, llvm-commits
Differential Revision: https://reviews.llvm.org/D38140
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314414
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Benjamin Kramer [Thu, 28 Sep 2017 12:53:20 +0000 (12:53 +0000)]
[LoopInfo] Don't poison random memory regions.
The second argument for Allocator::Deallocate is the number of elements,
not the size of a single element. In asan mode specifying a large number
of elements poisoned random memory regions, leading to crashes
everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314413
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Florian Hahn [Thu, 28 Sep 2017 11:09:22 +0000 (11:09 +0000)]
[LVI] Move LVILatticeVal class to separate header file (NFC).
Summary:
This allows sharing the lattice value code between LVI and SCCP (D36656).
It also adds a `satisfiesPredicate` function, used by D36656.
Reviewers: davide, sanjoy, efriedma
Reviewed By: sanjoy
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D37591
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314411
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Coby Tayree [Thu, 28 Sep 2017 11:04:08 +0000 (11:04 +0000)]
[x86][AsmParser] Allow some more MS size directives
MS allows the following size directives: float/double and long as synonymous to dword/qword and dword, respectively.
Differential Revision: https://reviews.llvm.org/D37190
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314410
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Sean Eveson [Thu, 28 Sep 2017 10:07:30 +0000 (10:07 +0000)]
[llvm-cov] Create directory structure when filtering using -name*= options
Before this change using any of the -name*= command line options with an output
directory would result in a single file (functions.txt/functions.html)
containing the coverage for those specific functions. Now you get the same
directory structure as when not using any -name*= options.
Differential Revision: https://reviews.llvm.org/D38280
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314396
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Alex Bradbury [Thu, 28 Sep 2017 09:31:46 +0000 (09:31 +0000)]
Teach TargetInstrInfo::getInlineAsmLength to parse .space directives with integer arguments
It's currently quite difficult to test passes like branch relaxation, which
requires branches with large displacement to be generated. The .space assembler
directive makes it easy to create arbitrarily large basic blocks, but
getInlineAsmLength is not able to parse it and so the size of the block is not
correctly estimated. Other backends (AArch64, AMDGPU) introduce options just
for testing that artificially restrict the ranges of branch instructions (e.g.
aarch64-tbz-offset-bits). Although parsing a single form of the .space
directive feels inelegant, it does allow a more direct testing approach.
This patch adapts the .space parsing code from
Mips16InstrInfo::getInlineAsmLength and removes it now the extra functionality
is provided by the base implementation. I want to move this functionality to
the generic getInlineAsmLength as 1) I need the same for RISC-V, and 2) I feel
other backends will benefit from more direct testing of large branch
displacements.
Differential Revision: https://reviews.llvm.org/D37798
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314393
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Hiroshi Inoue [Thu, 28 Sep 2017 08:38:19 +0000 (08:38 +0000)]
[PowerPC] eliminate partially redundant compare instruction
This is a follow-on of D37211.
D37211 eliminates a compare instruction if two conditional branches can be made based on the one compare instruction, e.g.
if (a == 0) { ... }
else if (a < 0) { ... }
This patch extends this optimization to support partially redundant cases, which often happen in while loops.
For example, one compare instruction is moved from the loop body into the preheader by this optimization in the following example.
do {
if (a == 0) dummy1();
a = func(a);
} while (a > 0);
Differential Revision: https://reviews.llvm.org/D38236
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314390
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Alex Bradbury [Thu, 28 Sep 2017 08:26:24 +0000 (08:26 +0000)]
[RISCV] Add common fixups and relocations
%lo(), %hi(), and %pcrel_hi() are supported and test cases have been added to
ensure the appropriate fixups and relocations are generated. I've added an
instruction format field which is used in RISCVMCCodeEmitter to, for
instance, tell whether it should emit a lo12_i fixup or a lo12_s fixup
(RISC-V has two 12-bit immediate encodings depending on the instruction
type).
Differential Revision: https://reviews.llvm.org/D23568
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314389
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Mikael Holmen [Thu, 28 Sep 2017 08:22:35 +0000 (08:22 +0000)]
[RegAllocGreedy]: Allow recoloring of done register if it's non-tied
Summary:
If we have a non-allocated register, we allow us to try recoloring of an
already allocated and "Done" register, even if they are of the same
register class, if the non-allocated register has at least one tied def
and the allocated one has none.
It should be easier to recolor the non-tied register than the tied one, so
it might be an improvement even if they use the same regclasses.
Reviewers: qcolombet
Reviewed By: qcolombet
Subscribers: llvm-commits, MatzeB
Differential Revision: https://reviews.llvm.org/D38309
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314388
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Alex Bradbury [Thu, 28 Sep 2017 07:54:01 +0000 (07:54 +0000)]
[RISCV] Define RISC-V specific e_flags
Add RISC-V e_flags as defined in the ABI document:
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#file-header
Differential Revision: https://reviews.llvm.org/D38310
Patch by Chih-Mao Chen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314386
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Jatin Bhateja [Thu, 28 Sep 2017 07:40:52 +0000 (07:40 +0000)]
[X86] Adding more cases to horizontal [f]add/[f]sub for avx512.
Reviewers: jbhateja
Reviewed By: jbhateja
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38344
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314385
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George Burgess IV [Thu, 28 Sep 2017 06:17:19 +0000 (06:17 +0000)]
[DAGCombiner] Fix an off-by-one error in vector logic
Without this, we could end up trying to get the Nth (0-indexed) element
from a subvector of size N.
Differential Revision: https://reviews.llvm.org/D37880
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314380
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Yonghong Song [Thu, 28 Sep 2017 02:46:11 +0000 (02:46 +0000)]
bpf: add new insns for bswap_to_le and negation
This patch adds new insn, "reg = be16/be32/be64 reg",
for bswap to little endian for big-endian target (bpfeb).
It also adds new insn for negation "reg = -reg".
Currently, for source code, e.g.,
b = -a
LLVM still prefers to generate:
b = 0 - a
But "reg = -reg" format can be used in assembly code.
Signed-off-by: Yonghong Song <yhs@fb.com>
Acked-by: Alexei Starovoitov <ast@kernel.org>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314376
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Sanjoy Das [Thu, 28 Sep 2017 02:45:42 +0000 (02:45 +0000)]
Use a BumpPtrAllocator for Loop objects
Summary:
And now that we no longer have to explicitly free() the Loop instances, we can
(with more ease) use the destructor of LoopBase to do what LoopBase::clear() was
doing.
Reviewers: chandlerc
Subscribers: mehdi_amini, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D38201
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314375
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Lang Hames [Thu, 28 Sep 2017 02:17:35 +0000 (02:17 +0000)]
[ORC] Update the GlobalMappingLayer interface to fit the error-ized layer
concept.
Add a unit-test to make sure we don't backslide, and tweak the MockBaseLayer
utility to make it easier to test this kind of thing in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314374
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Rui Ueyama [Thu, 28 Sep 2017 00:27:39 +0000 (00:27 +0000)]
Fix a UBsan bot.
If we do not initialize Prefix here, Prefix.data() returns a nullptr.
Later, it is passed to memcpy. memcpy's behavior is undefined if src (or
dst) is a nullptr even if a given size is 0. That's why this code
triggered UBsan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314368
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Eugene Zelenko [Wed, 27 Sep 2017 23:26:01 +0000 (23:26 +0000)]
[CodeGen] Fix some Clang-tidy modernize-use-default-member-init and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314363
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Justin Lebar [Wed, 27 Sep 2017 23:16:56 +0000 (23:16 +0000)]
Check for overflows when calculating the offset in GetGEPCost.
Summary:
This avoids C++ UB if the GEP is weird and the calculation overflows
int64_t, and it's also observable in the cost model's results.
Such GEPs are almost surely not valid pointers, but LLVM nonetheless
generates them sometimes.
Reviewers: sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38337
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314362
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Galina Kistanova [Wed, 27 Sep 2017 23:09:14 +0000 (23:09 +0000)]
Reverted r313993.
This patch produces a crash and hexagon_vector_loop_carried_reuse_constant.ll test fails on Windows (llvm-clang-x86_64-expensive-checks-win build bot).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314361
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Craig Topper [Wed, 27 Sep 2017 22:57:18 +0000 (22:57 +0000)]
Revert r314017 '[InstCombine] Simplify check for RHS being a splat constant in foldICmpUsingKnownBits by just checking Op1Min==Op1Max rather than going through m_APInt.'
This reverts r314017 and similar code added in later commits. It seems to not work for pointer compares and is causing a bot failure for the last several days.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314360
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Dylan McKay [Wed, 27 Sep 2017 22:39:37 +0000 (22:39 +0000)]
Update the description of AVR32 for the ELFDumper
AVR32 is an unrelated architecture with 32-bit addressing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314359
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Rui Ueyama [Wed, 27 Sep 2017 22:03:15 +0000 (22:03 +0000)]
Fix -Wunused-variable for Release build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314353
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Sanjoy Das [Wed, 27 Sep 2017 21:45:22 +0000 (21:45 +0000)]
Return the LoopUnrollResult from tryToUnrollLoop; NFC
I will use this in a later change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314352
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Sanjoy Das [Wed, 27 Sep 2017 21:45:21 +0000 (21:45 +0000)]
LoopDeletion: use return value instead of passing in LPMUpdater; NFC
I will use this refactoring in a later patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314351
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Sanjoy Das [Wed, 27 Sep 2017 21:45:19 +0000 (21:45 +0000)]
Rename LoopUnrollStatus to LoopUnrollResult; NFC
A "Result" suffix is more appropriate here
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314350
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Rui Ueyama [Wed, 27 Sep 2017 21:38:02 +0000 (21:38 +0000)]
Fix off-by-one error in TarWriter.
The tar format originally supported up to 99 byte filename. The two
extensions are proposed later: Ustar or PAX.
In the UStar extension, a pathanme is split at a '/' and its "prefix"
and "suffix" are stored in different locations in the tar header. Since
"prefix" can be up to 155 byte, it can represent up to 254 byte
filename (but exact limit depends on the location of '/' character in
a pathname.)
Our TarWriter first attempt to use UStar extension and then fallback to
PAX extension.
But there's a bug in UStar header creation. "Suffix" part must be a NUL-
terminated string, but we didn't handle it correctly. As a result, if
your filename just 100 characters long, the last character was droppped.
This patch fixes the issue.
Differential Revision: https://reviews.llvm.org/D38149
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314349
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Brian Gesiak [Wed, 27 Sep 2017 21:37:33 +0000 (21:37 +0000)]
[CMake] Fix typo: "in-tree" -> "in-source" (NFC)
Summary:
*In-source builds* of LLVM, in which a user invokes `cmake` from within the
LLVM source directory, or invokes `cmake -B/path/to/source/dir/of/llvm`,
are explicitly checked for and disallowed by LLVM's `CMakeLists.txt`.
*In-tree builds*, on the other hand, refer to when the source directories
of projects such as Clang are nested within the `llvm/tools` source
directory. These are not disallowed, and are in fact a common way of
building LLVM and Clang.
Revise the comment to match the logic underneath it: it checks for an
"in-source build", not an "in-tree build".
Reviewers: beanz
Reviewed By: beanz
Subscribers: mgorny
Differential Revision: https://reviews.llvm.org/D38317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314348
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Don Hinton [Wed, 27 Sep 2017 21:19:56 +0000 (21:19 +0000)]
Cleanup some problems with LLVM_ENABLE_DUMP in release builds, and
always set LLVM_ENABLE_DUMP=ON for +Asserts builds.
Differential Revision: https://reviews.llvm.org/D38306
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314346
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Rui Ueyama [Wed, 27 Sep 2017 21:19:24 +0000 (21:19 +0000)]
Do not remove a target file in FileOutputBuffer::create().
FileOutputBuffer::create() attempts to remove a target file if the file
is a regular one, which results in an unexpected result in a failure
scenario.
If something goes wrong and the user of FileOutputBuffer decides to not
call commit(), it leaves nothing. An existing file is removed, and no
new file is created.
What we should do is to atomically replace an existing file with a new
file using rename(), so that it wouldn't remove an existing file without
creating a new one.
Differential Revision: https://reviews.llvm.org/D38283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314345
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Jessica Paquette [Wed, 27 Sep 2017 20:47:39 +0000 (20:47 +0000)]
[MachineOutliner] AArch64: Avoid saving + restoring LR if possible
This commit allows the outliner to avoid saving and restoring the link register
on AArch64 when it is dead within an entire class of candidates.
This introduces changes to the way the outliner interfaces with the target.
For example, the target now interfaces with the outliner using a
MachineOutlinerInfo struct rather than by using getOutliningCallOverhead and
getOutliningFrameOverhead.
This also improves several comments on the outliner's cost model.
https://reviews.llvm.org/D36721
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314341
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Craig Topper [Wed, 27 Sep 2017 20:34:17 +0000 (20:34 +0000)]
Revert r314249 "Recommit r314151 "[X86] Make all the NOREX CodeGenOnly instructions into postRA pseudos like the NOREX version of TEST."""
This caused PR34751
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314339
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Craig Topper [Wed, 27 Sep 2017 20:34:13 +0000 (20:34 +0000)]
Revert r314248 "[X86] Don't emit X86::MOV8rr_NOREX from X86InstrInfo::copyPhysReg."
This contributed to PR34751
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314338
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Simon Pilgrim [Wed, 27 Sep 2017 20:19:53 +0000 (20:19 +0000)]
[X86][SSE] Pull out variable shuffle mask combine logic. NFCI.
Hopefully this will make it easier to vary the combine depth threshold per-target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314337
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Than McIntosh [Wed, 27 Sep 2017 19:34:00 +0000 (19:34 +0000)]
[CodeGen] Emit necessary .note sections for -fsplit-stack
Summary:
According to https://gcc.gnu.org/wiki/SplitStacks, the linker expects a zero-sized .note.GNU-split-stack section if split-stack is used (and also .note.GNU-no-split-stack section if it also contains non-split-stack functions), so it can handle the cases where a split-stack function calls non-split-stack function.
This change adds the sections if needed.
Fixes PR #34670.
Reviewers: thanm, rnk, luqmana
Reviewed By: rnk
Subscribers: llvm-commits
Patch by Cherry Zhang <cherryyz@google.com>
Differential Revision: https://reviews.llvm.org/D38051
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314335
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Craig Topper [Wed, 27 Sep 2017 18:56:20 +0000 (18:56 +0000)]
[X86] Rewrite the zero vector checks in lowerV2X128VectorShuffle to use the Zeroable APInt
We already have zeroable bits in an APInt. We might as well use that instead of checking for an all zero BUILD_VECTOR.
Differential Revision: https://reviews.llvm.org/D37950
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314332
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Craig Topper [Wed, 27 Sep 2017 18:36:45 +0000 (18:36 +0000)]
[X86] In combineLoopSADPattern, pad result with zeros and use full size add instead of using a smaller add and inserting.
In some cases the result psadbw is smaller than the type of the add that started the match. Currently in these cases we are using a smaller add and inserting the result.
If we instead combine the psadbw with zeros and use the full size add we can take advantage of implicit zeroing we get if we emit a narrower move before the add.
In a future patch, I want to make isel aware that the psadbw itself already zeroed the upper bits and remove the move entirely.
Differential Revision: https://reviews.llvm.org/D37453
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314331
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Alexey Bataev [Wed, 27 Sep 2017 17:42:49 +0000 (17:42 +0000)]
[SLP] Fix crash on propagate IR flags for undef operands of min/max
reductions.
If both operands of the newly created SelectInst are Undefs the
resulting operation is also Undef, not SelectInst. It may cause crashes
when trying to propagate IR flags because function expects exactly
SelectInst instruction, nothing else.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314323
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Roman Lebedev [Wed, 27 Sep 2017 17:24:34 +0000 (17:24 +0000)]
[support] mapped_file_region: and fix the windows code too
Followup for r314312 / r314313
Sorry, i really failed to fully grep all the codebase :/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314321
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Chad Rosier [Wed, 27 Sep 2017 17:16:51 +0000 (17:16 +0000)]
[InstCombine] Gating select arithmetic optimization.
These changes faciliate positive behavior for arithmetic based select
expressions that match its translation criteria, keeping code size gated to
neutral or improved scenarios.
Patch by Michael Berg <michael_c_berg@apple.com>!
Differential Revision: https://reviews.llvm.org/D38263
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314320
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Geoff Berry [Wed, 27 Sep 2017 17:14:10 +0000 (17:14 +0000)]
[AArch64][Falkor] Ignore SP based loads in HW prefetch fixups.
Reviewers: mcrosier
Subscribers: aemerson, rengolin, javed.absar, kristof.beyls
Differential Revision: https://reviews.llvm.org/D38301
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314319
91177308-0d34-0410-b5e6-
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Javed Absar [Wed, 27 Sep 2017 16:39:17 +0000 (16:39 +0000)]
[Misched] : Fix typo in comment. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314316
91177308-0d34-0410-b5e6-
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Sanjay Patel [Wed, 27 Sep 2017 16:32:56 +0000 (16:32 +0000)]
[SLP] fix typos/formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314315
91177308-0d34-0410-b5e6-
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Sean Eveson [Wed, 27 Sep 2017 16:20:07 +0000 (16:20 +0000)]
Revert "[llvm-cov] Create directory structure when filtering using -name*= options"
Test failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314314
91177308-0d34-0410-b5e6-
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Roman Lebedev [Wed, 27 Sep 2017 16:08:33 +0000 (16:08 +0000)]
[Support] mapped_file_region::size() returns size_t
Fixup last commit, found by clang-stage1-cmake-RA-incremental bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314313
91177308-0d34-0410-b5e6-
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Roman Lebedev [Wed, 27 Sep 2017 15:59:16 +0000 (15:59 +0000)]
[Support] mapped_file_region: store size as size_t
Summary:
Found when testing stage-2 build with D38101.
```
In file included from /build/llvm/lib/Support/Path.cpp:1045:
/build/llvm/lib/Support/Unix/Path.inc:648:14: error: comparison 'uint64_t' (aka 'unsigned long') >
18446744073709551615 is always false [-Werror,-Wtautological-constant-compare]
if (length > std::numeric_limits<size_t>::max()) {
~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
`size_t` is `uint64_t` here, apparently, thus any `uint64_t` value
always fits into `size_t`.
Initial patch was to use some preprocessor logic to
not check if the size is known to fit at compile time.
But Zachary Turner suggested using this approach.
Reviewers: Bigcheese, rafael, zturner, mehdi_amini
Reviewed by (via email): zturner
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38132
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314312
91177308-0d34-0410-b5e6-
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Sean Eveson [Wed, 27 Sep 2017 15:37:40 +0000 (15:37 +0000)]
[llvm-cov] Create directory structure when filtering using -name*= options
Before this change using any of the -name*= command line options with an output
directory would result in a single file (functions.txt/functions.html)
containing the coverage for those specific functions. Now you get the same
directory structure as when not using any -name*= options.
Differential Revision: https://reviews.llvm.org/D38280
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314310
91177308-0d34-0410-b5e6-
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Sanjay Patel [Wed, 27 Sep 2017 14:54:16 +0000 (14:54 +0000)]
[SimplifyCFG] add a struct to house optional folds (PR34603)
This was intended to be no-functional-change, but it's not - there's a test diff.
So I thought I should stop here and post it as-is to see if this looks like what was expected
based on the discussion in PR34603:
https://bugs.llvm.org/show_bug.cgi?id=34603
Notes:
1. The test improvement occurs because the existing 'LateSimplifyCFG' marker is not carried
through the recursive calls to 'SimplifyCFG()->SimplifyCFGOpt().run()->SimplifyCFG()'.
The parameter isn't passed down, so we pick up the default value from the function signature
after the first level. I assumed that was a bug, so I've passed 'Options' down in all of the
'SimplifyCFG' calls.
2. I split 'LateSimplifyCFG' into 2 bits: ConvertSwitchToLookupTable and KeepCanonicalLoops.
This would theoretically allow us to differentiate the transforms controlled by those params
independently.
3. We could stash the optional AssumptionCache pointer and 'LoopHeaders' pointer in the struct too.
I just stopped here to minimize the diffs.
4. Similarly, I stopped short of messing with the pass manager layer. I have another question that
could wait for the follow-up: why is the new pass manager creating the pass with LateSimplifyCFG
set to true no matter where in the pipeline it's creating SimplifyCFG passes?
// Create an early function pass manager to cleanup the output of the
// frontend.
EarlyFPM.addPass(SimplifyCFGPass());
-->
/// \brief Construct a pass with the default thresholds
/// and switch optimizations.
SimplifyCFGPass::SimplifyCFGPass()
: BonusInstThreshold(UserBonusInstThreshold),
LateSimplifyCFG(true) {} <-- switches get converted to lookup tables and loops may not be in canonical form
If this is unintended, then it's possible that the current behavior of dropping the 'LateSimplifyCFG'
setting via recursion was masking this bug.
Differential Revision: https://reviews.llvm.org/D38138
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314308
91177308-0d34-0410-b5e6-
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Haicheng Wu [Wed, 27 Sep 2017 14:44:56 +0000 (14:44 +0000)]
[InlineCost] add visitSelectInst()
InlineCost can understand Select IR now. This patch finds free Select IRs and
continue the propagation of SimplifiedValues, ConstantOffsetPtrs, and
SROAArgValues.
Differential Revision: https://reviews.llvm.org/D37198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314307
91177308-0d34-0410-b5e6-
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Gadi Haber [Wed, 27 Sep 2017 14:44:15 +0000 (14:44 +0000)]
[X86][SKX][KNL] Updated regression tests to use -mattr instead of -mcpu flag.NFC.
NFC.
Updated 8 regression tests to use -mattr instead of -mcpu flag as follows:
-mcpu=knl --> -mattr=+avx512f
-mcpu=skx --> -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq
The updates are as part of the preparation of a large commit to add all instruction scheduling for the SKX target.
Reviewers: delena, zvi, RKSimon
Differential Revision: https://reviews.llvm.org/D38222
Change-Id: I2381c9b5bb75ecacfca017243c22d054f6eddd14
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314306
91177308-0d34-0410-b5e6-
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Zvi Rackover [Wed, 27 Sep 2017 14:38:05 +0000 (14:38 +0000)]
X86 Tests: Unsigned saturation subtraction tests. NFC.
Summary:
Adding tests for D37534.
Commit on behalf of julia.koval@intel.com
Reviewers: n.bozhenov, zvi, spatel, DavidKreitzer
Reviewed By: zvi
Differential Revision: https://reviews.llvm.org/D37510
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314305
91177308-0d34-0410-b5e6-
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Krzysztof Parzyszek [Wed, 27 Sep 2017 12:48:48 +0000 (12:48 +0000)]
Typo: const MCSchedModel SchedModel -> const MCSchedModel &SchedModel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314301
91177308-0d34-0410-b5e6-
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Mikael Holmen [Wed, 27 Sep 2017 11:27:50 +0000 (11:27 +0000)]
[RegAllocGreedy] Fix spelling error, "inteference" -> "interference", NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314299
91177308-0d34-0410-b5e6-
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Hiroshi Inoue [Wed, 27 Sep 2017 10:33:02 +0000 (10:33 +0000)]
[PowerPC] eliminate unconditional branch to the next instruction
This patch makes analyzeBranch eliminate unconditional branch to the next instruction.
After basic blocks are re-organized by optimizers, such as machine block placement, a BB may end with an unconditional branch to the next (fallthrough) BB. This patch removes such redundant branch instruction.
Differential Revision: https://reviews.llvm.org/D37730
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314297
91177308-0d34-0410-b5e6-
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Javed Absar [Wed, 27 Sep 2017 10:31:58 +0000 (10:31 +0000)]
[Misched]: Remove double call getMicroOpFactor.NFC.
Reviewed by: @MatzeB
Differential Revision: https://reviews.llvm.org/D38176
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314296
91177308-0d34-0410-b5e6-
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Coby Tayree [Wed, 27 Sep 2017 10:29:29 +0000 (10:29 +0000)]
[X86][AsmParser] fix PR32035
Differential Revision: https://reviews.llvm.org/D37473
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314295
91177308-0d34-0410-b5e6-
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Jonas Devlieghere [Wed, 27 Sep 2017 10:23:34 +0000 (10:23 +0000)]
[test] Don't verify .debug_line offsets in bitcode tests.
The exact values of the .debug_line offsets should not be hard-coded in
the checks for bitcode tests.
Fixes: http://bb.pgr.jp/builders/test-llvm-i686-linux-RA/builds/543
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314294
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Wed, 27 Sep 2017 10:10:17 +0000 (10:10 +0000)]
[X86][AVX] Improve (i4 bitcast (v4i1 x)) handling for 256-bit vector compare results.
As commented on D37849 and rL313547, AVX1 targets were missing a chance to use vmovmskpd for v4f64/v4i64 results for bool vector bitcasts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314293
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Wed, 27 Sep 2017 10:03:17 +0000 (10:03 +0000)]
Use const where possible. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314292
91177308-0d34-0410-b5e6-
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Jonas Devlieghere [Wed, 27 Sep 2017 10:00:27 +0000 (10:00 +0000)]
[dwarfdump] Fix printing of .debug_line offset.
Fixes 32-bit buildbots:
http://bb.pgr.jp/builders/test-llvm-i686-linux-RA/builds/542
http://lab.llvm.org:8011/builders/clang-cmake-thumbv7-a15/builds/11533
http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15/builds/11494
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314291
91177308-0d34-0410-b5e6-
96231b3b80d8
Jonas Devlieghere [Wed, 27 Sep 2017 09:33:45 +0000 (09:33 +0000)]
[dwarfdump] Add support for -debug-line=OFFSET
This patch adds support for passing an offset to -debug-line.
Differential revision: https://reviews.llvm.org/D38240
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314288
91177308-0d34-0410-b5e6-
96231b3b80d8
Jonas Devlieghere [Wed, 27 Sep 2017 09:33:36 +0000 (09:33 +0000)]
[dwarfdump] Add support for -debug-loc=OFFSET
This patch adds support for passing an offset to -debug-loc.
Differential revision: https://reviews.llvm.org/D38237
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314286
91177308-0d34-0410-b5e6-
96231b3b80d8
Sean Eveson [Wed, 27 Sep 2017 08:32:36 +0000 (08:32 +0000)]
[llvm-cov] Improve const-correctness of filters. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314281
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Parker [Wed, 27 Sep 2017 08:30:45 +0000 (08:30 +0000)]
[ARM] isTruncateFree fix
I implemented isTruncateFree in rL313533, this patch fixes the logic
to match my comment, as the previous logic was too general. Now the
only truncates that are free are i64 -> i32.
Differential Revision: https://reviews.llvm.org/D38234
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314280
91177308-0d34-0410-b5e6-
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Martin Pelikan [Wed, 27 Sep 2017 07:30:48 +0000 (07:30 +0000)]
[XRay] initialize all members of YAMLXRayRecord for -Wmissing-field-initializers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314278
91177308-0d34-0410-b5e6-
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Martin Storsjo [Wed, 27 Sep 2017 06:08:23 +0000 (06:08 +0000)]
[X86] Fix SJLJ struct offsets for x86_64
This is necessary, but not sufficient, for having working SJLJ exception
handling on x86_64.
Differential Revision: https://reviews.llvm.org/D38254
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314277
91177308-0d34-0410-b5e6-
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Martin Storsjo [Wed, 27 Sep 2017 06:08:16 +0000 (06:08 +0000)]
[X86] Remove erroneous callsite offsetting in SJLJ landing pads
The callsite value is already stored indexed from 0 in
the _Unwind_Context struct. When accessed via the functions
_Unwind_GetIP and _Unwind_SetIP, the value is indexed from 1,
but those functions handle the offseting. When reading directly
from the struct here, we shouldn't subtract 1.
This matches the code generated by the ARM target, where SJLJ
exception handling is used by default on iOS.
This makes clang-built object files for 32 bit x86 mingw work when
linked with libgcc/libstdc++.
Differential Revision: https://reviews.llvm.org/D38251
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314276
91177308-0d34-0410-b5e6-
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Martin Storsjo [Wed, 27 Sep 2017 06:08:04 +0000 (06:08 +0000)]
[X86] Correct byte offsets and data types in a comment. NFC.
This matches the types of the struct members defined in
lib/CodeGen/SjLjEHPrepare.cpp, and the definition of this struct in libgcc.
Differential Revision: https://reviews.llvm.org/D38248
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314275
91177308-0d34-0410-b5e6-
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Craig Topper [Wed, 27 Sep 2017 06:04:55 +0000 (06:04 +0000)]
[X86] Use extract128BitVector in LowerMULH so we can extract from constant build vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314274
91177308-0d34-0410-b5e6-
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Daniel Berlin [Wed, 27 Sep 2017 05:35:19 +0000 (05:35 +0000)]
MemorySSAUpdater: Only add phis to insertedphis if we actually inserted them, not if we just found existing ones
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314273
91177308-0d34-0410-b5e6-
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Craig Topper [Wed, 27 Sep 2017 05:17:15 +0000 (05:17 +0000)]
[X86] Add avx512bw command lines to the 256-bit vector idiv tests.
Some of the operations are being sign extended to 512 bits with avx512bw.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314272
91177308-0d34-0410-b5e6-
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Craig Topper [Wed, 27 Sep 2017 05:17:14 +0000 (05:17 +0000)]
[SelectionDAG] Make NewSDValueDbgMsg print target specific nodes correctly by passing in the SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314271
91177308-0d34-0410-b5e6-
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Martin Pelikan [Wed, 27 Sep 2017 05:10:31 +0000 (05:10 +0000)]
[XRay] fix the -Werror build by handling all enum cases in switches
Followup to D32840.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314270
91177308-0d34-0410-b5e6-
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Martin Pelikan [Wed, 27 Sep 2017 04:48:03 +0000 (04:48 +0000)]
[XRay] convert FDR arg1 log entries
Summary:
A new FDR metadata record will support logging a function call argument;
appending multiple metadata records will represent a sequence of arguments
meaning that "holes" are not representable by the buffer format. Each
call argument is currently a 64-bit value (useful for "this" pointers and
synchronization objects).
If present, we put this argument to the function call "entry" record it
belongs to, and alter its type to notify the user of its presence.
Reviewers: dberris
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32840
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314269
91177308-0d34-0410-b5e6-
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Hongbin Zheng [Wed, 27 Sep 2017 03:11:46 +0000 (03:11 +0000)]
[SimplifyIndVar] Constant fold IV users
This patch tries to transform cases like:
for (unsigned i = 0; i < N; i += 2) {
bool c0 = (i & 0x1) == 0;
bool c1 = ((i + 1) & 0x1) == 1;
}
To
for (unsigned i = 0; i < N; i += 2) {
bool c0 = true;
bool c1 = true;
}
This commit also update test/Transforms/IndVarSimplify/replace-srem-by-urem.ll to prevent constant folding.
Differential Revision: https://reviews.llvm.org/D38272
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314266
91177308-0d34-0410-b5e6-
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Jake Ehrlich [Wed, 27 Sep 2017 00:44:00 +0000 (00:44 +0000)]
Reland: [llvm-objcopy] Add support for dynamic relocations
This change adds support for dynamic relocations (allocated
SHT_REL/SHT_RELA sections with a dynamic symbol table as their link).
I had to reland this because of a I wasn't initilizing some pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314263
91177308-0d34-0410-b5e6-
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James Y Knight [Tue, 26 Sep 2017 22:44:01 +0000 (22:44 +0000)]
Initialize the RelocationSectionBase::Section member.
In r314227, it wasn't always, and would thus contain random garbage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314256
91177308-0d34-0410-b5e6-
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Jakub Kuderski [Tue, 26 Sep 2017 21:56:55 +0000 (21:56 +0000)]
[Dominators] Invalidate DFS numbers upon edge deletions
This patch makes DeleteEdge correctly invalidate DFS numbers in the
incremental updater. This should fix PR34466 and related bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314254
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Tue, 26 Sep 2017 21:54:27 +0000 (21:54 +0000)]
[BypassSlowDivision] Improve our handling of divisions by constants
Summary:
Don't bail out on constant divisors for divisions that can be narrowed without
introducing control flow . This gives us a 32 bit multiply instead of an
emulated 64 bit multiply in the generated PTX assembly.
Reviewers: jlebar
Subscribers: jholewinski, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D38265
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314253
91177308-0d34-0410-b5e6-
96231b3b80d8
Geoff Berry [Tue, 26 Sep 2017 21:40:46 +0000 (21:40 +0000)]
[AArch64][Falkor] Fix bug in falkor prefetcher fix pass.
Summary:
In rare cases, loads that don't get prefetched that were marked as
strided loads could cause a crash if they occurred in a loop with other
colliding loads.
Reviewers: mcrosier
Subscribers: aemerson, rengolin, javed.absar, kristof.beyls
Differential Revision: https://reviews.llvm.org/D38261
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314252
91177308-0d34-0410-b5e6-
96231b3b80d8
Geoff Berry [Tue, 26 Sep 2017 21:40:41 +0000 (21:40 +0000)]
[AArch64][Falkor] Fix correctness bug in falkor prefetcher fix pass and correct some opcode tag computations.
Summary:
This addresses a correctness bug for LD[1234]*_POST opcodes that have
the prefetcher fix applied to them: the base register was not being
written back from the temp after being incremented, so it would appear
to never be incremented.
Also, fix some opcode tag computations based on some updated HW details
to get better tag avoidance and thus better prefetcher performance.
Reviewers: mcrosier
Subscribers: aemerson, rengolin, javed.absar, kristof.beyls
Differential Revision: https://reviews.llvm.org/D38256
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314251
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 26 Sep 2017 21:35:11 +0000 (21:35 +0000)]
[X86] Fix register class name in a comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314250
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 26 Sep 2017 21:35:09 +0000 (21:35 +0000)]
Recommit r314151 "[X86] Make all the NOREX CodeGenOnly instructions into postRA pseudos like the NOREX version of TEST.""
The late MOV8rr_NOREX that caused the crash has been removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314249
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 26 Sep 2017 21:35:06 +0000 (21:35 +0000)]
[X86] Don't emit X86::MOV8rr_NOREX from X86InstrInfo::copyPhysReg.
This hook is called after register allocation with two physical registers. We don't need a separate instruction at that time to force register class constraints. I left in the assert though. We also have a fatal error in X86MCCodeEmitter if we ever encode an H-reg and a REX prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314248
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 26 Sep 2017 21:35:04 +0000 (21:35 +0000)]
[X86] Fix typo in comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314247
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Clegg [Tue, 26 Sep 2017 21:10:09 +0000 (21:10 +0000)]
[WebAssembly] Model weakly defined symbols as wasm exports
Previously these were being included as both imports and
exports, with the import being satisfied by the export
(or some strong symbol) at runtime. However proved
unnecessary and actually complicated linking as it meant
there was not a 1-to-1 mapping between a wasm function
/global index and a linker symbol.
Differential Revision: https://reviews.llvm.org/D38246
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314245
91177308-0d34-0410-b5e6-
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Nemanja Ivanovic [Tue, 26 Sep 2017 20:42:47 +0000 (20:42 +0000)]
[PowerPC] Reverting sequence of patches for elimination of comparison instructions
In the past while, I've committed a number of patches in the PowerPC back end
aimed at eliminating comparison instructions. However, this causes some failures
in proprietary source and these issues are not observed in SPEC or any open
source packages I've been able to run.
As a result, I'm pulling the entire series and will refactor it to:
- Have a single entry point for easy control
- Have fine-grained control over which patterns we transform
A side-effect of this is that test cases for these patches (and modified by
them) are XFAIL-ed. This is a temporary measure as it is counter-productive
to remove/modify these test cases and then have to modify them again when
the refactored patch is recommitted.
The failure will be investigated in parallel to the refactoring effort and
the recommit will either have a fix for it or will leave this transformation
off by default until the problem is resolved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314244
91177308-0d34-0410-b5e6-
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Michael Zuckerman [Tue, 26 Sep 2017 18:49:11 +0000 (18:49 +0000)]
[X86][LLVM]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess (VF{8|16|32} stride 3)
This patch expands the support of lowerInterleavedStore to {8|16|32}x8i stride 3.
LLVM creates suboptimal shuffle code-gen for AVX2. In overall, this patch is a specific fix for the pattern (Strid=3 VF={8|16|32}) .
This patch is part two of two patches and it covers the store (interlevaed) side.
The patch goal is to optimize the following sequence:
a0 a1 a2 a3 a4 a5 a6 a7
b0 b1 b2 b3 b4 b5 b6 b7
c0 c1 c2 c3 c4 c5 c6 c7
into
a0 b0 c0 a1 b1 c1 a2 b2
c2 a3 b3 c3 a4 b4 c4 a5
b5 c5 a6 b6 c6 a7 b7 c7
Reviewers:
zvi
guyblank
dorit
Ayal
Differential Revision: https://reviews.llvm.org/D37117
Change-Id: I56ced8bcbea809a37654060771911ade20246ccc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314234
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Craig Topper [Tue, 26 Sep 2017 18:47:25 +0000 (18:47 +0000)]
[InstCombine] Remove one use restriction on the shift for calls to foldICmpAndShift.
If this transformation succeeds, we're going to remove our dependency on the shift by rewriting the and. So it doesn't matter how many uses the shift has.
This distributes the one use check to other transforms in foldICmpAndConstConst that do need it.
Differential Revision: https://reviews.llvm.org/D38206
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314233
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Sam Clegg [Tue, 26 Sep 2017 18:21:12 +0000 (18:21 +0000)]
[WebAssembly] Use function/global index space in WasmSymbol
It is useful for the symbol to contain the index of the
function of global it represents in the function/global
index space.
For imports we also store the import index so that the
linker can find, for example, the signature of the
corresponding function, which is defined by the import
In the long run we need to decide whether this API
surface should be closer to binary (where imported
functions are seperate) or the wasm spec (where the
function index space is unified).
Differential Revision: https://reviews.llvm.org/D38189
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314230
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Jake Ehrlich [Tue, 26 Sep 2017 18:02:25 +0000 (18:02 +0000)]
[llvm-objcopy] Add support for dynamic relocations
This change adds support for dynamic relocations (allocated
SHT_REL/SHT_RELA sections with a dynamic symbol table as their link).
The binary I added for the test is here:
https://drive.google.com/file/d/0B3gtIAmiMwZXSjJUZE9pUjd4M0k/view?usp=sharing
Unless support for dynamic symbol tables in yaml2obj is added this is
needed.
Differential Revision: https://reviews.llvm.org/D37915
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314227
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Artem Belevich [Tue, 26 Sep 2017 17:07:23 +0000 (17:07 +0000)]
[NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.
Differential Revision: https://reviews.llvm.org/D38191
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314223
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Simon Atanasyan [Tue, 26 Sep 2017 17:02:35 +0000 (17:02 +0000)]
[mips] Use llvm-dwarfdump to simplify the test. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314222
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Craig Topper [Tue, 26 Sep 2017 16:43:57 +0000 (16:43 +0000)]
[X86] Add support for v16i32 UMUL_LOHI/SMUL_LOHI
Summary: This patch extends the v8i32/v4i32 custom lowering to support v16i32
Reviewers: zvi, RKSimon
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38274
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314221
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Krzysztof Parzyszek [Tue, 26 Sep 2017 15:31:15 +0000 (15:31 +0000)]
[Hexagon] Fix a typo: #ifndef DEBUG -> #ifndef NDEBUG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314216
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Krzysztof Parzyszek [Tue, 26 Sep 2017 15:06:37 +0000 (15:06 +0000)]
[Hexagon] Fix initialization of HexagonSubtarget
Make sure that "initializeSubtargetDependencies" sets all members that
InstrInfo and the like may depend on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314214
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Jonas Devlieghere [Tue, 26 Sep 2017 14:22:35 +0000 (14:22 +0000)]
[dwarfdump] Skip 'stripped' sections
When dsymutil generates the companion file, its strips all unnecessary
sections by omitting their body and setting the offset in their
corresponding load command to zero.
One such section is the .eh_frame section, as it contains runtime
information rather than debug information and is part of the __TEXT
segment. When reading this section, we would just read the number of
bytes specified in the load command, starting from offset 0 (i.e. the
beginning of the file).
Rather than trying to parse this obviously invalid section, dwarfdump
now skips this.
Differential revision: https://reviews.llvm.org/D38135
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314208
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