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Daniel Sanders [Wed, 11 Nov 2015 16:50:13 +0000 (16:50 +0000)]
[mips] Move MC tests for the DSP ASE into the standard format.
Summary:
Only DSPr2 is present because it appears we've never added DSPr1 tests.
We'll have to correct that in a later patch.
Reviewers: vkalintiris
Subscribers: llvm-commits, dsanders
Differential Revision: http://reviews.llvm.org/D14448
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252752
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Diego Novillo [Wed, 11 Nov 2015 16:39:22 +0000 (16:39 +0000)]
Properly fix unused variable in disable-assert builds.
I missed the side-effects of ParseBFI in my previous attempt (r252748).
Thanks dblaikie for the suggestion of adding a void use of the unused
variable instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252751
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Chris Bieneman [Wed, 11 Nov 2015 16:19:39 +0000 (16:19 +0000)]
[CMake] Make llvm_install_library_symlink respect LLVM_LIBDIR_SUFFIX.
This is required to support multilib install targets, and addresses a regression introduced in r252093.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252749
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Diego Novillo [Wed, 11 Nov 2015 16:14:52 +0000 (16:14 +0000)]
Remove unused variable in disable-assert builds. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252748
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Chris Bieneman [Wed, 11 Nov 2015 16:14:03 +0000 (16:14 +0000)]
[CMake] Add support for building the llvm test-suite as part of an LLVM build using clang and lld
Summary:
This patch adds a new CMake module for working with ExternalProjects. This wrapper for ExternalProject supports using just-built tools and can hook up dependencies properly so that projects get cleared out.
The example usage here is for the llvm test-suite. In this example, the test-suite is setup as dependent on clang and lld if they are in-tree. If the clang or lld binaries change the test-suite is re-configured, cleaned, and rebuilt.
This cleanup and abstraction wrapping ExternalProject can be extended and applied to other runtime libraries like compiler-rt and libcxx.
Reviewers: samsonov, jroelofs, rengolin, jmolloy
Subscribers: jmolloy, llvm-commits
Differential Revision: http://reviews.llvm.org/D14513
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252747
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Douglas Katzman [Wed, 11 Nov 2015 15:51:16 +0000 (15:51 +0000)]
Visibly fail if attempting to encode register AH,BH,CH,DH in a REX-prefixed instruction.
Differential Revision: http://reviews.llvm.org/D13316
Fixes PR25003
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252743
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James Molloy [Wed, 11 Nov 2015 15:40:40 +0000 (15:40 +0000)]
[ARM] Combine BFIs together
If we have a chain of BFIs, we may be able to combine several together into one merged BFI. We can do this if the "from" bits from one BFI OR'd with the "from" bits from the other BFI form a contiguous range, and the same with the "to" bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252740
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Charlie Turner [Wed, 11 Nov 2015 15:03:46 +0000 (15:03 +0000)]
[SLP] Enable -slp-vectorize-hor by default.
Measurements primarily on AArch64 have shown this feature does not
significantly effect compile-time. The are no significant perf changes in LNT,
but for AArch64 at least, there are wins in third party benchmarks.
As discussed on llvm-dev, we're going to try turning this on by default and see
how other targets react to the change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252733
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Aaron Ballman [Wed, 11 Nov 2015 14:57:28 +0000 (14:57 +0000)]
Silencing a signed vs unsigned type mismatch warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252732
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Aaron Ballman [Wed, 11 Nov 2015 13:44:06 +0000 (13:44 +0000)]
Silencing nine warnings for "enumeral and non-enumeral type in conditional expression"; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252728
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Michael Kuperstein [Wed, 11 Nov 2015 11:44:31 +0000 (11:44 +0000)]
[X86] Replace LEAs with INC/DEC when profitable
If possible and profitable, replace lea %reg, 1(%reg) and lea %reg, -1(%reg) with inc %reg and dec %reg respectively.
Patch by: anton.nadolsky@intel.com
Differential Revision: http://reviews.llvm.org/D14059
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252722
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Yury Gribov [Wed, 11 Nov 2015 10:36:49 +0000 (10:36 +0000)]
[ASan] Enable optional ASan recovery.
Differential Revision: http://reviews.llvm.org/D14242
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252719
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Craig Topper [Wed, 11 Nov 2015 07:29:25 +0000 (07:29 +0000)]
[X86] Fix feature flags on some MMX register instructions that really were introduced with SSE or SSE2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252709
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Craig Topper [Wed, 11 Nov 2015 07:29:22 +0000 (07:29 +0000)]
[X86] Remove redundant MMX isel patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252708
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Kostya Serebryany [Wed, 11 Nov 2015 05:25:24 +0000 (05:25 +0000)]
[libFuzzer] better links
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252705
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Kostya Serebryany [Wed, 11 Nov 2015 05:20:55 +0000 (05:20 +0000)]
[libFuzzer] more trophies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252704
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Matthias Braun [Wed, 11 Nov 2015 03:03:54 +0000 (03:03 +0000)]
lit: Show all output with --show-all, even in combination with --succinct
I missed an earlier exit for the --succinct case when I introduced the
-a option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252698
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Duncan P. N. Exon Smith [Wed, 11 Nov 2015 02:26:42 +0000 (02:26 +0000)]
ADT: Avoid relying on UB in ilist_node::getNextNode()
Re-implement `ilist_node::getNextNode()` and `getPrevNode()` without
relying on the sentinel having a "next" pointer. Instead, get access to
the owning list and compare against the `begin()` and `end()` iterators.
This only works when the node *can* get access to the owning list. The
new support is in `ilist_node_with_parent<>`, and any class `Ty`
inheriting from `ilist_node<NodeTy>` that wants `getNextNode()` and/or
`getPrevNode()` should inherit from
`ilist_node_with_parent<NodeTy, ParentTy>` instead. The requirements:
- `NodeTy` must have a `getParent()` function that returns the parent.
- `ParentTy` must have a `getSublistAccess()` static that, given a(n
ignored) `NodeTy*` (to determine which list), returns a member field
pointer to the appropriate `ilist<>`.
This isn't the cleanest way to get access to the owning list, but it
leverages the API already used in the IR hierarchy (see, e.g.,
`Instruction::getSublistAccess()`).
If anyone feels like ripping out the calls to `getNextNode()` and
`getPrevNode()` and replacing with direct iterator logic, they can also
remove the access function, etc., but as an incremental step, I'm
maintaining the API where it's currently used in tree.
If these requirements are *not* met, call sites with access to the ilist
can call `iplist<NodeTy>::getNextNode(NodeTy*)` directly, as in
ilistTest.cpp.
Why rewrite this?
The old code was broken, calling `getNext()` on a sentinel that possibly
didn't have a "next" pointer at all! The new code avoids that
particular flavour of UB (see the commit message for r252538 for more
details about the "lucky" memory layout that made this function so
interesting).
There's still some UB here: the end iterator gets downcast to `NodeTy*`,
even when it's a sentinel (which is typically
`ilist_half_node<NodeTy*>`). I'll tackle that in follow-up commits.
See this llvm-dev thread for more details:
http://lists.llvm.org/pipermail/llvm-dev/2015-October/091115.html
What's the danger?
There might be some code that relies on `getNextNode()` or
`getPrevNode()` *never* returning `nullptr` -- i.e., that relies on them
being broken when the sentinel is an `ilist_half_node<NodeTy>`. I tried
to root out those cases with the audits I did leading up to r252380, but
it's possible I missed one or two. I hope not.
(If (1) you have out-of-tree code, (2) you've reverted r252380
temporarily, and (3) you get some weird crashes with this commit, then I
recommend un-reverting r252380 and auditing the compile errors looking
for "strange" implicit conversions.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252694
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Akira Hatanaka [Wed, 11 Nov 2015 02:11:46 +0000 (02:11 +0000)]
Sort the enums in Attributes.h in case insensitive alphabetical order.
Sort the enums in preparation for moving the attributes to a table-gen
file.
rdar://problem/
19836465
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252692
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Dan Gohman [Wed, 11 Nov 2015 01:33:02 +0000 (01:33 +0000)]
[WebAssembly] Support non-legal argument and return types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252687
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Ahmed Bougacha [Wed, 11 Nov 2015 00:51:36 +0000 (00:51 +0000)]
[MC] Use LShr for constant evaluation of ">>" on non-arm64 darwin.
Follow-up to r235963: this matches other assemblers and is less
unexpected (e.g. PR23227).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252681
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Matthias Braun [Wed, 11 Nov 2015 00:41:58 +0000 (00:41 +0000)]
MachineInstr: addRegisterDefReadUndef() => setRegisterDefReadUndef()
This way we can not only add but also remove read undef flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252678
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Matt Arsenault [Wed, 11 Nov 2015 00:27:46 +0000 (00:27 +0000)]
AMDGPU: Print more fields in comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252677
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Sanjoy Das [Wed, 11 Nov 2015 00:16:41 +0000 (00:16 +0000)]
[ValueTracking] Remove untested / unreachable code, NFC
Right now isTruePredicate is only ever called with Pred == ICMP_SLE or
ICMP_ULE, and the ICMP_SLT and ICMP_ULT cases are dead. This change
removes the untested dead code so that the function is not misleading.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252676
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Matt Arsenault [Wed, 11 Nov 2015 00:01:36 +0000 (00:01 +0000)]
AMDGPU: Remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252675
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Matt Arsenault [Wed, 11 Nov 2015 00:01:32 +0000 (00:01 +0000)]
AMDGPU: Set isAllocatable = 0 on VS_32/VS_64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252674
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Sanjoy Das [Tue, 10 Nov 2015 23:56:20 +0000 (23:56 +0000)]
[ValueTracking] Teach isImpliedCondition a new bitwise trick
Summary:
This change teaches isImpliedCondition to prove things like
(A | 15) < L ==> (A | 14) < L
if the low 4 bits of A are known to be zero.
Depends on D14391
Reviewers: majnemer, reames, hfinkel
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14392
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252673
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Sanjoy Das [Tue, 10 Nov 2015 23:56:15 +0000 (23:56 +0000)]
[ValueTracking] Use m_APInt instead of m_ConstantInt, NFC
This change would add functionality if isImpliedCondition worked on
vector types; but since it bail out on vector predicates this change is
an NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252672
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Matthias Braun [Tue, 10 Nov 2015 23:23:05 +0000 (23:23 +0000)]
TableGen: Emit LaneMask for register classes without subregisters as ~0u
This makes it slightly easier to handle classes with and without
subregister uniformly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252671
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Reid Kleckner [Tue, 10 Nov 2015 23:22:20 +0000 (23:22 +0000)]
[WinEH] Insert the MBB for EH_RESTORE after the catchret
Inserting it before the target block could be bad, we might already have
a fallthrough edge to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252670
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Andrew Wilkins [Tue, 10 Nov 2015 23:19:21 +0000 (23:19 +0000)]
[cmake] move SONAME handling to llvm_add_library
Summary:
Move handling of the SONAME option from add_llvm_library
to llvm_add_library, so that it can be used in sub-projects.
In particular, this makes it possible to have consistently
named shared libraries for LLVM, Clang and LLDB.
Also, base the SONAME and symlinks on the output name
by extracting the OUTPUT_NAME property, rather than assuming
it is the same as the target name.
Reviewers: beanz
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14539
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252669
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Sanjay Patel [Tue, 10 Nov 2015 22:59:11 +0000 (22:59 +0000)]
don't repeat function/class/variable names in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252666
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Jingyue Wu [Tue, 10 Nov 2015 22:35:47 +0000 (22:35 +0000)]
[doc] Compile CUDA with LLVM
Summary:
This patch adds documentation on compiling CUDA with LLVM as requested by many
engineers and researchers. It includes not only user guides but also some
internals (mostly optimizations) so that early adopters can start hacking and
contributing.
Quite a few researchers who contacted us haven't used LLVM before, which is
unsurprising as it hasn't been long since LLVM picked up CUDA. So I added a
short summary to help these folks get started with LLVM.
I expect this document to evolve substantially down the road. The user guides
will be much simplified after the Clang integration is done. However, the
internals should continue growing to include for example performance debugging
and key areas to improve.
Reviewers: chandlerc, meheff, broune, tra
Subscribers: silvas, jingyue, llvm-commits, eliben
Differential Revision: http://reviews.llvm.org/D14370
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252660
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Kostya Serebryany [Tue, 10 Nov 2015 22:02:56 +0000 (22:02 +0000)]
[libFuzzer] add UninstrumentedTest.cpp (missing from a previous commit)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252658
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Dan Gohman [Tue, 10 Nov 2015 21:48:21 +0000 (21:48 +0000)]
[WebAssembly] Remove special cases for things that are no longer special. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252656
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Bill Schmidt [Tue, 10 Nov 2015 21:43:45 +0000 (21:43 +0000)]
Add PPCMIPeephole.cpp to CMakeLists.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252654
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Dan Gohman [Tue, 10 Nov 2015 21:40:21 +0000 (21:40 +0000)]
[WebAssembly] Support for floating point min and max.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252653
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Chris Bieneman [Tue, 10 Nov 2015 21:38:58 +0000 (21:38 +0000)]
[CMake] Autoconf builds libLTO with -fPIC, CMake should be able to as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252652
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Bill Schmidt [Tue, 10 Nov 2015 21:38:26 +0000 (21:38 +0000)]
[PowerPC] Add an MI SSA peephole pass.
This patch adds a pass for doing PowerPC peephole optimizations at the
MI level while the code is still in SSA form. This allows for easy
modifications to the instructions while depending on a subsequent pass
of DCE. Both passes are very fast due to the characteristics of SSA.
At this time, the only peepholes added are for cleaning up various
redundancies involving the XXPERMDI instruction. However, I would
expect this will be a useful place to add more peepholes for
inefficiencies generated during instruction selection. The pass is
placed after VSX swap optimization, as it is best to let that pass
remove unnecessary swaps before performing any remaining clean-ups.
The utility of these clean-ups are demonstrated by changes to four
existing test cases, all of which now have tighter expected code
generation. I've also added Eric Schweiz's bugpoint-reduced test from
PR25157, for which we now generate tight code. One other test started
failing for me, and I've fixed it
(test/Transforms/PlaceSafepoints/finite-loops.ll) as well; this is not
related to my changes, and I'm not sure why it works before and not
after. The problem is that the CHECK-NOT: of "statepoint" from test1
fails because of the "statepoint" in test2, and so forth. Adding a
CHECK-LABEL in between keeps the different occurrences of that string
properly scoped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252651
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Adrian Prantl [Tue, 10 Nov 2015 21:31:05 +0000 (21:31 +0000)]
dsymutil: Prune module forward decl DIEs if a uniquable definition was
already emitted and fix a latent bug in DIECloner where the DW_CHILDREN_yes
flag is set based on the number of children in the input DIE rather than
the number of children that are actually being cloned.
rdar://problem/
23439845
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252649
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Teresa Johnson [Tue, 10 Nov 2015 21:09:06 +0000 (21:09 +0000)]
Ensure ModuleLinker materializes complete comdat groups
Summary:
The module linker lazy links some "discardable if unused" global
values (e.g. linkonce), materializing and linking them only
if they are referenced in the module. If a comdat group contains a
linkonce member that is not referenced, however, it would not be
materialized and linked, leading to an incomplete comdat group.
If there are other object files not part of the same LTO link that also
define and use that comdat group, the linker may select the incomplete
group leading to link time unsats.
To solve this, whenever a global value body is linked, make sure we
materialize any other members of the same comdat group that are not yet
materialized. This ensures they are in the lazy link list and get linked
as well.
Added new test and adjusted old test to remove parts that didn't
make sense with fix.
Reviewers: rafael
Subscribers: dexonsmith, davidxl, llvm-commits
Differential Revision: http://reviews.llvm.org/D14516
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252647
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Sanjoy Das [Tue, 10 Nov 2015 20:13:21 +0000 (20:13 +0000)]
[IR] Make {Call,Invoke}::cloneImpl aware of operand bundles
This was an omission in the patch that landed initial support for
operand bundles. So far we haven't hit this, but we will once the
inliner is able to inline calls to functions that contain calls with
operand bundles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252645
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Sanjoy Das [Tue, 10 Nov 2015 20:13:15 +0000 (20:13 +0000)]
[OperandBundles] Identify operand bundles with both their names and IDs
No code uses this functionality yet. This change just exposes
information / structure that was already present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252644
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Sanjay Patel [Tue, 10 Nov 2015 20:09:02 +0000 (20:09 +0000)]
less indent; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252643
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Sanjay Patel [Tue, 10 Nov 2015 19:24:31 +0000 (19:24 +0000)]
[ARM] add overrides for isCheapToSpeculateCttz() and isCheapToSpeculateCtlz()
ARM V6T2 has instructions for efficient count-leading/trailing-zeros, so this should be
considered a cheap operation (and therefore fair game for speculation) for any ARM V6T2
implementation.
The net result of allowing this speculation for the regression tests in this patch is
that we get this code:
ctlz:
clz r0, r0
bx lr
cttz:
rbit r0, r0
clz r0, r0
bx lr
Instead of:
ctlz:
cmp r0, #0
moveq r0, #32
clzne r0, r0
bx lr
cttz:
cmp r0, #0
moveq r0, #32
rbitne r0, r0
clzne r0, r0
bx lr
This will help solve a general speculation/despeculation problem noted in PR24818:
https://llvm.org/bugs/show_bug.cgi?id=24818
Differential Revision: http://reviews.llvm.org/D14469
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252639
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Yunzhong Gao [Tue, 10 Nov 2015 18:52:48 +0000 (18:52 +0000)]
llvm-lto: trivial spelling changes to distinguish custom diagnostic handler and
default diagnostic handler.
Differential Revision: http://reviews.llvm.org/D14520
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252633
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Matt Arsenault [Tue, 10 Nov 2015 18:48:11 +0000 (18:48 +0000)]
LegalizeDAG: Implement promote for scalar_to_vector
This allows avoiding the default Expand behavior which
introduces stack usage. Bitcast the scalar and replace
the missing elements with undef.
This is covered by existing tests and used by a future
commit which makes 64-bit vectors legal types on AMDGPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252632
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Matt Arsenault [Tue, 10 Nov 2015 18:48:08 +0000 (18:48 +0000)]
LegalizeDAG: Implement promote for insert_vector_elt
This is covered by existing tests and used by a future
commit which makes 64-bit vectors legal types on AMDGPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252631
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Matt Arsenault [Tue, 10 Nov 2015 18:48:04 +0000 (18:48 +0000)]
LegalizeDAG: Implement promote for extract_vector_elt
This is for AMDGPU to implement v2i64 extract as extract of
half of a v4i32.
This is covered by existing tests and used by a future
commit which makes 64-bit vectors legal types on AMDGPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252630
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Philip Reames [Tue, 10 Nov 2015 18:46:14 +0000 (18:46 +0000)]
[ValueTracking] Recognize that and(x, add (x, -1)) clears the low bit
This is a cleaned up version of a patch by John Regehr with permission. Originally found via the souper tool.
If we add an odd number to x, then bitwise-and the result with x, we know that the low bit of the result must be zero. Either it was zero in x originally, or the add cleared it in the temporary value. As a result, one of the two values anded together must have the bit cleared.
Differential Revision: http://reviews.llvm.org/D14315
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252629
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Ramkumar Ramachandra [Tue, 10 Nov 2015 18:26:34 +0000 (18:26 +0000)]
AddLLVM: squelch CMP0007 by not adding empty elements to list
When configuring various llvm projects that use AddLLVM.cmake, this warning is
emitted many times, flooding the screen:
Policy CMP0007 is not set: list command no longer ignores empty elements.
The fix is removing an extra semicolon.
Differential Revision: http://reviews.llvm.org/D14339
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252628
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Teresa Johnson [Tue, 10 Nov 2015 18:26:31 +0000 (18:26 +0000)]
[ThinLTO] Update comment per change in WeakAny handling (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252627
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Teresa Johnson [Tue, 10 Nov 2015 18:20:11 +0000 (18:20 +0000)]
[ThinLTO] WeakAny fixes/cleanup
Ensure WeakAny variables are imported as ExternalWeak declarations. To
handle WeakAny more consistently and fix this issue:
1) Update helper doImportAsDefinition to properly flag WeakAny variables
and aliases as not importing defintions.
Update callers of doImportAsDefinition to remove now redundant checks for
WeakAny aliases, or ignore aliases, as appropriate.
2) Add any !doImportAsDefinition GVs to DoNotLinkFromSource set during
linking of the GV prototype, where we usually add GVs to the
DoNotLinkFromSource set for other reasons.
Remove now unnecessary adding of WeakAny aliases to
DoNotLinkFromSource set from copyGlobalAliasProto.
Remove now unnecessary guard against linking non-imported function
bodies from ModuleLinker::run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252626
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Sanjay Patel [Tue, 10 Nov 2015 18:11:37 +0000 (18:11 +0000)]
[AArch64] add overrides for isCheapToSpeculateCttz() and isCheapToSpeculateCtlz()
AArch64 has instructions for efficient count-leading/trailing-zeros, so this should be
considered a cheap operation (and therefore fair game for speculation) for any AArch64
implementation.
The net result of allowing this speculation for the regression tests in this
patch is that we get this code:
ctlz:
clz w0, w0
ret
cttz:
rbit w8, w0
clz w0, w8
ret
Instead of:
ctlz:
cbz w0, .LBB0_2
clz w0, w0
ret
.LBB0_2:
orr w0, wzr, #0x20
ret
cttz:
cbz w0, .LBB1_2
rbit w8, w0
clz w0, w8
ret
.LBB1_2:
orr w0, wzr, #0x20
ret
See D14469 for the larger motivation.
Differential Revision: http://reviews.llvm.org/D14505
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252625
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Renato Golin [Tue, 10 Nov 2015 18:01:16 +0000 (18:01 +0000)]
Revert "Strip metadata when speculatively hoisting instructions"
This reverts commit r252604, as it broke all ARM and AArch64 buildbots, as
well as some x86, et al.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252623
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Michael Kuperstein [Tue, 10 Nov 2015 17:37:49 +0000 (17:37 +0000)]
[X86] Do not try to custom-lower sitofp/fptosi in soft-float mode
Differential Revision: http://reviews.llvm.org/D14495
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252621
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Xinliang David Li [Tue, 10 Nov 2015 17:11:33 +0000 (17:11 +0000)]
Fix asan warning (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252617
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Sanjay Patel [Tue, 10 Nov 2015 16:48:53 +0000 (16:48 +0000)]
add 'MustReduceDepth' as an objective/cost-metric for the MachineCombiner
This is one of the problems noted in PR25016:
https://llvm.org/bugs/show_bug.cgi?id=25016
and:
http://lists.llvm.org/pipermail/llvm-dev/2015-October/090998.html
The spilling problem is independent and not addressed by this patch.
The MachineCombiner was doing reassociations that don't improve or even worsen the critical path.
This is caused by inclusion of the "slack" factor when calculating the critical path of the original
code sequence. If we don't add that, then we have a more conservative cost comparison of the old code
sequence vs. a new sequence. The more liberal calculation must be preserved, however, for the AArch64
MULADD patterns because benchmark regressions were observed without that.
The two failing test cases now have identical asm that does what we want:
a + b + c + d ---> (a + b) + (c + d)
Differential Revision: http://reviews.llvm.org/D13417
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252616
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James Molloy [Tue, 10 Nov 2015 14:22:05 +0000 (14:22 +0000)]
Reapply "[ARM] Combine CMOV into BFI where possible"
Added fixes for stage2 failures: CMOV is not commutable; commuting the operands results in the condition being flipped! d'oh!
Original commit message:
If we have a CMOV, OR and AND combination such as:
if (x & CN)
y |= CM;
And:
* CN is a single bit;
* All bits covered by CM are known zero in y;
Then we can convert this to a sequence of BFI instructions. This will always be a win if CM is a single bit, will always be no worse than the TST & OR sequence if CM is two bits, and for thumb will be no worse if CM is three bits (due to the extra IT instruction).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252606
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Igor Laevsky [Tue, 10 Nov 2015 14:10:31 +0000 (14:10 +0000)]
Strip metadata when speculatively hoisting instructions
This is fix for PR24059.
When we are hoisting instruction above some condition it may turn out
that metadata on this instruction was control dependant on the condition.
This metadata becomes invalid and we need to drop it.
This patch should cover most obvious places of speculative execution (which
I have found by greping isSafeToSpeculativelyExecute). I think there are more
cases but at least this change covers the severe ones.
Differential Revision: http://reviews.llvm.org/D14398
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252604
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Oliver Stannard [Tue, 10 Nov 2015 14:09:08 +0000 (14:09 +0000)]
Update test to use explicit triple
This is needed for targets which do not support big-endian with the default
triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252603
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Tilmann Scheller [Tue, 10 Nov 2015 12:29:37 +0000 (12:29 +0000)]
[PowerPC] Remove redundant code.
The local variable Hi is never being read.
Issue identified by the Clang static analyzer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252600
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Oliver Stannard [Tue, 10 Nov 2015 11:04:18 +0000 (11:04 +0000)]
[AArch64] Fix halfword load merging for big-endian targets
For big-endian targets, when we merge two halfword loads into a word load, the
order of the halfwords in the loaded value is reversed compared to
little-endian, so the load-store optimiser needs to swap the destination
registers.
This does not affect merging of two word loads, as we use ldp, which treats the
memory as two separate 32-bit words.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252597
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Hans Wennborg [Tue, 10 Nov 2015 09:47:48 +0000 (09:47 +0000)]
Inliner: Do zero-cost inlines even if above a negative threshold (PR24851)
Differential Revision: http://reviews.llvm.org/D14499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252595
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Igor Breger [Tue, 10 Nov 2015 07:09:07 +0000 (07:09 +0000)]
AVX512 : Implemented encoding and DAG lowering for VMOVHPS/PD and VMOVLPS/PD instructions.
Differential Revision: http://reviews.llvm.org/D14492
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252592
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David Blaikie [Tue, 10 Nov 2015 04:10:04 +0000 (04:10 +0000)]
Remove another variable unused in -Asserts build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252582
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David Blaikie [Tue, 10 Nov 2015 03:16:28 +0000 (03:16 +0000)]
Remove some unused variables to clean up the -Werror build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252580
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Colin LeMahieu [Tue, 10 Nov 2015 01:58:26 +0000 (01:58 +0000)]
[Hexagon] Adding instruction aliases and tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252579
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Andy Ayers [Tue, 10 Nov 2015 01:50:49 +0000 (01:50 +0000)]
Support for emitting inline stack probes
For CoreCLR on Windows, stack probes must be emitted as inline sequences that probe successive stack pages
between the current stack limit and the desired new stack pointer location. This implements support for
the inline expansion on x64.
For in-body alloca probes, expansion is done during instruction lowering. For prolog probes, a stub call
is initially emitted during prolog creation, and expanded after epilog generation, to avoid complications
that arise when introducing new machine basic blocks during prolog and epilog creation.
Added a new test case, modified an existing one to exclude non-x64 coreclr (for now).
Add test case
Fix tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252578
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Richard Diamond [Tue, 10 Nov 2015 01:03:51 +0000 (01:03 +0000)]
Fix mingw targets. Bandaid for r252532's buildbot brakage.
Reviewers: brad.king, beanz
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14523
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252576
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Colin LeMahieu [Tue, 10 Nov 2015 00:51:56 +0000 (00:51 +0000)]
[Hexagon] Fixing compound register printing and reenabling more tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252574
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Tim Northover [Tue, 10 Nov 2015 00:44:23 +0000 (00:44 +0000)]
AArch64: add experimental support for address tagging.
AArch64 has the ability to use the top 8-bits of an "address" for extra
information, with the memory subsystem automatically masking them off for loads
and stores. When that's happening, we can sometimes skip masks on memory
operations in the compiler.
However, this requires the host OS and support stack to preserve those bits so
it can't be enabled everywhere. In principle iOS 8.0 and above do take the
required precautions and but we'll put it under a flag for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252573
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Kevin Enderby [Tue, 10 Nov 2015 00:31:08 +0000 (00:31 +0000)]
Fix llvm-nm(1) printing of llvm-bitcode files for -format darwin to match darwin’s nm(1).
Also a small fix to match printing of Mach-O objects with -format posix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252567
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Derek Schuff [Tue, 10 Nov 2015 00:30:57 +0000 (00:30 +0000)]
[WebAssembly] Support 'unreachable' expression
Lower LLVM's 'unreachable' terminator to ISD::TRAP, and lower ISD::TRAP to
wasm's 'unreachable' expression.
WebAssembly type-checks expressions, but a noreturn function with a
return type that doesn't match the context will cause a check
failure. So we lower LLVM 'unreachable' to ISD::TRAP and then lower that
to WebAssembly's 'unreachable' expression, which typechecks in any
context and causes a trap if executed.
Differential Revision: http://reviews.llvm.org/D14515
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252566
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Matt Arsenault [Tue, 10 Nov 2015 00:30:14 +0000 (00:30 +0000)]
Remove unnecessary call to getAllocatableRegClass
I'm not sure what the point of this was. I'm not sure why
you would ever define an instruction that produces an unallocatable
register class. No tests fail with this removed, and it seems like
it should be a verifier error to define such an instruction.
This was problematic for AMDGPU because it would make bad decisions
by arbitrarily changing the register class when unsetting isAllocatable
for VS_32/VS_64, which is currently set as a workaround to this problem.
AMDGPU uses the VS_32/VS_64 register classes to represent operands which
can use either VGPRs or SGPRs. When isAllocatable is unset for these,
this would need to pick either the SGPR or VGPR class and insert either
a copy we don't want, or an illegal copy we would need to deal with
later. A semi-arbitrary register class ordering decision is made in tablegen,
which resulted in always picking a VGPR class because it happens to have
more registers than the SGPR register class. We really just want to
use whatever register class the original register had.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252565
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Xinliang David Li [Tue, 10 Nov 2015 00:24:45 +0000 (00:24 +0000)]
[PGO] Make indexed value profile data more compact
- Make indexed value profile data more compact by peeling out
the per-site value count field into its own smaller sized array.
- Introduced formal data structure definitions to specify value
profile data layout in indexed format. Previously the layout
of the data is only assumed in the client code (scattered in
three different places : size computation, EmitData, and ReadData
- The new data structure serves as a central place for layout documentation.
- Add interfaces to force BE output for value profile data (testing purpose)
- Add byte swap unit tests
Differential Revision: http://reviews.llvm.org/D14401
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252563
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Colin LeMahieu [Tue, 10 Nov 2015 00:22:00 +0000 (00:22 +0000)]
[Hexagon] Fixing store instructions and reenabling a few more tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252561
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Akira Hatanaka [Tue, 10 Nov 2015 00:10:41 +0000 (00:10 +0000)]
[ARM] Handle t2ADDri in ARMAsmPrinter::EmitUnwindingInstruction.
This fixes a bug in ARMAsmPrinter::EmitUnwindingInstruction where
llvm_unreachable was reached because t2ADDri wasn't handled.
Test case provided by Tim Northover.
rdar://problem/
23270609
http://reviews.llvm.org/D14518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252557
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Colin LeMahieu [Tue, 10 Nov 2015 00:02:27 +0000 (00:02 +0000)]
[Hexagon] Fixing load instruction parsing and reenabling tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252555
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Matthias Braun [Mon, 9 Nov 2015 23:59:33 +0000 (23:59 +0000)]
MachineVerifier: Streamline live interval related error reporting
Simply perform additional report_context() calls after a report()
instead of adding more and more overloaded variations of report(). Also
improve several instances where information was output in an ad-hoc way
probably because no matching report() overload was available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252552
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Matthias Braun [Mon, 9 Nov 2015 23:59:29 +0000 (23:59 +0000)]
MachineVerifier: Add missing linebreak
MachineInstr::print() with SkipOppers==true does not produce a
linebreak, so we have to do that in MachineVerifier::report().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252551
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Matthias Braun [Mon, 9 Nov 2015 23:59:25 +0000 (23:59 +0000)]
MachineVerifier: MI::print has no TargetMachine overload
The code was passing a target machine pointer which degraded to a true
operand to SkipOppers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252550
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Matthias Braun [Mon, 9 Nov 2015 23:59:23 +0000 (23:59 +0000)]
MachineVerifier: print list of live intervals if available
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252549
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David Blaikie [Mon, 9 Nov 2015 23:51:45 +0000 (23:51 +0000)]
Simplify some APIs I was cleaning up while fixing -Wpessimizing-move warning
(Reid fixed the original error, but this seems nice to do in any case)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252548
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Reid Kleckner [Mon, 9 Nov 2015 23:37:26 +0000 (23:37 +0000)]
Fix -Wpessimizing-move warning in llvm-config.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252542
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Reid Kleckner [Mon, 9 Nov 2015 23:34:42 +0000 (23:34 +0000)]
[WinEH] Remove isBarrier from instructions that do not return
Fixes machine verification failures with David's latest EH change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252541
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Sanjay Patel [Mon, 9 Nov 2015 23:31:38 +0000 (23:31 +0000)]
add a SelectionDAG method to check if no common bits are set in two nodes; NFCI
This was suggested in:
http://reviews.llvm.org/D13956
and is a follow-on to:
http://reviews.llvm.org/rL252515
http://reviews.llvm.org/rL252519
This lets us remove logically equivalent/duplicated code from DAGCombiner and X86ISelDAGToDAG.
A corresponding function for IR instructions already exists in ValueTracking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252539
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Duncan P. N. Exon Smith [Mon, 9 Nov 2015 23:31:01 +0000 (23:31 +0000)]
CodeGen: Be clear about semantics in SlotIndex::getNextSlot(), NFC
Be honest about using iterator semantics in `SlotIndex::getNextSlot()`
and `SlotIndex::getPrevSlot()`. Instead of calling `getNextNode()` --
which is documented (but fails) to check for the sentinel -- call
`&*++getIterator()`.
This is (surprisingly!) a NFC commit. `ilist_traits<IndexListEntry>`
has an `ilist_half_node<IndexListEntry>` as a sentinel (and no other
fields), and so the layout of `ilist<IndexListEntry>` is:
--
struct ilist<IndexListEntry> {
ilist_half_node<IndexListEntry> Sentinel;
IndexListEntry *Head;
IndexListEntry *getHead() { return Head; }
IndexListEntry *getSentinel() { return cast<...>(&Sentinel); }
};
--
In memory, this happens to look just like:
--
struct ilist<IndexListEntry> {
ilist_node<IndexListEntry> Sentinel;
IndexListEntry *getHead() { return Sentinel.getNext(); }
IndexListEntry *getSentinel() { return cast<...>(&Sentinel); }
};
--
As a result, `ilist_node<IndexListEntry>::getNextNode()` that checks
`getNext()` of the possible sentinel will get a pointer to the head of
the list; it will never detect the sentinel, and will return the
sentinel itself instead of `nullptr` in the special cases.
Since `getNextNode()` and `getPrevNode()` don't work, just be honest
that we're not checking for the end/beginning of the list here. Since
this code works, I guess we must never go past the sentinel.
(It's possible we're just getting lucky, and the new code will get
"lucky" in the same situations. To properly fix that hypothetical bug,
we would need to check the iterator against `end()`/`begin()`.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252538
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David Blaikie [Mon, 9 Nov 2015 23:30:15 +0000 (23:30 +0000)]
Fix -Wdeprecated warnings due to the use of copy ops on SCEVPredicate derived class objects
SCEVUnionPredicate is copied constructed here: lib/Transforms/Scalar/LoopDistribute.cpp:793
and move assigned (which can use the base class's copy ctor just
fine/without extra cost (I'd add it if it weren't for MSVC's issues
meaning = default is insufficient)) here: lib/Transforms/Utils/LoopVersioning.cpp:46
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252537
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Davide Italiano [Mon, 9 Nov 2015 23:23:20 +0000 (23:23 +0000)]
[TargetLibraryInfo] Add support for fls, flsl, flsll.
This is a prerequisite for further optimisations of these functions,
which will be commited as a separate patch.
Differential Revision: http://reviews.llvm.org/D14219
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252535
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Kostya Serebryany [Mon, 9 Nov 2015 23:17:45 +0000 (23:17 +0000)]
[libFuzzer] make libFuzzer link if there is no sanitizer coverage instrumentation (it will fail at start-up time)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252533
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Richard Diamond [Mon, 9 Nov 2015 23:15:38 +0000 (23:15 +0000)]
Fix `llvm-config` to adapt to the install environment.
Summary:
This patch does a couple of things:
- Adds a new argument `--shared-mode` which accepts a list of components and prints whether or not the provided components need to be linked statically or shared.
- Fixes `--libnames` when CMake BUILD_SHARED_LIBS is used.
- Fixes `--libnames`, `--libs`, and `--libfiles` for dylib when static components aren't installed.
- Fixes `--libnames`, `--libs`, `--libfiles`, and `--components` to use LLVM_DYLIB_COMPONENTS as the component manifest for dylib linking.
- Uses the host platform's usual convention for filename extensions and such, instead of always defaulting to Unix-izms.
Because I don't own a Mac, I am not able to test the Mac platform dependent stuff locally. If someone would be willing to run a build for me on their machine (unless there's a better option), I'd appreciate it.
Reviewers: jfb, brad.king, whitequark, beanz
Subscribers: beanz, jauhien, llvm-commits
Differential Revision: http://reviews.llvm.org/D13198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252532
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Reid Kleckner [Mon, 9 Nov 2015 23:10:29 +0000 (23:10 +0000)]
Combine ifdefs around dl_iterate_phdr in Unix/Signals.inc
This avoids the need to have two dummy implementations of
findModulesAndOffsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252531
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David Majnemer [Mon, 9 Nov 2015 23:07:48 +0000 (23:07 +0000)]
[WinEH] Don't emit CATCHRET from visitCatchPad
Instead, emit a CATCHPAD node which will get selected to a target
specific sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252528
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Chris Bieneman [Mon, 9 Nov 2015 21:54:55 +0000 (21:54 +0000)]
Deprecate Autoconf
As per the very positive feedback from llvm-dev (http://lists.llvm.org/pipermail/llvm-dev/2015-November/092150.html), this commit officially deprecates the LLVM autoconf-based build system.
Anyone still using it should switch to CMake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252520
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Sanjay Patel [Mon, 9 Nov 2015 21:53:58 +0000 (21:53 +0000)]
specify triple so Windows bots won't be sad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252519
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Rafael Espindola [Mon, 9 Nov 2015 21:34:45 +0000 (21:34 +0000)]
Add templated read/write to support::endian.
Expose read and write functions that take endianess as a template
parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252517
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Sanjay Patel [Mon, 9 Nov 2015 21:16:49 +0000 (21:16 +0000)]
[x86] try harder to match bitwise 'or' into an LEA
The motivation for this patch starts with the epic fail example in PR18007:
https://llvm.org/bugs/show_bug.cgi?id=18007
...unfortunately, this patch makes no difference for that case, but it solves some
simpler cases. We'll get there some day. :)
The current 'or' matching code was using computeKnownBits() via
isBaseWithConstantOffset() -> MaskedValueIsZero(), but that's an unnecessarily limited use.
We can do more by copying the logic in ValueTracking's haveNoCommonBitsSet(), so we can
treat the 'or' as if it was an 'add'.
There's a TODO comment here because we should lift the bit-checking logic into a helper
function, so it's not duplicated in DAGCombiner.
An example of the better LEA matching:
leal (%rdi,%rdi), %eax
andl $1, %esi
orl %esi, %eax
Becomes:
andl $1, %esi
leal (%rsi,%rdi,2), %eax
Differential Revision: http://reviews.llvm.org/D13956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252515
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Colin LeMahieu [Mon, 9 Nov 2015 21:06:28 +0000 (21:06 +0000)]
[Hexagon] Separating statement to match what clang-format would do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252513
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Reid Kleckner [Mon, 9 Nov 2015 21:04:00 +0000 (21:04 +0000)]
[WinEH] Tweak funclet prologue/epilogue insertion to pass verifier
For some reason we'd never run MachineVerifier on WinEH code, and you
explicitly have to ask for it with llc. I added it to a few test cases
to get some coverage.
Fixes PR25461.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252512
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