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Maarten Lankhorst [Tue, 17 May 2016 13:07:47 +0000 (15:07 +0200)]
drm/i915: Remove intel_prepare_page_flip, v3.
Instead of calling prepare_flip right before calling finish_page_flip
do everything from prepare_page_flip in finish_page_flip.
Putting prepare and finish page_flip in a single step removes the need
for INTEL_FLIP_COMPLETE, so it can be removed. This simplifies the code
slightly.
Changes since v1:
- Invert if case to simplify code.
- Add missing barrier.
- Reword commit message.
Changes since v2:
- intel_page_flip_plane is removed.
- work->pending is turned into a bool.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463490484-19540-5-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Maarten Lankhorst [Tue, 17 May 2016 13:07:46 +0000 (15:07 +0200)]
drm/i915: Remove intel_finish_page_flip_plane.
This function is duplicated with intel_finish_page_flip,
and is only ever used from planes that could use the
other function anyway.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463490484-19540-4-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Maarten Lankhorst [Tue, 17 May 2016 13:07:45 +0000 (15:07 +0200)]
drm/i915: Remove stallcheck special handling, v3.
Both intel_unpin_work.pending and intel_unpin_work.enable_stall_check
were used to see if work should be enabled. By only using pending
some special cases are gone, and access to unpin_work can be simplified.
A flip could previously be queued before
stallcheck was active. With the addition of the pending member
enable_stall_check became obsolete and can thus be removed.
Use this to only access work members untilintel_mark_page_flip_active
is called, or intel_queue_mmio_flip is used. This will prevent
use-after-free, and makes it easier to verify accesses.
Changes since v1:
- Reword commit message.
- Do not access unpin_work after intel_mark_page_flip_active.
- Add the right memory barriers.
Changes since v2:
- atomic_read() needs a full smp_rmb.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463490484-19540-3-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Maarten Lankhorst [Tue, 17 May 2016 13:07:44 +0000 (15:07 +0200)]
drm/core: Add drm_accurate_vblank_count, v5.
This function is useful for gen2 intel devices which have no frame
counter, but need a way to determine the current vblank count without
racing with the vblank interrupt handler.
intel_pipe_update_start checks if no vblank interrupt will occur
during vblank evasion, but cannot check whether the vblank handler has
run to completion. This function uses the timestamps to determine
when the last vblank has happened, and interpolates from there.
Changes since v1:
- Take vblank_time_lock and don't use drm_vblank_count_and_time.
Changes since v2:
- Don't return time of last vblank.
Changes since v3:
- Change pipe to unsigned int. (Ville)
- Remove unused documentation for tv_ret. (kbuild)
Changes since v4:
- Add warning to docs when the function is useful.
- Add a WARN_ON when get_vblank_timestamp is unavailable.
- Use drm_vblank_count.
Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> #v4
Acked-by: David Airlie <airlied@linux.ie> #irc, v4
Link: http://patchwork.freedesktop.org/patch/msgid/1463490484-19540-2-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Peter Antoine [Tue, 17 May 2016 14:12:45 +0000 (15:12 +0100)]
drm/i915/bxt: reserve space for RC6 in the the GuC WOPCM
This patch resizes the GuC WOPCM (specifically on BXT)
so that the GuC and RC6 memory spaces do not overlap.
v2:
Made calculation of WOPCM size into a separate function,
so that it's consistent between the firmware size-check
and the register-programming operations [Dave Gordon].
Issue: https://jira01.devtools.intel.com/browse/VIZ-6638
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Tested-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463494365-26330-1-git-send-email-david.s.gordon@intel.com
Daniel Vetter [Mon, 9 May 2016 07:31:25 +0000 (09:31 +0200)]
drm/i915: Simplify control flow in intel_atomic_check a bit.
- Unconditionally add plane states. Core helpers would have done this
in drm_atomic_helper_check_modeset, doing it once more won't cause
harm and is less fragile.
- Simplify the continue logic when disabling a pipe.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462779085-2458-1-git-send-email-daniel.vetter@ffwll.ch
Deepak M [Tue, 26 Apr 2016 13:14:26 +0000 (16:14 +0300)]
drm/i915/dsi: CABC support for Panel PWM backlight control
In CABC (Content Adaptive Brightness Control) content grey level
scale can be increased while simultaneously decreasing
brightness of the backlight to achieve same perceived brightness.
The CABC is not standardized and panel vendors are free to follow
their implementation. The CABC implementaion here assumes that the
panels use standard SW register for control.
CABC is supported only when the PWM source for backlight is
from the panel.
v2 by Jani: rebase, renames, check cabc support earlier, etc.
Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/883faade74d2e598b143221ccc7df6daf4393a13.1461676337.git.jani.nikula@intel.com
Jani Nikula [Tue, 26 Apr 2016 13:14:25 +0000 (16:14 +0300)]
drm/i915/dsi: Add DCS control for Panel PWM
If the source of the backlight PWM is from the
panel then the PWM can be controlled by DCS
command, this patch adds the support to
enable/disbale panel PWM, control backlight level
etc...
v2: Moving the CABC bkl functions to new file.(Jani)
v3: Rebase
v4: Rebase
v5: Use mipi_dsi_dcs_write() instead of mipi_dsi_dcs_write_buffer() (Jani)
Move DCS macro`s to include/video/mipi_display.h (Jani)
v6: Rename the file to intel_dsi_panel_pwm.c
Removing the CABC operations
v7 by Jani: renames, rebases, etc.
v8 by Jani: s/INTEL_BACKLIGHT_CABC/INTEL_BACKLIGHT_DSI_DCS/
v9 by Jani: rename init function to intel_dsi_dcs_init_backlight_funcs
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
Reviewed-by: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/71238a4b14b8c3a6c04070c789f09f1b4bc00a15.1461676337.git.jani.nikula@intel.com
Daniel Vetter [Tue, 17 May 2016 10:15:49 +0000 (12:15 +0200)]
Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued
Backmerge request by Jani to get at
commit
249c4f538b1aae55d41699f8bafc6cb762a7f48f
Author: Deepak M <m.deepak@intel.com>
Date: Wed Mar 30 17:03:39 2016 +0300
drm: Add new DCS commands in the enum list
Some simple conflicts in intel_dp.c.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Dave Airlie [Mon, 16 May 2016 21:06:14 +0000 (07:06 +1000)]
Merge tag 'topic/drm-misc-2016-05-13' of git://anongit.freedesktop.org/drm-intel into drm-next
I kinda hoped that I could still sneak in Noralf's
drm_simple_display_pipe, since there's intereset by others now (for tilcdc
at least). But it wasn't ready by a hair. Oh well.
Otherwise random stuff plus prep patches from Noralf.
* tag 'topic/drm-misc-2016-05-13' of git://anongit.freedesktop.org/drm-intel:
drm/atomic: Add drm_atomic_helper_best_encoder()
drm/atomic: Don't skip drm_bridge_*() calls if !drm_encoder_helper_funcs
drm/fb-cma-helper: Hook up to DocBook and fix some docs
drm/fb-helper: Remove mention of CONFIG_FB_DEFERRED_IO in docs
drm/sti: include linux/seq_file.h where needed
drm/tegra: Use lockless gem BO free callback
drm/exynos: Use lockless gem BO free callback
drm: Make drm_encoder_helper_funcs optional
Dave Airlie [Mon, 16 May 2016 20:36:08 +0000 (06:36 +1000)]
Merge branch 'topic-arcpgu-updates' of https://github.com/foss-for-synopsys-dwc-arc-processors/linux into drm-next
Please pull this mini-series that allows ARC PGU to use
dedicated memory location as framebuffer backing storage.
* 'topic-arcpgu-updates' of https://github.com/foss-for-synopsys-dwc-arc-processors/linux:
ARC: [axs10x] Specify reserved memory for frame buffer
drm/arcpgu: use dedicated memory area for frame buffer
Jani Nikula [Fri, 13 May 2016 14:04:38 +0000 (17:04 +0300)]
drm/i915: don't mix bitwise and logical operations for has_snoop
Also make the code more readable.
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463148278-23193-2-git-send-email-jani.nikula@intel.com
Chris Wilson [Sat, 14 May 2016 06:26:35 +0000 (07:26 +0100)]
drm/i915: Skip clearing the GGTT on full-ppgtt systems
Under full-ppgtt, access to the global GTT is carefully regulated
through hardware functions (i.e. userspace cannot read and write to
arbitrary locations in the GGTT via the GPU). With this restriction in
place, we can forgo clearing stale entries from the GGTT as they will
not be accessed.
For aliasing-ppgtt, we could almost do the same except that we do allow
userspace access to the global-GTT via execbuf in order to workraound
some quirks of certain instructions. (This execbuf path is filtered out
with EINVAL on full-ppgtt.)
The most dramatic effect this will have will be during resume, as with
full-ppgtt the GGTT is only used sparingly.
References: https://bugs.freedesktop.org/show_bug.cgi?id=94722
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: David Weinehall <david.weinehall@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Tested-by: David Weinehall <david.weinehall@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463207195-22076-4-git-send-email-chris@chris-wilson.co.uk
Chris Wilson [Sat, 14 May 2016 06:26:34 +0000 (07:26 +0100)]
drm/i915: Lazily migrate the objects after hibernation
Now that we mark the object domains for having been restored from the
hibernation image, we not need to flush everything during resume and
can instead rely on the normal domain tracking to flush only when
required. The only caveat here are objects that are pinned for use by
the hardware, whose contents must be coherent for when the device
resumes reading from then (shortly afterwards with the driver assuming
the objects are in the correct domain).
References: https://bugs.freedesktop.org/show_bug.cgi?id=94722
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Cc: David Weinehall <david.weinehall@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Tested-by: David Weinehall <david.weinehall@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463207195-22076-3-git-send-email-chris@chris-wilson.co.uk
Chris Wilson [Sat, 14 May 2016 06:26:33 +0000 (07:26 +0100)]
drm/i915: Update domain tracking for GEM objects on hibernation
When creating the hibernation image, the CPU will read the pages of all
objects and thus conflict with our domain tracking. We need to update
our domain tracking to accurately reflect the state on restoration.
v2: Perform the domain tracking inside freeze, before the image is
written, rather than upon restoration.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Cc: David Weinehall <david.weinehall@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463207195-22076-2-git-send-email-chris@chris-wilson.co.uk
Chris Wilson [Sat, 14 May 2016 06:26:32 +0000 (07:26 +0100)]
drm/i915: Add distinct stubs for PM hibernation phases
Currently for handling the extra hibernation phases we just call the
equivalent suspend/resume phases. In the next couple of patches, I wish
to specialise the hibernation phases to reduce the amount of work
required for handling GEM objects.
v2: There are more! Don't forget the freeze phases.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Cc: David Weinehall <david.weinehall@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463207195-22076-1-git-send-email-chris@chris-wilson.co.uk
Ville Syrjälä [Fri, 13 May 2016 17:10:42 +0000 (10:10 -0700)]
drm/i915: Ignore stale wm register values on resume on ilk-bdw (v2)
When we resume the watermark register may contain some BIOS leftovers,
or just the hardware reset values. We should ignore those as the
pipes will be off anyway, and so frobbing around with intermediate
watermarks doesn't make much sense.
In fact I think we should just throw the skip_intermediate_wm flag
out, and instead properly sanitize the "active" watermarks to match
the current plane and pipe states. The actual wm state readout might
also need a bit of work. But for now, let's continue with the
skip_intermediate_wm to keep the fix more minimal.
Fixes this sort of errors on resume
[drm:ilk_validate_pipe_wm] LP0 watermark invalid
[drm:intel_crtc_atomic_check] No valid intermediate pipe watermarks are possible
[drm:intel_display_resume [i915]] *ERROR* Restoring old state failed with -22
and a boatload of subsequent modeset BAT fails on my ILK.
v2:
- Rebase; the SKL atomic WM patches that just landed changed the WM
structure fields in intel_crtc_state slightly. (Matt)
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Fixes:
ed4a6a7ca853 ("drm/i915: Add two-stage ILK-style watermark programming (v11)")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463159442-20478-1-git-send-email-matthew.d.roper@intel.com
Ville Syrjälä [Fri, 13 May 2016 14:55:17 +0000 (17:55 +0300)]
drm/i915: Don't leave old junk in ilk active watermarks on readout
When we read out the watermark state from the hardware we're supposed to
transfer that into the active watermarks, but currently we fail to any
part of the active watermarks that isn't explicitly written. Let's clear
it all upfront.
Looks like this has been like this since the beginning, when I added the
readout. No idea why I didn't clear it up.
Cc: Matt Roper <matthew.d.roper@intel.com>
Fixes:
243e6a44b9ca ("drm/i915: Init HSW watermark tracking in intel_modeset_setup_hw_state()")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463151318-14719-2-git-send-email-ville.syrjala@linux.intel.com
Ville Syrjälä [Wed, 11 May 2016 19:44:52 +0000 (22:44 +0300)]
drm/i915: Eliminate the CDCLK_CTL RMW on BXT
All the fields in CDCLK_CTL we don't program should be left at zero, so
let's just get rid of the RMW.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-14-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:44:51 +0000 (22:44 +0300)]
drm/i915: Program BXT_CDCLK_CD2X_PIPE
BXT could change the CD2X divider synchronized with a single pipe.
So assuming the DE PLL frequency doesn't need to be changed, we could
change cdclk without shutting off the pipe (when only a single pipe is
enabled). In the meantime let's configure CDCLK_CTL for non-double
buffered CD2X update, although it shouldn't really matter as long as
the selected pipe is disabled when reprogramming the divider.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-13-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:44:50 +0000 (22:44 +0300)]
drm/i915: s/required_vco/vco/ in skl cdclk code
The 'required' part of 'required_vco' should be obvious. Let's just call
it 'vco' for brevity.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-12-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:44:49 +0000 (22:44 +0300)]
drm/i915: s/freq/cdclk/
Rename the generic sounding freq/frequency parameters to the cdclk
functions to 'cdclk' so that we'll know which clock we're talking about
once we have to deal with the vco frequencies as well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-11-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:44:48 +0000 (22:44 +0300)]
drm/i915: Kill off dead code from skl_dpll0_enable()
We calculate the CDCLK_CTL value from scratch so no need to attempt
some form of RMW first.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-10-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:44:47 +0000 (22:44 +0300)]
drm/i915: Extract skl_dpll0_disable()
Make thins a bit easier to read by extracting the SKL DPLL0
disable into separate functions. We already have the enable
counterpart. Down the line this will also help make the cdclk
programming on SKL, BXT, and following platforms look rather
consistent.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-9-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:44:46 +0000 (22:44 +0300)]
drm/i915: Remove 10% cdclk guardband on BXT
We don't need any pixel clock vs. cdclk guardband since HSW. BXT still
tries to add one though. Get rid of it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-8-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:44:45 +0000 (22:44 +0300)]
drm/i915: Use skl_cdclk_decimal() on bxt
Both SKL and BXT need to fill in the "decimal" cdclk frequency into
the CDCLK_CTL register. SKL uses a small helper to do the kHz->"decimal"
conversion, whereas BXT has it open-coded. Use the helper on BXT too.
While at it, change it to round to closest rather than down. It doesn't
actually matter with the frequencies we have to deal with, but it seems
like the right thing to do.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-7-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:44:44 +0000 (22:44 +0300)]
drm/i915: Use ilk_max_pixel_rate() for BXT cdclk calculation
BXT uses the "pch" panel fitter configuration, so we can use
ilk_max_pixel_rate() instead of intel_mode_max_pixclk() to compute the
pipe pixel rate. ilk_max_pixel_rate() will account for the pipe
scaler downscaling factor whereas intel_mode_max_pixclk() will not.
I'm pretty sure the same limitation is there on GMCH platforms, but
no one just bothered to implement the downscaling adjustment for them.
Probably should just unify the panel fitter setup more across the
platforms and use the exact same code on all platforms for this.
But in the meantime, let's at least make BXT a bit more correct.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-6-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:44:43 +0000 (22:44 +0300)]
drm/i915: Don't pass dev_priv to broxton_calc_cdclk()
broxton_calc_cdclk() doesn't need dev_priv for anything, so let's not
bother passing it around.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-5-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:44:42 +0000 (22:44 +0300)]
drm/i915: Untangle .fdi_link_train and cdclk vfunc setup
Split the .fdi_link_train and .modeset_commit_cdclk/.modeset_calc_cdclk
into two separate if ladders. Much easier to read when you're not
confusing two totally separate subjects.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-4-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:44:41 +0000 (22:44 +0300)]
drm/i915: Extract broadwell_calc_cdclk()
Try to reduce the amount of duplicated cdclk magic numbers by
moving the max_pixclk->cdclk conversion into a helper.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-3-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:44:40 +0000 (22:44 +0300)]
drm/i915: Drop checks for max_pixclk failures in cdclk computation
commit
565602d7501a ("drm/i915: Do not acquire crtc state to check clock during modeset, v4.")
removed the possibility that intel_mode_max_pixclk() or
ilk_max_pixel_rate() might return an error, so let's get rid of the
error checks in the callers as well.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-2-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Matt Roper [Thu, 12 May 2016 14:06:11 +0000 (07:06 -0700)]
drm/i915: Remove wm_config from dev_priv/intel_atomic_state
We calculate the watermark config into intel_atomic_state and then save
it into dev_priv, but never actually use it from there. This is
left-over from some early ILK-style watermark programming designs that
got changed over time.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-18-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:06:10 +0000 (07:06 -0700)]
drm/i915/gen9: Reject display updates that exceed wm limitations (v2)
If we can't find any valid level 0 watermark values for the requested
atomic transaction, reject the configuration before we try to start
programming the hardware.
v2:
- Add extra debugging output when we reject level 0 watermarks so that
we can more easily debug how/why they were rejected.
Cc: Lyude Paul <cpaul@redhat.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-17-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 22:11:40 +0000 (15:11 -0700)]
drm/i915/gen9: Calculate watermarks during atomic 'check' (v2)
Moving watermark calculation into the check phase will allow us to to
reject display configurations for which there are no valid watermark
values before we start trying to program the hardware (although those
tests will come in a subsequent patch).
Another advantage of moving this calculation to the check phase is that
we can calculate the watermarks in a single shot as part of the atomic
transaction. The watermark interfaces we inherited from our legacy
modesetting days are a bit broken in the atomic design because they use
per-crtc entry points but actually re-calculate and re-program something
that is really more of a global state. That worked okay in the legacy
modesetting world because operations only ever updated a single CRTC at
a time. However in the atomic world, a transaction can involve multiple
CRTC's, which means we wind up computing and programming the watermarks
NxN times (where N is the number of CRTC's involved). With this patch
we eliminate the redundant re-calculation of watermark data for atomic
states (which was the cause of the WARN_ON(!wm_changed) problems that
have plagued us for a while).
We still need to work on the 'commit' side of watermark handling so that
we aren't doing redundant NxN programming of watermarks, but that's
content for future patches.
v2:
- Bail out of skl_write_wm_values() if the CRTC isn't active. Now that
we set dirty_pipes to ~0 if the active pipes change (because
we need to deal with DDB changes), we can now wind up here for
disabled pipes, whereas we couldn't before.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89055
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92181
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463091100-13747-1-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:06:08 +0000 (07:06 -0700)]
drm/i915/gen9: Propagate watermark calculation failures up the call chain
Once we move watermark calculation to the atomic check phase, we'll want
to start rejecting display configurations that exceed out watermark
limits. At the moment we just assume that there's always a valid set of
watermarks, even though this may not actually be true. Let's prepare by
passing return codes up through the call stack in preparation.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-15-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:06:07 +0000 (07:06 -0700)]
drm/i915/gen9: Use a bitmask to track dirty pipe watermarks
Slightly easier to work with than an array of bools.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-14-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:06:06 +0000 (07:06 -0700)]
drm/i915/gen9: Allow watermark calculation on in-flight atomic state (v3)
In an upcoming patch we'll move this calculation to the atomic 'check'
phase so that the display update can be rejected early if no valid
watermark programming is possible.
v2:
- Drop intel_pstate_for_cstate_plane() helper and add note about how
the code needs to evolve in the future if we start allowing more than
one pending commit against a CRTC. (Maarten)
v3:
- Only have skl_compute_wm_level calculate watermarks for enabled
planes; we can just set the other planes on a CRTC to disabled
without having to look at the plane state. This is important because
despite our CRTC lock we can still have racing commits that modify
a disabled plane's property without turning it on. (Maarten)
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-13-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:06:05 +0000 (07:06 -0700)]
drm/i915/gen9: Calculate plane WM's from state
In a future patch we'll want to calculate plane watermarks for in-flight
atomic state rather than the already-committed state.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-12-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:06:04 +0000 (07:06 -0700)]
drm/i915/gen9: Drop re-allocation of DDB at atomic commit (v2)
Now that we're properly pre-allocating the DDB during the atomic check
phase and we trust that the allocation is appropriate, let's actually
use the allocation computed and not duplicate that work during the
commit phase.
v2:
- Significant rebasing now that we can use cached data rates and
minimum block allocations to avoid grabbing additional plane states.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-11-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:06:03 +0000 (07:06 -0700)]
drm/i915/gen9: Compute DDB allocation at atomic check time (v4)
Calculate the DDB blocks needed to satisfy the current atomic
transaction at atomic check time. This is a prerequisite to calculating
SKL watermarks during the 'check' phase and rejecting any configurations
that we can't find valid watermarks for.
Due to the nature of DDB allocation, it's possible for the addition of a
new CRTC to make the watermark configuration already in use on another,
unchanged CRTC become invalid. A change in which CRTC's are active
triggers a recompute of the entire DDB, which unfortunately means we
need to disallow any other atomic commits from racing with such an
update. If the active CRTC's change, we need to grab the lock on all
CRTC's and run all CRTC's through their 'check' handler to recompute and
re-check their per-CRTC DDB allocations.
Note that with this patch we only compute the DDB allocation but we
don't actually use the computed values during watermark programming yet.
For ease of review/testing/bisecting, we still recompute the DDB at
watermark programming time and just WARN() if it doesn't match the
precomputed values. A future patch will switch over to using the
precomputed values once we're sure they're being properly computed.
Another clarifying note: DDB allocation itself shouldn't ever fail with
the algorithm we use today (i.e., we have enough DDB blocks on BXT to
support the minimum needs of the worst-case scenario of every pipe/plane
enabled at full size). However the watermarks calculations based on the
DDB may fail and we'll be moving those to the atomic check as well in
future patches.
v2:
- Skip DDB calculations in the rare case where our transaction doesn't
actually touch any CRTC's at all. Assuming at least one CRTC state
is present in our transaction, then it means we can't race with any
transactions that would update dev_priv->active_crtcs (which requires
_all_ CRTC locks).
v3:
- Also calculate DDB during initial hw readout, to prevent using
incorrect bios values. (Maarten)
v4:
- Use new distrust_bios_wm flag instead of skip_initial_wm (which was
never actually set).
- Set intel_state->active_pipe_changes instead of just realloc_pipes
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Lyude Paul <cpaul@redhat.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-10-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:06:02 +0000 (07:06 -0700)]
drm/i915: Add distrust_bios_wm flag to dev_priv (v2)
SKL-style platforms can't fully trust the watermark/DDB settings
programmed by the BIOS and need to do extra sanitization on their first
atomic update. Add a flag to dev_priv that is set during hardware
readout and cleared at the end of the first commit.
Note that for the somewhat common case where everything is turned off
when the driver starts up, we don't need to bother with a recompute...we
know exactly what the DDB should be (all zero's) so just setup the DDB
directly in that case.
v2:
- Move clearing of distrust_bios_wm up below the swap_state call since
it's a more natural / self-explanatory location. (Maarten)
- Use dev_priv->active_crtcs to test whether any CRTC's are turned on
during HW WM readout rather than trying to count the active CRTC's
again ourselves. (Maarten)
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-9-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:06:01 +0000 (07:06 -0700)]
drm/i915/gen9: Allow skl_allocate_pipe_ddb() to operate on in-flight state (v3)
We eventually want to calculate watermark values at atomic 'check' time
instead of atomic 'commit' time so that any requested configurations
that result in impossible watermark requirements are properly rejected.
The first step along this path is to allocate the DDB at atomic 'check'
time. As we perform this transition, allow the main allocation function
to operate successfully on either an in-flight state or an
already-commited state. Once we complete the transition in a future
patch, we'll come back and remove the unnecessary logic for the
already-committed case.
v2: Rebase/refactor; we should no longer need to grab extra plane states
while allocating the DDB since we can pull cached data rates and
minimum block counts from the CRTC state for any planes that aren't
being modified by this transaction.
v3:
- Simplify memsets to clear DDB plane entries. (Maarten)
- Drop a redundant memset of plane[pipe][PLANE_CURSOR] that was added
by an earlier Coccinelle patch. (Maarten)
- Assign *num_active at the top of skl_ddb_get_pipe_allocation_limits()
so that no code paths return without setting it. (kbuild robot)
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-8-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:06:00 +0000 (07:06 -0700)]
drm/i915: Track whether an atomic transaction changes the active CRTC's
For the purposes of DDB re-allocation we need to know whether a
transaction changes the list of CRTC's that are active. While
state->modeset could be used for this purpose, that would be slightly
too aggressive since it would lead us to re-allocate the DDB when a
CRTC's mode changes, but not its final active state.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-7-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:05:59 +0000 (07:05 -0700)]
drm/i915/gen9: Store plane minimum blocks in CRTC wm state (v2)
This will eventually allow us to re-use old values without
re-calculating them for unchanged planes (which also helps us avoid
re-grabbing extra plane states).
v2:
- Drop unnecessary memset's; they were meant for a later patch (which
got reworked anyway to not need them, but were mis-rebased into this
one. (Maarten)
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-6-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:05:58 +0000 (07:05 -0700)]
drm/i915/gen9: Allow calculation of data rate for in-flight state (v2)
Our skl_get_total_relative_data_rate() function gets passed a crtc state
object to calculate the data rate for, but it currently always looks
up the committed plane states that correspond to that CRTC. Let's
check whether the CRTC state is an in-flight state (meaning
cstate->state is non-NULL) and if so, use the corresponding in-flight
plane states.
We'll soon be using this function exclusively for in-flight states; at
that time we'll be able to simplify the function a bit, but for now we
allow it to be used in either mode.
v2:
- Rebase on top of changes to cache plane data rates.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-5-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:05:57 +0000 (07:05 -0700)]
drm/i915/gen9: Cache plane data rates in CRTC state
This will be important when we start calculating CRTC data rates for
in-flight CRTC states since it will allow us to calculate the total data
rate without needing to grab the plane state for any planes that aren't
updated by the transaction.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-4-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:05:56 +0000 (07:05 -0700)]
drm/i915: Rename s/skl_compute_pipe_wm/skl_build_pipe_wm/
When we added atomic watermarks, we added a new display vfunc
'compute_pipe_wm' that is used to compute any pipe-specific watermark
information that we can at atomic check time. This was a somewhat poor
naming choice since we already had a 'skl_compute_pipe_wm' function that
doesn't quite fit this model --- the existing SKL function is something
that gets used at atomic commit time, after the DDB allocation has been
determined. Let's rename the existing SKL function to avoid confusion.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-3-git-send-email-matthew.d.roper@intel.com
Matt Roper [Thu, 12 May 2016 14:05:55 +0000 (07:05 -0700)]
drm/i915: Reorganize WM structs/unions in CRTC state
Reorganize the nested structures and unions we have for pipe watermark
data in intel_crtc_state so that platform-specific data can be added in
a more sensible manner (and save a bit of memory at the same time).
The change basically changes the organization from:
union {
struct intel_pipe_wm ilk;
struct intel_pipe_wm skl;
} optimal;
struct intel_pipe_wm intermediate /* ILK-only */
to
union {
struct {
struct intel_pipe_wm intermediate;
struct intel_pipe_wm optimal;
} ilk;
struct {
struct intel_pipe_wm optimal;
} skl;
}
There should be no functional change here, but it will allow us to add
more platform-specific fields going forward (and more easily extend to
other platform types like VLV).
While we're at it, let's move the entire watermark substructure out to
its own structure definition to make the code slightly more readable.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-2-git-send-email-matthew.d.roper@intel.com
Imre Deak [Thu, 12 May 2016 13:18:52 +0000 (16:18 +0300)]
drm/i915: Remove redundant const from function return type
Marking function return types as const is redundant, as these are
rvalues and as such constant by definition. Code checkers and GCC will
warn about this so remove the modifier.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463059132-1720-5-git-send-email-imre.deak@intel.com
Imre Deak [Thu, 12 May 2016 13:18:51 +0000 (16:18 +0300)]
drm/i915: Handle error return from dma_set_coherent_mask()
A failure from these functions can lead to obscure bugs later, so it's
better not to suppress them and just fail module loading.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463059132-1720-4-git-send-email-imre.deak@intel.com
Imre Deak [Thu, 12 May 2016 13:18:50 +0000 (16:18 +0300)]
drm/i915: Add comments about fixed pipe->transcoder/PLL mapping
Code checkers may complain about the explicit casts between different
enum types, so add comments for known-valid cases to help future
triaging of such complaints.
v2:
- Make the comments more logical (Ville).
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463059132-1720-3-git-send-email-imre.deak@intel.com
Imre Deak [Thu, 12 May 2016 13:18:49 +0000 (16:18 +0300)]
drm/i915/gen9: Avoid using negative array index in skl_update_plane()
scaler_id may be negative as shown by conditions later in the function,
so don't use it as an array index in that case.
v2:
- Remove ps_ctrl while at it (Ville).
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463059132-1720-2-git-send-email-imre.deak@intel.com
Chris Wilson [Fri, 13 May 2016 10:57:22 +0000 (11:57 +0100)]
drm/i915: Stop automatically retiring requests after a GPU hang
Following a GPU hang, we break out of the request loop in order to
unlock the struct_mutex for use by the GPU reset. However, if we retire
all the requests at that moment, we cannot identify the guilty request
after performing the reset.
v2: Not automatically retiring requests forces us to recheck for
available ringspace.
Fixes:
f4457ae71fd6 ("drm/i915: Prevent leaking of -EIO from i915_wait_request()")
Testcase: igt/gem_reset_stats/ban-*
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Tested-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463137042-9669-4-git-send-email-chris@chris-wilson.co.uk
Chris Wilson [Fri, 13 May 2016 10:57:21 +0000 (11:57 +0100)]
drm/i915: Stop retiring requests from busy/wait ioctls
In order to reduce the workload of the caller, we do not want to
actually have to retire requests of others when checking the busy status
of this object. This applies to both busy/wait ioctls as the wait ioctl
has a semantically equivalent mode to the busy ioctl.
At the present time, this is only a minor improvement to reduce the
workload of the busy ioctl under the struct_mutex which helps to reduce
its impact upon contention of struct_mutex. However, since it is mostly
a victim in highly contended scenarios, the impact is very minor until
we can eliminate the struct_mutex requirement for busy-ioctl in the near
future.
v2: Mention the patches intended limited impact. It is just paving the
way for greater changes whilst reducing the impact of a bugfix in the
next patch.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463137042-9669-3-git-send-email-chris@chris-wilson.co.uk
Chris Wilson [Fri, 13 May 2016 10:57:20 +0000 (11:57 +0100)]
drm/i915: Complete pending resets before get-reset-stats ioctl
The get-reset-stats ioctls wasn't waiting for a pending reset before
reporting its statistics, and so was ignoring a hang generated by the
context that should have been reported against said context.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Tested-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463137042-9669-2-git-send-email-chris@chris-wilson.co.uk
Chris Wilson [Fri, 13 May 2016 10:57:19 +0000 (11:57 +0100)]
drm/i915: Move get-reset-stats ioctl from intel_uncore.c to i915_gem_context.c
The get-reset-stats ioctl reports upon the statistics (number of hangs,
be it as a victim or the guilty party) of a particular context. It is
semantically better as being part of i915_gem_context.c user interface,
as opposed to the hardware level access of intel_uncore.c
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463137042-9669-1-git-send-email-chris@chris-wilson.co.uk
Ander Conselvan de Oliveira [Wed, 4 May 2016 09:11:59 +0000 (12:11 +0300)]
drm/i915: Remove intel_limit_t typedef
The coding style documentation says the following about typedefs:
"In general, a pointer, or a struct that has elements that can
reasonably be directly accessed should _never_ be a typedef."
intel_limit_t falls in that category, so just use "struct intel_limit"
instead.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462353119-9738-3-git-send-email-ander.conselvan.de.oliveira@intel.com
Ander Conselvan de Oliveira [Wed, 4 May 2016 09:11:58 +0000 (12:11 +0300)]
drm/i915: Remove intel_range_t and intel_p2_t typedefs
Those are only used for defining struct intel_limit, so use anonymous
structs instead.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462353119-9738-2-git-send-email-ander.conselvan.de.oliveira@intel.com
Ander Conselvan de Oliveira [Wed, 4 May 2016 09:11:57 +0000 (12:11 +0300)]
drm/i915: Remove intel_clock_t typedef
Just use "struct dpll" everywhere. That's actually shorter than
intel_clock_t.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462353119-9738-1-git-send-email-ander.conselvan.de.oliveira@intel.com
Dave Airlie [Fri, 13 May 2016 01:48:01 +0000 (11:48 +1000)]
Merge tag 'drm/panel/for-4.7-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next
drm/panel: Changes for v4.7-rc1
This contains support for a bunch of new panels in the simple panel
driver along with some cleanup and support for a new Analogix HDMI to DP
bridge.
* tag 'drm/panel/for-4.7-rc1' of git://anongit.freedesktop.org/tegra/linux:
drm/panel: simple: Add support for TPK U.S.A. LLC Fusion 7" and 10.1" panels
drm/bridge: Add Analogix anx78xx support
devicetree: Add ANX7814 SlimPort transmitter binding
of: Add vendor prefix for Analogix Semiconductor
drm/dp: Add define to set 0.5% down-spread in MAX_DOWNSPREAD register
drm/panel: simple: Add support for Innolux AT070TN92
drm/panel: simple: Remove useless drm_mode_set_name()
drm/panel: simple: Set appropriate mode type
drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS
drm/panel: simple: Add the 7" DPI panel from Adafruit
of: Add vendor prefix for On Tat Industrial Company.
Nick Hoath [Fri, 6 May 2016 10:42:53 +0000 (11:42 +0100)]
drm/i915/guc: Add Broxton GuC firmware loading support
Issue: VIZ-7772
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Reviewed-by: peter.antoine@intel.com
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462531373-34819-2-git-send-email-nicholas.hoath@intel.com
Tom O'Rourke [Fri, 6 May 2016 10:42:52 +0000 (11:42 +0100)]
drm/i915/guc: Use major_minor version for filename
Load guc firmware from file with major_minor number
in filename instead of using symolic link with only
major number.
This change is so that new firmwares can only be used
with a kernel change. This in case there is a regression
with a new firmware, it won't be used by default without
some testing.
Issue: VIZ-7713
Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: peter.antoine@intel.com
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Chris Wilson [Thu, 12 May 2016 11:43:23 +0000 (12:43 +0100)]
drm/i915: Convert intel_overlay.c to use native drm_i915_private pointers
Another day, another long overdue conversion. Not much to update inside
intel_overlay.c, but still
text data bss dec hex filename
6309547 3578778 696320
10584645 a18245 vmlinux
6309291 3578778 696320
10584389 a18145 vmlinux
a couple of hundred bytes of pointer misdirection.
Whilst here, rename the ioctl entry points to include the _ioctl suffix
so that the user entry points are clear (following the idiom).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1463053403-25086-1-git-send-email-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Ville Syrjälä [Wed, 11 May 2016 19:04:33 +0000 (22:04 +0300)]
drm/i915: s/DPPL/DPLL/ for SKL DPLLs
SKL DPLLs shouldn't be called DPPLs.
Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Fixes:
2edd6443e3d0 ("drm/i915: Use a table to initilize shared dplls")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1462993473-8254-1-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Bhuvanchandra DV [Thu, 5 May 2016 06:17:07 +0000 (11:47 +0530)]
drm/panel: simple: Add support for TPK U.S.A. LLC Fusion 7" and 10.1" panels
Add support for TPK U.S.A. LLC Fusion 7", 10.1" panels to the DRM simple
panel driver.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enric Balletbo i Serra [Mon, 2 May 2016 07:54:26 +0000 (09:54 +0200)]
drm/bridge: Add Analogix anx78xx support
Although there are other chips from the same family that can reuse this
driver, at the moment we only tested ANX7814 chip.
The ANX7814 is an ultra-low power Full-HD (1080p60) SlimPort transmitter
designed for portable devices. This driver adds initial support for HDMI
to DP pass-through mode.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Daniel Kurtz <djkurtz@chromium.org>
Cc: Nicolas Boichat <drinkcat@chromium.org>
Cc: Thierry Reding <treding@nvidia.com>
[treding@nvidia.com: coding style, propagate regulator_get() errors]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enric Balletbo i Serra [Mon, 2 May 2016 07:54:25 +0000 (09:54 +0200)]
devicetree: Add ANX7814 SlimPort transmitter binding
The ANX7814 is an ultra-low power Full-HD (1080p60) SlimPort transmitter
designed for portable devices.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enric Balletbo i Serra [Mon, 2 May 2016 07:54:24 +0000 (09:54 +0200)]
of: Add vendor prefix for Analogix Semiconductor
Analogix Semiconductor Inc. develops analog and mixed-signal devices for
digital media and communications interconnect applications.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enric Balletbo i Serra [Mon, 2 May 2016 07:54:23 +0000 (09:54 +0200)]
drm/dp: Add define to set 0.5% down-spread in MAX_DOWNSPREAD register
Support of 0.5% down-spread is required for DisplayPort Specification
Version 1.1 Sink.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
[treding@nvidia.com: rename to DP_MAX_DOWNSPREAD_0_5]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Riccardo Bortolato [Wed, 20 Apr 2016 13:37:15 +0000 (15:37 +0200)]
drm/panel: simple: Add support for Innolux AT070TN92
Add support for the Innolux AT070TN92 panel.
Signed-off-by: Riccardo Bortolato <bortolato@navaltechitalia.it>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Boris Brezillon [Thu, 30 Apr 2015 14:38:36 +0000 (16:38 +0200)]
drm/panel: simple: Remove useless drm_mode_set_name()
drm_display_mode_from_videomode() already calls drm_mode_set_name() on
the provided mode.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[treding@nvidia.com: slightly reword commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Boris Brezillon [Fri, 15 Apr 2016 16:23:33 +0000 (18:23 +0200)]
drm/panel: simple: Set appropriate mode type
All modes exposed by simple panels should be tagged as driver defined
modes. Moreover, if a panel supports only one mode, this mode is
obviously the preferred one.
Doing this also fix a problem occurring when a 'video=' parameter is
passed on the kernel command line. In some cases the user provided mode
will be preferred over the simple panel ones, which might result in
unpredictable behavior.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
[treding@nvidia.com: reshuffle some code for consistency]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Maxime Ripard [Wed, 23 Mar 2016 16:38:34 +0000 (17:38 +0100)]
drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS
Add support for the Olimex LCD-OLinuXino-4.3TS panel to the DRM simple
panel driver.
It is a 480x272 panel connected through a 24-bits RGB interface.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Eric Anholt [Fri, 25 Mar 2016 00:23:48 +0000 (17:23 -0700)]
drm/panel: simple: Add the 7" DPI panel from Adafruit
This is a basic TFT panel with a 40-pin FPC connector on it. The
specification doesn't define timings, but the Adafruit instructions
were setting up 800x480 CVT.
v2: Add .bus_format and vsync/hsync flags.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
[treding@nvidia.com: keep entries properly sorted]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Eric Anholt [Fri, 25 Mar 2016 00:23:47 +0000 (17:23 -0700)]
of: Add vendor prefix for On Tat Industrial Company.
This is the vendor for a 7" DPI panel sold by Adafruit which I'd like
to describe in DT.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dave Airlie [Thu, 12 May 2016 01:16:55 +0000 (11:16 +1000)]
Merge branch 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux into drm-next
More amdgpu fixes for 4.7. Highlights:
- enable async pageflips
- UVD fixes for polaris
- lots of GPUVM fixes
- whitespace and code cleanups
- misc bug fixes
* 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux: (32 commits)
drm/amd/powerplay: rewrite pp_sw_init to make code readable
drm/amdgpu/dce11: fix audio offset for asics with >7 audio pins
drm/amdgpu: fix and cleanup user fence handling v2
drm/amdgpu: move VM fields into job
drm/amdgpu: move the context from the IBs into the job
drm/amdgpu: move context switch handling into common code v2
drm/amdgpu: move preamble IB handling into common code
drm/amdgpu/gfx7: fix pipeline sync
amdgpu/uvd: separate context buffer from DPB
drm/amdgpu: use fence_context to judge ctx switch v2
drm/amd/amdgpu: Added more named DRM info messages for debugging
drm/amd/amdgpu: Add name field to amd_ip_funcs (v2)
drm/amdgpu: Support DRM_MODE_PAGE_FLIP_ASYNC (v2)
drm/amdgpu/dce11: don't share PLLs on Polaris
drm/amdgpu: Drop unused parameter for *get_sleep_divider_id_from_clock
drm/amdgpu: Simplify calculation in *get_sleep_divider_id_from_clock
drm/amdgpu: Use max macro in *get_sleep_divider_id_from_clock
drm/amd/powerplay: Use defined constants for minium engine clock
drm/amdgpu: add missing licenses on a couple of files
drm/amdgpu: fetch cu_info once at init
...
Dave Airlie [Thu, 12 May 2016 01:15:18 +0000 (11:15 +1000)]
Merge tag 'drm/tegra/for-4.7-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next
drm/tegra: Changes for v4.7-rc1
Two small changes, one getting rid of the bogus gamma table size and
another removing Terje from the MAINTAINERS file since he no longer does
any work on host1x or display.
* tag 'drm/tegra/for-4.7-rc1' of git://anongit.freedesktop.org/tegra/linux:
MAINTAINERS: Remove Terje Bergström as Tegra DRM maintainer
drm/tegra: Don't set a gamma table size
Dave Airlie [Thu, 12 May 2016 01:11:03 +0000 (11:11 +1000)]
Merge branch 'drm-hisilicon-next' of github.com:xin3liang/linux into drm-next
misc hisilicon cleanups.
* 'drm-hisilicon-next' of github.com:xin3liang/linux:
drm/hisilicon: Fix DRM_INFO printed issue
drm/hisilicon: Make kirin_drm_unbind sufficient
drm/hisilicon: Use drm_connector_register_all
Dave Airlie [Thu, 12 May 2016 00:10:53 +0000 (10:10 +1000)]
Merge branch 'exynos-drm-next' of git://git./linux/kernel/git/daeinki/drm-exynos into drm-next
Summary:
- expose HDMI-PHY clock to other drivers.
. this patch was included in below patch series but I missed.
http://www.spinics.net/lists/dri-devel/msg103097.html
- some fixups about DECON5433 driver
. this patch corrects vblank handling and fixes up trigger
configuration.
- use generic functions - gem_prime_mmap and dma_buf_mmap.
- use DMA-Mapping API instead of specific one.
- some code cleanups and fixeups.
* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos:
drm/exynos/decon5433: fix trigger configuration
drm/exynos/dsi: use of_graph_get_endpoint_by_regs helper
drm/exynos/dpi: use of_graph_get_endpoint_by_regs helper
drm/exynos: Nuke dummy fb->dirty callback
drm/exynos: use directly DMA mapping APIs on g2d
drm/exynos/hdmi: Don't print error on deferral due to regulators
drm/exynos: fix imported dma-buf to be mapped
drm/exynos: support gem_prime_mmap
drm/exynos: fimd: harden fimd_calc_clkdiv()
drm/exynos: fix cancel page flip code
drm/exynos/decon5433: do not use unnecessary software trigger
drm/exynos/decon5433: handle vblank in vblank interrupt
drm/exynos/hdmi: expose HDMI-PHY clock as pipeline clock
Huang Rui [Mon, 9 May 2016 09:29:41 +0000 (17:29 +0800)]
drm/amd/powerplay: rewrite pp_sw_init to make code readable
Actually, pp_sw_init executes pptable_init and backend_init orderly if
they are initialized successfully. So rewrite it to make code more
readable.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 10 May 2016 13:29:56 +0000 (09:29 -0400)]
drm/amdgpu/dce11: fix audio offset for asics with >7 audio pins
Missing offset in the audio offset array.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 6 May 2016 20:14:00 +0000 (22:14 +0200)]
drm/amdgpu: fix and cleanup user fence handling v2
We leaked the BO in the error pass, additional to that we only have
one user fence for all IBs in a job.
v2: remove white space changes
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 6 May 2016 15:50:03 +0000 (17:50 +0200)]
drm/amdgpu: move VM fields into job
They are the same for all IBs.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 6 May 2016 13:57:42 +0000 (15:57 +0200)]
drm/amdgpu: move the context from the IBs into the job
We only have one context for all IBs.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 6 May 2016 13:31:19 +0000 (15:31 +0200)]
drm/amdgpu: move context switch handling into common code v2
It was a source of bugs to repeat that in each IP version.
v2: rename parameter
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 6 May 2016 12:52:57 +0000 (14:52 +0200)]
drm/amdgpu: move preamble IB handling into common code
This fixes the handling which was completely broken when you
ad more than one preamble IB.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Mon, 9 May 2016 09:29:39 +0000 (17:29 +0800)]
drm/amdgpu/gfx7: fix pipeline sync
Need to wait on the fence as well.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sonny Jiang [Wed, 11 May 2016 17:29:48 +0000 (13:29 -0400)]
amdgpu/uvd: separate context buffer from DPB
Updated to handle latest UVD ucode.
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Noralf Trønnes [Wed, 11 May 2016 16:09:21 +0000 (18:09 +0200)]
drm/atomic: Add drm_atomic_helper_best_encoder()
Add (struct drm_connector_helper_funcs *)->best_encoder callback helper
for connectors that support exactly 1 encoder, statically determined at
driver init time.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1462982962-10530-6-git-send-email-noralf@tronnes.org
Noralf Trønnes [Wed, 11 May 2016 16:09:20 +0000 (18:09 +0200)]
drm/atomic: Don't skip drm_bridge_*() calls if !drm_encoder_helper_funcs
Don't skip drm_bridge_*() calls if encoder->helper_private is NULL.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1462982962-10530-5-git-send-email-noralf@tronnes.org
Noralf Trønnes [Wed, 11 May 2016 16:09:18 +0000 (18:09 +0200)]
drm/fb-cma-helper: Hook up to DocBook and fix some docs
Hook up fb_cma_helper to DocBook. Remove mention of
CONFIG_FB_DEFERRED_IO in the docs, which was forgotten in the latest
version of the deferred_io patch.
Use & when referencing drm_mode_config_funcs in docs.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1462982962-10530-3-git-send-email-noralf@tronnes.org
Noralf Trønnes [Wed, 11 May 2016 16:09:17 +0000 (18:09 +0200)]
drm/fb-helper: Remove mention of CONFIG_FB_DEFERRED_IO in docs
This was forgotten to fixup in the latest version of the deferred_io
patch which made FB_DEFERRED_IO mandatory.
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1462982962-10530-2-git-send-email-noralf@tronnes.org
Christian König [Tue, 3 May 2016 13:17:40 +0000 (15:17 +0200)]
drm/amdgpu: use fence_context to judge ctx switch v2
Use of the ctx pointer is not safe, because they are likely already
be assigned to another ctx when doing comparing.
v2: recreate from scratch, avoid all unnecessary changes.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 5 May 2016 14:23:40 +0000 (10:23 -0400)]
drm/amd/amdgpu: Added more named DRM info messages for debugging
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Wed, 4 May 2016 18:28:35 +0000 (14:28 -0400)]
drm/amd/amdgpu: Add name field to amd_ip_funcs (v2)
Add name that we can print out in kernel messages
to aid in debugging.
v2: drop DAL changes for upstream
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 5 May 2016 20:03:57 +0000 (16:03 -0400)]
drm/amdgpu: Support DRM_MODE_PAGE_FLIP_ASYNC (v2)
When this flag is set, we program the hardware to execute the flip
during horizontal blank (i.e. for the next scanline) instead of during
vertical blank (i.e. for the next frame).
Ported from radeon commit:
drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNC
v2: drop DAL change for upstream
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 5 May 2016 15:17:22 +0000 (11:17 -0400)]
drm/amdgpu/dce11: don't share PLLs on Polaris
They are part of the phy so you can't share them.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Thu, 5 May 2016 07:07:48 +0000 (09:07 +0200)]
drm/amdgpu: Drop unused parameter for *get_sleep_divider_id_from_clock
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Thu, 5 May 2016 07:07:47 +0000 (09:07 +0200)]
drm/amdgpu: Simplify calculation in *get_sleep_divider_id_from_clock
a / (1 << b) is equivalent to a >> b for unsigned values
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Thu, 5 May 2016 07:07:46 +0000 (09:07 +0200)]
drm/amdgpu: Use max macro in *get_sleep_divider_id_from_clock
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>