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Roland Levillain [Wed, 10 Dec 2014 17:08:37 +0000 (17:08 +0000)]
Merge "ARM64: Enable Optimizing compiler image generation."
Serban Constantinescu [Thu, 4 Dec 2014 18:12:21 +0000 (18:12 +0000)]
ARM64: Enable Optimizing compiler image generation.
Enable Optimizing Compiler image generation for ARM64.
Change-Id: If28426920f8887a3f78cb8c69bc8c1293131b85d
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
Roland Levillain [Wed, 10 Dec 2014 15:52:37 +0000 (15:52 +0000)]
Merge "Opt compiler: Add arm64 support for register allocation."
Alexandre Rames [Wed, 10 Dec 2014 10:36:50 +0000 (10:36 +0000)]
Opt compiler: Add arm64 support for register allocation.
Change-Id: Idc6e84eee66170de4a9c0a5844c3da038c083aa7
Nicolas Geoffray [Wed, 10 Dec 2014 08:41:47 +0000 (08:41 +0000)]
Merge "Ensure stack maps are 4 byte aligned."
Brian Carlstrom [Wed, 10 Dec 2014 06:59:33 +0000 (06:59 +0000)]
Merge "Fix verifier bug caused by confusing ArtMethod::IsDirect vs ArtMethod::IsStatic semantics."
Brian Carlstrom [Wed, 10 Dec 2014 04:15:42 +0000 (20:15 -0800)]
Fix verifier bug caused by confusing ArtMethod::IsDirect vs ArtMethod::IsStatic semantics.
Bug:
18485243
Change-Id: I011872446490628b51fb38a353abd1d499cc1290
Nicolas Geoffray [Tue, 9 Dec 2014 14:26:32 +0000 (14:26 +0000)]
Ensure stack maps are 4 byte aligned.
With the recent move to gcc 4.9, we are hitting alignment
SIGBUS on ARM. The reason is that gcc will optimize two consecutive
32bits loads into one 64bits load, and the instruction (ldrd)
will fail if the data is not aligned.
Also removed the emission of mapping table when a method is optimized.
The information can be found in the StackMap itself.
Change-Id: Icf79406c18a3f4db3c05d52fc2c0dd2e35bf0f8f
Sebastien Hertz [Tue, 9 Dec 2014 13:43:28 +0000 (13:43 +0000)]
Merge "Support proxy method in StackVisitor::GetThisObject"
Nicolas Geoffray [Tue, 9 Dec 2014 13:34:09 +0000 (13:34 +0000)]
Merge "Revert "Tidy gAborting.""
Nicolas Geoffray [Tue, 9 Dec 2014 13:33:38 +0000 (13:33 +0000)]
Revert "Tidy gAborting."
Creates infinite loop: b/
18674776.
This reverts commit
015b137efb434528173779bc3ec8d72494456254.
Change-Id: I67fe310d2e95ee2ec37bec842be06fb1123b6f4e
Sebastien Hertz [Tue, 25 Nov 2014 15:30:53 +0000 (16:30 +0100)]
Support proxy method in StackVisitor::GetThisObject
Adds function artQuickGetProxyThisObject which returns the 'this'
object of the proxy method using the QuickArgumentVisitor. Since
proxy methods have the same layout than the kRefsAndArgs runtime
method and 'this' is the 1st method argument, it is located in the
first GPR.
Bug:
17965861
Change-Id: Ic6ef6c83b9a549c25f9929d5e00ffe1d3a9a36f0
Nicolas Geoffray [Tue, 9 Dec 2014 11:49:14 +0000 (11:49 +0000)]
Merge "Test now fails on amr64/optimizing after float rem changes."
Nicolas Geoffray [Tue, 9 Dec 2014 11:40:22 +0000 (11:40 +0000)]
Test now fails on amr64/optimizing after float rem changes.
Change-Id: I0b5d7303e3d337b2195c3810069213b1530ab474
Vladimir Marko [Tue, 9 Dec 2014 11:09:39 +0000 (11:09 +0000)]
Merge "Quick: Redefine the notion of back-egdes."
Sebastien Hertz [Tue, 9 Dec 2014 10:42:01 +0000 (10:42 +0000)]
Merge "JDWP: avoid crash on unsupported modifier"
Sebastien Hertz [Fri, 5 Dec 2014 09:52:15 +0000 (10:52 +0100)]
JDWP: avoid crash on unsupported modifier
Returns NOT_IMPLEMENTED error if we receive an event request with an
unsupported modifier.
Bug: https://code.google.com/p/android/issues/detail?id=81037
Bug:
18617787
(cherry picked from commit
0fb33e7b7b0b86fb9c7b556e4a052874ec269bb0)
Change-Id: I97729e2f98af3a75d24604926a89860255d4acae
Nicolas Geoffray [Tue, 9 Dec 2014 10:19:05 +0000 (10:19 +0000)]
Merge "Explicitly mask constants in shift operations."
Nicolas Geoffray [Mon, 8 Dec 2014 18:00:55 +0000 (18:00 +0000)]
Explicitly mask constants in shift operations.
The assemblers expect an int8, so we mask ahead of calling them.
Change-Id: Id668cda6853fa365ac02531bf7aae288cad20fcd
Vladimir Marko [Thu, 27 Nov 2014 14:52:37 +0000 (14:52 +0000)]
Quick: Redefine the notion of back-egdes.
Redefine a back-edge to really mean an edge to a loop head
instead of comparing instruction offsets. Generate suspend
checks also on fall-through to a loop head; insert an extra
GOTO for these edges.
Add suspend checks to fused cmp instructions.
Rewrite suspend check elimination to track whether there is
an invoke on each path from the loop head to a given back
edge, instead of using domination info to look for a basic
block with invoke that must be on each path. Ignore invokes
to intrinsics and move the optimization to a its own pass.
The new loops in 109-suspend-check should prevent intrinsics
and fused cmp-related regressions.
Bug:
18522004
Change-Id: I96ac818f76ccf9419a6e70e9ec00555f9d487a9e
Brian Carlstrom [Tue, 9 Dec 2014 07:02:53 +0000 (07:02 +0000)]
Merge "Fix reference table sorting"
Brian Carlstrom [Tue, 9 Dec 2014 00:22:06 +0000 (16:22 -0800)]
Fix reference table sorting
Bug:
18638116
(cherry picked from commit
16abc5f28ac9792fd1ba2c82f123cfd871cddbdb)
Change-Id: I15478306b3c2e2bd4f0a1d4307c001f64c0652af
Hiroshi Yamauchi [Tue, 9 Dec 2014 01:25:31 +0000 (01:25 +0000)]
Merge "Make it possible to enable heap poisoning via make variable."
Hiroshi Yamauchi [Mon, 8 Dec 2014 20:08:46 +0000 (12:08 -0800)]
Make it possible to enable heap poisoning via make variable.
If ART_HEAP_POISONING=true, build with heap poisoning enabled.
Bug:
8367515
Change-Id: I818e86047e6dd99b5bc9920713ef943a65b677e6
Mathieu Chartier [Mon, 8 Dec 2014 21:42:02 +0000 (21:42 +0000)]
Merge "Re-add missing read barriers"
Mathieu Chartier [Mon, 8 Dec 2014 20:59:27 +0000 (12:59 -0800)]
Re-add missing read barriers
Also added DCHECKS
Change-Id: Ie4c43432479e0e8db197f7a6568a33126e38ccdb
Mathieu Chartier [Mon, 8 Dec 2014 20:06:54 +0000 (20:06 +0000)]
Merge "Clean up ReferenceTable::Dump"
Mathieu Chartier [Mon, 8 Dec 2014 19:50:36 +0000 (11:50 -0800)]
Clean up ReferenceTable::Dump
Make sure that we never have nulls and cleared weak globals in the
sorted table. Cleaned up comparator.
Bug:
18597401
Change-Id: I5f437dfa29c813e17cdde411175abc927283716d
Vladimir Marko [Mon, 8 Dec 2014 19:03:05 +0000 (19:03 +0000)]
Merge "Quick: Kill unreachable blocks instead of just hiding them."
Vladimir Marko [Mon, 8 Dec 2014 18:38:42 +0000 (18:38 +0000)]
Merge "Re-factor Quick ABI support"
Calin Juravle [Mon, 8 Dec 2014 18:07:32 +0000 (18:07 +0000)]
Merge "[optimizing compiler] Add REM_FLOAT and REM_DOUBLE"
Calin Juravle [Mon, 8 Dec 2014 14:24:46 +0000 (14:24 +0000)]
[optimizing compiler] Add REM_FLOAT and REM_DOUBLE
- for arm, x86, x86_64 backends
- reinstated fmod quick entry points for x86. This is a partial revert
of
bd3682eada753de52975ae2b4a712bd87dc139a6 which added inline assembly
for floting point rem on x86. Note that Quick still uses the inline
version.
- fix rem tests for longs
Change-Id: I73be19a9f2f2bcf3f718d9ca636e67bdd72b5440
Vladimir Marko [Mon, 8 Dec 2014 15:16:54 +0000 (15:16 +0000)]
Quick: Kill unreachable blocks instead of just hiding them.
This changes the block type from kDalvikByteCode to kDead
and properly cleans up predecessors and MIRGraph::catches_.
Bug:
18626174
Change-Id: I268bf68f7947604bcb82caf95ee79c6831ee6e2a
Nicolas Geoffray [Mon, 8 Dec 2014 14:00:55 +0000 (14:00 +0000)]
Merge "Test has been updated, does not fail anymore."
Nicolas Geoffray [Mon, 8 Dec 2014 14:00:02 +0000 (14:00 +0000)]
Test has been updated, does not fail anymore.
Change-Id: Ie0506d048eb9dd7f356ba29ce8b58f9bec336ea0
Vladimir Marko [Mon, 8 Dec 2014 12:42:28 +0000 (12:42 +0000)]
Merge "ART: Clear use count for unused VRs."
Serguei Katkov [Thu, 13 Nov 2014 11:19:42 +0000 (17:19 +0600)]
Re-factor Quick ABI support
Now every architecture must provide a mapper between
VRs parameters and physical registers. Additionally as
a helper function architecture can provide a bulk copy
helper for GenDalvikArgs utility.
All other things becomes a common code stuff:
GetArgMappingToPhysicalReg, GenDalvikArgsNoRange,
GenDalvikArgsRange, FlushIns.
Mapper now uses shorty representation of input
parameters. This is required due to location are not
enough to detect the type of parameter (fp or core).
For the details
see https://android-review.googlesource.com/#/c/113936/.
Change-Id: Ie762b921e0acaa936518ee6b63c9a9d25f83e434
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Zheng Xu [Mon, 8 Dec 2014 10:18:01 +0000 (18:18 +0800)]
ART: Clear use count for unused VRs.
The use count of temp VR should be cleared when we replace
"CMP_XXX vA, vB, vC" and "IF_XXX vA" with "kMirOpFusedCmpXXX vB, vC".
Otherwise, the backend may allocate a physical register for the unused vA.
Change-Id: I43ad37d0e7161ec3de154de8888caa94603f7715
Andreas Gampe [Sat, 6 Dec 2014 00:08:38 +0000 (00:08 +0000)]
Merge "ART: Fix string data leak in image writer"
Mathieu Chartier [Fri, 5 Dec 2014 23:28:08 +0000 (23:28 +0000)]
Merge "Add pointer size logic to InitFromImageInterpretOnly"
Christopher Ferris [Fri, 5 Dec 2014 23:08:58 +0000 (23:08 +0000)]
Merge "Fix arm unwind data for art code."
Nicolas Geoffray [Fri, 5 Dec 2014 21:42:56 +0000 (21:42 +0000)]
Merge "Make dex2oat 32bits when HOST_PREFER_32_BIT=true."
Mathieu Chartier [Fri, 5 Dec 2014 18:57:13 +0000 (10:57 -0800)]
Add pointer size logic to InitFromImageInterpretOnly
Previously we didn't have this logic which broke dex2oat if passed
--runtime-option -Xint flag.
Also we now no longer call InitFromImageInterpretOnlyCallback if
we are the compiler.
Bug:
18631640
Change-Id: Ie84fceeb85cabeeec7a5fedefd73dd919cca8e5e
Andreas Gampe [Fri, 5 Dec 2014 19:37:19 +0000 (19:37 +0000)]
Merge "ART: Fix typo"
Andreas Gampe [Fri, 5 Dec 2014 05:25:04 +0000 (21:25 -0800)]
ART: Fix string data leak in image writer
The string intern data is a large object, so it will be recognized
as leaking under valgrind.
Bug:
18628623
Change-Id: I9090db119a50eebd806a82369bd46527c4e7dbf0
Andreas Gampe [Fri, 5 Dec 2014 19:16:26 +0000 (11:16 -0800)]
ART: Fix typo
Change-Id: Ie9a242240511adae9fcdbaae8d6b5be61fb5075b
Ian Rogers [Fri, 5 Dec 2014 16:13:02 +0000 (16:13 +0000)]
Merge "Revert "Re-enable one thread dumping the native stack of another.""
Ian Rogers [Fri, 5 Dec 2014 16:12:21 +0000 (16:12 +0000)]
Revert "Re-enable one thread dumping the native stack of another."
This reverts commit
e652b62c581a3d68b1fc82e0b04e3a59dd633e52.
Change-Id: Ida56d2c23849c1ede82a22100df402877256e270
Vladimir Marko [Fri, 5 Dec 2014 16:04:40 +0000 (16:04 +0000)]
Merge "Quick: Fix code layout pass; don't terminate too early."
Vladimir Marko [Fri, 5 Dec 2014 15:34:50 +0000 (15:34 +0000)]
Merge "Revert "Revert "Rewrite ImageWriter's merging of String char[]s."""
Vladimir Marko [Fri, 5 Dec 2014 13:55:42 +0000 (13:55 +0000)]
Quick: Fix code layout pass; don't terminate too early.
Change-Id: I0c417fdc2ee8213672a7568fe228e5e2f1c1ab61
Nicolas Geoffray [Fri, 5 Dec 2014 12:12:48 +0000 (12:12 +0000)]
Merge "Make script suitable for vogar use on device."
Roland Levillain [Fri, 5 Dec 2014 12:08:39 +0000 (12:08 +0000)]
Merge "Add support for double-to-int & double-to-long in optimizing."
Nicolas Geoffray [Thu, 4 Dec 2014 17:05:22 +0000 (17:05 +0000)]
Make script suitable for vogar use on device.
Also update device expectations that need investigation.
Change-Id: I86a613f3f62c2f999296f8b7505646a96ab4adf8
Roland Levillain [Fri, 5 Dec 2014 12:06:01 +0000 (12:06 +0000)]
Add support for double-to-int & double-to-long in optimizing.
- Add support for the double-to-int and double-to-long Dex
instructions in the optimizing compiler.
- Add S1 to the list of ARM FPU parameter registers so that
a double value can be passed as parameter during a call
to the runtime through D0.
- Have art::x86_64::X86_64Assembler::cvttsd2si work with
64-bit operands.
- Generate x86, x86-64 and ARM (but not ARM64) code for
double to int and double to long HTypeConversion nodes.
- Add related tests to test/422-type-conversion.
Change-Id: Ic93b9ec6630c26e940f7966a3346ad3fd5a2ab3a
Nicolas Geoffray [Fri, 5 Dec 2014 11:55:41 +0000 (11:55 +0000)]
Make dex2oat 32bits when HOST_PREFER_32_BIT=true.
Change-Id: Id6465c697512f32402bdf71c75e52db47f1fb0a2
Ian Rogers [Fri, 5 Dec 2014 04:37:05 +0000 (04:37 +0000)]
Merge "Re-enable one thread dumping the native stack of another."
Ian Rogers [Fri, 5 Dec 2014 04:11:48 +0000 (20:11 -0800)]
Re-enable one thread dumping the native stack of another.
Bug:
15446488
Change-Id: I49d4d283f7b7d04b9d8c940313d6c5107ba9f99d
Ian Rogers [Fri, 5 Dec 2014 04:05:51 +0000 (04:05 +0000)]
Merge "Tidy gAborting."
Ian Rogers [Fri, 5 Dec 2014 03:53:52 +0000 (19:53 -0800)]
Tidy gAborting.
Reduce scope to Runtime::Abort and short-cut recursive case earlier. gAborting
remains global to avoid two fatal errors in thread and the verifier.
Change-Id: Ibc893f891ffee9a763c65cde9507d99083d47b3f
Vladimir Marko [Thu, 4 Dec 2014 14:52:25 +0000 (14:52 +0000)]
Revert "Revert "Rewrite ImageWriter's merging of String char[]s.""
This reverts commit
4c964de8832551b701ce7b3162bc51cc6b22fc8a.
Change-Id: I940bdf48e2dbaef0f809beda32756507d18acb89
Andreas Gampe [Fri, 5 Dec 2014 01:25:34 +0000 (01:25 +0000)]
Merge "ART: Fix linting errors"
Andreas Gampe [Fri, 5 Dec 2014 01:24:50 +0000 (17:24 -0800)]
ART: Fix linting errors
Fix bounds_check_elimination linting errors.
Change-Id: I040433ecbc84d740bff331c37df0bfcc64dc244e
Mingyao Yang [Fri, 5 Dec 2014 01:06:53 +0000 (01:06 +0000)]
Merge "Bounds check elimination."
Ian Rogers [Fri, 5 Dec 2014 00:34:38 +0000 (00:34 +0000)]
Merge "X86_64 QBE: use RIP addressing"
Andreas Gampe [Thu, 4 Dec 2014 23:59:55 +0000 (23:59 +0000)]
Merge "ART: Add SparseSwitch support to the optimizing compiler"
Andreas Gampe [Thu, 4 Dec 2014 17:09:57 +0000 (09:09 -0800)]
ART: Add SparseSwitch support to the optimizing compiler
Add simple sparse-switch support through chained IFs. Refactor a
bit to better reuse code between switch types.
Now enables compiled versions of 015-switch and 095-switch-MAX_INT.
Bug:
18410979
Change-Id: Ib617e4b877f0b7fbc3bb289800f612f013480713
Andreas Gampe [Thu, 4 Dec 2014 22:06:01 +0000 (22:06 +0000)]
Merge "ART: Wire up a valgrind-wrapped dex2oat run"
Brian Carlstrom [Thu, 4 Dec 2014 21:51:05 +0000 (21:51 +0000)]
Merge "Remove dex2oat watchdog warning"
Mark Mendell [Tue, 2 Dec 2014 00:06:12 +0000 (19:06 -0500)]
X86_64 QBE: use RIP addressing
Take advantage of RIP addressing in 64 bit mode to improve the code
generation for accesses to the constant area as well as packed switches.
Avoid computing the address of the start of the method, which is needed
in 32 bit mode.
To do this, we add a new 'pseudo-register' kRIPReg to minimize the
changes needed to get the new addressing mode to be generated.
Change-Id: Ia28c93f98b09939806d91ff0bd7392e58996d108
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Christopher Ferris [Fri, 31 Oct 2014 02:04:13 +0000 (19:04 -0700)]
Fix arm unwind data for art code.
Bug:
17392751
Change-Id: Ic85d4468b0f931aa9e38dee12d466a1e04ebf944
Hans Boehm [Thu, 4 Dec 2014 19:57:01 +0000 (19:57 +0000)]
Merge "Make Barrier robust against spurious wakeups"
Brian Carlstrom [Thu, 4 Dec 2014 06:29:37 +0000 (22:29 -0800)]
Remove dex2oat watchdog warning
The warning output is breaking vm-tests on some devices. It does not
seem to serve much of a purpose given that it does not go to logcat
and long running compiles can be identified by the time summary
printed at the end of dex2oat.
(cherry picked from commit
c1bfaa22570b4f771ae1cd832201b01ec84e32c1)
Bug:
18609574
Change-Id: Iefc3c51be35ceaff0031522c4d6c2cdf5703dcb6
Hans Boehm [Wed, 3 Dec 2014 02:31:31 +0000 (18:31 -0800)]
Make Barrier robust against spurious wakeups
Fix Barrier implementation so that Wait cannot return prematurely
due to a spurious condition variable wakeup or interrupted futex call.
Document the resulting semantics of barrier.h, which are a bit surprising,
but appear to be exactly what current clients need.
Fix the test so that it actually passes with the fixed barrier.h,
and no longer tests for properties that can't be correctly satisfied.
Improve comment for InitTimeSpec, which we almost used.
Bug:
18509123
Change-Id: I0b25f33bcd22322ba04e3951cd484843788c2bf5
Ian Rogers [Thu, 4 Dec 2014 17:50:45 +0000 (17:50 +0000)]
Merge "Remove unused headers."
Nicolas Geoffray [Thu, 4 Dec 2014 17:33:13 +0000 (17:33 +0000)]
Merge "On arm64/optimizing, compile the boot image with interpreter."
Nicolas Geoffray [Thu, 4 Dec 2014 17:25:00 +0000 (17:25 +0000)]
On arm64/optimizing, compile the boot image with interpreter.
Oterhwise the tests will fail because the backend is not fully
implemented yet.
Change-Id: I9dbd45279c7e515b52656825e1d4be92961b0da6
Andreas Gampe [Thu, 4 Dec 2014 17:09:45 +0000 (17:09 +0000)]
Merge "ART: Add PackedSwitch support to the optimizing compiler"
Andreas Gampe [Tue, 25 Nov 2014 07:28:39 +0000 (23:28 -0800)]
ART: Add PackedSwitch support to the optimizing compiler
Add simple packed-switch support through chained IFs.
Now enables compiled versions of 015-switch and 095-switch-MAX_INT.
Change-Id: I17cc8d659d1dd2d64227851c23998c04367e8cf5
Nicolas Geoffray [Thu, 4 Dec 2014 16:46:27 +0000 (16:46 +0000)]
Merge "Temporary disable the test."
Nicolas Geoffray [Thu, 4 Dec 2014 16:44:58 +0000 (16:44 +0000)]
Temporary disable the test.
Test fails when the boot image is compiled with optimizing. Disabling
while investigating.
Change-Id: I2b665cf79ea2a5edbdbfc4aee3c6b381c837d658
Nicolas Geoffray [Thu, 4 Dec 2014 15:11:10 +0000 (15:11 +0000)]
Merge "Build core.oat without flags."
Nicolas Geoffray [Thu, 4 Dec 2014 14:39:31 +0000 (14:39 +0000)]
Build core.oat without flags.
Existing tools (like vogar) assume only one boot image, so to test the
boot image compiled with the optimizing compiler, we have to compile
core.oat with it.
Change-Id: I4b55236163333709b05c80eea18778ecd2b58a91
Vladimir Marko [Thu, 4 Dec 2014 12:31:16 +0000 (12:31 +0000)]
Merge "Revert "Rewrite ImageWriter's merging of String char[]s.""
Roland Levillain [Thu, 4 Dec 2014 12:30:06 +0000 (12:30 +0000)]
Merge "Add support for float-to-double & double-to-float in optimizing."
Vladimir Marko [Thu, 4 Dec 2014 12:29:32 +0000 (12:29 +0000)]
Revert "Rewrite ImageWriter's merging of String char[]s."
This reverts commit
c73743cfd9718a8e1eeb9c9220c182a475935a1c.
Change-Id: Id7ee22ff0ebcd2df0f8c2f4432977dbcd81b0b56
Roland Levillain [Thu, 4 Dec 2014 12:10:50 +0000 (12:10 +0000)]
Add support for float-to-double & double-to-float in optimizing.
Change-Id: I41b0fee5a28c83757697c8d000b7e224cf5a4534
Roland Levillain [Thu, 4 Dec 2014 12:01:55 +0000 (12:01 +0000)]
Merge "Add support for float-to-long in the optimizing compiler."
Roland Levillain [Thu, 4 Dec 2014 11:54:28 +0000 (11:54 +0000)]
Add support for float-to-long in the optimizing compiler.
- Add support for the float-to-long Dex instruction in the
optimizing compiler.
- Add a Dex PC field to art::HTypeConversion to allow the
x86 and ARM code generators to produce runtime calls.
- Instruct art::CodeGenerator::RecordPcInfo not to record
PC information for HTypeConversion instructions.
- Add S0 to the list of ARM FPU parameter registers.
- Have art::x86_64::X86_64Assembler::cvttss2si work with
64-bit operands.
- Generate x86, x86-64 and ARM (but not ARM64) code for
float to long HTypeConversion nodes.
- Add related tests to test/422-type-conversion.
Change-Id: I954214f0d537187883f83f7a83a1bb2dd8a21fd4
Vladimir Marko [Thu, 4 Dec 2014 11:31:34 +0000 (11:31 +0000)]
Merge "Rewrite ImageWriter's merging of String char[]s."
Vladimir Marko [Wed, 3 Dec 2014 15:28:15 +0000 (15:28 +0000)]
Rewrite ImageWriter's merging of String char[]s.
Simply sort the Strings and then look at two consecutive
Strings to find prefixes and duplicates. Avoid unnecessary
memory allocations.
Change-Id: I996306ed4b31e61f9f0def8f3bcce71eb01c9265
Sebastien Hertz [Thu, 4 Dec 2014 10:21:02 +0000 (10:21 +0000)]
Merge "JDWP: fix breakpoint for method in the image"
Vladimir Marko [Thu, 4 Dec 2014 10:12:23 +0000 (10:12 +0000)]
Merge "Quick: Use fewer insns for ARM LDR/STR with large offsets."
Vladimir Marko [Wed, 3 Dec 2014 12:16:56 +0000 (12:16 +0000)]
Quick: Use fewer insns for ARM LDR/STR with large offsets.
LDR with large offset is frequently used for reading from
DexCache arrays, for example for static and direct invokes.
STR with large offset is rarely used but it's updated for
consistency.
Change-Id: I75871416cecbfd7fe7de590922cea0376a2f4019
Vladimir Marko [Thu, 4 Dec 2014 10:08:07 +0000 (10:08 +0000)]
Merge "Call ProcessStrings() in ImageWriter, fix prefix check."
Sebastien Hertz [Wed, 26 Nov 2014 21:11:27 +0000 (22:11 +0100)]
JDWP: fix breakpoint for method in the image
When we set a breakpoint in a compiled method, we deoptimize it by
changing its entrypoint so it is executed with the interpreter.
However, methods in the image can be called with their direct code
pointer, ignoring the updated entrypoint. In that case, the method
is not executed with the interpreter and we miss the breakpoint.
This CL avoids that situation by forcing a full deoptimization so
everything runs with the interpreter. However, if the image has been
compiled in PIC mode, we keep using selective deoptimization because
direct code pointer is not used in this mode.
Bug:
17965285
Change-Id: Icaf8cbb7fe9ad01d36f7378c59d50d9ce42ae57f
Andreas Gampe [Thu, 4 Dec 2014 05:59:27 +0000 (21:59 -0800)]
ART: Wire up a valgrind-wrapped dex2oat run
Extend build-art-executable to understand multilib=both, in which
case a stem is necessary. Use name32 for the 32b version, and name
for the 64b version (or only version).
Create both 32b and 64b dex2oat on the host.
Extend the core generation rules to allow a wrapper. Create rules
to run with valgrind: valgrind-test-art-host-dex2oat.
Currently this is not wired up to valgrind-test-art-host, as valgrind
reports an error on exit.
Note: this takes a long time, as by default the debug version of
dex2oat is used. The author has seen runs of about 6 minutes.
Bug:
18605772
Change-Id: I32c270d2cf8a104f154bdf91875670b03d3f5d3b
Mathieu Chartier [Thu, 4 Dec 2014 02:28:28 +0000 (02:28 +0000)]
Merge "Remove method verification results right after compiling a method"
Mathieu Chartier [Thu, 4 Dec 2014 01:38:22 +0000 (17:38 -0800)]
Remove method verification results right after compiling a method
This saves memory since it allows the code arrays from methods
compiled in future methods to use the ram we just freed from the
verification results.
GmsCore.apk:
Before: dex2oat took 77.383s (threads: 2) arena alloc=6MB java alloc=30MB native alloc=77MB free=13KB
After: dex2oat took 72.180s (threads: 2) arena alloc=6MB java alloc=30MB native alloc=60MB free=13KB
Bug:
18596910
Change-Id: I5d6df380e4fe58751a2b304202083f4d30b33b7c
(cherry picked from commit
25fda92083d5b93b38cc1f6b12ac6a44d992d6a4)
Mingyao Yang [Wed, 22 Oct 2014 23:08:18 +0000 (16:08 -0700)]
Bounds check elimination.
Change-Id: Ia0d6a4226c1f9f1ff1dd35347a38db1dc4265319