OSDN Git Service
Craig Topper [Sat, 27 Aug 2016 17:13:43 +0000 (17:13 +0000)]
[X86] Rename predicate function that detects if requires one of the REX.B, REX.X or REX.R bits. It's old name conflicted with a function in X8II namespace that doesnt' quite do the same thing. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279924
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Craig Topper [Sat, 27 Aug 2016 17:13:41 +0000 (17:13 +0000)]
[X86] Keep looping over operands looking for byte registers even if we already found a register that requires a REX prefix. Otherwise we don't error if a high byte register is used after SPL/BPL/DIL/SIL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279923
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Craig Topper [Sat, 27 Aug 2016 17:13:37 +0000 (17:13 +0000)]
[X86] Include XMM/YMM/ZMM16-23 in X86II::isX86_64ExtendedReg. This feels more consistent with its name and simplifies assembler code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279922
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Craig Topper [Sat, 27 Aug 2016 17:13:34 +0000 (17:13 +0000)]
[X86] Don't allow DR8-DR15 to be assembled in 32-bit mode. Add missing test for CR8-CR15.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279921
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Craig Topper [Sat, 27 Aug 2016 05:26:54 +0000 (05:26 +0000)]
[X86] Remove stale comment about FixupBWInsts pass being off by default. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279915
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Craig Topper [Sat, 27 Aug 2016 05:22:15 +0000 (05:22 +0000)]
[AVX-512] Allow EVEX encoding unordered/ordered/equal/notequal VCMPPS/PD/SS/SD to be commuted just like the SSE and AVX counterparts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279914
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Craig Topper [Sat, 27 Aug 2016 05:22:12 +0000 (05:22 +0000)]
[X86] Enable FR32/FR64 cmpeq/cmpne/cmpunord/cmpord to be commuted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279913
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Craig Topper [Sat, 27 Aug 2016 05:22:08 +0000 (05:22 +0000)]
[AVX-512] Add load folding for EVEX vcmpps/pd/ss/sd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279912
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Teresa Johnson [Sat, 27 Aug 2016 04:41:22 +0000 (04:41 +0000)]
[LTO] Don't create a new common unless merged has different size
Summary:
This addresses a regression in common handling from the new LTO
API in r278338. Only create a new common if the size is different.
The type comparison against an array type fails when the size is
different but not an array. GlobalMerge does not handle the
array types as well and we lose some global merging opportunities.
Reviewers: mehdi_amini
Subscribers: junbuml, llvm-commits, mehdi_amini
Differential Revision: https://reviews.llvm.org/D23955
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279911
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Matt Arsenault [Sat, 27 Aug 2016 03:39:27 +0000 (03:39 +0000)]
AMDGPU: Mark sched model complete
Fixes bug 26800
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279910
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Matt Arsenault [Sat, 27 Aug 2016 03:00:51 +0000 (03:00 +0000)]
AMDGPU: Remove unneeded implicit exec uses/defs
SI_BREAK, SI_IF_BREAK, and SI_ELSE_BREAK do not def exec.
SI_IF_BREAK and SI_ELSE_BREAK do not read it either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279909
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Lang Hames [Sat, 27 Aug 2016 02:59:24 +0000 (02:59 +0000)]
[Orc] Explicitly specify type for assignment.
This should fix the MSVC errors in
http://lab.llvm.org:8011/builders/clang-x64-ninja-win7/builds/15120
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279908
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Sebastian Pop [Sat, 27 Aug 2016 02:48:41 +0000 (02:48 +0000)]
GVN-hoist: invalidate MD cache (PR29144)
Without invalidating the entries in the MD cache we would try to access instructions
that were removed in previous iterations of hoisting.
Differential Revision: https://reviews.llvm.org/D23927
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279907
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Quentin Colombet [Sat, 27 Aug 2016 02:38:27 +0000 (02:38 +0000)]
[RegBankSelect] Do not abort when the target wants to fall back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279906
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Quentin Colombet [Sat, 27 Aug 2016 02:38:24 +0000 (02:38 +0000)]
[InstructionSelect] Do not abort when the target wants to fall back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279905
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Quentin Colombet [Sat, 27 Aug 2016 02:38:21 +0000 (02:38 +0000)]
[MachineLegalize] Do not abort when the target wants to fall back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279904
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Matt Arsenault [Sat, 27 Aug 2016 01:32:27 +0000 (01:32 +0000)]
AMDGPU: Select mulhi 24-bit instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279902
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Matt Arsenault [Sat, 27 Aug 2016 01:00:37 +0000 (01:00 +0000)]
AMDGPU: Move cndmask pseudo to be isel pseudo
There's only one use of this for the convenience
of a pattern. I think v_mov_b64_pseudo should also be
moved, but SIFoldOperands does currently make use of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279901
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Matt Arsenault [Sat, 27 Aug 2016 00:51:02 +0000 (00:51 +0000)]
AMDGPU: Fix sched type for branches
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279900
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Matt Arsenault [Sat, 27 Aug 2016 00:42:21 +0000 (00:42 +0000)]
AMDGPU: Remove register operand from si_mask_branch
It isn't used for anything, and is also misleading since
it could be spilled at the end of the block, so it can't be relied
on. There ends up being a verifier error about using an undefined
register since the spill kills the register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279899
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Matt Arsenault [Sat, 27 Aug 2016 00:21:22 +0000 (00:21 +0000)]
AMDGPU: Improve error reporting for maximum branch distance
Unfortunately this seems to only help the assembler diagnostic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279895
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Chris Bieneman [Sat, 27 Aug 2016 00:19:51 +0000 (00:19 +0000)]
[CMake] Only generate Components.cmake if components are specified
Generating the Components import file is useless if there are no components coming in from the runtimes configuration, so we should skip generation in that case.
This also should fix the configuration error that Renato reported on llvm-dev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279893
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Lang Hames [Sat, 27 Aug 2016 00:19:05 +0000 (00:19 +0000)]
[ORC] Fix typo in LogicalDylib, add unit test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279892
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Quentin Colombet [Sat, 27 Aug 2016 00:18:31 +0000 (00:18 +0000)]
[GlobalISel] Add a fallback path to SDISel.
When global-isel fails on a MachineFunction MF, MF will be cleaned up
and given to SDISel.
Thanks to this fallback, we can already perform correctness test even if
we support only a small portion of the functions in a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279891
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Quentin Colombet [Sat, 27 Aug 2016 00:18:28 +0000 (00:18 +0000)]
[AArch64][CallLowering] Do not assert for not implemented part.
When doing the ABI lowering, report a failure to the caller instead of
asserting. This gives a chance for the caller to recover.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279890
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Quentin Colombet [Sat, 27 Aug 2016 00:18:24 +0000 (00:18 +0000)]
[GlobalISel] Teach the core pipeline not to run if ISel failed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279889
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Michael Kuperstein [Sat, 27 Aug 2016 00:10:24 +0000 (00:10 +0000)]
[X86] Add baseline test for "odd" shuffles. NFC.
Adds a baseline test for lowering shuffles where the width of the output
vector is not twice the size of the input vectors. Many of those sequences
are suboptimal, and will hopefully be improved in follow-up patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279888
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Quentin Colombet [Fri, 26 Aug 2016 23:49:05 +0000 (23:49 +0000)]
[IRTranslator] Do not abort when the target wants to fall back.
Every pass in the GlobalISel pipeline will need to do something similar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279886
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Quentin Colombet [Fri, 26 Aug 2016 23:49:01 +0000 (23:49 +0000)]
[MFProperties] Introduce a FailedISel property.
This is used to communicate that the instruction selection pipeline
failed at some point.
Another way to achieve that would be to have some kind of conditional
scheduling in the PassManager, such that we only schedule a pass based
on the success/failure of another one. The property approach has the
advantage of being lightweight and solve the problem at stake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279885
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Teresa Johnson [Fri, 26 Aug 2016 23:29:14 +0000 (23:29 +0000)]
[ThinLTO] Move loading of cache entry to client
Summary:
Have the cache pass back the path to the cache entry when it
is ready to be loaded, instead of a buffer.
For gold-plugin we can simply pass this file back to gold directly,
which avoids expensive writing of a separate tmp file. Ensure
the cache entry is not deleted on cleanup by adjusting the setting
of the IsTemporary flags.
Moved the loading of the buffer into llvm-lto2 to maintain current
behavior.
Reviewers: mehdi_amini
Subscribers: llvm-commits, mehdi_amini
Differential Revision: https://reviews.llvm.org/D23946
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279883
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Andrew Kaylor [Fri, 26 Aug 2016 23:11:48 +0000 (23:11 +0000)]
Adding document describing the use of the -opt-bisect-limit option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279881
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Quentin Colombet [Fri, 26 Aug 2016 22:32:59 +0000 (22:32 +0000)]
[TargetPassConfig] Add a target hook to know what GlobalISel should do on error.
By default, this hook tells GlobalISel to abort (report a fatal error)
when it encounters an error. The alternative will be to fall back on
SDISel.
This fall back will be removed when the bring-up of GlobalISel is over.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279879
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Quentin Colombet [Fri, 26 Aug 2016 22:32:57 +0000 (22:32 +0000)]
[IRTranslator][NFC] Use DEBUG_TYPE instead of repeating the name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279878
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Quentin Colombet [Fri, 26 Aug 2016 22:32:55 +0000 (22:32 +0000)]
[SelectionDAG] Do not run the ISel process on already selected code.
Right now, this cannot happen, but with the fall back path of GlobalISel
it will show up eventually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279877
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Quentin Colombet [Fri, 26 Aug 2016 22:32:53 +0000 (22:32 +0000)]
[MachineFunction] Introduce a reset method.
This method allows to reset the state of a MachineFunction as if it was
just created. This will be used during the bring-up of GlobalISel to
provide a way to fallback on SelectionDAG. That way, we can start doing
correctness testing even if we are not able to select all functions via
the global instruction selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279876
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Justin Bogner [Fri, 26 Aug 2016 22:29:36 +0000 (22:29 +0000)]
TableGen: Switch from a std::map to a DenseMap in CodeGenSubRegIndex. NFC
This mapping is between pointers, which DenseMap is particularly good
at. Most targets aren't really affected, but if there's a lot of
subregister composition this can shave off a good chunk of time from
generating registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279875
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Quentin Colombet [Fri, 26 Aug 2016 22:09:11 +0000 (22:09 +0000)]
[MFProperties] Introduce a reset method with no argument.
This method allows to reset all the properties in one go.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279874
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Quentin Colombet [Fri, 26 Aug 2016 22:09:08 +0000 (22:09 +0000)]
[MFProperties][NFC] Rename clear into reset to match BitVector naming.
The name clear is used to reset all the bit in bitvectors and using it
to reset just properties was confusing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279873
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Tom Stellard [Fri, 26 Aug 2016 21:36:47 +0000 (21:36 +0000)]
AMDGPU/SI: Canonicalize offset order for merged DS instructions
Summary:
If the scheduler clusters the loads, then the offsets will be sorted,
but it is possible for the scheduler to scheduler loads together
without out explicitly clustering them, which would give us non-sorted
offsets.
Also, we will want to do this if we move the load/store optimizer before
the scheduler.
Reviewers: arsenm
Subscribers: arsenm, llvm-commits, kzhuravl
Differential Revision: https://reviews.llvm.org/D23776
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279870
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Tom Stellard [Fri, 26 Aug 2016 21:16:40 +0000 (21:16 +0000)]
XXX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279868
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Tom Stellard [Fri, 26 Aug 2016 21:16:37 +0000 (21:16 +0000)]
AMDGPU/SI: Use a better method for determining the largest pressure sets
Summary:
There are a few different sgpr pressure sets, but we only care about
the one which covers all of the sgprs. We were using hard-coded
register pressure set names to determine the reg set id for the
biggest sgpr set. However, we were using the wrong name, and this
method is pretty fragile, since the reg pressure set names may
change.
The new method just looks for the pressure set that contains the most
reg units and sets that set as our SGPR pressure set. We've also
adopted the same technique for determining our VGPR pressure set.
Reviewers: arsenm
Subscribers: MatzeB, arsenm, llvm-commits, kzhuravl
Differential Revision: https://reviews.llvm.org/D23687
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279867
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Chris Bieneman [Fri, 26 Aug 2016 20:34:11 +0000 (20:34 +0000)]
[CMake] Expose runtime component check targets
This will expose the check targets for runtime project components into the top-level build. It will enable exposing targets like check-asan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279861
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Adam Nemet [Fri, 26 Aug 2016 20:21:05 +0000 (20:21 +0000)]
[Inliner] Report when inlining fails because callee's def is unavailable
Summary:
This is obviously an interesting case because it may motivate code
restructuring or LTO.
Reporting this requires instantiation of ORE in the loop where the call
sites are first gathered. I've checked compile-time
overhead *with* -Rpass-with-hotness and the worst slow-down was 6% in
mcf and quickly tailing off. As before without -Rpass-with-hotness
there is no overhead.
Because this could be a pretty noisy diagnostics, it is currently
qualified as 'verbose'. As of this patch, 'verbose' diagnostics are
only emitted with -Rpass-with-hotness, i.e. when the output is expected
to be filtered.
Reviewers: eraman, chandlerc, davidxl, hfinkel
Subscribers: tejohnson, Prazek, davide, llvm-commits
Differential Revision: https://reviews.llvm.org/D23415
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279860
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Rafael Espindola [Fri, 26 Aug 2016 20:19:35 +0000 (20:19 +0000)]
Make writeToResolutionFile a static helper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279859
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Kyle Butt [Fri, 26 Aug 2016 20:12:40 +0000 (20:12 +0000)]
TailDuplication: Record blocks that received the duplicated block. NFC.
This will allow tail duplication during layout to handle the cfg changes more
cleanly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279858
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Chris Bieneman [Fri, 26 Aug 2016 20:08:57 +0000 (20:08 +0000)]
[CMake] Fixing LLVM_INCLUDE_TESTS for runtimes directory
We need to explicitly pass LLVM_INCLUDE_TESTS through from the top-level to the runtimes configuration because it isn't in LLVMConfig.cmake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279857
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Teresa Johnson [Fri, 26 Aug 2016 20:07:15 +0000 (20:07 +0000)]
Streamline LTO getComdat invocation (NFC)
We already have obtained a pointer to the underlying GlobalObject,
use it directly to find the comdat, rather than using the
GlobalValue::getComdat which will do the same thing again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279856
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Kevin Enderby [Fri, 26 Aug 2016 19:34:07 +0000 (19:34 +0000)]
Next set of additional error checks for invalid Mach-O files for bad LC_SYMTAB’s.
This contains the missing checks for LC_SYMTAB load command fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279854
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Manman Ren [Fri, 26 Aug 2016 19:28:17 +0000 (19:28 +0000)]
Swift Calling Convetion: add support for AArch64.
It will just be the same as the regular calling convention.
rdar://
28029509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279853
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Tim Northover [Fri, 26 Aug 2016 18:52:31 +0000 (18:52 +0000)]
AArch64: avoid assertion on illegal types in performFDivCombine.
In the code to detect fixed-point conversions and make use of AArch64's special
instructions, we weren't prepared for weird types. The fptosi direction got
fixed recently, but not the similar sitofp code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279852
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Sanjay Patel [Fri, 26 Aug 2016 18:28:46 +0000 (18:28 +0000)]
[InstCombine] add helper function for icmp (and (sh X, Y), C2), C1 ; NFC
Like other recent changes near here, the goal is to allow vector types for
all of these folds. Splitting things up makes it easier to incrementally
enhance the code and easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279851
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Chad Rosier [Fri, 26 Aug 2016 18:05:50 +0000 (18:05 +0000)]
[AArch64] Avoid materializing constant values when generating csel instructions.
Differential Revision: https://reviews.llvm.org/D23677
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279849
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Davide Italiano [Fri, 26 Aug 2016 18:05:03 +0000 (18:05 +0000)]
[AsmParser] Placate a -Wmisleading-indentantion warning (GCC7).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279848
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Reid Kleckner [Fri, 26 Aug 2016 17:58:37 +0000 (17:58 +0000)]
[MC] Move .cv_loc management logic out of MCContext
MCContext already has many tasks, and separating CodeView out from it is
probably a good idea. The .cv_loc tracking was modelled on the DWARF
tracking which lived directly in MCContext.
Removes the inclusion of MCCodeView.h from MCContext.h, so now there are
only 10 build actions while I hack on CodeView support instead of 265.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279847
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Tim Northover [Fri, 26 Aug 2016 17:46:22 +0000 (17:46 +0000)]
GlobalISel: mark G_FPEXT legal from float to double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279845
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Tim Northover [Fri, 26 Aug 2016 17:46:19 +0000 (17:46 +0000)]
GlobalISel: mark G_FCMP legal on float & double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279844
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Tim Northover [Fri, 26 Aug 2016 17:46:17 +0000 (17:46 +0000)]
GlobalISel: simplify G_ICMP legalization regime.
It's unclear how the old
%res(32) = G_ICMP { s32, s32 } intpred(eq), %0, %1
is actually different from an s1 verison
%res(1) = G_ICMP { s1, s32 } intpred(eq), %0, %1
so we'll remove it for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279843
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Tim Northover [Fri, 26 Aug 2016 17:46:13 +0000 (17:46 +0000)]
GlobalISel: legalize sdiv and srem operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279842
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Tim Northover [Fri, 26 Aug 2016 17:46:06 +0000 (17:46 +0000)]
GlobalISel: legalize under-width divisions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279841
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Tim Northover [Fri, 26 Aug 2016 17:46:03 +0000 (17:46 +0000)]
GlobalISel: mark selects legal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279840
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Tim Northover [Fri, 26 Aug 2016 17:45:58 +0000 (17:45 +0000)]
GlobalISel: mark float/int conversions legal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279839
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Sanjay Patel [Fri, 26 Aug 2016 17:15:22 +0000 (17:15 +0000)]
[InstCombine] clean up foldICmpAndConstConst(); NFC
1. Early exit to reduce indent
2. Fix comments and variable names to match
3. Reformat comments / clang-format code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279837
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Krzysztof Parzyszek [Fri, 26 Aug 2016 16:50:57 +0000 (16:50 +0000)]
Missed a semicolon in r279835
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279836
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Krzysztof Parzyszek [Fri, 26 Aug 2016 16:46:14 +0000 (16:46 +0000)]
Add some more detailed debugging information in RegisterCoalescer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279835
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Sanjay Patel [Fri, 26 Aug 2016 16:42:33 +0000 (16:42 +0000)]
[InstCombine] add helper function for folding of icmp (and X, C2), C; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279834
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Bob Haarman [Fri, 26 Aug 2016 16:34:27 +0000 (16:34 +0000)]
limit the number of instructions per block examined by dead store elimination
Summary: Dead store elimination gets very expensive when large numbers of instructions need to be analyzed. This patch limits the number of instructions analyzed per store to the value of the memdep-block-scan-limit parameter (which defaults to 100). This resulted in no observed difference in performance of the generated code, and no change in the statistics for the dead store elimination pass, but improved compilation time on some files by more than an order of magnitude.
Reviewers: dexonsmith, bruno, george.burgess.iv, dberlin, reames, davidxl
Subscribers: davide, chandlerc, dberlin, davidxl, eraman, tejohnson, mbodart, llvm-commits
Differential Revision: https://reviews.llvm.org/D15537
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279833
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Saleem Abdulrasool [Fri, 26 Aug 2016 16:18:40 +0000 (16:18 +0000)]
FileCheck: Minor cleanup of the class Pattern
1. Add the "explicit" specifier to the single-argument constructor of Pattern
2. Reorder the fields to remove excessive padding (8 bytes).
Patch by Alexander Shaposhnikov!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279832
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Sanjay Patel [Fri, 26 Aug 2016 16:14:06 +0000 (16:14 +0000)]
[InstCombine] rename variables in foldICmpAndConstant(); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279831
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Bob Haarman [Fri, 26 Aug 2016 16:00:04 +0000 (16:00 +0000)]
test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279830
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Adam Nemet [Fri, 26 Aug 2016 15:58:34 +0000 (15:58 +0000)]
[LoopUnroll] Use OptimizationRemarkEmitter directly not via the analysis pass
We can't mark ORE (a function pass) preserved as required by the loop
passes because that is how we ensure that the required passes like
LazyBFI are all available any time ORE is used. See the new comments in
the patch.
Instead we use it directly just like the inliner does in D22694.
As expected there is some additional overhead after removing the caching
provided by analysis passes. The worst case, I measured was
LNT/CINT2006_ref/401.bzip2 which regresses by 12%. As before, this only
affects -Rpass-with-hotness and not default compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279829
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Sanjay Patel [Fri, 26 Aug 2016 15:53:01 +0000 (15:53 +0000)]
[InstCombine] rename variables in foldICmpDivConstant(); NFC
Removing the redundant 'CmpRHSV' local variable exposes a bug in the caller
foldICmpShrConstant() - it was sending in the div constant instead of the
cmp constant. But I have not been able to expose this in a regression test
yet - the affected folds all appear to be handled before we ever reach this
code. I'll keep trying to find a case as I make changes to allow vector folds
in both functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279828
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Davide Italiano [Fri, 26 Aug 2016 15:22:59 +0000 (15:22 +0000)]
[lib/LTO] Add an assertion to catch invalid opt levels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279823
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Chad Rosier [Fri, 26 Aug 2016 14:01:55 +0000 (14:01 +0000)]
[AArch64] Avoid materializing constant 1 by using csinc, rather than csel.
This is similar to what was done in r261675, but for CSINC rather than CSINV.
Differential Revision: https://reviews.llvm.org/D23892
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279822
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Pablo Barrio [Fri, 26 Aug 2016 13:00:39 +0000 (13:00 +0000)]
Handle empty functions with debug info in load/store opt pass
Summary:
In fuctions that contained debug info but were empty otherwise,
the ARM load/store optimizer could abort. This was because
function MergeReturnIntoLDM handled the special case where a
Machine Basic BLock is empty by calling MBB.empty(). However, this
returns false in presence of debug info, although the function
should be considered empty in the eyes of the load/store optimizer.
This has been fixed by handling the case where searching through the
block finds only debug instructions.
Reviewers: rengolin, dexonsmith, llvm-commits, jmolloy
Subscribers: t.p.northover, aemerson, rengolin, samparker
Differential Revision: https://reviews.llvm.org/D23847
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279820
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Simon Pilgrim [Fri, 26 Aug 2016 09:55:41 +0000 (09:55 +0000)]
[X86][SSE4A] The EXTRQ/INSERTQ bit extraction/insertion ops should be in the integer domain
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279811
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Eugene Leviant [Fri, 26 Aug 2016 08:14:54 +0000 (08:14 +0000)]
Implement getRandomBytes() function
This function allows getting arbitrary sized block of random bytes.
Primary motivation is support for --build-id=uuid in lld.
Differential revision: https://reviews.llvm.org/D23671
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279807
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Craig Topper [Fri, 26 Aug 2016 07:08:00 +0000 (07:08 +0000)]
[X86][SSE] Add CMPSS/CMPSD intrinsic scalar load folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279806
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Matt Arsenault [Fri, 26 Aug 2016 06:31:32 +0000 (06:31 +0000)]
Replace subregister uses when processing tied operands
This was for some reason skipping operands that are subregisters
instead of keeping the same subregister index.
v_movreld_b32 expects src0 to be the subregister of the tied
super register use/def.
e.g.
v_movreld_b32 v0, v9, <imp-def, tied3> v[0:3], <imp-use, tied2> v[0:3]
was being replaced with
v[4:7] = copy v[0:3]
v_movreld_b32 v0, v9, <imp-def, tied3> v[4:7], <imp-use, tied2> v[4:7],
which really writes to v[0:3]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279804
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Eric Christopher [Fri, 26 Aug 2016 02:00:21 +0000 (02:00 +0000)]
Fix singlton -> singleton typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279801
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Akira Hatanaka [Fri, 26 Aug 2016 00:22:12 +0000 (00:22 +0000)]
Fix the static_assert added in r279536.
The assertion doesn't always hold true as sizeof(SDNodeBits) isn't equal
to sizeof(uint16_t) for some targets. For example, sizeof(SDNodeBits)
evaluates to 1, not 2, for ARM's APCS targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279797
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Kostya Serebryany [Fri, 26 Aug 2016 00:18:16 +0000 (00:18 +0000)]
[libFuzzer] simplify a test to make it pass on the bot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279796
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Kostya Serebryany [Thu, 25 Aug 2016 23:30:02 +0000 (23:30 +0000)]
[libFuzzer] make sure we have symbols on fuzzer tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279792
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Michael Kuperstein [Thu, 25 Aug 2016 22:48:11 +0000 (22:48 +0000)]
Revert r274613 because it breaks the test suite with AVX512
This reverts most of r274613 (AKA r274626) and its follow-ups (r276347, r277289),
due to miscompiles in the test suite. The FastISel change was left in, because
it apparently fixes an unrelated issue.
(Recommit of r279782 which was broken due to a bad merge.)
This fixes 4 out of the 5 test failures in PR29112.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279788
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Kostya Serebryany [Thu, 25 Aug 2016 22:35:08 +0000 (22:35 +0000)]
[libFizzer] rename -print_new_cov_pcs=1 into -print_pcs=1 and make it more useful: print PCs only after the initial corpus has been read and symbolize them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279787
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Michael Kuperstein [Thu, 25 Aug 2016 22:14:45 +0000 (22:14 +0000)]
Revert r279782 due to debug buildbot breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279785
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David Blaikie [Thu, 25 Aug 2016 22:09:13 +0000 (22:09 +0000)]
Fix ArrayRef initializer_list Ctor Test
The InitializerList test had undefined behavior by creating a dangling pointer to the temporary initializer list. This patch removes the undefined behavior in the test by creating the initializer list directly.
Reviewers: mehdi_amini, dblaikie
Differential Revision: https://reviews.llvm.org/D23890
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279783
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Michael Kuperstein [Thu, 25 Aug 2016 21:55:41 +0000 (21:55 +0000)]
Revert r274613 because it breaks the test suite with AVX512
This reverts most of r274613 and its follow-ups (r276347, r277289), due to
miscompiles in the test suite. The FastISel change was left in, because it
apparently fixes an unrelated issue.
This fixes 4 out of the 5 test failures in PR29112.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279782
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Tim Shen [Thu, 25 Aug 2016 21:03:46 +0000 (21:03 +0000)]
[MemCpy] Add comments for r279769
Differential Revision: https://reviews.llvm.org/D23846
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279778
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Chris Bieneman [Thu, 25 Aug 2016 20:53:00 +0000 (20:53 +0000)]
cmake: Install CheckAtomic.cmake (needed by lldb)
Summary:
Install CheckAtomic.cmake along with other LLVM modules, therefore making it possible for other projects to use it. This file is needed for LLDB to be built standalone, and installing it was suggested in https://reviews.llvm.org/D23881.
Patch by: Michał Górny
Reviewers: krytarowski, zturner, eugenis, jyknight, labath, beanz
Subscribers: beanz, llvm-commits
Differential Revision: https://reviews.llvm.org/D23887
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279777
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Chris Bieneman [Thu, 25 Aug 2016 20:49:51 +0000 (20:49 +0000)]
[CMake] Add support for exposing runtime targets
This patch adds support to the runtimes build for exposing sub-project targets through the high-level configuration. This will enable exposing the build, check and install targets for sub-project components (i.e. asan, check-asan, install-asan...).
This patch requires minor changes to the runtime projects to take advantage of it, and I'll phase those changes into Compiler-RT shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279776
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Tim Northover [Thu, 25 Aug 2016 20:41:30 +0000 (20:41 +0000)]
ARM: by default don't set the Thumb bit on MachO relocated values.
Its existence is largely historical, apparently we tried to make ARM object
files look maybe-almost-possibly runnable by putting our best guess at the
actual value into relocated locations. Of course, the real linker then comes
along and can completely change things.
But it should only be there for word-sized and movw/movt relocations. It can't
be encoded in branch relocations, and I've seen it mess up validity
calculations twice in the last couple of weeks so the default is clearly problematic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279773
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Hemant Kulkarni [Thu, 25 Aug 2016 19:41:08 +0000 (19:41 +0000)]
llvm-objdump: ELF: Handle code and data mix in all scenarios
Differential Revision: https://reviews.llvm.org/D23621
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279770
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Tim Shen [Thu, 25 Aug 2016 19:27:26 +0000 (19:27 +0000)]
[MemCpy] Check for alias in performMemCpyToMemSetOptzn, instead of the identity of two operands
Summary:
This fixes pr29105. The reason is that lifetime marks creates new
aliasing pointers the original ones, but before this patch aliases
were not checked in performMemCpyToMemSetOptzn.
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D23846
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279769
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Michael Kuperstein [Thu, 25 Aug 2016 18:50:56 +0000 (18:50 +0000)]
Reuse an SDLoc throughout a function. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279767
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Tim Northover [Thu, 25 Aug 2016 17:37:44 +0000 (17:37 +0000)]
GlobalISel: add missing type to G_UADDE instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279762
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Tim Northover [Thu, 25 Aug 2016 17:37:41 +0000 (17:37 +0000)]
GlobalISel: mark overflow bit of overflow ops legal.
It's expected this will map to NZCV register class and be properly selectable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279761
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Tim Northover [Thu, 25 Aug 2016 17:37:39 +0000 (17:37 +0000)]
GlobalISel: mark simple ops legal even on types < 32-bit.
The 32-bit variants of these operations don't depend on the bits not being
operated on, so they also naturally model operations narrower than the actual
register width.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279760
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Tim Northover [Thu, 25 Aug 2016 17:37:35 +0000 (17:37 +0000)]
GlobalISel: mark pointer constants as legal on AArch64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279759
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Tim Northover [Thu, 25 Aug 2016 17:37:32 +0000 (17:37 +0000)]
GlobalISel: perform multi-step legalization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279758
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Tim Northover [Thu, 25 Aug 2016 17:37:25 +0000 (17:37 +0000)]
GlobalISel: mark small extends as legal on AArch64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279757
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