OSDN Git Service
Emil Velikov [Wed, 13 Mar 2019 15:37:45 +0000 (15:37 +0000)]
cherry-ignore: add gitlab-ci fixup commit
gitlab-ci: autotools needs to be told which llvm version to use
Commit references invalid sha - the offender did not land in branch.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Ian Romanick [Wed, 27 Feb 2019 23:53:55 +0000 (15:53 -0800)]
intel/fs: Fix extract_u8 of an odd byte from a 64-bit integer
In the old code, we would generate the exact same instruction for
extract_u8(some_u64, 0) and extract_u8(some_u64, 1). The mask-a-word
trick only works for even numbered bytes.
This fixes the (new) piglit test
tests/spec/arb_gpu_shader_int64/execution/fs-ushr-and-mask.shader_test.
v2: Use a SHR instead of an AND. This saves an instruction compared to
using two moves. Suggested by Jason.
Fixes:
6ac2d169019 ("i965/fs: Fix extract_i8/u8 to a 64-bit destination")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit
55e6454d5e9dae6f8f29992af83f99217446da38)
[Emil: byte -> byte->u32[0] ]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Ian Romanick [Wed, 27 Feb 2019 23:52:18 +0000 (15:52 -0800)]
intel/fs: nir_op_extract_i8 extracts a byte, not a word
Fixes:
6ac2d169019 ("i965/fs: Fix extract_i8/u8 to a 64-bit destination")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit
4aaf139ea4cc7c4703e1906e0074f87f76c8e4cc)
[Emil: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/intel/compiler/brw_fs_nir.cpp
Marek Olšák [Fri, 11 Jan 2019 23:06:59 +0000 (18:06 -0500)]
radeonsi: compile clear and copy buffer compute shaders on demand
same as all other shaders
(cherry picked from commit
c605738113fe91d04f799eae52cec28fafac3f2d)
Bug: https://github.com/ValveSoftware/halflife/issues/2100
Emil Velikov [Wed, 6 Mar 2019 21:45:12 +0000 (21:45 +0000)]
cherry-ignore: add 19.0 only anv/push buffer nominations
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Jason Ekstrand [Sat, 12 Jan 2019 16:32:13 +0000 (10:32 -0600)]
spirv: Pull offset/stride from the pointer for OpArrayLength
We can't pull it from the variable type because it might be an array of
blocks and not just the one block. While we're here, throw in some
error checking.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit
f1dbc7e97d3dcb2104b9438d32cace9529575208)
Samuel Pitoiset [Mon, 4 Mar 2019 13:25:08 +0000 (14:25 +0100)]
radv: properly align the fence and EOP bug VA on GFX9
If alignement is 0, offets returned by
radv_cmd_buffer_upload_alloc() are always 0. These two
virtual addresses were pointing at the same location.
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit
c2a148692b4d728e481b60a503e21931f9cf43f0)
[Emil: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/amd/vulkan/radv_cmd_buffer.c
Eric Engestrom [Wed, 27 Feb 2019 15:26:08 +0000 (15:26 +0000)]
egl: fix libdrm-less builds
This function was never used, and isn't properly guarded by HAVE_LIBDRM,
breaking the build on systems that don't have libdrm.
Let's just remove it.
Fixes:
7552fcb7b9b98392e6a8 "egl: add base EGL_EXT_device_base implementation"
Reported-by: Timo Aaltonen <tjaalton@debian.org>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
bcc4bfc8e80da5dc4c6ee44f791f2112dac208d1)
Tapani Pälli [Wed, 20 Feb 2019 07:18:39 +0000 (09:18 +0200)]
anv: retain the is_array state in create_plane_tex_instr_implicit
This does not seem to fix anything ATM but is the right thing todo.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Fixes:
f3e91e78a33775 ("anv: add nir lowering pass for ycbcr textures")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit
33bf3d510c98a22706eb25815f1214d2e1a0e868)
Jason Ekstrand [Wed, 27 Feb 2019 06:12:01 +0000 (00:12 -0600)]
spirv: OpImageQueryLod requires a sampler
No idea how this fell through the cracks besides the fact that the
sampler bound at 0 almost always works and the CTS isn't amazing. In
any case, this appears to have been broken for almost forever.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit
ca295ddbfb414a526d3bab7daf93fffbbc417c6e)
Jason Ekstrand [Fri, 1 Mar 2019 20:01:08 +0000 (14:01 -0600)]
anv: Count surfaces for non-YCbCr images in GetDescriptorSetLayoutSupport
We were accidentally not counting those surfaces
Fixes:
ddc4069122 "anv: Implement VK_KHR_maintenance3"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit
5049fbddb4687799a10eb585c8789afa0d080535)
Axel Davy [Fri, 22 Feb 2019 19:45:51 +0000 (20:45 +0100)]
st/nine: Ignore multisample quality level if no ms
Apparently instead of returning error when passing
a quality level different than 0 for
D3DMULTISAMPLE_NONE, we should pass.
Fixes: https://github.com/iXit/Mesa-3D/issues/340
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
(cherry picked from commit
1d363d440f261fbadc1db3c17acc514b7130d505)
Axel Davy [Wed, 2 Jan 2019 21:13:12 +0000 (22:13 +0100)]
st/nine: Ignore window size if error
Check GetWindowInfo and ignore the computed sizes
if there is an error.
Fixes a regression caused by earlier commit when
using old wine gallium nine patches.
Should also address a crash at window destruction.
Related issues:
https://github.com/iXit/Mesa-3D/issues/331
https://github.com/iXit/Mesa-3D/issues/332
Cc: mesa-stable@lists.freedesktop.org
Fixes:
2318ca68bbe ("st/nine: Handle window resize when a presentation buffer is used")
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
(cherry picked from commit
86666f051e0cae96f2596cac05e3c3f394744149)
[Emil: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/gallium/state_trackers/nine/swapchain9.c
Mauro Rossi [Sat, 2 Mar 2019 22:38:27 +0000 (23:38 +0100)]
android: anv: fix libexpat shared dependency
Fixes undefined reference building errors for XML_* functions
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: "19.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit
ec0f465bc5f02c93aeb4193db8b5bd90a254b080)
Mauro Rossi [Mon, 4 Mar 2019 09:34:08 +0000 (10:34 +0100)]
android: anv: fix generated files depedencies (v2)
Fix anv_extrypoints.{c,h} and anv_extensions.{c,h} missing dependencies
Rename the variable labels according to targets and python scripts
Align the building rules as per Automake for simplification
Fixes building errors during rebuils due to missing dependencies
(v2) Fixed a missing $(VULKAN_API_XML) reference
Fixes:
9a508b7 ("android: anv/extensions: fix generated sources build")
Fixes:
dd088d4bec7 ("anv/extensions: Generate a header file with extension tables")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Cc: "19.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit
14e7e26a0991e7f9b1d20147f04a43bb4cc3f824)
Ilia Mirkin [Fri, 22 Feb 2019 06:13:39 +0000 (01:13 -0500)]
glsl: fix recording of variables for XFB in TCS shaders
This is purely for conformance, since it's not actually possible to do
XFB on TCS output varyings. However we do have to make sure we record
the names correctly, and this removes an extra level of array-ness from
the names in question.
Fixes KHR-GL45.tessellation_shader.single.xfb_captures_data_from_correct_stage
v2: Add comment to the new program_resource_visitor::process function.
(Ilia Mirkin)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108457
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: 19.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit
4eec3a2a3652317f8e0fa97e0730c297bde8241a)
Jose Maria Casanova Crespo [Wed, 21 Nov 2018 17:23:03 +0000 (18:23 +0100)]
glsl: TCS outputs can not be transform feedback candidates on GLES
Avoids regression on:
KHR-GLES*.core.tessellation_shader.single.xfb_captures_data_from_correct_stage
that is uncovered by the following patch.
"glsl: fix recording of variables for XFB in TCS shaders"
v2: Rebased over glsl: fix recording of variables for XFB in TCS shaders
v3: Move this patch before "glsl: fix recording of variables for XFB in TCS
shaders" to avoid temporal regressions. (Illia Mirkin)
Cc: 19.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit
bf1f49482d677e562993543cd9a9367597ce3ccc)
Ray Zhang [Wed, 27 Feb 2019 06:54:05 +0000 (06:54 +0000)]
glx: fix shared memory leak in X11
call XShmDetach to allow X server to free shared memory
Fixes:
bcd80be49a8260c2233d "drisw/glx: use XShm if possible"
Signed-off-by: Ray Zhang <zhanglei002@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit
b344e32cdf7064a1f2ff7ef37027edda6589404f)
Timothy Arceri [Wed, 27 Feb 2019 07:26:07 +0000 (18:26 +1100)]
glsl: fix shader cache for packed param list
Some types of params such as some builtins are always padded. We
need to keep track of this so we can restore the list correctly.
Here we also remove a couple of cache entries that are not actually
required as they get rebuilt by the _mesa_add_parameter() calls.
This patch fixes a bunch of arb_texture_multisample and
arb_sample_shading piglit tests for the radeonsi NIR backend.
Fixes:
edded1237607 ("mesa: rework ParameterList to allow packing")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit
7536af670b7501228628a8c90f9e8456b5aec9e1)
Yevhenii Kolesnikov [Mon, 25 Feb 2019 14:21:48 +0000 (16:21 +0200)]
i965: Fix allow_higher_compat_version workaround limited by OpenGL 3.0
Added check for higher compat profile being allowed
before assigning certain extensions.
Fixes:
272fe9494232 (mesa: enable ARB_texture_buffer_* extensions in the Compatibility profile)
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107052
(cherry picked from commit
07f4b4e4034d6c9f48d136ec39a03e59f65783cb)
Bas Nieuwenhuizen [Sat, 23 Feb 2019 13:33:31 +0000 (14:33 +0100)]
radv: Interpolate less aggressively.
Seems like dxvk used integer builtins without setting the flat
interpolation decoration.
I believe in the current spec the app is required to set these,
but in the meantime to avoid breaking things in stable releases
(and so close to release for 19.0), only expand the interpolation
to float16 and struct (which cannot be builtins as our spirv parser
lowers the builtin block).
Fixes:
f3247841040 "radv: Allow interpolation on non-float types."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit
c0110477b5503978adf37f64c65c30c9304e3fe4)
Eleni Maria Stea [Fri, 22 Feb 2019 21:02:30 +0000 (23:02 +0200)]
i965: fixed clamping in set_scissor_bits when the y is flipped
Calculating the scissor rectangle fields with the y flipped (0 on top)
can generate negative values that will cause assertion failure later on
as the scissor fields are all unsigned. We must clamp the bbox values
again to make sure they don't exceed the fb_height. Also fixed a
calculation error.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108999
https://bugs.freedesktop.org/show_bug.cgi?id=109594
v2:
- I initially clamped the values inside the if (Y is flipped) case
and I made a mistake in the calculation: the clamp of the bbox[2] should
be a check if (bbox[2] >= fbheight) bbox[2] = fbheight - 1 instead and I
shouldn't have changed the ScissorRectangleYMax calculation. As the
fixed code is equivalent with using CLAMP instead of MAX2 at the top of
the function when bbox[2] and bbox[3] are calculated, and the 2nd is more
clear, I replaced it. (Nanley Chery)
v3:
- Reversed the CLAMP change in bbox[3] as the API guarantees that the
viewport height is positive. (Nanley Chery)
v4:
- Added nomination for the mesa-stable branch and the link to the second
bugzilla bug (Nanley Chery)
CC: <mesa-stable@lists.freedesktop.org>
Tested-by: Paul Chelombitko <qamonstergl@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit
fd37a19ac4c8b2ebff330b2a06a7f311f7d478e3)
Emil Velikov [Thu, 14 Feb 2019 11:23:58 +0000 (11:23 +0000)]
meson: egl: correctly manage loader/xmlconfig
Earlier commit introduced support for haiku yet did not properly
annotate the loader/xmlconfig dependencies.
Thus we ended up adding inc_loader for each !haiku platform - see
659910eda01 9a96bf0ecd0 c731508b988 ec6cb01e216.
One piece remained though - the wayland platform. Hence the following
would fail:
meson -Dgallium-drivers=etnaviv -Ddri-drivers=''\
-Dtools=etnaviv -Dplatforms=wayland -Dglx=disabled \
build/
Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Reported-by: Boris Brezillon <boris.brezillon@collabora.com>
Fixes:
834d221512f ("meson: Add Haiku platform support v4")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
(cherry picked from commit
f0a7b463b5586972f4b7f5d9d84eb0564087ce3f)
[Emil: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/egl/meson.build
Samuel Pitoiset [Mon, 25 Feb 2019 14:28:25 +0000 (15:28 +0100)]
radv: don't copy buffer descriptors list for samplers
Sampler descriptors don't have a buffer list.
This fixes some crashes with new CTS
dEQP-VK.binding_model.descriptor_copy.*.sampler_*.
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit
4924dfc851e52c383380ae56be4d8606684ead7c)
Samuel Pitoiset [Mon, 25 Feb 2019 14:28:24 +0000 (15:28 +0100)]
radv: fix out-of-bounds access when copying descriptors BO list
We shouldn't increment the buffer list pointers twice.
This fixes some crashes with new CTS
dEQP-VK.binding_model.descriptor_copy.*.
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit
9256e0a09dfa94fecfef8e250755732ac35689ec)
Tapani Pälli [Mon, 25 Feb 2019 09:14:11 +0000 (11:14 +0200)]
nir: initialize value in copy_prop_vars_block
Fixes following valgrind warning:
==27561== Conditional jump or move depends on uninitialised value(s)
==27561== at 0x667856B: value_set_ssa_components (nir_opt_copy_prop_vars.c:78)
==27561== by 0x667A1C4: copy_prop_vars_block (nir_opt_copy_prop_vars.c:797)
Fixes:
62332d139c8 "nir: Add a local variable-based copy propagation pass"
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
(cherry picked from commit
22267feff1a35c4b6f1f0cb9c8e371727f99b5d6)
Samuel Pitoiset [Mon, 25 Feb 2019 11:14:59 +0000 (12:14 +0100)]
radv: fix clearing attachments in secondary command buffers
If no framebuffer is bound, get the number of samples and the
image format from the render pass.
This fixes new CTS dEQP-VK.geometry.layered.*.secondary_cmd_buffer.
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit
5671f38085216caf2cbf221a9fcda08b7571a762)
[Emil: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/amd/vulkan/radv_meta_clear.c
Sergii Romantsov [Fri, 22 Feb 2019 09:23:08 +0000 (11:23 +0200)]
d3d: meson: do not prefix user provided d3d-drivers-path
The user can select the location where there d3d drivers
are installed by the d3d-drivers-path meson option.
By default path will be $prefix/$libdir/d3d.
Currently we add $prefix to the user provided path.
Resulting in an incorrect or even missing path.
Based on logic of
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109698
CC: Kenneth Graunke <kenneth@whitecape.org>
CC: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
dcc48664197c7e44684ccfb970a4ae083974d145)
Fixes:
b7c6870f87a ("meson: Add moduledir to d3d.pc")
Sergii Romantsov [Thu, 21 Feb 2019 08:28:11 +0000 (10:28 +0200)]
dri: meson: do not prefix user provided dri-drivers-path
The user can select the location where there dri drivers
are installed by the dri-drivers-path meson option.
By default path will be $prefix/$libdir/dri.
Currently we add $prefix to the user provided path.
Resulting in an incorrect or even missing path.
v2: fixed dri_search_path by default, rebased to master
v3: new commit-message (Emil Velikov), cc mesa-stable
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109698
CC: Rafael Antognolli <rafael.antognolli@intel.com>
CC: Dylan Baker <dylan@pnwbakers.com>
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Fixes:
306914db92e1 (meson: Add dridriverdir variable to dri.pc.)
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
f6556ec7d126b31da37c08d7cb657250505e01a0)
David Shao [Sun, 24 Feb 2019 09:00:36 +0000 (09:00 +0000)]
meson: ensure that xmlpool_options.h is generated for gallium targets that need it
Fixes:
68076b87474e7959c161 "meson: build gallium vdpau state tracker"
Fixes:
22a817af8a89eb3c762f "meson: build gallium xvmc state tracker"
Fixes:
5a785d51a6d68ec676ce "meson: build gallium va state tracker"
Fixes:
0ba909f0f111824223bc "meson: build gallium xa state tracker"
Fixes:
1d36dc674d528b93bec3 "meson: build gallium omx state tracker"
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit
6fa923a65daf1ee73c5cc763ade91abc82da7085)
Alok Hota [Thu, 21 Feb 2019 20:41:15 +0000 (14:41 -0600)]
swr/rast: bypass size limit for non-sampled textures
This fixes a bug where SWR will fail to render in cases with large
buffer allocations, e.g. very large meshes whose vertex buffers exceed
2GB
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
(cherry picked from commit
6053499f2eafde606b13a9663016e9be8e4089eb)
Marek Olšák [Wed, 20 Feb 2019 22:21:32 +0000 (17:21 -0500)]
tgsi: don't set tgsi_info::uses_bindless_images for constbufs and hw atomics
This might have decreased performance for radeonsi/tgsi, because most
most shaders claimed they used bindless.
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
(cherry picked from commit
b326a15edab34d09e7b328dd8726137960ae12a5)
Juan A. Suarez Romero [Fri, 22 Feb 2019 15:47:53 +0000 (16:47 +0100)]
anv: advertise 8 subpixel precision bits
On one side, when emitting 3DSTATE_SF, VertexSubPixelPrecisionSelect is
used to select between 8 bit subpixel precision (value 0) or 4 bit
subpixel precision (value 1). As this value is not set, means it is
taking the value 0, so 8 bit are used.
On the other side, in the Vulkan CTS tests, if the reference rasterizer,
which uses 8 bit precision, as it is used to check what should be the
expected value for the tests, is changed to use 4 bit as ANV was
advertising so far, some of the tests will fail.
So it seems ANV is actually using 8 bits.
v2: explicitly set 3DSTATE_SF::VertexSubPixelPrecisionSelect (Jason)
v3: use _8Bit definition as value (Jason)
v4: (by Jason)
anv: Explicitly set 3DSTATE_CLIP::VertexSubPixelPrecisionSelect
This field was added on gen8 even though there's an identically defined
one in 3DSTATE_SF.
CC: Jason Ekstrand <jason@jlekstrand.net>
CC: Kenneth Graunke <kenneth@whitecape.org>
CC: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit
4f917e6a61860b58a05d40584f7aa3d5e4e32b75)
Juan A. Suarez Romero [Fri, 22 Feb 2019 15:16:24 +0000 (16:16 +0100)]
genxml: add missing field values for 3DSTATE_SF
Fill out "Vertex Sub Pixel Precision Select" possible values.
CC: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit
3b423eeb2d326418147fdfbdc89a415e44a557d3)
Bas Nieuwenhuizen [Fri, 22 Feb 2019 13:24:28 +0000 (14:24 +0100)]
radv: Allow interpolation on non-float types.
In particular structs containing floats and 16-bit floating point
types.
Fixes:
62024fa7750 "radv: enable VK_KHR_16bit_storage extension / 16bit storage features"
Fixes:
da295946361 "spirv: Only split blocks"
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109735
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit
f3247841040a202faffe4709c07da9bd41693580)
Bas Nieuwenhuizen [Fri, 22 Feb 2019 13:16:08 +0000 (14:16 +0100)]
radv: Fix float16 interpolation set up.
float16 types can have non-flat interpolation so set up the HW
correctly for that.
Fixes:
62024fa7750 "radv: enable VK_KHR_16bit_storage extension / 16bit storage features"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit
a1fdd4a4a73604469b6204a56457b08f8ae4a948)
[Emil: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/amd/vulkan/radv_nir_to_llvm.c
Lionel Landwerlin [Wed, 20 Feb 2019 12:49:17 +0000 (12:49 +0000)]
intel: fix urb size for CFL GT1
Same 192Kb amount as SKL/KBL GT1 applies.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Fixes:
de7ed0ba5522 ("i965/CFL: Add PCI Ids for Coffee Lake.")
(cherry picked from commit
1d626fc02895daa9e7f7c74a829b9512f08869e8)
Francisco Jerez [Fri, 18 Jan 2019 20:51:57 +0000 (12:51 -0800)]
intel/fs: Implement extended strides greater than 4 for IR source regions.
Strides up to 32B can be implemented for the source regions of most
instructions by leveraging either the vertical or the horizontal
stride of the hardware Align1 region. The main motivation for this is
that currently the lower_integer_multiplication() pass will happily
double the stride of one of the 32-bit sources, which can blow up if
the stride of the original source was already the maximum value
allowed by the hardware.
An alternative would be to use the regioning legalization pass in
order to lower such strides into the composition of multiple legal
strides, but that would be somewhat less efficient.
This showed up as a regression from my commit
cbea91eb57a501bebb1ca2
in Vulkan 1.1 CTS tests on CHV/BXT platforms, however it was really a
pre-existing problem that had affected conformance on other platforms
without native support for integer multiplication. CHV/BXT were
getting around it because the code I removed in that commit had the
"fortunate" side effect of emitting narrower regions that didn't hit
the hardware stride limit after lowering. Beyond fixing the
regression this fixes ~90 additional Vulkan 1.1 subgroup CTS tests on
ICL (that's why this patch is marked for inclusion in mesa-stable even
though the original regressing patch was not).
According to Jason, a nearly equivalent change had been committed
previously as
e8c9e65185de3e821e1 and then (mistakenly?) reverted as
a31d0382084c8aa8.
Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109328
Reported-by: Mark Janes <mark.a.janes@intel.com>
Tested-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit
e03be78252afa8f1033b0824eff8d48df4fd6727)
Jason Ekstrand [Wed, 13 Feb 2019 22:34:27 +0000 (16:34 -0600)]
nir/xfb: Handle compact arrays in gather_xfb_info
This makes us properly handle gl_ClipDistance and gl_CullDistance.
Fixes:
19064b8c "nir: Add a pass for gathering transform feedback info"
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
(cherry picked from commit
1a93fc382b18ee6d1135952d23f0b6a8aa8cd31f)
Jason Ekstrand [Wed, 13 Feb 2019 22:22:37 +0000 (16:22 -0600)]
nir/xfb: Work in terms of components rather than slots
We needed to better handle cases where a chunk of a variable starts at
some non-zero location_frac and rolls over into the next slot but may
not be more than 4 dwords. For example, if gl_CullDistance is an array
of 3 things and has location_frac = 2, it will span across two vec4s but
is not, itself, bigger than a vec4. If you ignore the clip/cull special
case, it's not allowed to happen for anything else because the only
things that can span more than one slot is dvec3 and dvec4 and they're
both bigger than a vec4. The current code uses this attrib_slot thing
where we count attribute slots and iterate over them. However, that
doesn't work in the case above because gl_CullDistance will have an
attrib_slot count of 1 even though it does span two slots. We could fix
this by adjusting attrib_slot but we already have comp_mask and it's
easier to just handle it that way.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
(cherry picked from commit
558c3145045f1c6da8bddb31ed77a418ab27f2f9)
[Emil: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/compiler/nir/nir_gather_xfb_info.c
Jason Ekstrand [Tue, 12 Feb 2019 18:49:08 +0000 (12:49 -0600)]
nir/xfb: Properly align 64-bit values
Fixes:
19064b8c "nir: Add a pass for gathering transform feedback info"
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
(cherry picked from commit
8f0fe71cc5658728adc273daa03400aab7ec6d93)
Jason Ekstrand [Tue, 12 Feb 2019 19:03:34 +0000 (13:03 -0600)]
compiler/types: Add a contains_64bit helper
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
(cherry picked from commit
30b548fc6258e9a72722f511e377cf4716fd443c)
Andrii Simiklit [Fri, 25 Jan 2019 13:03:07 +0000 (15:03 +0200)]
i965: re-emit index buffer state on a reset option change.
Seems like we forget to update the index buffer (ib) status and
IndexedDrawCutIndexEnable or CutIndexEnable flag is left unchanged it
leads to ignoring of glEnable/glDisable functions for GL_PRIMITIVE_RESTART
in some cases. The index buffer (ib) status should be re-emmited after the
reset option change to avoid some unexpected behavior.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109451
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Signed-off-by: Andrii Simiklit <asimiklit.work@gmail.com>
(cherry picked from commit
f4f4ec941e1427142656e588244f378e469e996e)
Carlos Garnacho [Tue, 20 Nov 2018 17:06:38 +0000 (18:06 +0100)]
wayland/egl: Ensure EGL surface is resized on DRI update_buffers()
Fullscreening and unfullscreening a totem window while playing a video
sometimes results in the video subsurface not changing size along. This
is also reproducible with epiphany.
If a surface gets resized while we have an active back buffer for it, the
resized dimensions won't get neither immediately applied on the resize
callback, nor correctly synchronized on update_buffers(), as the
(now stale) surface size and currently attached buffer size still do match.
There's actually 2 things to synchronize here, first the surface query
size might not be updated yet to the wl_egl_window's (i.e. resize_callback
happened while there is a back buffer), and second the wayland buffers
would need dropping if new surface size differs with the currently attached
buffer. These are done in separate steps now.
https://bugzilla.redhat.com/show_bug.cgi?id=
1650929
https://bugs.freedesktop.org/show_bug.cgi?id=109594
Fixes:
a9fb331ea7d ("wayland/egl: update surface size on window resize")
Signed-off-by: Carlos Garnacho <carlosg@gnome.org>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Bastien Nocera <hadess@hadess.net>
Tested-by: Denys Kostin <denys.kostin@globallogic.com>
(cherry picked from commit
30a01cd9232ed83a0259d184b82e050bae219ed3)
Bas Nieuwenhuizen [Wed, 20 Feb 2019 01:19:42 +0000 (02:19 +0100)]
radv: Sync ETC2 whitelisted devices.
Fixes:
4bb6c49375e "radv: Allow ETC2 on RAVEN and VEGA10 instead of all GFX9."
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit
7631feaa0040616585cf69b52241d2b06b82b524)
Marek Olšák [Tue, 19 Feb 2019 22:29:52 +0000 (17:29 -0500)]
driconf: add Civ6Sub executable for Civilization 6
I'm getting Civ6Sub instead of Civ6.
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit
bff8da6c591e55e4b5f04aea1fef29e6230e9222)
Marek Olšák [Tue, 19 Feb 2019 22:21:20 +0000 (17:21 -0500)]
radeonsi: always enable NIR for Civilization 6 to fix corruption
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104602
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit
ae21bdf47cacafdf69b904cbf3e433cbe0cccb84)
Marek Olšák [Tue, 19 Feb 2019 22:20:01 +0000 (17:20 -0500)]
radeonsi: add driconf option radeonsi_enable_nir
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit
ccbfe44e5ff88a19451701561f752c6046677122)
Rhys Perry [Thu, 6 Dec 2018 12:11:00 +0000 (12:11 +0000)]
radv: ensure export arguments are always float
So that the signature is correct and consistent, the inputs to a export
intrinsic should always be 32-bit floats.
This and the previous commit fixes a large amount crashes from
dEQP-VK.spirv_assembly.instruction.graphics.16bit_storage.input_output_int_*
tests
Fixes:
b722b29f10d ('radv: add support for 16bit input/output')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit
0ca550e01ac55c67c2deef50f5cb750a0181352b)
Rhys Perry [Thu, 6 Dec 2018 12:10:41 +0000 (12:10 +0000)]
radv: bitcast 16-bit outputs to integers
16-bit outputs are stored as 16-bit floats in the outputs array, so they
have to be bitcast.
Fixes:
b722b29f10d ('radv: add support for 16bit input/output')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit
64065aa504c4872a15f7b0894b6037a6b2bcae65)
Samuel Pitoiset [Mon, 18 Feb 2019 16:42:10 +0000 (17:42 +0100)]
radv: fix writing the alpha channel of MRT0 when alpha coverage is enabled
This version is better and safer.
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit
47616810ed7cfce21d239391131ad9a5ef558b52)
Samuel Pitoiset [Fri, 15 Feb 2019 17:02:52 +0000 (18:02 +0100)]
radv: write the alpha channel of MRT0 when alpha coverage is enabled
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109597
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit
0d8f09629377da9cf48ab4315574d69fdef5369d)
Jason Ekstrand [Tue, 12 Feb 2019 04:39:45 +0000 (22:39 -0600)]
intel/fs: Bail in optimize_extract_to_float if we have modifiers
This fixes a bug in runscape where we were optimizing x >> 16 to an
extract and then negating and converting to float. The NIR to fs pass
was dropping the negate on the floor breaking a geometry shader and
causing it to render nothing.
Fixes:
1f862e923cb "i965/fs: Optimize float conversions of byte/word..."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109601
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit
367b0ede4d9115aba772d6e46ec73642761f7ff6)
[Emil: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/intel/compiler/brw_fs_nir.cpp
Emil Velikov [Mon, 18 Feb 2019 18:33:16 +0000 (18:33 +0000)]
docs: add sha256 checksums for 18.3.4
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 18 Feb 2019 18:23:55 +0000 (18:23 +0000)]
docs: add release notes for 18.3.4
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 18 Feb 2019 18:19:54 +0000 (18:19 +0000)]
Update version to 18.3.4
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Eric Anholt [Mon, 11 Feb 2019 19:51:35 +0000 (11:51 -0800)]
vc4: Fix copy-and-paste fail in backport of NEON asm fixes.
One of the cpu pointers wasn't marked as read-write, causing gcc to complain:
../src/gallium/drivers/vc4/vc4_tiling_lt.c:181:17: error: output operand constraint lacks ‘=’
__asm__ volatile (
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Fixes:
813f0a82960 ("vc4: Declare the cpu pointers as being modified in NEON asm.")
Dylan Baker [Wed, 13 Feb 2019 17:26:16 +0000 (09:26 -0800)]
meson: Add dependency on genxml to anvil
Currently the Intel "anvil" driver races with the generation of genxml
files, while i965 has an explicit dependency. This patch adds the same
dependency to anvil.
Fixes:
d1992255bb29054fa51763376d125183a9f602f
("meson: Add build Intel "anv" vulkan driver")
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit
279060cd32dd673c6a5bf302ceac852f51a6c17c)
Samuel Pitoiset [Tue, 12 Feb 2019 08:50:15 +0000 (09:50 +0100)]
radv: always export gl_SampleMask when the fragment shader uses it
For some reasons, this breaks trees rendering in Project Cars.
Fixes:
85010585cde ("radv: only enable gl_SampleMask if MSAA is enabled too")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109401
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit
334da034d8d91ca5a0a1bff8deaefd8ca762c42e)
Dylan Baker [Tue, 12 Feb 2019 22:03:21 +0000 (14:03 -0800)]
get-pick-list: Add --pretty=medium to the arguments for Cc patches
Because none of them have been picked up for 19.0 due to this bug
being reintroduced.
v2: - Fix fixes tags
Fixes:
e6b3a3b2014413366110f6deeced8095e7262b1d
("bin/get-pick-list.sh: handle "typod" usecase.")
Fixes:
fac10169bbad2da918ef07a62c01e0b321508cfe
("bin/get-pick-list.sh: prefix output with "[stable] "")
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
aff52dd2c61eb8d1b03cebbcca7e070ffa48afdf)
Oscar Blumberg [Tue, 12 Feb 2019 20:52:51 +0000 (21:52 +0100)]
radeonsi: Fix guardband computation for large render targets
Stop using 12.12 quantization for viewports that are not contained in
the lower 4k corner of the render target as the hardware needs to keep
both absolute and relative coordinates representable.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit
3c540e0a748844258e77254fc4f864f3b875fe18)
Juan A. Suarez Romero [Tue, 12 Feb 2019 18:19:13 +0000 (19:19 +0100)]
anv/cmd_buffer: check for NULL framebuffer
This can happen when we record a VkCmdDraw in a secondary buffer that
was created inheriting from the primary buffer, but with the framebuffer
set to NULL in the VkCommandBufferInheritanceInfo.
Vulkan 1.1.81 spec says that "the application must ensure (using scissor
if neccesary) that all rendering is contained in the render area [...]
[which] must be contained within the framebuffer dimesions".
While this should be done by the application, commit
465e5a86 added the
clamp to the framebuffer size, in case of application does not do it.
But this requires to know the framebuffer dimensions.
If we do not have a framebuffer at that moment, the best compromise we
can do is to just apply the scissor as it is, and let the application to
ensure the rendering is contained in the render area.
v2: do not clamp to framebuffer if there isn't a framebuffer
v3 (Jason):
- clamp earlier in the conditional
- clamp to render area if command buffer is primary
v4: clamp also x and y to render area (Jason)
v5: rename used variables (Jason)
Fixes:
465e5a86 ("anv: Clamp scissors to the framebuffer boundary")
CC: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit
1ad26f941792f07f226c054811be78b0c0ac9fce)
Emil Velikov [Tue, 12 Feb 2019 18:22:46 +0000 (18:22 +0000)]
cherry-ignore: radv: fix using LOAD_CONTEXT_REG with old GFX ME firmwares on GFX8
stable The commit addresses functionality not present in branch.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Rodrigo Vivi [Sat, 2 Feb 2019 08:03:04 +0000 (00:03 -0800)]
intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.
Align with kernel commits:
5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.")
03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit
56c3b4971d44748ad8618efdf8833ec2f9af4078)
Mario Kleiner [Wed, 13 Jun 2018 04:04:15 +0000 (06:04 +0200)]
egl/wayland-drm: Only announce formats via wl_drm which the driver supports.
Check if a pixel format is supported by the Wayland servers gpu driver
before exposing it to the client via wl_drm, so we avoid reporting formats
to the client which the server gpu can't handle.
Restrict this reporting to the new color depth 30 formats for now, as the
ARGB/XRGB8888 and RGB565 formats are probably supported by every gpu under
the sun.
Atm. this is mostly useful to allow proper PRIME renderoffload for depth
30 formats on the typical Intel iGPU + NVidia dGPU "NVidia Optimus" laptop
combo.
Tested on Intel, AMD, NVidia with single-gpu setup and on a Intel + NVidia
Optimus setup.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit
820dfcea431e4f96f25e6b340edd9cd1e449158b)
Mario Kleiner [Wed, 13 Jun 2018 04:04:14 +0000 (06:04 +0200)]
egl/wayland: Allow client->server format conversion for PRIME offload. (v2)
Support PRIME render offload between a Wayland server gpu and a Wayland
client gpu with different channel ordering for their color formats,
e.g., between Intel drivers which currently only support ARGB2101010
and XRGB2101010 import/display and nouveau which only supports ABGR2101010
rendering and display on nv-50 and later.
In the wl_visuals table, we also store for each format an alternate
sibling format which stores colors at the same precision, but with
different channel ordering, e.g., ARGB2101010 <-> ABGR2101010.
If a given client-gpu renderable format is not supported by the server
for import, but the alternate format is supported by the server, expose
the client-gpu renderable format as a valid EGLConfig to the client. At
eglSwapBuffers time, during the blitImage() detiling blit from the client
backbuffer to the linear buffer, the client format is converted to the
server supported format. As we have to do a copy for PRIME anyway,
this channel swizzling conversion comes essentially for free.
Note that even if a server gpu in principle does support sampling
from the clients native format, this conversion will be a performance
advantage if it allows to convert to the servers preferred format
for direct scanout, as the Wayland compositor may then be able to
directly page-flip a fullscreen client wl_buffer onto the primary
plane, or onto a hardware overlay plane, avoiding an extra data copy
for desktop composition.
Tested so far under Weston with: nouveau single-gpu, Intel single-gpu,
AMD single-gpu, "Optimus" Intel server iGPU for display + NVidia
client dGPU for rendering.
v2: Implement minor review comments by Eric Engestrom: Add some
comment and assert, and some style fixes for clarity.
No functional change.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit
a34b0d68bbf8571e4d858cf4e1176766a50364de)
Iago Toral Quiroga [Mon, 28 May 2018 11:03:24 +0000 (13:03 +0200)]
intel/compiler: do not copy-propagate strided regions to ddx/ddy arguments
The implementation of these opcodes in the generator assumes that their
arguments are packed, and it generates register regions based on that
assumption.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit
391894321161b37a3f8ae1cae4ece6c72ea38bc1)
Samuel Pitoiset [Mon, 11 Feb 2019 09:17:52 +0000 (10:17 +0100)]
radv: fix compiler issues with GCC 9
"The C standard says that compound literals which occur inside of
the body of a function have automatic storage duration associated
with the enclosing block. Older GCC releases were putting such
compound literals into the scope of the whole function, so their
lifetime actually ended at the end of containing function. This
has been fixed in GCC 9. Code that relied on this extended lifetime
needs to be fixed, move the compound literals to whatever scope
they need to accessible in."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109543
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit
129a9f4937b8f2adb4d37999677d748d816d611c)
Kenneth Graunke [Mon, 11 Feb 2019 06:49:20 +0000 (22:49 -0800)]
st/mesa: Limit GL_MAX_[NATIVE_]PROGRAM_PARAMETERS_ARB to 2048
Piglit's vp-max-array test creates a vertex program containing a uniform
array sized to the value of GL_MAX_NATIVE_PROGRAM_PARAMETERS_ARB. Mesa
will then add additional state-var parameters for things like the MVP
matrix.
radeonsi currently exposes a value of 4096, derived from constant buffer
upload size. This means the array will have 4096 elements, and the
extra MVP state-vars would get a prog_src_register::Index of over 4096.
Unfortunately, prog_src_register::Index is a signed 13-bit integer, so
values beyond 4096 end up turning into negative numbers. Negative
source indexes are only valid for relative addressing, so this ends up
generating illegal IR.
In prog_to_nir, this would cause an out of bounds array access.
st_mesa_to_tgsi checks for a negative value, assumes it's bogus,
and remaps it to parameter 0 in order to get something in-range.
This isn't right - instead of reading the MVP matrix, it would read
the first element of the vertex program's large array. But the test
only checks that the program compiles, so we never noticed that it
was broken.
This patch limits the size of the program limits, with the understanding
that we may need to generate additional state-vars internally. i965 has
exposed 1024 for this limit for years, so I don't expect lowering it to
2048 will cause any practical problems for radeonsi or other drivers.
Fixes vp-max-array with prog_to_nir.c.
Cc: "19.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit
f45dd6d31b2ff46a082931386ccd0bf043cfad59)
Leo Liu [Fri, 8 Feb 2019 14:48:23 +0000 (09:48 -0500)]
st/va/vp9: set max reference as default of VP9 reference number
If there is no information about number of render targets
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Cc: 19.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit
a0a52a036708dbf5989778795fd67a79e3226289)
Leo Liu [Fri, 8 Feb 2019 13:56:53 +0000 (08:56 -0500)]
st/va: fix the incorrect max profiles report
Add "PIPE_VIDEO_PROFILE_MAX" to enum, so it will make sure here will
be correct when adding more profiles in the future.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109107
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Cc: 19.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit
21cdb828a3f4d1e2f140fc7c81a4bc305b2f6b04)
Marek Olšák [Mon, 4 Feb 2019 20:12:17 +0000 (15:12 -0500)]
winsys/amdgpu: don't drop manually added fence dependencies
wow, it's hard to believe that fence and syncobjs dependencies were ignored.
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit
ddfe209a0d61917e7b08100eeac82f4c20ca59e8)
Marek Olšák [Fri, 1 Feb 2019 22:10:46 +0000 (17:10 -0500)]
radeonsi: fix EXPLICIT_FLUSH for flush offsets > 0
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit
61c678d4bc91d2ff9ca8c9b183e08daf07d8d24c)
Marek Olšák [Fri, 1 Feb 2019 22:10:46 +0000 (17:10 -0500)]
gallium/u_threaded: fix EXPLICIT_FLUSH for flush offsets > 0
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit
4522f01d4ef9e8a1bb945ca28fba7649aae2171b)
Jason Ekstrand [Mon, 11 Feb 2019 04:23:01 +0000 (22:23 -0600)]
nir/deref: Rematerialize parents in rematerialize_derefs_in_use_blocks
When nir_rematerialize_derefs_in_use_blocks_impl was first written, I
attempted to optimize things a bit by not bothering to re-materialize
the sources of deref instructions figuring that the final caller would
take care of that. However, in the case of more complex deref chains
where the first link or two lives in block A and then another link and
the load/store_deref intrinsic live in block B it doesn't work. The
code in rematerialize_deref_in_block looks at the tail of the chain,
sees that it's already in block B and skips it, not realizing that part
of the chain also lives in block A.
The easy solution here is to just rematerialize deref sources of deref
instructions as well. This may potentially lead to a few more deref
instructions being created by the conditions required for that to
actually happen are fairly unlikely and, thanks to the caching, it's all
linear time regardless.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109603
Fixes:
7d1d1208c2b "nir: Add a small pass to rematerialize derefs per-block"
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
(cherry picked from commit
9e6a6ef0d45a5bb61a541c495fe12e54e646ecfe)
Ilia Mirkin [Sun, 10 Feb 2019 03:36:49 +0000 (22:36 -0500)]
nvc0: we have 16k-sized framebuffers, fix default scissors
For some reason we don't use view volume clipping by default, and use
scissors instead. These scissors were set to an 8k max fb size, while
the driver advertises 16k-sized framebuffers.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit
cc79a1483ffb7b91edc97c9870eadcab1e83b8f3)
Emil Velikov [Thu, 14 Feb 2019 12:32:02 +0000 (12:32 +0000)]
cherry-ignore: add more 19.0 only nominations from Ilia
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Kristian H. Kristensen [Wed, 6 Feb 2019 21:47:32 +0000 (13:47 -0800)]
freedreno/a6xx: Emit blitter dst with OUT_RELOCW
We're writing to the bo and the kernel needs to know for
fd_bo_cpu_prep() to work.
Fixes:
f93e43127252679b ("freedreno/a6xx: Enable blitter")
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
(cherry picked from commit
357ea7da51a2392eb1b7f464ff99cbe8e98378e2)
Bas Nieuwenhuizen [Wed, 23 Jan 2019 21:44:05 +0000 (22:44 +0100)]
amd/common: Use correct writemask for shared memory stores.
The check was for 1 bit being set, which is clearly not what we want.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit
3c24fc64c7a4e564d84843fab7db25963d574d99)
Bas Nieuwenhuizen [Tue, 22 Jan 2019 21:29:26 +0000 (22:29 +0100)]
radv: Only look at pImmutableSamples if the descriptor has a sampler.
Equivalent of ANV patch
c7f4a2867ce492d78c1f8e2870c0a593d280572d
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit
39ab4e12f71a640b43403a110d3d85565b59d16c)
Eric Engestrom [Wed, 6 Feb 2019 16:28:12 +0000 (16:28 +0000)]
xvmc: fix string comparison
Fixes:
6fca18696d0e6a243f6f "g3dvl: Update XvMC unit tests."
Cc: Younes Manton <younes.m@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit
40b53a72033a601ab474c5f8e27eb5ca2c8bad6c)
Eric Engestrom [Wed, 6 Feb 2019 16:21:08 +0000 (16:21 +0000)]
xvmc: fix string comparison
Fixes:
c7b65dcaffeb9d0760c8 "xvmc: Define some Xv attribs to allow users
to specify color standard and procamp"
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
(cherry picked from commit
110a6e1839bcf31e3592389ad55a7ba07b551965)
Bart Oldeman [Sun, 3 Feb 2019 02:57:10 +0000 (02:57 +0000)]
gallium-xlib: query MIT-SHM before using it.
When Mesa is compiled for gallium-xlib using e.g.
./configure --enable-glx=gallium-xlib --disable-dri --disable-gbm
-disable-egl
and is used by an X server (usually remotely via SSH X11 forwarding)
that does not support MIT-SHM such as XMing or MobaXterm, OpenGL
clients report error messages such as
Xlib: extension "MIT-SHM" missing on display "localhost:11.0".
ad infinitum.
The reason is that the code in src/gallium/winsys/sw/xlib uses
MIT-SHM without checking for its existence, unlike the code
in src/glx/drisw_glx.c and src/mesa/drivers/x11/xm_api.c.
I copied the same check using XQueryExtension, and tested with
glxgears on MobaXterm.
This issue was reported before here:
https://lists.freedesktop.org/archives/mesa-users/2016-July/001183.html
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: <mesa-stable@lists.freedesktop.org>
(cherry picked from commit
a203eaa4f4fb672b95426289b8dad3a8998f92d7)
Emil Velikov [Tue, 12 Feb 2019 21:07:17 +0000 (21:07 +0000)]
cherry-ignore: nv50,nvc0: add explicit settings for recent caps
stable Explicit 19.0 only nomination.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Marek Olšák [Thu, 24 Jan 2019 00:48:26 +0000 (19:48 -0500)]
meson: drop the xcb-xrandr version requirement
autotools doesn't have any requirement. This fixes meson on Ubuntu 16.04.
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
(cherry picked from commit
1e85cfb91a08565f28f51cc19573324722765823)
Jason Ekstrand [Tue, 15 Jan 2019 16:53:44 +0000 (10:53 -0600)]
intel/fs: Do the grf127 hack on SIMD8 instructions in SIMD16 mode
Previously, we only applied the fix to shaders with a dispatch mode of
SIMD8 but the code it relies on for SIMD16 mode only applies to SIMD16
instructions. If you have a SIMD8 instruction in a SIMD16 shader,
neither would trigger and the restriction could still be hit.
Fixes:
232ed8980217dd "i965/fs: Register allocator shoudn't use grf127..."
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit
b4f0d062cd12b4f675bac900ac41d1085a79239a)
Ernestas Kulik [Thu, 30 Aug 2018 16:02:46 +0000 (19:02 +0300)]
v3d: Fix leak in resource setup error path
Reported by Coverity: in the case of unsupported modifier request, the
code does not jump to the “fail” label to destroy the acquired resource.
CID:
1435704
Signed-off-by: Ernestas Kulik <ernestas.kulik@gmail.com>
Fixes:
45bb8f295710 ("broadcom: Add V3D 3.3 gallium driver called "vc5", for BCM7268.")
(cherry picked from commit
90458bef544ac46a912f06e73f71c3cb20fdaaf6)
Ernestas Kulik [Thu, 30 Aug 2018 16:02:47 +0000 (19:02 +0300)]
vc4: Fix leak in HW queries error path
Reported by Coverity: in the case where there exist hardware and
non-hardware queries, the code does not jump to err_free_query and leaks
the query.
CID:
1430194
Signed-off-by: Ernestas Kulik <ernestas.kulik@gmail.com>
Fixes:
9ea90ffb98fb ("broadcom/vc4: Add support for HW perfmon")
(cherry picked from commit
f6e49d5ad0fde19a074644491475470d684dd721)
Jason Ekstrand [Wed, 31 Oct 2018 15:18:21 +0000 (10:18 -0500)]
intel/fs: Handle IMAGE_SIZE in size_read() and is_send_from_grf()
Like all the other sends, it's just mlen * REG_SIZE.
Fixes:
3cbc02e4693 "intel: Use TXS for image_size when we have..."
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
(cherry picked from commit
cf42b0f9e2d2d612f92b24ec8a5a77ff107b92ab)
Rob Clark [Tue, 29 Jan 2019 17:23:28 +0000 (12:23 -0500)]
freedreno: stop frob'ing pipe_resource::nr_samples
Previously we tried to normalize nr_samples to MAX2(1, nr_samples) to
avoid having to deal with 0 vs 1 everywhere. But this causes problems
in mesa/st, for example st_finalize_texture() will think there is a
nr_samples mismatch and recreate the texture. Somehow this manifests
as corrupt x11 font rendering on generations that do not support MSAA
(but apparently works fine on a5xx and a6xx which do support MSAA.)
Fixes:
cf0c7258ee0 freedreno/a5xx: MSAA
Signed-off-by: Rob Clark <robdclark@gmail.com>
(cherry picked from commit
c3baa077bf6db9f9d46be62ed7cbbc3167e68c8f)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/gallium/drivers/freedreno/freedreno_batch_cache.c
Emil Velikov [Thu, 31 Jan 2019 21:08:36 +0000 (21:08 +0000)]
docs: add sha256 checksums for 18.3.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 31 Jan 2019 20:58:09 +0000 (20:58 +0000)]
docs: add release notes for 18.3.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Danylo Piliaiev [Thu, 10 Jan 2019 16:16:59 +0000 (18:16 +0200)]
glsl: Fix copying function's out to temp if dereferenced by array
Function's out variable could be an array dereferenced by an array:
func(v[w[i]]);
or something more complicated.
Copy index in any case.
Fixes:
76c27e47b906 ("glsl: Copy function out to temp if we don't directly ref a variable")
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit
0862929bf64222e85e8242824aecf05e494c157c)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109488
Nominated-by: Matt Turner <mattst88@gmail.com>
Timothy Arceri [Mon, 9 Apr 2018 04:40:40 +0000 (14:40 +1000)]
glsl: Copy function out to temp if we don't directly ref a variable
Otherwise we can end up with IR that looks like this:
(
(declare (temporary ) vec4 f@8)
(assign (xyzw) (var_ref f@8) (var_ref f) )
(call f16 ((swiz y (var_ref f@8) )))
(assign (xyzw) (var_ref f) (var_ref f@8) )
))
When we really need:
(declare (temporary ) float inout_tmp)
(assign (x) (var_ref inout_tmp) (swiz y (var_ref f) ))
(call f16 ((var_ref inout_tmp) ))
(assign (y) (var_ref f) (swiz y (swiz xxxx (var_ref inout_tmp) )))
(declare (temporary ) void void_var)
The GLSL IR function inlining code seemed to produce correct code
even without this but we need the correct IR for GLSL IR -> NIR to
be able to understand whats going on.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit
76c27e47b90647df047e785d6b3ab5d0d979a1ee)
Nominated-by: Matt Turner <mattst88@gmail.com>
Tomeu Vizoso [Mon, 17 Dec 2018 08:56:00 +0000 (09:56 +0100)]
etnaviv: Consolidate buffer references from framebuffers
We were leaking surfaces because the references taken in
etna_set_framebuffer_state weren't being released on context destroy.
Instead of just directly releasing those references in
etna_context_destroy, use the util_copy_framebuffer_state helper.
Take the chance to remove the duplicated buffer references in
compiled_framebuffer_state to avoid confusion.
The leak can be reproduced with a client that continuously creates and
destroys contexts.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reported-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
(cherry picked from commit
bf1dfcc3e8120400c9a78d03dd914a786728b5f7)
[Emil: resolve trivial conflict - dummy_rt does not exist in branch]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/gallium/drivers/etnaviv/etnaviv_context.c
Eric Anholt [Mon, 28 Jan 2019 19:39:12 +0000 (11:39 -0800)]
vc4: Enable NEON asm on meson cross-builds.
The core Mesa with_asm_arch and USE_ARM_ASM flags are disabled for meson
cross-builds because of the need to run host binaries on the build system.
vc4 doesn't need to do that, so skip with_asm_arch to enable NEON on my
cross-builds.
Fixes:
ebcb4c2156e9 ("meson: Enable VC4's NEON assembly support.")
(cherry picked from commit
932ed9c00b99e6ec92146ec9e820f546cf3e6551)
Vinson Lee [Sat, 26 Jan 2019 08:21:06 +0000 (00:21 -0800)]
meson: Fix typo.
meson.build:166:21: ERROR: Unknown method "verson_compare" for a string.
Fixes:
c1efa240c91e ("meson: Add warnings and errors when using ICC")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Cc: 18.3 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit
be5b271ea76d81d32e3dc490ef5b32a61c3fb965)
Carsten Haitzler (Rasterman) [Tue, 8 Jan 2019 16:28:30 +0000 (16:28 +0000)]
vc4: Declare the cpu pointers as being modified in NEON asm.
Otherwise, the compiler is free to reuse the register containing the input
for another call and assume that the value hasn't been modified. Fixes
crashes on texture upload/download with current gcc.
We now have to have a temporary for the cpu2 value, since outputs must be
lvalues.
(commit message by anholt)
Fixes:
4d30024238ef ("vc4: Use NEON to speed up utile loads on Pi2.")
(cherry picked from commit
300d3ae8b1445b5060f92c77c0f577f4b7b2c7d6)
[Emil: apply the patch to vc4_tiling_lt.c instead of v3d_cpu_tiling.h]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/broadcom/common/v3d_cpu_tiling.h
Squashed with commit:
vc4: Declare the last cpu pointer as being modified in NEON asm.
Earlier commit addressed 7 of the 8 instances available.
v2: Rebase patch back to master (by anholt)
Cc: Carsten Haitzler (Rasterman) <raster@rasterman.com>
Cc: Eric Anholt <eric@anholt.net>
Fixes:
300d3ae8b14 ("vc4: Declare the cpu pointers as being modified in NEON asm.")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
385843ac3ce1b868d9e24fcb2dbc0c8d5f5a7c99)
Conflicts:
src/broadcom/common/v3d_cpu_tiling.h
Carsten Haitzler (Rasterman) [Tue, 29 Jan 2019 16:55:30 +0000 (16:55 +0000)]
vc4: Use named parameters for the NEON inline asm.
This makes the asm code more intelligible and clarifies the functional
change in the next commit.
(commit message and commit squashing by anholt)
(cherry picked from commiti
522f68847152e9111def094f7fb35b44f3d0fc80)
[Emil: apply the patch to vc4_tiling_lt.c instead of v3d_cpu_tiling.h]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Conflicts:
src/broadcom/common/v3d_cpu_tiling.h
Timothy Arceri [Mon, 28 Jan 2019 06:15:34 +0000 (17:15 +1100)]
glsl: use remap location when serialising uniform program resource data
This allows us to avoid expensive string compares since we already have
a map to the pointers.
These compares were taking ~30 seconds for a single shader compile
in Godot due to it using 64,000+ uniforms.
Fixes:
c4cff5f40254 ("glsl: add basic support for resource list to shader cache")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109229
(cherry picked from commit
fb78a6cb72270de271f75d6f6c9b5ebadba7a898)