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Zachary Turner [Thu, 13 Apr 2017 02:28:17 +0000 (02:28 +0000)]
Remove some unused private fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300163
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Craig Topper [Thu, 13 Apr 2017 01:31:40 +0000 (01:31 +0000)]
[InstCombine] Add vector version of a test to show missing optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300161
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Peter Collingbourne [Thu, 13 Apr 2017 01:26:12 +0000 (01:26 +0000)]
Support: Add a VCSRevision.h header file.
This is a magic header file supported by the build system that provides a
single definition, LLVM_REVISION, containing an LLVM revision identifier,
if available. This functionality previously lived in the LTO library, but
I am moving it out to lib/Support because I want to also start using it in
lib/Object to create the IR symbol table.
This change also fixes a bug where LLVM_REVISION was never actually being
used in lib/LTO because the macro HAS_LLVM_REVISION was never defined (it
was misspelled as HAVE_SVN_VERSION_INC in lib/LTO/CMakeLists.txt, and was
only being defined in a non-existent file Version.cpp).
I also changed the code to use "git rev-parse --git-dir" to locate the .git
directory, instead of looking for it in the LLVM source root directory,
which makes this compatible with monorepos as well as git worktrees.
Differential Revision: https://reviews.llvm.org/D31985
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300160
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Lang Hames [Thu, 13 Apr 2017 01:06:45 +0000 (01:06 +0000)]
[ORC] Add missing file from r300155.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300157
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Lang Hames [Thu, 13 Apr 2017 01:03:06 +0000 (01:03 +0000)]
[ORC] Use native Errors rather than converted std::error_codes for ORC RPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300155
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Reid Kleckner [Thu, 13 Apr 2017 00:58:09 +0000 (00:58 +0000)]
[IR] Take func, ret, and arg attrs separately in AttributeList::get
This seems like a much more natural API, based on Derek Schuff's
comments on r300015. It further hides the implementation detail of
AttributeList that function attributes come last and appear at index
~0U, which is easy for the user to screw up. git diff says it saves code
as well: 97 insertions(+), 137 deletions(-)
This also makes it easier to change the implementation, which I want to
do next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300153
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Craig Topper [Thu, 13 Apr 2017 00:20:31 +0000 (00:20 +0000)]
[IR] Remove the APIntMoveTy typedef from ConstantRange. Use APInt type directly.
This typedef used to be conditional based on whether rvalue references were supported. Looks like it got left behind when we switched to always having rvalue references with c++11. I don't think it provides any value now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300146
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Richard Smith [Thu, 13 Apr 2017 00:14:39 +0000 (00:14 +0000)]
Work around MSVC rejects-valid bug related to C++11 narrowing conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300144
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Konstantin Zhuravlyov [Wed, 12 Apr 2017 23:57:37 +0000 (23:57 +0000)]
Fix compiler error in Attributes.cpp
```
Compiling Attributes.cpp ...
../../../Attributes.cpp: In member function 'std::__1::pair<unsigned int, llvm::Optional<unsigned int> > llvm::AttributeSet::getAllocSizeArgs() const':
../../../Attributes.cpp:542:69: error: operands to ?: have different types 'std::__1::pair<unsigned int, llvm::Optional<unsigned int> >' and 'std::__1::pair<int, int>'
return SetNode ? SetNode->getAllocSizeArgs() : std::make_pair(0, 0);
^
../../../Attributes.cpp:543:1: error: control reaches end of non-void function [-Werror=return-type]
}
^
```
Differential Revision: https://reviews.llvm.org/D31981
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300143
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Wei Ding [Wed, 12 Apr 2017 23:51:47 +0000 (23:51 +0000)]
AMDGPU : Fix common dominator of two incoming blocks terminates with uniform branch issue.
Differential Revision: http://reviews.llvm.org/D31350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300142
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Richard Smith [Wed, 12 Apr 2017 23:43:58 +0000 (23:43 +0000)]
Fix some ArgList uses after API change in r300135.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300139
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Zachary Turner [Wed, 12 Apr 2017 23:27:43 +0000 (23:27 +0000)]
Fix initialization order of class members.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300137
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Richard Smith [Wed, 12 Apr 2017 23:19:51 +0000 (23:19 +0000)]
ArgList: cache index ranges containing arguments with each ID
Improve performance of argument list parsing with large numbers of IDs and
large numbers of arguments, by tracking a conservative range of indexes within
the argument list that might contain an argument with each ID. In the worst
case (when the first and last argument with a given ID are at the opposite ends
of the argument list), this still results in a linear-time walk of the list,
but it helps substantially in the common case where each ID occurs only once,
or a few times close together in the list.
This gives a ~10x speedup to clang's `test/Driver/response-file.c`, which
constructs a very large set of command line arguments and feeds them to the
clang driver.
Differential Revision: https://reviews.llvm.org/D30130
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300135
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Zachary Turner [Wed, 12 Apr 2017 23:18:51 +0000 (23:18 +0000)]
[llvm-pdbdump] Minor prepatory refactor of Class Def Dumper.
In a followup patch I intend to introduce an additional dumping
mode which dumps a graphical representation of a class's layout.
In preparation for this, the text-based layout printer needs to
be split out from the graphical layout printer, and both need
to be able to use the same code for printing the intro and outro
of a class's definition (e.g. base class list, etc).
This patch does so, and in the process introduces a skeleton
definition for the graphical printer, while currently making
the graphical printer just print nothing.
NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300134
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Zachary Turner [Wed, 12 Apr 2017 23:18:21 +0000 (23:18 +0000)]
[llvm-pdbdump] More advanced class definition dumping.
Previously the dumping of class definitions was very primitive,
and it made it hard to do more than the most trivial of output
formats when dumping. As such, we would only dump one line for
each field, and then dump non-layout items like nested types
and enums.
With this patch, we do a complete analysis of the object
hierarchy including aggregate types, bases, virtual bases,
vftable analysis, etc. The only immediately visible effects
of this are that a) we can now dump a line for the vfptr where
before we would treat that as padding, and b) we now don't
treat virtual bases that come at the end of a class as padding
since we have a more detailed analysis of the class's storage
usage.
In subsequent patches, we should be able to use this analysis
to display a complete graphical view of a class's layout including
recursing arbitrarily deep into an object's base class / aggregate
member hierarchy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300133
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Akira Hatanaka [Wed, 12 Apr 2017 23:15:10 +0000 (23:15 +0000)]
[libFuzzer] XFAIL fuzzer-oom.test on Darwin.
The test fails on Darwin because Fuzzer::DeathCallback (which calls
DumpCurrentUnit("crash-")) is called before DumpCurrentUnit("oom-") is
called in Fuzzer::RssLimitCallback. DeathCallback is transitively called
from __sanitizer_print_memory_profile.
This should fix the fuzzer bot that has been failing for a while:
http://lab.llvm.org:8080/green/job/libFuzzer/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300127
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Craig Topper [Wed, 12 Apr 2017 22:54:24 +0000 (22:54 +0000)]
[InstSimplify] Don't try to constant fold AllocaInsts since it won't do anything.
Should give a small compile time improvement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300125
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Reid Kleckner [Wed, 12 Apr 2017 22:30:37 +0000 (22:30 +0000)]
[IR] Make AttributeSet constructor from AttributeSetNode* explicit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300119
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Craig Topper [Wed, 12 Apr 2017 22:29:23 +0000 (22:29 +0000)]
[ValueTracking] Teach GetUnderlyingObject to stop when it reachs an alloca instruction.
Previously it tried to call SimplifyInstruction which doesn't know anything about alloca so defers to constant folding which also doesn't do anything with alloca. This results in wasted cycles making calls that won't do anything. Given the frequency with which this function is called this time adds up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300118
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Reid Kleckner [Wed, 12 Apr 2017 22:22:01 +0000 (22:22 +0000)]
[IR] Assert that we never create an empty AttributeListImpl, NFC
Delete following conditional that is always true as a result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300117
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Matt Arsenault [Wed, 12 Apr 2017 21:58:23 +0000 (21:58 +0000)]
AMDGPU: Fix invalid copies when copying i1 to phys reg
Insert a VReg_1 virtual register so the i1 workaround pass
can handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300113
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Stanislav Mekhanoshin [Wed, 12 Apr 2017 20:48:56 +0000 (20:48 +0000)]
[AMDGPU] Generate range metadata for workitem id
If workgroup size is known inform llvm about range returned by local
id and local size queries.
Differential Revision: https://reviews.llvm.org/D31804
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300102
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Piotr Padlewski [Wed, 12 Apr 2017 20:45:12 +0000 (20:45 +0000)]
Remove readnone from invariant.group.barrier
Summary:
Readnone attribute would cause CSE of two barriers with
the same argument, which is invalid by example:
struct Base {
virtual int foo() { return 42; }
};
struct Derived1 : Base {
int foo() override { return 50; }
};
struct Derived2 : Base {
int foo() override { return 100; }
};
void foo() {
Base *x = new Base{};
new (x) Derived1{};
int a = std::launder(x)->foo();
new (x) Derived2{};
int b = std::launder(x)->foo();
}
Here 2 calls of std::launder will produce @llvm.invariant.group.barrier,
which would be merged into one call, causing devirtualization
to devirtualize second call into Derived1::foo() instead of
Derived2::foo()
Reviewers: chandlerc, dberlin, hfinkel
Subscribers: llvm-commits, rsmith, amharc
Differential Revision: https://reviews.llvm.org/D31531
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300101
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Vassil Vassilev [Wed, 12 Apr 2017 20:43:11 +0000 (20:43 +0000)]
Append -w when LLVM_ENABLE_WARNINGS is Off.
Reviewed by rnk (D31702)!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300100
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Peter Collingbourne [Wed, 12 Apr 2017 20:02:09 +0000 (20:02 +0000)]
Bitcode: Move version and global value module code parsers to separate functions. NFCI.
This will make it easier to teach this code about the string table.
Differential Revision: https://reviews.llvm.org/D31828
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300099
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Zachary Turner [Wed, 12 Apr 2017 19:59:37 +0000 (19:59 +0000)]
[Support] Add support for unique_ptr<> to Casting.h.
Often you have a unique_ptr<T> where T supports LLVM's
casting methods, and you wish to cast it to a unique_ptr<U>.
Prior to this patch, this requires doing hacky things like:
unique_ptr<U> Casted;
if (isa<U>(Orig.get()))
Casted.reset(cast<U>(Orig.release()));
This is overly verbose, and it would be nice to just be able
to use unique_ptr directly with cast and dyn_cast. To this end,
this patch updates cast<> to work directly with unique_ptr<T>,
so you can now write:
auto Casted = cast<U>(std::move(Orig));
Since it's possible for dyn_cast<> to fail, however, we choose
to use a slightly different API here, because it's awkward to
write
if (auto Casted = dyn_cast<U>(std::move(Orig))) {}
when Orig may end up not having been moved at all. So the
interface for dyn_cast is
if (auto Casted = unique_dyn_cast<U>(Orig)) {}
Where the inclusion of `unique` in the name of the cast operator
re-affirms that regardless of success of or fail of the casting,
exactly one of the input value and the return value will contain
a non-null result.
Differential Revision: https://reviews.llvm.org/D31890
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300098
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Zachary Turner [Wed, 12 Apr 2017 19:52:47 +0000 (19:52 +0000)]
Remove svnprop eol-style:native from Casting.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300096
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Craig Topper [Wed, 12 Apr 2017 19:32:47 +0000 (19:32 +0000)]
[InstCombine] Teach SimplifyMultipleUseDemandedBits to handle And/Or/Xor known bits using the LHS/RHS known bits it already acquired without recursing back into computeKnownBits.
This replicates the known bits and constant creation code from the single use case for these instructions and adds it here. The computeKnownBits and constant creation code for other instructions is now in the default case of the opcode switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300094
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Craig Topper [Wed, 12 Apr 2017 19:08:03 +0000 (19:08 +0000)]
[InstCombine] Remove unreachable code for turning an And where all demanded bits on both sides are known to be zero into a constant 0.
We already handled a superset check that included the known ones too and folded to a constant that may include ones. But it can also handle the case of no ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300093
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Sanjay Patel [Wed, 12 Apr 2017 18:39:53 +0000 (18:39 +0000)]
[InstCombine] fix wrong undef handling when converting select to shuffle
As discussed in:
https://bugs.llvm.org/show_bug.cgi?id=32486
...the canonicalization of vector select to shufflevector does not hold up
when undef elements are present in the condition vector.
Try to make the undef handling clear in the code and the LangRef.
Differential Revision: https://reviews.llvm.org/D31980
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300092
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Craig Topper [Wed, 12 Apr 2017 18:39:27 +0000 (18:39 +0000)]
[SelectionDAG] Use APInt move assignment to avoid 2 memory allocations and copies when bit width is larger than 64-bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300091
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Kyle Butt [Wed, 12 Apr 2017 18:30:32 +0000 (18:30 +0000)]
CodeGen: BlockPlacement: Add comment about DenseMap Safety.
The use of a DenseMap in precomputeTriangleChains does not cause
non-determinism, even though it is iterated over, as the only thing the
iteration does is to insert entries into a new DenseMap, which is not iterated.
Comment only change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300088
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Peter Collingbourne [Wed, 12 Apr 2017 18:27:00 +0000 (18:27 +0000)]
llvm-lto2: Add a dump-symtab subcommand.
This allows us to test the symbol table APIs for LTO input files.
Differential Revision: https://reviews.llvm.org/D31920
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300086
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Craig Topper [Wed, 12 Apr 2017 18:25:25 +0000 (18:25 +0000)]
[InstCombine] In SimplifyMultipleUseDemandedBits, use a switch instead of cascaded ifs on opcode. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300085
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Craig Topper [Wed, 12 Apr 2017 18:17:46 +0000 (18:17 +0000)]
[InstCombine] Teach SimplifyDemandedInstructionBits that even if we reach an instruction that has multiple uses, if we know all the bits for the demanded bits for this context we can go ahead and create a constant.
Currently if we reach an instruction with multiples uses we know we can't do any optimizations to that instruction itself since we only have the demanded bits for one of the users. But if we know all of the bits are zero/one for that one user we can still go ahead and create a constant to give to that user.
This might then reduce the instruction to having a single use and allow additional optimizations on the other path.
This picks up an additional case that r300075 didn't catch.
Differential Revision: https://reviews.llvm.org/D31552
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300084
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Matthias Braun [Wed, 12 Apr 2017 18:09:05 +0000 (18:09 +0000)]
MachineScheduler: Skip acyclic latency heuristic for in-order cores
The current heuristic is triggered on `InFlightCount > BufferLimit`
which isn't really helpful on in-order cores where BufferLimit is zero.
Note that we already get latency hiding effects for in order cores
by instructions staying in the pending queue on stalls; The additional
latency scheduling heuristics only have minimal effects after that while
occasionally increasing register pressure too much resulting in extra
spills.
My motivation here is additional spills/reloads ending up in a loop in
464.h264ref / BlockMotionSearch function resulting in a 4% overal
regression on an in order core. rdar://
30264380
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300083
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Craig Topper [Wed, 12 Apr 2017 18:05:21 +0000 (18:05 +0000)]
[InstCombine] Move portion of SimplifyDemandedUseBits that deals with instructions with multiple uses out to a separate method. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300082
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Renato Golin [Wed, 12 Apr 2017 18:03:09 +0000 (18:03 +0000)]
[SystemZ] Fix more target specific tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300081
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Renato Golin [Wed, 12 Apr 2017 17:14:46 +0000 (17:14 +0000)]
[SystemZ] Fix target specific tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300078
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Dmitry Preobrazhensky [Wed, 12 Apr 2017 17:10:07 +0000 (17:10 +0000)]
[AMDGPU][MC] Added support for several VI-specific opcodes (s_wakeup, etc)
Added support for VI:
- s_endpgm_saved
- s_wakeup
- s_rfe_restore_b64
- v_perm_b32
Enabled for VI:
- v_mov_fed_b32
- v_mov_fed_b32_e64
See bug 32593: https://bugs.llvm.org//show_bug.cgi?id=32593
Reviewers: artem.tamazov, vpykhtin
Differential Revision: https://reviews.llvm.org/D31931
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300076
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Craig Topper [Wed, 12 Apr 2017 16:49:59 +0000 (16:49 +0000)]
Teach SimplifyDemandedUseBits that adding or subtractings 0s from every bit below the highest demanded bit can be simplified
If we are adding/subtractings 0s below the highest demanded bit we can just use the other operand and remove the operation.
My primary motivation is observing that we can call ShrinkDemandedConstant for the add/sub and create a 0 constant, rather than removing the add completely. In the case I saw, we modified the constant on an add instruction to a 0, but the add is not put into the worklist. So we didn't revisit it until the next InstCombine iteration. This caused an IR modification to remove add and a subsequent iteration to be ran.
With this change we get bypass the add in the first iteration and prevent the second iteration from changing anything.
Differential Revision: https://reviews.llvm.org/D31120
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300075
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Dmitry Preobrazhensky [Wed, 12 Apr 2017 16:31:18 +0000 (16:31 +0000)]
[AMDGPU][MC] Corrected parsing of v_cmp_class* and v_cmpx_class*
Fixed bug 32565: https://bugs.llvm.org//show_bug.cgi?id=32565
Reviewers: vpykhtin
Differential Revision: https://reviews.llvm.org/D31820
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300073
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Derek Schuff [Wed, 12 Apr 2017 16:03:00 +0000 (16:03 +0000)]
[WebAssembly] Update use of Attributes after r299875
This fixes the failing WebAssemblyLowerEmscriptenEHSjLj tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300072
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Dmitry Preobrazhensky [Wed, 12 Apr 2017 15:36:09 +0000 (15:36 +0000)]
[AMDGPU][MC] Corrected encoding of V_MQSAD_U32_U8 for CI
Corrected encoding of V_MQSAD_U32_U8 for CI
See bug 32552: https://bugs.llvm.org//show_bug.cgi?id=32552
Reviewers: vpykhtin
Differential Revision: https://reviews.llvm.org/D31810
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300070
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Easwaran Raman [Wed, 12 Apr 2017 15:26:15 +0000 (15:26 +0000)]
Fix the bootstrap failure caused by r299986.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300069
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Sanjay Patel [Wed, 12 Apr 2017 15:11:33 +0000 (15:11 +0000)]
[InstCombine] morph an existing instruction instead of creating a new one
One potential way to make InstCombine (very slightly?) faster is to recycle instructions
when possible instead of creating new ones. It's not explicitly stated AFAIK, but we don't
consider this an "InstSimplify". We could, however, make a new layer to house transforms
like this if that makes InstCombine more manageable (just throwing out an idea; not sure
how much opportunity is actually here).
Differential Revision: https://reviews.llvm.org/D31863
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300067
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Dmitry Preobrazhensky [Wed, 12 Apr 2017 14:29:45 +0000 (14:29 +0000)]
[AMDGPU][MC] Corrected ds_wrxchg2* to support two offsets
Fixed bug 28227: https://bugs.llvm.org//show_bug.cgi?id=28227
Reviewers: vpykhtin
Differential Revision: https://reviews.llvm.org/D31808
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300066
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Jonas Paulsson [Wed, 12 Apr 2017 14:25:08 +0000 (14:25 +0000)]
Fix a RUN line in new test.
Use '2>&1 |' and not '|&' to pipe debug output to FileCheck
Hopefully handles a "shell parser error" on
llvm-clang-x86_64-expensive-checks-win
test/Transforms/SLPVectorizer/SystemZ/SLP-cmp-cost-query.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300064
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Serge Pavlov [Wed, 12 Apr 2017 14:13:00 +0000 (14:13 +0000)]
Remove redundant type casts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300063
91177308-0d34-0410-b5e6-
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Ed Maste [Wed, 12 Apr 2017 13:51:00 +0000 (13:51 +0000)]
Fix detection of backtrace() availability on FreeBSD
On FreeBSD backtrace is not part of libc and depends on libexecinfo
being available. Instead of using manual checks we can use the builtin
CMake module FindBacktrace.cmake to detect availability of backtrace()
in a portable way.
Patch By: Alex Richardson
Differential Revision: https://reviews.llvm.org/D27143
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300062
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Jonas Paulsson [Wed, 12 Apr 2017 13:29:25 +0000 (13:29 +0000)]
[SLPVectorizer] Pass the right type argument to getCmpSelInstrCost()
In getEntryCost(), make the scalar type for a compare instruction that of the
operands, not i1. This is needed in order to call getCmpSelInstrCost() for a
compare in a sensible way, the same way as the LoopVectorizer does.
New test: test/Transforms/SLPVectorizer/SystemZ/SLP-cmp-cost-query.ll
Review: Matthew Simpson
https://reviews.llvm.org/D31601
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300061
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Benjamin Kramer [Wed, 12 Apr 2017 13:26:31 +0000 (13:26 +0000)]
[MachineBlockPlacment] Add an assert to ensure there is no order dependency on DenseMap iteration order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300060
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Benjamin Kramer [Wed, 12 Apr 2017 13:26:28 +0000 (13:26 +0000)]
[MachineBlockPlacement] Clean up data structures a bit.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300059
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Jonas Paulsson [Wed, 12 Apr 2017 13:13:15 +0000 (13:13 +0000)]
[LoopVectorizer] Improve handling of branches during cost estimation.
The cost for a branch after vectorization is very different depending on if
the vectorizer will if-convert the block (branch is eliminated), or if
scalarized and predicated blocks will be produced (branch duplicated before
each block). There is also the case of remaining scalar branches, such as the
back-edge branch.
This patch handles these cases differently with TTI based cost estimates.
Review: Matthew Simpson
https://reviews.llvm.org/D31175
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300058
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Igor Breger [Wed, 12 Apr 2017 12:54:54 +0000 (12:54 +0000)]
[GlobalIsel][X86] support G_CONSTANT selection.
Summary: [GlobalISel][X86] support G_CONSTANT selection. Add regbank select tests.
Reviewers: zvi, guyblank
Reviewed By: guyblank
Subscribers: llvm-commits, dberris, rovka, kristof.beyls
Differential Revision: https://reviews.llvm.org/D31974
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300057
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Jonas Paulsson [Wed, 12 Apr 2017 12:41:37 +0000 (12:41 +0000)]
[LoopVectorizer, TTI] New method supportsEfficientVectorElementLoadStore()
Since SystemZ supports vector element load/store instructions, there is no
need for extracts/inserts if a vector load/store gets scalarized.
This patch lets Target specify that it supports such instructions by means of
a new TTI hook that defaults to false.
The use for this is in the LoopVectorizer getScalarizationOverhead() method,
which will with this patch produce a smaller sum for a vector load/store on
SystemZ.
New test: test/Transforms/LoopVectorize/SystemZ/load-store-scalarization-cost.ll
Review: Adam Nemet
https://reviews.llvm.org/D30680
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300056
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Dmitry Preobrazhensky [Wed, 12 Apr 2017 12:40:19 +0000 (12:40 +0000)]
[AMDGPU][MC] Corrected src0 size for s_cbranch_join
Fix for bug 28159: https://bugs.llvm.org//show_bug.cgi?id=28159
Reviewers: vpykhtin, arsenm
Differential Revision: https://reviews.llvm.org/D31595
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300055
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Jonas Paulsson [Wed, 12 Apr 2017 12:11:41 +0000 (12:11 +0000)]
[SystemZ] Updated test fp-cast.ll
This did not get included in the previous commit for SystemZ cost functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300053
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Jonas Paulsson [Wed, 12 Apr 2017 11:49:08 +0000 (11:49 +0000)]
[SystemZ] TargetTransformInfo cost functions implemented.
getArithmeticInstrCost(), getShuffleCost(), getCastInstrCost(),
getCmpSelInstrCost(), getVectorInstrCost(), getMemoryOpCost(),
getInterleavedMemoryOpCost() implemented.
Interleaved access vectorization enabled.
BasicTTIImpl::getCastInstrCost() improved to check for legal extending loads,
in which case the cost of the z/sext instruction becomes 0.
Review: Ulrich Weigand, Renato Golin.
https://reviews.llvm.org/D29631
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300052
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Krasimir Georgiev [Wed, 12 Apr 2017 11:33:26 +0000 (11:33 +0000)]
[DWARF] Fix compiler warnings in DWARFContext.cpp, NFCi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300051
91177308-0d34-0410-b5e6-
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Piotr Padlewski [Wed, 12 Apr 2017 11:18:19 +0000 (11:18 +0000)]
[LangRef] fix documentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300050
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Sam Kolton [Wed, 12 Apr 2017 09:36:05 +0000 (09:36 +0000)]
[AMDGPU] SDWA: make pass global
Summary: Remove checks for basic blocks.
Reviewers: vpykhtin, rampitec, arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye
Differential Revision: https://reviews.llvm.org/D31935
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300040
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George Rimar [Wed, 12 Apr 2017 08:59:15 +0000 (08:59 +0000)]
[DWARF] - Refactoring of DWARFContextInMemory implementation.
This change is basically relative to D31136, where I initially wanted to
implement some relocations handling optimization which shows it can give
significant boost. Though even without any caching algorithm looks
code can have some cleanup at first.
Refactoring separates out code for taking symbol address, used in relocations
computation.
Differential revision: https://reviews.llvm.org/D31747
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300039
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Chandler Carruth [Wed, 12 Apr 2017 08:48:39 +0000 (08:48 +0000)]
[IR] Rename the class templates for the case iterator and case handle to
not collide with the naming convention for template *arguments*. In at
least one case they actually collided and this confuses MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300038
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Daniel Sanders [Wed, 12 Apr 2017 08:23:08 +0000 (08:23 +0000)]
[globalisel][tablegen] Add experimental support for OperandWithDefaultOps, PredicateOperand, and OptionalDefOperand
Summary:
As far as instruction selection is concerned, all three appear to be same thing.
Support for these operands is experimental since AArch64 doesn't make use
of them and the in-tree targets that do use them (AMDGPU for
OperandWithDefaultOps, AMDGPU/ARM/Hexagon/Lanai for PredicateOperand, and ARM
for OperandWithDefaultOps) are not using tablegen-erated GlobalISel yet.
Reviewers: rovka, aditya_nandakumar, t.p.northover, qcolombet, ab
Reviewed By: rovka
Subscribers: inglorion, aemerson, rengolin, mehdi_amini, dberris, kristof.beyls, igorb, tpr, llvm-commits
Differential Revision: https://reviews.llvm.org/D31135
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300037
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Bjorn Pettersson [Wed, 12 Apr 2017 08:07:55 +0000 (08:07 +0000)]
[LoadCombine] Avoid analysing dead basic blocks
Summary:
Dead basic blocks may be forming a loop, for which SSA form is
fulfilled, but with a circular def-use chain. LoadCombine could
enter an infinite loop when analysing such dead code. This patch
solves the problem by simply avoiding to analyse all basic blocks
that aren't forward reachable, from function entry, in LoadCombine.
Fixes https://bugs.llvm.org/show_bug.cgi?id=27065
Reviewers: mehdi_amini, chandlerc, grosser, Bigcheese, davide
Reviewed By: davide
Subscribers: dberlin, zzheng, bjope, grandinj, Ka-Ka, materi, jholewinski, llvm-commits, mzolotukhin
Differential Revision: https://reviews.llvm.org/D31032
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300034
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Piotr Padlewski [Wed, 12 Apr 2017 07:59:35 +0000 (07:59 +0000)]
Invariant.group and mustalias docs fixes
Summary:
Alias analysis would like to know that
invariant.group.barrier returns pointer that mustalias,
but this can't imply that we can replace one pointer with another
Reviewers: dberlin, sanjoy
Subscribers: llvm-commits, chandlerc, hfinkel, nlewycky, amharc
Differential Revision: https://reviews.llvm.org/D31758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300033
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Chandler Carruth [Wed, 12 Apr 2017 07:27:28 +0000 (07:27 +0000)]
[IR] Redesign the case iterator in SwitchInst to actually be an iterator
and to expose a handle to represent the actual case rather than having
the iterator return a reference to itself.
All of this allows the iterator to be used with common STL facilities,
standard algorithms, etc.
Doing this exposed some missing facilities in the iterator facade that
I've fixed and required some work to the actual iterator to fully
support the necessary API.
Differential Revision: https://reviews.llvm.org/D31548
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300032
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Craig Topper [Wed, 12 Apr 2017 05:57:46 +0000 (05:57 +0000)]
[IR] Fix copy and paste mistake in comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300031
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Craig Topper [Wed, 12 Apr 2017 05:49:28 +0000 (05:49 +0000)]
[InstCombine][IR] Add a commutable BinOp matcher. Use it to reduce some code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300030
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Serguei Katkov [Wed, 12 Apr 2017 05:42:14 +0000 (05:42 +0000)]
[BPI] Refactor post domination calculation and simple fix for ColdCall
Collection of PostDominatedByUnreachable and PostDominatedByColdCall have been
split out of heuristics itself. Update of the data happens now for each basic
block (before update for PostDominatedByColdCall might be skipped if
unreachable or matadata heuristic handled this basic block).
This separation allows re-ordering of heuristics without loosing
the post-domination information.
Reviewers: sanjoy, junbuml, vsk, chandlerc, reames
Reviewed By: chandlerc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31701
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300029
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Serguei Katkov [Wed, 12 Apr 2017 04:41:35 +0000 (04:41 +0000)]
[INC] Test commit. NFC.
Just an update of comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300026
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Kannan Narayanan [Wed, 12 Apr 2017 03:25:12 +0000 (03:25 +0000)]
[AMDGPU] Add a new pass to insert waitcnts. Leave under an option for testing.
Based on comments in https://reviews.llvm.org/D31161.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300023
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Kyle Butt [Wed, 12 Apr 2017 03:18:20 +0000 (03:18 +0000)]
CodeGen: BlockPlacement: Clear ComputedEdges between functions.
Not clearing was causing non-deterministic compiles for large files. Addresses
for MachineBasicBlocks would end up colliding and we would lay out a block that
we assumed had been pre-computed when it had not been.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300022
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Bob Haarman [Wed, 12 Apr 2017 01:43:07 +0000 (01:43 +0000)]
ThinLTOBitcodeWriter: keep comdats together, rename if leader is renamed
Summary:
COFF requires that every comdat contain a symbol with the same name as
the comdat. ThinLTOBitcodeWriter renames symbols, which may cause this
requirement to be violated. This change avoids such violations by
renaming comdats if their leaders are renamed. It also keeps comdats
together when splitting modules.
Reviewers: pcc, mehdi_amini, tejohnson
Reviewed By: pcc
Subscribers: rnk, Prazek, llvm-commits
Differential Revision: https://reviews.llvm.org/D31963
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300019
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Derek Schuff [Wed, 12 Apr 2017 01:17:31 +0000 (01:17 +0000)]
Revert "[WebAssembly] Update use of Attributes after r299875"
This reverts commit
2a0eb61dcccb15058d5b2a572bb3da0cf47fd550, r300015
I raced with rnk on the commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300016
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Derek Schuff [Wed, 12 Apr 2017 01:09:34 +0000 (01:09 +0000)]
[WebAssembly] Update use of Attributes after r299875
This fixes the failing WebAssemblyLowerEmscriptenEHSjLj tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300015
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Reid Kleckner [Wed, 12 Apr 2017 00:38:00 +0000 (00:38 +0000)]
[IR] Add AttributeSet to hide AttributeSetNode* again, NFC
Summary:
For now, it just wraps AttributeSetNode*. Eventually, it will hold
AvailableAttrs as an inline bitset, and adding and removing enum
attributes will be super cheap.
This sinks AttributeSetNode back down to lib/IR/AttributeImpl.h.
Reviewers: pete, chandlerc
Subscribers: llvm-commits, jfb
Differential Revision: https://reviews.llvm.org/D31940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300014
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Yi Kong [Tue, 11 Apr 2017 22:39:55 +0000 (22:39 +0000)]
Remove xgene1 from host detection
This is not a supported mcpu tuning option. We should treat it as
"generic" variant.
Also, add record for cortex-a35.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300003
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Matt Arsenault [Tue, 11 Apr 2017 22:29:31 +0000 (22:29 +0000)]
AMDGPU: Insert wait at start of callee functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300000
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Matt Arsenault [Tue, 11 Apr 2017 22:29:28 +0000 (22:29 +0000)]
AMDGPU: Refactor SIMachineFunctionInfo slightly
Prepare for handling non-entry functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299999
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Matt Arsenault [Tue, 11 Apr 2017 22:29:24 +0000 (22:29 +0000)]
AMDGPU: Refactor argument lowering
Split into smaller functions and prepare for handling
non-entry functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299998
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Matt Arsenault [Tue, 11 Apr 2017 22:29:19 +0000 (22:29 +0000)]
AMDGPU: Fix folding reg_sequence into copy to phys reg
This was producing an illegal reg_sequence defining
a physical register with virtual register inputs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299997
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Matt Arsenault [Tue, 11 Apr 2017 22:29:16 +0000 (22:29 +0000)]
AMDGPU: Prune unecessary include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299996
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Evgeniy Stepanov [Tue, 11 Apr 2017 22:28:13 +0000 (22:28 +0000)]
[asan] Give global metadata private linkage.
Internal linkage preserves names like "__asan_global_foo" which may
account to 2% of unstripped binary size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299995
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Balaram Makam [Tue, 11 Apr 2017 22:14:10 +0000 (22:14 +0000)]
[AArch64] Fix scheduling info for INS(vector, general) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299994
91177308-0d34-0410-b5e6-
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Vedant Kumar [Tue, 11 Apr 2017 22:11:46 +0000 (22:11 +0000)]
Avoid some string copies, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299993
91177308-0d34-0410-b5e6-
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Andrew Kaylor [Tue, 11 Apr 2017 21:52:40 +0000 (21:52 +0000)]
Minor updates to floating point intrinsic documentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299991
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Zvi Rackover [Tue, 11 Apr 2017 21:37:02 +0000 (21:37 +0000)]
InstSimplify: A shuffle of a splat is always the splat itself
Summary:
Fold:
shuffle (splat-shuffle), undef, M --> splat-shuffle
Reviewers: spatel, RKSimon, craig.topper
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31527
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299990
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Zvi Rackover [Tue, 11 Apr 2017 21:16:59 +0000 (21:16 +0000)]
[DAGCombine] Add more test cases for shuffle of splat. NFC.
Tests added contain splat-masks with undef elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299988
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Easwaran Raman [Tue, 11 Apr 2017 21:05:02 +0000 (21:05 +0000)]
[x86] Relax the check in areLoadsFromSameBasePtr
Check if the scale operand is identical (doesn't have to be 1) and
do not check the chaain operand.
Differential revision: https://reviews.llvm.org/D31833
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299986
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Anna Thomas [Tue, 11 Apr 2017 21:02:00 +0000 (21:02 +0000)]
[LV] Avoid vectorizing first order recurrence when phi uses are outside loop
In the vectorization of first order recurrence, we vectorize such
that the last element in the vector will be the one extracted to pass into the
scalar remainder loop. However, this is not true when there is a phi (other
than the primary induction variable) is used outside the loop.
In such a case, we need the value from the second last iteration (i.e.
the phi value), not the last iteration (which would be the phi update).
I've added a test case for this. Also see PR32396.
A follow up patch would generate the correct code gen for such cases,
and turn this vectorization on.
Differential Revision: https://reviews.llvm.org/D31910
Reviewers: mssimpso
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299985
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Sanjay Patel [Tue, 11 Apr 2017 20:54:57 +0000 (20:54 +0000)]
[InstSimplify] add tests for chains of shuffles; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299984
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Daniel Berlin [Tue, 11 Apr 2017 20:06:36 +0000 (20:06 +0000)]
MemorySSA: Move to Analysis, from Transforms/Utils. It's used as
Analysis, it has Analysis passes, and once NewGVN is made an Analysis,
this removes the cross dependency from Analysis to Transform/Utils.
NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299980
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Justin Bogner [Tue, 11 Apr 2017 19:32:41 +0000 (19:32 +0000)]
MIR: Allow parsing of empty machine functions
If you run llc -stop-after=codegenprepare and feed the resulting MIR
to llc -start-after=codegenprepare, you'll have an empty machine
function since we haven't run any isel yet. Of course, this only works
if the MIRParser believes you that this is okay.
This is essentially a revert of r241862 with a fix for the problem it
was papering over.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299975
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Evandro Menezes [Tue, 11 Apr 2017 19:13:11 +0000 (19:13 +0000)]
[AArch64] Simplify MacroFusion
This patch assumes that the dependents to be scanned for the ExitSU are its
predecessors; otherwise, the successors of the instr are scanned.
Furthermore, sometimes the ExitSU was being fused twice, since it may be
fused once when scanning the successors from the beginning of the BB and
then again when scanning the predecessors of ExitSU. Thus, when scanning
the successors of an instr, skip the ExitSU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299974
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Davide Italiano [Tue, 11 Apr 2017 19:11:20 +0000 (19:11 +0000)]
[X86] Create the correct ADC/SBB SDNode when lowering add.
Differential Revision: https://reviews.llvm.org/D31911
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299973
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Andrea Di Biagio [Tue, 11 Apr 2017 19:07:30 +0000 (19:07 +0000)]
[AddDiscriminators] Assign discriminators to MemIntrinsic calls.
Before this patch, pass AddDiscriminators always avoided to assign
discriminators to intrinsic calls. This was done mainly for two reasons:
1) We wanted to minimize the number of based discriminators used.
2) We wanted to avoid non-deterministic discriminator assignment for
different debug levels.
Unfortunately, that approach was problematic for MemIntrinsic calls.
MemIntrinsic calls can be split by SROA into loads and stores, and each new
load/store instruction would obtain the debug location from the original
intrinsic call.
If we don't assign a discriminator to MemIntrinsic calls, then we cannot
correctly set the discriminator for the newly created loads and stores.
This may have a negative impact on the basic block weight computation
performed by the SampleLoader.
This patch fixes the issue by letting MemIntrinsic calls have a discriminator.
Differential Revision: https://reviews.llvm.org/D31900
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299972
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96231b3b80d8
Craig Topper [Tue, 11 Apr 2017 18:50:48 +0000 (18:50 +0000)]
[InstCombine] Add testcases for (B&A)^A -> ~B & A and (B|A)^A -> B & ~A
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299971
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 11 Apr 2017 18:47:58 +0000 (18:47 +0000)]
Fix spelling compliment->complement. Mostly refering to 2s complement. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299970
91177308-0d34-0410-b5e6-
96231b3b80d8