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Sam Parker [Wed, 3 Jul 2019 14:39:23 +0000 (14:39 +0000)]
[ARM] Fix for NDEBUG builds
Fix unused variable warning as well as a nonsense assert.
Differential Revision: https://reviews.llvm.org/D63816
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365046
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Simon Pilgrim [Wed, 3 Jul 2019 14:34:16 +0000 (14:34 +0000)]
[X86][AVX] Combine vpermi(bitcast(x)) -> bitcast(vpermi(x))
iff the number of elements doesn't change.
This gets around an issue with combineX86ShuffleChain not being able to hint which domain is preferred for shuffles that can be done with either.
Fixes regression introduced in rL365041
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365044
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James Molloy [Wed, 3 Jul 2019 14:33:29 +0000 (14:33 +0000)]
[SelectionDAG] Propagate alias metadata to target intrinsic nodes
When a target intrinsic has been determined to touch memory, we construct a MachineMemOperand during SDAG construction. In this case, we should propagate AAMDNodes metadata to the MachineMemOperand where available.
Differential revision: https://reviews.llvm.org/D64131
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365043
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James Henderson [Wed, 3 Jul 2019 14:21:48 +0000 (14:21 +0000)]
[docs][llvm-objcopy] Write documentation for llvm-objcopy
This patch addresses https://bugs.llvm.org/show_bug.cgi?id=42183 by replacing
the stub markdown doc for llvm-objcopy with a full one describing the current
options available in llvm-objcopy.
Reviewed by: jakehehrlich, MaskRay
Differential Revision: https://reviews.llvm.org/D63820
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365042
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Simon Pilgrim [Wed, 3 Jul 2019 14:17:21 +0000 (14:17 +0000)]
[X86][AVX] combineX86ShuffleChainWithExtract - add number of non-zero extract_subvectors to the combine depth
This better accounts for the cost/benefit of removing extract_subvectors from the shuffle and will be more useful in future patches.
The vpermq predicate regression will be fixed shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365041
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Eugene Leviant [Wed, 3 Jul 2019 14:14:52 +0000 (14:14 +0000)]
[ThinLTO] Optimize writeonly globals out
Differential revision: https://reviews.llvm.org/D63444
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365040
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Owen Reynolds [Wed, 3 Jul 2019 13:47:29 +0000 (13:47 +0000)]
[llvm-ar][test] Add to MRI test coverage
This reapplies 363232 that was reverted due to a buildbot test failure, this build bot has now been fixed.
Differential Revision: https://reviews.llvm.org/D63197
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365039
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Simon Atanasyan [Wed, 3 Jul 2019 12:28:05 +0000 (12:28 +0000)]
[mips] Mark general scheduling model as complete
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365034
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Simon Atanasyan [Wed, 3 Jul 2019 12:27:58 +0000 (12:27 +0000)]
[mips] Add missing atomic instructions to general scheduling definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365033
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Simon Atanasyan [Wed, 3 Jul 2019 12:27:51 +0000 (12:27 +0000)]
[mips] Add missing microMIPS instructions to general scheduling definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365032
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Simon Pilgrim [Wed, 3 Jul 2019 11:23:27 +0000 (11:23 +0000)]
[X86][SSE] lowerUINT_TO_FP_v2i32 - explicitly cast half word to double
Fixes MSVC analyzer extension->double warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365027
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Simon Pilgrim [Wed, 3 Jul 2019 10:59:52 +0000 (10:59 +0000)]
[X86][SSE] LowerINSERT_VECTOR_ELT - ensure insertion index correctness. NFCI.
Assert that the insertion index is in range and use uint64_t for the index to fix MSVC/cppcheck truncation warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365025
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Simon Pilgrim [Wed, 3 Jul 2019 10:47:33 +0000 (10:47 +0000)]
[X86][SSE] LowerScalarImmediateShift - ensure shift amount correctness. NFCI.
Assert that the shift amount is in range and create vXi8 shift masks in a way that doesn't cause MSVC/cppcheck shift result is truncated then extended warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365024
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Simon Atanasyan [Wed, 3 Jul 2019 10:33:16 +0000 (10:33 +0000)]
[mips] Add SIGRIE,GINVI,GINVT to general scheduling definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365023
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Simon Atanasyan [Wed, 3 Jul 2019 10:33:09 +0000 (10:33 +0000)]
[mips] Add missing mips16 instructions to general scheduling definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365022
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Simon Atanasyan [Wed, 3 Jul 2019 10:33:01 +0000 (10:33 +0000)]
[mips] Add missing MSA and ASE instructions to general scheduling definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365021
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Simon Atanasyan [Wed, 3 Jul 2019 10:32:54 +0000 (10:32 +0000)]
[mips] Replace some itineraries by instructions in the general scheduling definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365020
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Simon Pilgrim [Wed, 3 Jul 2019 10:22:08 +0000 (10:22 +0000)]
Fix uninitialized variable warnings. NFCI.
Both MSVC and cppcheck don't like the fact that the variables are initialized via references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365018
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Simon Pilgrim [Wed, 3 Jul 2019 10:04:16 +0000 (10:04 +0000)]
[X86] LowerFunnelShift - use modulo constant shift amount.
This avoids the use of getZExtValue and uses the modulo shift amount which is whats expected for funnel shifts anyhow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365016
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Oliver Stannard [Wed, 3 Jul 2019 09:58:52 +0000 (09:58 +0000)]
[ARM] Thumb2: favor R4-R7 over R12/LR in allocation order when opt for minsize
For Thumb2, we prefer low regs (costPerUse = 0) to allow narrow
encoding. However, current allocation order is like:
R0-R3, R12, LR, R4-R11
As a result, a lot of instructs that use R12/LR will be wide instrs.
This patch changes the allocation order to:
R0-R7, R12, LR, R8-R11
for thumb2 and -Osize.
In most cases, there is no extra push/pop instrs as they will be folded
into existing ones. There might be slight performance impact due to more
stack usage, so we only enable it when opt for min size.
https://reviews.llvm.org/D30324
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365014
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Sven van Haastregt [Wed, 3 Jul 2019 09:57:59 +0000 (09:57 +0000)]
Remove some autoconf references from docs and comments
The autoconf build system support has been removed a while ago, remove
some outdated references.
Differential Revision: https://reviews.llvm.org/D63608
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365013
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Roman Lebedev [Wed, 3 Jul 2019 09:41:50 +0000 (09:41 +0000)]
[InstCombine] Y - ~X --> X + Y + 1 fold (PR42457)
Summary:
I *think* we'd want this new variant, because we obviously
have better handling for `add` as compared to `sub`/`not`.
https://rise4fun.com/Alive/WMn
Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=42457 | PR42457 ]]
Reviewers: spatel, nikic, huihuiz, efriedma
Reviewed By: spatel
Subscribers: RKSimon, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63992
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365011
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Roman Lebedev [Wed, 3 Jul 2019 09:41:35 +0000 (09:41 +0000)]
[Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)
Summary:
This is the backend part of [[ https://bugs.llvm.org/show_bug.cgi?id=42457 | PR42457 ]].
In middle-end, we'd want to prefer the form with two adds - D63992,
but as this diff shows, not every target will prefer that pattern.
Out of 4 targets for which i added tests all seem to be ok with inc-of-add for scalars,
but only X86 prefer that same pattern for vectors.
Here i'm adding a new TLI hook, always defaulting to the inc-of-add,
but adding AArch64,ARM,PowerPC overrides to prefer inc-of-add only for scalars.
Reviewers: spatel, RKSimon, efriedma, t.p.northover, hfinkel
Reviewed By: efriedma
Subscribers: nemanjai, javed.absar, kristof.beyls, kbarton, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64090
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365010
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Eugene Leviant [Wed, 3 Jul 2019 09:36:32 +0000 (09:36 +0000)]
[SCEV][LSR] Prevent using undefined value in binops
On some occasions ReuseOrCreateCast may convert previously
expanded value to undefined. That value may be passed by
SCEVExpander as an argument to InsertBinop making IV chain
undefined.
Differential revision: https://reviews.llvm.org/D63928
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365009
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Alexander Potapenko [Wed, 3 Jul 2019 09:28:50 +0000 (09:28 +0000)]
MSan: handle callbr instructions
Summary:
Handling callbr is very similar to handling an inline assembly call:
MSan must checks the instruction's inputs.
callbr doesn't (yet) have outputs, so there's nothing to unpoison,
and conservative assembly handling doesn't apply either.
Fixes PR42479.
Reviewers: eugenis
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64072
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365008
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Serguei Katkov [Wed, 3 Jul 2019 05:59:23 +0000 (05:59 +0000)]
[LoopPeel] Re-factor llvm::peelLoop method. NFC.
Extract code dealing with branch weights in separate functions.
Reviewers: reames, mkuper, iajbar, fhahn
Reviewed By: reames, fhahn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D63917
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365002
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Jordan Rupprecht [Wed, 3 Jul 2019 04:01:51 +0000 (04:01 +0000)]
Revert [InlineCost] cleanup calculations of Cost and Threshold
This reverts r364422 (git commit
1a3dc761860d620ac8ed7e32a4285952142f780b)
The inlining cost calculation is incorrect, leading to stack overflow due to large stack frames from heavy inlining.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365000
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Teresa Johnson [Wed, 3 Jul 2019 02:14:47 +0000 (02:14 +0000)]
[ThinLTO] Reenable test with workaround for known failure
Reenable the testing disabled in r364978 with the same workaround used
for this failure in the cfi-devirt.ll test. The known issue is PR39436,
and the workaround is to add -verify-machineinstrs=0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364997
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Michael Liao [Wed, 3 Jul 2019 02:00:21 +0000 (02:00 +0000)]
[AMDGPU] Enable serializing of argument info.
Summary:
- Support serialization of all arguments in machine function info. This
enables fabricating MIR tests depending on argument info.
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64096
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364995
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Amara Emerson [Wed, 3 Jul 2019 01:49:06 +0000 (01:49 +0000)]
[AArch64][GlobalISel] Overhaul legalization & isel or shifts to select immediate forms.
There are two main issues preventing us from generating immediate form shifts:
1) We have partial SelectionDAG imported support for G_ASHR and G_LSHR shift
immediate forms, but they currently don't work because the amount type is
expected to be an s64 constant, but we only legalize them to have homogenous
types.
To deal with this, first we introduce a custom legalizer to *only* custom legalize
s32 shifts which have a constant operand into a s64.
There is also an additional artifact combiner to fold zexts(g_constant) to a
larger G_CONSTANT if it's legal, a counterpart to the anyext version committed
in an earlier patch.
2) For G_SHL the importer can't cope with the pattern. For this I introduced an
early selection phase in the arm64 selector to select these forms manually
before the tablegen selector pessimizes it to a register-register variant.
Differential Revision: https://reviews.llvm.org/D63910
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364994
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Chen Zheng [Wed, 3 Jul 2019 01:49:03 +0000 (01:49 +0000)]
[PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop.
Differential Revision: https://reviews.llvm.org/D63477
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364993
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Alex Lorenz [Wed, 3 Jul 2019 01:02:43 +0000 (01:02 +0000)]
[triple] Use 'macabi' environment name for the Mac Catalyst triples
The 'macabi' environment name is preferred instead of 'maccatalyst'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364988
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Nilanjana Basu [Wed, 3 Jul 2019 00:51:49 +0000 (00:51 +0000)]
Revert Changing CodeView debug info type record representation in assembly files to make it more human-readable & editable
This reverts r364982 (git commit
2082bf28ebea76cc187b508f801122866420d9ff)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364987
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Jonas Devlieghere [Wed, 3 Jul 2019 00:45:53 +0000 (00:45 +0000)]
[VFS] Add reverse iterator to OverlayFileSystem
Add a reverse iterator to the overlay file system. This makes it
possible to take overlays from one OverlayFileSystem, and add them to
another.
Differential revision: https://reviews.llvm.org/D64113
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364986
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Guanzhong Chen [Wed, 3 Jul 2019 00:37:49 +0000 (00:37 +0000)]
[WebAssembly] Prevent inline assembly from being mangled by SjLj
Summary:
Before, inline assembly gets mangled by the SjLj transformation.
For example, in a function with setjmp/longjmp, this LLVM IR code
call void asm sideeffect "", ""()
would be transformed into
call void @__invoke_void(void ()* asm sideeffect "", "")
This is invalid, and results in the error:
Cannot take the address of an inline asm!
In this diff, we skip the transformation for inline assembly.
Reviewers: aheejin, tlively
Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64115
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364985
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Matt Arsenault [Wed, 3 Jul 2019 00:30:47 +0000 (00:30 +0000)]
CodeGen: Set hasSideEffects = 0 on BUNDLE
The BUNDLE itself should not have side effects, and this is a property
of instructions inside the bundle. The hasProperty check already
searches for any member instructions, which was pointless since it was
overridden by this bit.
Allows me to distinguish bundles that have side effects vs. do not in
a future patch. Also fixes an unnecessary scheduling barrier in the
bundle AMDGPU uses to get PC relative addresses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364984
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Matt Arsenault [Wed, 3 Jul 2019 00:30:44 +0000 (00:30 +0000)]
AMDGPU: Look through bundles for existing waitcnts
These aren't produced now, but will be in a future patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364983
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Nilanjana Basu [Wed, 3 Jul 2019 00:26:23 +0000 (00:26 +0000)]
Changing CodeView debug info type record representation in assembly files to make it more human-readable & editable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364982
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Alex Lorenz [Tue, 2 Jul 2019 23:47:11 +0000 (23:47 +0000)]
Add support for the 'macCatalyst' MachO platform
Mac Catalyst is a new MachO platform in macOS Catalina.
It always uses the build_version MachO load command.
Differential Revision: https://reviews.llvm.org/D64107
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364981
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Teresa Johnson [Tue, 2 Jul 2019 23:28:28 +0000 (23:28 +0000)]
[ThinLTO] Work around existing failure exposed by new test
When adding summary entries for index-based WPD (r364960), an added
test also included some additional testing of the existing hybrid
Thin/Regular LTO WPD (test/ThinLTO/X86/devirt.ll). That part of the
test is producing a failure on the llvm-clang-x86_64-expensive-checks-win
bot:
*** Bad machine code: Explicit definition marked as use ***
- function: __typeid__ZTS1A_0_branch_funnel
- basic block: %bb.0 (0x81d4c58)
- instruction: ICALL_BRANCH_FUNNEL %0:gr64, @0, 16, @_ZN1B1fEi, 48, @_ZN1C1fEi
- operand 0: %0:gr64
LLVM ERROR: Found 1 machine code errors.
This is functionality unrelated to the summary entries added with my
patch, so I am disabling this part of the new test until it is
addressed. I'll continue to investigate the failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364978
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Craig Topper [Tue, 2 Jul 2019 23:20:03 +0000 (23:20 +0000)]
[X86] Add a DAG combine for turning *_extend_vector_inreg+load into an appropriate extload if the load isn't volatile.
Remove the corresponding isel patterns that did the same thing without checking for volatile.
This fixes another variation of PR42079
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364977
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Teresa Johnson [Tue, 2 Jul 2019 22:06:02 +0000 (22:06 +0000)]
[ThinLTO] Dump input on failure in devirt test
To help track down bug exposed by llvm-clang-x86_64-expensive-checks-win
bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364973
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Alex Lorenz [Tue, 2 Jul 2019 21:37:00 +0000 (21:37 +0000)]
[triple] add 'macCatalyst' environment type
Mac Catalyst is a new deployment platform in macOS Catalina.
Differential Revision: https://reviews.llvm.org/D64097
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364971
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Eli Friedman [Tue, 2 Jul 2019 21:35:15 +0000 (21:35 +0000)]
[ARM] Fix unwind info for Thumb1 functions that save high registers.
There were two issues here: one, some of the relevant instructions were
missing the expected "FrameSetup" flag, and two,
ARMAsmPrinter::EmitUnwindingInstruction wasn't expecting "mov"
instructions in the prologue.
I'm sticking the additional state into ARMFunctionInfo so it's obvious
it only applies to the current function.
I considered a few alternative approaches where we would compute the
correct unwind information as part of the prologue/epilogue lowering,
but it seems like a lot of work to introduce pseudo-instructions, and
the current code seems to be reliable enough.
Fixes https://bugs.llvm.org/show_bug.cgi?id=42408.
Differential Revision: https://reviews.llvm.org/D63964
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364970
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David Bolvansky [Tue, 2 Jul 2019 21:16:34 +0000 (21:16 +0000)]
[NFC] Strenghten isInteger condition for rL364940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364969
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Teresa Johnson [Tue, 2 Jul 2019 21:07:45 +0000 (21:07 +0000)]
[ThinLTO] Address post-review suggestions for index-based WPD summary
Removes a couple of unnecessary and/or redundant checks introduced by
r364960.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364968
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Teresa Johnson [Tue, 2 Jul 2019 20:24:00 +0000 (20:24 +0000)]
[gold] Fix test after BitStream reader error changes
The recent change to the BitStream reader error handling in r364464
changed the error message format (from "LLVM ERROR:" to just "error"),
leading to a failure in this test which is only executed for very recent
versions of gold. Fix this by removing that part of the error message
check, leaving only the interesting part of the message to be checked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364965
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Vasileios Porpodas [Tue, 2 Jul 2019 20:20:28 +0000 (20:20 +0000)]
[SLP] Recommit: Look-ahead operand reordering heuristic.
Summary: This patch introduces a new heuristic for guiding operand reordering. The new "look-ahead" heuristic can look beyond the immediate predecessors. This helps break ties when the immediate predecessors have identical opcodes (see lit test for an example).
Reviewers: RKSimon, ABataev, dtemirbulatov, Ayal, hfinkel, rnk
Reviewed By: RKSimon, dtemirbulatov
Subscribers: hiraditya, phosek, rnk, rcorcs, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60897
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364964
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Jessica Paquette [Tue, 2 Jul 2019 19:44:16 +0000 (19:44 +0000)]
[AArch64][GlobalISel] Teach tryOptSelect to handle G_ICMP
This teaches `tryOptSelect` to handle folding G_ICMP, and removes the
requirement that the G_SELECT we're dealing with is floating point.
Some refactoring to make this work nicely as well:
- Factor out the scalar case from the selection code for G_ICMP into
`emitIntegerCompare`.
- Make `tryOptCMN` return a MachineInstr* instead of a bool.
- Make `tryOptCMN` not modify the instruction being selected.
- Factor out the CMN emission into `emitCMN` for readability.
By doing this this way, we can get all of the compare selection optimizations
in select emission.
Differential Revision: https://reviews.llvm.org/D64084
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364961
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Teresa Johnson [Tue, 2 Jul 2019 19:38:02 +0000 (19:38 +0000)]
[ThinLTO] Add summary entries for index-based WPD
Summary:
If LTOUnit splitting is disabled, the module summary analysis computes
the summary information necessary to perform single implementation
devirtualization during the thin link with the index and no IR. The
information collected from the regular LTO IR in the current hybrid WPD
algorithm is summarized, including:
1) For vtable definitions, record the function pointers and their offset
within the vtable initializer (subsumes the information collected from
IR by tryFindVirtualCallTargets).
2) A record for each type metadata summarizing the vtable definitions
decorated with that metadata (subsumes the TypeIdentiferMap collected
from IR).
Also added are the necessary bitcode records, and the corresponding
assembly support.
The follow-on index-based WPD patch is D55153.
Depends on D53890.
Reviewers: pcc
Subscribers: mehdi_amini, Prazek, inglorion, eraman, steven_wu, dexonsmith, arphaman, llvm-commits
Differential Revision: https://reviews.llvm.org/D54815
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364960
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Matt Arsenault [Tue, 2 Jul 2019 19:15:45 +0000 (19:15 +0000)]
AMDGPU: Custom lower vector_shuffle for v4i16/v4f16
Ordinarily it is lowered as a build_vector of each extract_vector_elt,
which in turn get lowered to bitcasts and bit shifts. Very little
understand the lowered extract pattern, resulting in much worse
code. We treat concat_vectors of v2i16 as legal, so prefer that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364959
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Teresa Johnson [Tue, 2 Jul 2019 18:54:03 +0000 (18:54 +0000)]
[RA] Fix spelling of Greedy register allocator internal option
The internal option added with r323870 has a typo. It isn't being used
by any tests, but I decided to fix the spelling and leave it in for use
in debugging the changes added in that patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364958
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Craig Topper [Tue, 2 Jul 2019 18:39:59 +0000 (18:39 +0000)]
[X86] Copy test cases from vector-zext.ll to vector-zext-widen.ll. Same for vector-sext.ll. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364957
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Lang Hames [Tue, 2 Jul 2019 18:39:32 +0000 (18:39 +0000)]
[lli] Fix a typo in a header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364956
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Yuanfang Chen [Tue, 2 Jul 2019 18:38:17 +0000 (18:38 +0000)]
[llvm-objdump] Warn if no user specified sections (-j) are not found.
Match GNU objdump.
https://bugs.llvm.org/show_bug.cgi?id=41898
Reviewers: jhenderson, grimar, MaskRay, rupprecht
Reviewed by: jhenderson, grimar, MaskRay
Differential Revision: https://reviews.llvm.org/D63779
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364955
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Erik Pilkington [Tue, 2 Jul 2019 18:28:13 +0000 (18:28 +0000)]
[C++2a] Add __builtin_bit_cast, used to implement std::bit_cast
This commit adds a new builtin, __builtin_bit_cast(T, v), which performs a
bit_cast from a value v to a type T. This expression can be evaluated at
compile time under specific circumstances.
The compile time evaluation currently doesn't support bit-fields, but I'm
planning on fixing this in a follow up (some of the logic for figuring this out
is in CodeGen). I'm also planning follow-ups for supporting some more esoteric
types that the constexpr evaluator supports, as well as extending
__builtin_memcpy constexpr evaluation to use the same infrastructure.
rdar://
44987528
Differential revision: https://reviews.llvm.org/D62825
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364954
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Simon Pilgrim [Tue, 2 Jul 2019 18:20:38 +0000 (18:20 +0000)]
[X86] getTargetConstantBitsFromNode - remove unnecessary getZExtValue() (PR42486)
Don't use APInt::getZExtValue() if you can avoid it - eventually someone will call it with i128 or something that doesn't fit into 64-bits.
In this case it was completely superfluous as we'd moved the rest of the code to always use APInt.
Fixes the <1 x i128> addition bug in PR42486
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364953
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Alexander Timofeev [Tue, 2 Jul 2019 18:16:42 +0000 (18:16 +0000)]
[AMDGPU] LCSSA pass added in preISel. Fixing typo in previous commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364952
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Alexander Timofeev [Tue, 2 Jul 2019 17:59:44 +0000 (17:59 +0000)]
[AMDGPU] LCSSA pass added in preISel. Uniform values defined in the divergent loop and used outside
Differential Revision: https://reviews.llvm.org/D63953
Reviewers: rampitec, nhaehnle, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364950
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Craig Topper [Tue, 2 Jul 2019 17:51:02 +0000 (17:51 +0000)]
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
Similar for (V)MOVSD. Ultimately, I'd like to see about folding
scalar_to_vector+load to vzload. Which would select as (V)MOVSSrm
so this is closer to that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364948
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Roman Lebedev [Tue, 2 Jul 2019 16:48:49 +0000 (16:48 +0000)]
[NFC][Codegen][X86][AArch64][ARM][PowerPC] Recommit: Add test coverage for "add-of-inc" vs "sub-of-not"
I initially committed it with --check-prefix instead of --check-prefixes
(again, shame on me, and utils/update_*.py not complaining!)
and did not have a moment to understand the failure,
so i reverted it initially in rL64939.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364945
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Vitaly Buka [Tue, 2 Jul 2019 16:08:10 +0000 (16:08 +0000)]
Fix GN build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364942
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David Bolvansky [Tue, 2 Jul 2019 15:58:45 +0000 (15:58 +0000)]
[SimplifyLibCalls] powf(x, sitofp(n)) -> powi(x, n)
Summary:
Partially solves https://bugs.llvm.org/show_bug.cgi?id=42190
Reviewers: spatel, nikic, efriedma
Reviewed By: efriedma
Subscribers: efriedma, nikic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63038
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364940
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Roman Lebedev [Tue, 2 Jul 2019 15:54:24 +0000 (15:54 +0000)]
Revert "[NFC][Codegen][X86][AArch64][ARM][PowerPC] Add test coverage for "add-of-inc" vs "sub-of-not""
Some test failures i don't have a moment to investigate.
This reverts commit r364930.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364939
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Serge Guelton [Tue, 2 Jul 2019 15:52:39 +0000 (15:52 +0000)]
Provide basic Full LTO extension points
Differential Revision: https://reviews.llvm.org/D61738
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364937
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Sam McCall [Tue, 2 Jul 2019 15:42:37 +0000 (15:42 +0000)]
getMainExecutable: handle realpath() failure, falling back to getprogpath().
Summary:
Previously, we'd pass a nullptr to std::string and crash().
This case happens when the binary is deleted while being used (e.g. rebuilding clangd).
Reviewers: kadircet
Subscribers: ilya-biryukov, kristina, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64068
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364936
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Matt Arsenault [Tue, 2 Jul 2019 15:34:40 +0000 (15:34 +0000)]
AMDGPU: Fix broken test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364935
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Matt Arsenault [Tue, 2 Jul 2019 14:52:16 +0000 (14:52 +0000)]
AMDGPU/GlobalISel: Try generated matcher with intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364933
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Matt Arsenault [Tue, 2 Jul 2019 14:52:14 +0000 (14:52 +0000)]
AMDGPU/GlobalISel: Select mul
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364932
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Matt Arsenault [Tue, 2 Jul 2019 14:49:29 +0000 (14:49 +0000)]
GlobalISel: Define GINodeEquiv for G_UMULH/G_SMULH
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364931
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Roman Lebedev [Tue, 2 Jul 2019 14:48:52 +0000 (14:48 +0000)]
[NFC][Codegen][X86][AArch64][ARM][PowerPC] Add test coverage for "add-of-inc" vs "sub-of-not"
As it is pointed out in https://reviews.llvm.org/D63992,
before we get to pick canonical variant in middle-end
we should ensure best codegen in backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364930
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Paul Robinson [Tue, 2 Jul 2019 14:47:49 +0000 (14:47 +0000)]
Use --defsym instead of sed in a test. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364929
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Matt Arsenault [Tue, 2 Jul 2019 14:40:22 +0000 (14:40 +0000)]
AMDGPU/GlobalISel: Fix G_GEP with mixed SGPR/VGPR operands
The register bank for the destination of the sample argument copy was
wrong. We shouldn't be constraining each source to the result register
bank. Allow constraining the original register to the right size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364928
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Matt Arsenault [Tue, 2 Jul 2019 14:17:38 +0000 (14:17 +0000)]
AMDGPU/GlobalISel: Select G_FENCE
Manually select to workaround tablegen emitter emitting checks for
G_CONSTANT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364927
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Matt Arsenault [Tue, 2 Jul 2019 14:16:39 +0000 (14:16 +0000)]
GlobalISel: Add G_FENCE
The pattern importer is for some reason emitting checks for G_CONSTANT
for the immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364926
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Simon Pilgrim [Tue, 2 Jul 2019 13:30:04 +0000 (13:30 +0000)]
[X86][AVX] combineX86ShuffleChain - pull out CombineShuffleWithExtract lambda. NFCI.
Pull out CombineShuffleWithExtract lambda to new combineX86ShuffleChainWithExtract wrapper and refactored it to handle more than 2 shuffle inputs - this will allow combineX86ShufflesRecursively to call this in a future patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364924
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Kristof Umann [Tue, 2 Jul 2019 13:25:41 +0000 (13:25 +0000)]
Removed extra ; after function definition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364923
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Roman Lebedev [Tue, 2 Jul 2019 13:21:23 +0000 (13:21 +0000)]
[NFC][TargetLowering] Some preparatory cleanups around 'prepareUREMEqFold()' from D63963
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364921
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Roman Lebedev [Tue, 2 Jul 2019 13:21:17 +0000 (13:21 +0000)]
[APIntTest] multiplicativeInverse(): clarify test
Clarify that multiplicative inverse exists for all odd numbers,
and does not exist for all even numbers (including 0).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364920
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Paul Robinson [Tue, 2 Jul 2019 13:13:36 +0000 (13:13 +0000)]
Fix line endings (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364919
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James Henderson [Tue, 2 Jul 2019 13:11:34 +0000 (13:11 +0000)]
[docs][llvm-readelf] Delete old llvm-readelf.md
This was accidentally missed when committing r364800.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364918
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George Rimar [Tue, 2 Jul 2019 12:58:37 +0000 (12:58 +0000)]
[Object/invalid.test] - Convert Object/corrupt.test to YAML and merge the result into invalid.test
Object/corrupt.test has the same purpose as Object/invalid.test:
it tests the behavior on invalid inputs.
In this patch I converted it to YAML, merged into invalid.test,
added comments and removed a few precompiled binaries.
Differential revision: https://reviews.llvm.org/D63927
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364916
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Roman Lebedev [Tue, 2 Jul 2019 12:54:48 +0000 (12:54 +0000)]
[InstCombine] Shift amount reassociation: fixup constantexpr handling (PR42484)
I was actually wondering if there was some nicer way than m_Value()+cast,
but apparently what i was really "subconsciously" thinking about
was correctness issue.
hasNoUnsignedWrap()/hasNoUnsignedWrap() exist for Instruction,
not for BinaryOperator, so let's just use m_Instruction(),
thus both avoiding a cast, and a crash.
Fixes https://bugs.llvm.org/show_bug.cgi?id=42484,
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=15587
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364915
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Kristof Umann [Tue, 2 Jul 2019 12:40:29 +0000 (12:40 +0000)]
Attempt to fix buildbot failures with MSVC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364914
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Michal Gorny [Tue, 2 Jul 2019 11:32:03 +0000 (11:32 +0000)]
[llvm] [Support] Clean PrintStackTrace() ptr arithmetic up
Use '%tu' modifier for pointer arithmetic since we are using C++11
already. Prefer static_cast<> over C-style cast. Remove unnecessary
conversion of result, and add const qualifier to converted pointers,
to silence the following warning:
In file included from /home/mgorny/llvm-project/llvm/lib/Support/Signals.cpp:220:0:
/home/mgorny/llvm-project/llvm/lib/Support/Unix/Signals.inc: In function ‘void llvm::sys::PrintStackTrace(llvm::raw_ostream&)’:
/home/mgorny/llvm-project/llvm/lib/Support/Unix/Signals.inc:546:53: warning: cast from type ‘const void*’ to type ‘char*’ casts away qualifiers [-Wcast-qual]
(char*)dlinfo.dli_saddr));
^~~~~~~~~
Differential Revision: https://reviews.llvm.org/D63888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364912
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Kristof Umann [Tue, 2 Jul 2019 11:30:12 +0000 (11:30 +0000)]
[IDF] Generalize IDFCalculator to be used with Clang's CFG
I'm currently working on a GSoC project that aims to improve the the bug reports
of the analyzer. The main heuristic I plan to use is to explain values that are
a control dependency of the bug location better.
01 bool b = messyComputation();
02 int i = 0;
03 if (b) // control dependency of the bug site, let's explain why we assume val
04 // to be true
05 10 / i; // warn: division by zero
Because of this, I'd like to generalize IDFCalculator so that I could use it for
Clang's CFG: D62883.
In detail:
* Rename IDFCalculator to IDFCalculatorBase, make it take a general CFG node
type as a template argument rather then strictly BasicBlock (but preserve
ForwardIDFCalculator and ReverseIDFCalculator)
* Move IDFCalculatorBase from llvm/include/llvm/Analysis to
llvm/include/llvm/Support (but leave the BasicBlock variants in
llvm/include/llvm/Analysis)
* clang-format the file since this patch messes up git blame anyways
* Change typedef to using
* Add the new type ChildrenGetterTy, and store an instance of it in
IDFCalculatorBase. This is important because I'll have to specialize it for
Clang's CFG to filter out nullpointer successors, similarly to D62507.
Differential Revision: https://reviews.llvm.org/D63389
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364911
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Simon Tatham [Tue, 2 Jul 2019 11:26:11 +0000 (11:26 +0000)]
[ARM] MVE: allow soft-float ABI to pass vector types.
Passing a vector type over the soft-float ABI involves it being split
into four GPRs, so the first thing that has to happen at the start of
the function is to recombine those into a vector register. The ABI
types all vectors as v2f64, so we need to support BUILD_VECTOR for
that type, which I do in this patch by allowing it to be expanded in
terms of INSERT_VECTOR_ELT, and writing an ISel pattern for that in
turn. Similarly, I provide a rule for EXTRACT_VECTOR_ELT so that a
returned vector can be marshalled back into GPRs.
While I'm here, I've also added ISD::UNDEF to the list of operations
we turn back on in `setAllExpand`, because I noticed that otherwise it
gets expanded into a BUILD_VECTOR with explicit zero inputs, leading
to pointless machine instructions to zero out a vector register that's
about to have every lane overwritten of in any case.
Reviewers: dmgreen, ostannard
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364910
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Simon Tatham [Tue, 2 Jul 2019 11:26:00 +0000 (11:26 +0000)]
[ARM] Stop using scalar FP instructions in integer-only MVE mode.
If you compile with `-mattr=+mve` (enabling integer MVE instructions
but not floating-point ones), then the scalar FP //registers// exist
and it's legal to move things in and out of them, load and store them,
but it's not legal to do arithmetic on them.
In D60708, the calls to `addRegisterClass` in ARMISelLowering that
enable use of the scalar FP registers became conditionalised on
`Subtarget->hasFPRegs()` instead of `Subtarget->hasVFP2Base()`, so
that loads, stores and moves of those registers would work. But I
didn't realise that that would also enable all the operations on those
types by default.
Now, if the target doesn't have basic VFP, we follow up those
`addRegisterClass` calls by turning back off all the nontrivial
operations you can perform on f32 and f64. That causes several
knock-on failures, which are fixed by allowing the `VMOVDcc` and
`VMOVScc` instructions to be selected even if all you have is
`HasFPRegs`, and adjusting several checks for 'is this a double in a
single-precision-only world?' to the more general 'is this any FP type
we can't do arithmetic on?'. Between those, the whole of the
`float-ops.ll` and `fp16-instructions.ll` tests can now run in
MVE-without-FP mode and generate correct-looking code.
One odd side effect is that I had to relax the check lines in that
test so that they permit test functions like `add_f` to be generated
as tailcalls to software FP library functions, instead of ordinary
calls. Doing that is entirely legal, but the mystery is why this is
the first RUN line that's needed the relaxation: on the usual kind of
non-FP target, no tailcalls ever seem to be generated. Going by the
llc messages, I think `SoftenFloatResult` must be perturbing the code
generation in some way, but that's as much as I can guess.
Reviewers: dmgreen, ostannard
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63938
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364909
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Nico Weber [Tue, 2 Jul 2019 11:20:40 +0000 (11:20 +0000)]
gn build: Merge r364866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364908
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George Rimar [Tue, 2 Jul 2019 11:02:09 +0000 (11:02 +0000)]
[yaml2obj] - An attempt to fix a ppc64be build bot after r364898
I guess the problem is because of endianess of
the bytes tested by "od" tool. I changed the Content
sequence as it does not actually matter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364907
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Simon Pilgrim [Tue, 2 Jul 2019 10:53:17 +0000 (10:53 +0000)]
[X86] resolveTargetShuffleInputsAndMask - add repeated input handling.
We were relying on combineX86ShufflesRecursively to handle this - this patch gets it done earlier which should make it easier for other code to use resolveTargetShuffleInputsAndMask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364906
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George Rimar [Tue, 2 Jul 2019 10:47:13 +0000 (10:47 +0000)]
[test/Object] - Fix build bot.
Fixed mistype in the test case.
BB: http://lab.llvm.org:8011/builders/lld-x86_64-ubuntu-fast/builds/2720/steps/test-check-all/logs/stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364905
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George Rimar [Tue, 2 Jul 2019 10:30:06 +0000 (10:30 +0000)]
[Object/invalid.test] - Convert 3 more sub-tests to YAML
This allows to remove 3 more precompiled binaries from the inputs.
Differential revision: https://reviews.llvm.org/D63880
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364903
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Simon Atanasyan [Tue, 2 Jul 2019 10:22:14 +0000 (10:22 +0000)]
[mips] Mark P5600 scheduling model as complete
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364902
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Simon Atanasyan [Tue, 2 Jul 2019 10:22:06 +0000 (10:22 +0000)]
[mips] Add missing schedinfo for FPU load/store/conv instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364900
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Simon Atanasyan [Tue, 2 Jul 2019 10:21:59 +0000 (10:21 +0000)]
[mips] Map SNOP, NOP to the P5600Nop scheduler resource
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364899
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George Rimar [Tue, 2 Jul 2019 10:20:12 +0000 (10:20 +0000)]
[yaml2obj] - Allow overriding sh_offset field from the YAML.
Some of our test cases are using objects which
has sections with a broken sh_offset field.
There was no way to set it from YAML until this patch.
Differential revision: https://reviews.llvm.org/D63879
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364898
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Roman Lebedev [Tue, 2 Jul 2019 10:02:25 +0000 (10:02 +0000)]
[NFC][InstCombine] Revisit tests for "redundant shift input masking" (PR42456)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364897
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Igor Kudrin [Tue, 2 Jul 2019 09:57:28 +0000 (09:57 +0000)]
[DWARF] Simplify dumping of a .debug_addr section.
This patch removes the part which tried to interpret addresses
in that section as offsets and simplifies the remaining code.
Differential Revision: https://reviews.llvm.org/D64020
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364896
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Roman Lebedev [Tue, 2 Jul 2019 09:27:34 +0000 (09:27 +0000)]
[NFC][InstCombine] Add tests for "redundant shift input masking" (PR42456)
https://bugs.llvm.org/show_bug.cgi?id=42456
https://rise4fun.com/Alive/Vf1p
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364894
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