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Sjoerd Meijer [Thu, 22 Feb 2018 08:41:55 +0000 (08:41 +0000)]
Revert r325754 and r325755 (f16 literal pool) because buildbots were unhappy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325756
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Sjoerd Meijer [Thu, 22 Feb 2018 08:20:50 +0000 (08:20 +0000)]
Added a test that I forgot to svn add in my previous commit r325754.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325755
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Sjoerd Meijer [Thu, 22 Feb 2018 08:16:05 +0000 (08:16 +0000)]
[ARM] f16 constant pool fix
This is a follow up of r325012, that allowed half types in constant pools.
Proper alignment was enforced when a big basic block was split up, but not when
a CPE was placed before/after a block; the successor block had the wrong
alignment.
Differential Revision: https://reviews.llvm.org/D43580
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325754
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Hiroshi Inoue [Thu, 22 Feb 2018 07:48:29 +0000 (07:48 +0000)]
[NFC] fix trivial typos in comments
"a a" -> "a"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325752
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Craig Topper [Thu, 22 Feb 2018 07:05:27 +0000 (07:05 +0000)]
[DAGCombiner] Add two calls to isVector before making calls to getVectorElementType/getVectorNumElements to avoid an assert.
We looked through a BITCAST, but the bitcast might be a from a scalar type rather than a vector.
I don't have a test case. I stumbled onto it while prototyping another change that isn't ready yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325750
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Mircea Trofin [Thu, 22 Feb 2018 06:42:57 +0000 (06:42 +0000)]
[SampleProf] NFC. Expose reusable functionality in SampleProfile.
Summary:
Exposing getOffset and findFunctionSamples as members of
SampleProfile. They are intimately tied to design choices of the
sample profile format - using offsets instead of line numbers, and
traversing inlined functions stack, respectively.
Reviewers: davidxl
Reviewed By: davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D43605
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325747
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Max Kazantsev [Thu, 22 Feb 2018 06:27:32 +0000 (06:27 +0000)]
[SCEV][NFC] Factor out common logic into a separate method
SCEV has multiple occurences of code when we need to prove some predicate on
every iteration of a loop and do it with invocations of couple `isLoopEntryGuardedByCond`,
`isLoopBackedgeGuardedByCond`. This patch factors out these two calls into a separate
method. It is a preparation step to extend this logic: it is not the only way how we can prove
such conditions.
Differential Revision: https://reviews.llvm.org/D43373
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325745
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Nemanja Ivanovic [Thu, 22 Feb 2018 03:02:41 +0000 (03:02 +0000)]
[PowerPC] Do not produce invalid CTR loop with an FRem
An FRem instruction inside a loop should prevent the loop from being converted
into a CTR loop since this is not an operation that is legal on any PPC
subtarget. This will always be a call to a library function which means the
loop will be invalid if this instruction is in the body.
Fixes PR36292.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325739
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Vedant Kumar [Thu, 22 Feb 2018 01:29:41 +0000 (01:29 +0000)]
[Utils] Avoid a hash table lookup in salvageDI, NFC
According to the current coverage report salvageDebugInfo() is called
5.12 million times during testing and almost always returns early.
The early return depends on LocalAsMetadata::getIfExists returning null,
which involves a DenseMap lookup in an LLVMContextImpl. We can probably
speed this up by simply checking the IsUsedByMD bit in Value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325738
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Simon Pilgrim [Wed, 21 Feb 2018 23:07:30 +0000 (23:07 +0000)]
[X86][MMX] Generlize MMX_MOVD64rr combines to accept v4i16/v8i8 build vectors as well as v2i32
Also handle both cases where the lower 32-bits of the MMX is undef or zero extended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325736
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Yonghong Song [Wed, 21 Feb 2018 22:59:14 +0000 (22:59 +0000)]
bpf: disable DwarfUsesRelocationsAcrossSections
The pahole does not work with BPF backend properly:
-bash-4.2$ cat test.c
struct test_t {
int a;
int b;
};
int test(struct test_t *s) {
return s->a;
}
-bash-4.2$ clang -g -O2 -target bpf -c test.c
-bash-4.2$ pahole test.o
struct clang version 7.0.0 (trunk 325446) (llvm/trunk 325464) {
clang version 7.0.0 (trunk 325446) (llvm/trunk 325464) clang version 7.0.0 (trunk 325446) (llvm/trunk 325464); /* 0 4 */
clang version 7.0.0 (trunk 325446) (llvm/trunk 325464) clang version 7.0.0 (trunk 325446) (llvm/trunk 325464); /* 4 4 */
/* size: 8, cachelines: 1, members: 2 */
/* last cacheline: 8 bytes */
};
-bash-4.2$
The reason is that BPF backend is not yet implemented in elfutils backend
https://github.com/threatstack/elfutils/tree/master/backends
and pahole depends on elfutils for dwarf parsing and resolving relocation.
More specifically, the unsupported relocation in .debug_info for type/member name
against symbol table caused the incorrect result above. The following is
the raw .rel.debug_info for the above example,
Hex dump of section '.rel.debug_info':
0x00000000
06000000 00000000 0a000000 0b000000 ................
0x00000010
0c000000 00000000 0a000000 01000000 ................
0x00000020
12000000 00000000 0a000000 02000000 ................
0x00000030
16000000 00000000 0a000000 0e000000 ................
0x00000040
1a000000 00000000 0a000000 03000000 ................
----------------- -------- --------
reloc location type symtab index
Hex dump of section '.debug_info':
0x00000000
7b000000 04000000 00000801 00000000 {...............
0x00000010
0c000000 00000000 00000000 00000000 ................
0x00000020
00000000 00001000 00000200 00000000 ................
Based on "type", the proper value will be extracted from symbol table
and filled in .debug_info so later on .debug_info can be properly
resolved against debug strings.
There are two ways to fix this problem. One is to fix elfutils by adding
BPF support which is desirable. This could take a long time and won't work
with already deployed pahole. For a short term workaround, we can disable
dwarf cross-section relation which specifically avoids debug_info and
symbol table cross relocation. This should help any dwarf-related tool
which has not implement BPF specific relocations yet.
Now .rel.debug_info does not have any relocation for symbol table and
.debug_info itself contains necessary relocation information by itself.
Hex dump of section '.debug_info':
0x00000000
7b000000 04000000 00000801 00000000 {...............
0x00000010
0c003700 00000000 00003e00 00000000 ..7.......>.....
0x00000020
00000000 00001000 00000200 00000000 ................
location 0xc has 0, 0x12 has 0x37, 0x1a has 0x3e in place which
will be used in relocation resolution. Here, the values of 0, 0x37 and 0x3e
are offset in .debug_str section.
Please note the difference between two above .debug_info dumps.
With the fix, pahole works properly with BPF backend:
-bash-4.2$ clang -O2 -g -target bpf -c test.c
-bash-4.2$ pahole test.o
struct test_t {
int a; /* 0 4 */
int b; /* 4 4 */
/* size: 8, cachelines: 1, members: 2 */
/* last cacheline: 8 bytes */
};
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325735
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Sanjay Patel [Wed, 21 Feb 2018 22:48:28 +0000 (22:48 +0000)]
[InstCombine] add some random FMF to tests so we know it's not dropped; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325734
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Pavel Labath [Wed, 21 Feb 2018 22:36:31 +0000 (22:36 +0000)]
Resubmit r325107 (case folding DJB hash)
The issue was that the has function was generating different results depending
on the signedness of char on the host platform. This commit fixes the issue by
explicitly using an unsigned char type to prevent sign extension and
adds some extra tests.
The original commit message was:
This patch implements a variant of the DJB hash function which folds the
input according to the algorithm in the Dwarf 5 specification (Section
6.1.1.4.5), which in turn references the Unicode Standard (Section 5.18,
"Case Mappings").
To achieve this, I have added a llvm::sys::unicode::foldCharSimple
function, which performs this mapping. The implementation of this
function was generated from the CaseMatching.txt file from the Unicode
spec using a python script (which is also included in this patch). The
script tries to optimize the function by coalescing adjecant mappings
with the same shift and stride (terms I made up). Theoretically, it
could be made a bit smarter and merge adjecant blocks that were
interrupted by only one or two characters with exceptional mapping, but
this would save only a couple of branches, while it would greatly
complicate the implementation, so I deemed it was not worth it.
Since we assume that the vast majority of the input characters will be
US-ASCII, the folding hash function has a fast-path for handling these,
and only whips out the full decode+fold+encode logic if we encounter a
character outside of this range. It might be possible to implement the
folding directly on utf8 sequences, but this would also bring a lot of
complexity for the few cases where we will actually need to process
non-ascii characters.
Reviewers: JDevlieghere, aprantl, probinson, dblaikie
Subscribers: mgorny, hintonda, echristo, clayborg, vleschuk, llvm-commits
Differential Revision: https://reviews.llvm.org/D42740
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325732
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Tobias Edler von Koch [Wed, 21 Feb 2018 22:27:07 +0000 (22:27 +0000)]
[Hexagon] Add TargetRegisterInfo::getPointerRegClass() override
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325731
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Sanjay Patel [Wed, 21 Feb 2018 22:18:55 +0000 (22:18 +0000)]
[InstCombine] add and use Create*FMF functions; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325730
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Simon Pilgrim [Wed, 21 Feb 2018 22:10:48 +0000 (22:10 +0000)]
[X86][MMX] Add MMX_MOVD64rr build vector tests showing undef elements in the lower half
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325729
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Lang Hames [Wed, 21 Feb 2018 21:55:57 +0000 (21:55 +0000)]
[ORC] Switch to shared_ptr ownership for SymbolSources in VSOs.
This makes it easy to free a SymbolSource (and any related
resources) when the last reference in a VSO is dropped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325727
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Lang Hames [Wed, 21 Feb 2018 21:55:54 +0000 (21:55 +0000)]
[ORC] Switch from a StringMap to an internal VSO in RTDyldObjectLinkingLayer.
This is a first step towards switching to VSOs as the primary symbol tables in
ORC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325726
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Lang Hames [Wed, 21 Feb 2018 21:55:49 +0000 (21:55 +0000)]
[ORC] Switch RTDyldObjectLinkingLayer to take a unique_ptr<MemoryBuffer> rather
than a shared ObjectFile/MemoryBuffer pair.
There's no need to pre-parse the buffer into an ObjectFile before passing it
down to the linking layer, and moving the parsing into the linking layer allows
us remove the parsing code at each call site.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325725
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Sanjay Patel [Wed, 21 Feb 2018 20:48:14 +0000 (20:48 +0000)]
[AArch64] fix IR names to not be 'tmp' because that gives the CHECK script problems
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325718
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Sanjay Patel [Wed, 21 Feb 2018 20:34:16 +0000 (20:34 +0000)]
[AArch64] add SLP test for matmul (PR36280); NFC
This is a slight reduction of one of the benchmarks
that suffered with D43079. Cost model changes should
not cause this test to remain scalarized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325717
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Rafael Espindola [Wed, 21 Feb 2018 20:12:18 +0000 (20:12 +0000)]
Revert "[IRMover] Implement name based structure type mapping"
This reverts commit r325686.
There was a misunderstanding and this has not been approved yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325715
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Rafael Espindola [Wed, 21 Feb 2018 19:55:11 +0000 (19:55 +0000)]
Fix a memory leak and a cross module reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325712
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Evgeniy Stepanov [Wed, 21 Feb 2018 19:52:23 +0000 (19:52 +0000)]
[hwasan] Fix inline instrumentation.
This patch changes hwasan inline instrumentation:
Fixes address untagging for shadow address calculation (use 0xFF instead of 0x00 for the top byte).
Emits brk instruction instead of hlt for the kernel and user space.
Use 0x900 instead of 0x100 for brk immediate (0x100 - 0x800 are unavailable in the kernel).
Fixes and adds appropriate tests.
Patch by Andrey Konovalov.
Differential Revision: https://reviews.llvm.org/D43135
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325711
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Vedant Kumar [Wed, 21 Feb 2018 19:40:55 +0000 (19:40 +0000)]
asan: add kernel inline instrumentation test (retry)
Add a test that checks that kernel inline instrumentation works.
Patch by Andrey Konovalov!
Differential Revision: https://reviews.llvm.org/D42473
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325710
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Simon Pilgrim [Wed, 21 Feb 2018 18:52:16 +0000 (18:52 +0000)]
[X86][MMX] Run MMX bitcast test on 32 and 64-bit targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325707
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Frederich Munch [Wed, 21 Feb 2018 17:18:20 +0000 (17:18 +0000)]
Handle IMAGE_REL_AMD64_ADDR32NB in RuntimeDyldCOFF
Summary:
IMAGE_REL_AMD64_ADDR32NB relocations are currently set to zero in all cases.
This patch sets the relocation to the correct value when possible and shows an error when not.
Reviewers: enderby, lhames, compnerd
Reviewed By: compnerd
Subscribers: LepelTsmok, compnerd, martell, llvm-commits
Differential Revision: https://reviews.llvm.org/D30709
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325700
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Alexey Bataev [Wed, 21 Feb 2018 16:48:23 +0000 (16:48 +0000)]
[LV] Fix test checks, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325699
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Simon Pilgrim [Wed, 21 Feb 2018 16:38:08 +0000 (16:38 +0000)]
[X86][MMX] Regenerate MMX MASKMOV test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325698
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Jonas Paulsson [Wed, 21 Feb 2018 16:37:45 +0000 (16:37 +0000)]
[Hexagon] Return true in enableMultipleCopyHints().
Enable multiple COPY hints to eliminate more COPYs during register allocation.
Note that this is something all targets should do, see
https://reviews.llvm.org/D38128.
Review: Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325697
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Simon Pilgrim [Wed, 21 Feb 2018 16:37:10 +0000 (16:37 +0000)]
[X86][MMX] Regenerate MMX arithmetic tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325696
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Simon Pilgrim [Wed, 21 Feb 2018 16:35:40 +0000 (16:35 +0000)]
[X86] LowerBITCAST - pull out repeated calls to getOperand(0). NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325695
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Alexey Bataev [Wed, 21 Feb 2018 15:32:58 +0000 (15:32 +0000)]
[SLP] Fix test checks, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325689
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Jonas Devlieghere [Wed, 21 Feb 2018 15:25:26 +0000 (15:25 +0000)]
[Sparc] Include __tls_get_addr in symbol table for TLS calls to it
Global Dynamic and Local Dynamic call relocations only implicitly
reference __tls_get_addr; there is no connection in the ELF file between
the relocations and the symbol other than the specification for the
relocations' semantics. However, it still needs to be in the symbol
table despite the lack of explicit references to the symbol table entry,
since it needs to be bound at link time for these relocations, otherwise
any objects will fail to link.
For details, see https://sourceware.org/bugzilla/show_bug.cgi?id=22832.
Path by: James Clarke (jrtc27)
Differential revision: https://reviews.llvm.org/D43271
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325688
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Silviu Baranga [Wed, 21 Feb 2018 15:20:32 +0000 (15:20 +0000)]
[SCEV] Temporarily disable loop versioning for the purpose
of turning SCEVUnknowns of PHIs into AddRecExprs.
This feature is now hidden behind the -scev-version-unknown flag.
Fixes PR36032 and PR35432.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325687
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Eugene Leviant [Wed, 21 Feb 2018 15:13:48 +0000 (15:13 +0000)]
[IRMover] Implement name based structure type mapping
Differential revision: https://reviews.llvm.org/D43199
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325686
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Simon Pilgrim [Wed, 21 Feb 2018 15:07:47 +0000 (15:07 +0000)]
[X86][MMX] Regenerate MMX PSUB commutation test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325685
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Simon Pilgrim [Wed, 21 Feb 2018 15:05:47 +0000 (15:05 +0000)]
[X86] Regenerate GPR:XMM bitcast test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325684
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Nicolai Haehnle [Wed, 21 Feb 2018 13:31:35 +0000 (13:31 +0000)]
AMDGPU: Do not combine loads/store across physreg defs
Summary:
Since this pass operates on machine SSA form, this should only really
affect M0 in practice.
Fixes various piglit variable-indexing/vs-varying-array-mat4-index-*
Change-Id: Ib2a1dc3a8d7b08225a8da49a86f533faa0986aa8
Fixes: r317751 ("AMDGPU: Merge S_BUFFER_LOAD_DWORD_IMM into x2, x4")
Reviewers: arsenm, mareko, rampitec
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D40343
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325677
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Dmitry Preobrazhensky [Wed, 21 Feb 2018 13:13:48 +0000 (13:13 +0000)]
[AMDGPU][MC] Added lds support for MUBUF instructions
See bug 28234: https://bugs.llvm.org/show_bug.cgi?id=28234
Differential Revision: https://reviews.llvm.org/D43472
Reviewers: vpykhtin, artem.tamazov, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325676
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Simon Pilgrim [Wed, 21 Feb 2018 12:06:27 +0000 (12:06 +0000)]
[X86][MMX] Add PR29222 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325675
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Simon Pilgrim [Wed, 21 Feb 2018 12:01:30 +0000 (12:01 +0000)]
[X86][MMX] Add some MMX build vector tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325674
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Martell Malone [Wed, 21 Feb 2018 06:42:38 +0000 (06:42 +0000)]
RISCV: Add COFF address space
PE spec defines and reserves to following for RISCV
IMAGE_FILE_MACHINE_RISCV32 0x5032
IMAGE_FILE_MACHINE_RISCV64 0x5064
IMAGE_FILE_MACHINE_RISCV128 0x5128
https://msdn.microsoft.com/en-us/library/windows/desktop/ms680547(v=vs.85).aspx
Reviewers: asb, rnk, compnerd
Differential Revision: https://reviews.llvm.org/D41571
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325667
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Vedant Kumar [Wed, 21 Feb 2018 01:55:33 +0000 (01:55 +0000)]
[BDCE] Salvage debug info from dying insts
This results in 15 additional unique source variables in a stage2 build
of FileCheck (at '-Os -g'), with a negligible increase in the size of
the .debug_loc section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325660
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Sanjay Patel [Wed, 21 Feb 2018 01:42:52 +0000 (01:42 +0000)]
revert r325515: [TTI CostModel] change default cost of FP ops to 1 (PR36280)
There are too many perf regressions resulting from this, so we need to
investigate (and add tests for) targets like ARM and AArch64 before
trying to reinstate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325658
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Aaron Smith [Wed, 21 Feb 2018 00:41:30 +0000 (00:41 +0000)]
[lit] Fix a problem with spaces in the python path by adding quotes around it
These are the last tests left to fix after D43265.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325657
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Craig Topper [Wed, 21 Feb 2018 00:15:48 +0000 (00:15 +0000)]
[X86] Disable CLWB for Cannon Lake
Cannon Lake does not support CLWB, therefore it
does not include all features listed under SKX anymore.
Instead, enumerate all SKX features with the exception of CLWB.
Patch by Gabor Buella
Differential Revision: https://reviews.llvm.org/D43380
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325654
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Simon Dardis [Wed, 21 Feb 2018 00:06:53 +0000 (00:06 +0000)]
[mips] Spectre variant two mitigation for MIPSR2
This patch provides mitigation for CVE-2017-5715, Spectre variant two,
which affects the P5600 and P6600. It implements the LLVM part of
-mindirect-jump=hazard. It is _not_ enabled by default for the P5600.
The migitation strategy suggested by MIPS for these processors is to use
hazard barrier instructions. 'jalr.hb' and 'jr.hb' are hazard
barrier variants of the 'jalr' and 'jr' instructions respectively.
These instructions impede the execution of instruction stream until
architecturally defined hazards (changes to the instruction stream,
privileged registers which may affect execution) are cleared. These
instructions in MIPS' designs are not speculated past.
These instructions are used with the attribute +use-indirect-jump-hazard
when branching indirectly and for indirect function calls.
These instructions are defined by the MIPS32R2 ISA, so this mitigation
method is not compatible with processors which implement an earlier
revision of the MIPS ISA.
Performance benchmarking of this option with -fpic and lld using
-z hazardplt shows a difference of overall 10%~ time increase
for the LLVM testsuite. Certain benchmarks such as methcall show a
substantially larger increase in time due to their nature.
Reviewers: atanasyan, zoran.jovanovic
Differential Revision: https://reviews.llvm.org/D43486
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325653
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Sanjay Patel [Wed, 21 Feb 2018 00:01:45 +0000 (00:01 +0000)]
[InstCombine] C / -X --> -C / X
We already do this in DAGCombiner, but it should
also be good to eliminate the fsub use in IR.
This is similar to rL325648.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325649
91177308-0d34-0410-b5e6-
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Sanjay Patel [Tue, 20 Feb 2018 23:51:16 +0000 (23:51 +0000)]
[InstCombine] -X / C --> X / -C for FP
We already do this in DAGCombiner, but it should
also be good to eliminate the fsub use in IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325648
91177308-0d34-0410-b5e6-
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Sanjay Patel [Tue, 20 Feb 2018 23:34:43 +0000 (23:34 +0000)]
[InstCombine] add tests for fdiv with negated op and constant op; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325644
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Konstantin Zhuravlyov [Tue, 20 Feb 2018 23:30:21 +0000 (23:30 +0000)]
Revert "[AMDGPU] Increased vector length for global/constant loads."
https://reviews.llvm.org/rL325518
It breaks following OpenCL conformance tests:
- Basic - parameter_types
- Basic - vload_private
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325643
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Sanjay Patel [Tue, 20 Feb 2018 23:29:05 +0000 (23:29 +0000)]
[PatternMatch] allow vector matches with m_FNeg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325642
91177308-0d34-0410-b5e6-
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Sanjoy Das [Tue, 20 Feb 2018 23:19:34 +0000 (23:19 +0000)]
[DSE] Don't DSE stores that subsequent memmove calls read from
Summary:
We used to remove the first memmove in cases like this:
memmove(p, p+2, 8);
memmove(p, p+2, 8);
which is incorrect. Fix this by changing isPossibleSelfRead to what was most
likely the intended behavior.
Historical note: the buggy code was added in https://reviews.llvm.org/rL120974
to address PR8728.
Reviewers: rsmith
Subscribers: mcrosier, llvm-commits, jlebar
Differential Revision: https://reviews.llvm.org/D43425
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325641
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Sanjay Patel [Tue, 20 Feb 2018 23:08:47 +0000 (23:08 +0000)]
[InstCombine] auto-generate full checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325639
91177308-0d34-0410-b5e6-
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Sanjay Patel [Tue, 20 Feb 2018 22:46:38 +0000 (22:46 +0000)]
[InstCombine] add test for vector -X/-Y; NFC
m_FNeg doesn't match vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325637
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 20 Feb 2018 22:33:23 +0000 (22:33 +0000)]
[X86] Fix copy/paste mistake in test.
The contents of the test case didnt' match the name of the test case. And they were identical to the test above.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325635
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Benjamin Kramer [Tue, 20 Feb 2018 22:30:16 +0000 (22:30 +0000)]
Fix broken test from r325630.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325634
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Lang Hames [Tue, 20 Feb 2018 22:15:09 +0000 (22:15 +0000)]
[PBQP] Fix PR33038 by pruning empty intervals in initializeGraph.
Spilling may cause previously non-empty intervals (both for the spilled vreg
and others) to become empty. Moving the pruning into initializeGraph catches
these cases and fixes PR33038.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325632
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Benjamin Kramer [Tue, 20 Feb 2018 22:00:33 +0000 (22:00 +0000)]
[MemoryBuiltins] Check nobuiltin status when identifying calls to free.
This is usually not a problem because this code's main purpose is
eliminating unused new/delete pairs. We got deletes of nullptr or
nobuiltin deletes of builtin new wrong though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325630
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Sanjay Patel [Tue, 20 Feb 2018 21:52:46 +0000 (21:52 +0000)]
[InstCombine] remove unneeded operand swap: NFCI
FMul is commutative, so complexity-based canonicalization should always
take care of the swap via SimplifyAssociativeOrCommutative().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325628
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Craig Topper [Tue, 20 Feb 2018 21:48:14 +0000 (21:48 +0000)]
[SelectionDAG] Support known true/false SimplifySetCC cases for comparing against vector splats of constants.
This is split off from D42948 and includes just the cases that constant fold to true or false. It also includes some refactoring to keep predicate checks together.
This supports things like
(setcc uge X, 0) -> true
Differential Revision: https://reviews.llvm.org/D43489
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325627
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Sanjay Patel [Tue, 20 Feb 2018 21:02:40 +0000 (21:02 +0000)]
[PatternMatch] enhance m_SignMask() to ignore undef elements in vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325623
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Sanjay Patel [Tue, 20 Feb 2018 20:53:35 +0000 (20:53 +0000)]
[InstSimplify] add tests for m_SignMask with undef vector elements; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325622
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Evandro Menezes [Tue, 20 Feb 2018 20:31:45 +0000 (20:31 +0000)]
[AArch64] Refactor instructions using SIMD immediates
Get rid of icky goto loops and make the code easier to maintain. Otherwise,
NFC.
Restore r324903 and fix PR36369.
Differentail revision: https://reviews.llvm.org/D43364
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325621
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Teresa Johnson [Tue, 20 Feb 2018 20:21:53 +0000 (20:21 +0000)]
[LTO] Remove unused Path parameter to AddBufferFn
Summary:
With D43396, no clients use the Path parameter anymore.
Depends on D43396.
Reviewers: pcc
Subscribers: mehdi_amini, inglorion, llvm-commits
Differential Revision: https://reviews.llvm.org/D43400
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325619
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Teresa Johnson [Tue, 20 Feb 2018 19:51:30 +0000 (19:51 +0000)]
[ThinLTO/gold] Avoid race with cache pruner by copying to temp files
Summary:
This will avoid the race condition described in the review for D37993.
I believe that the Path parameter to AddBufferFn is no longer utilized.
I would prefer to remove that as a follow up clean up patch to reduce
the diffs in this patch.
Reviewers: pcc
Reviewed By: pcc
Subscribers: inglorion, llvm-commits
Differential Revision: https://reviews.llvm.org/D43396
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325618
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Alexey Bataev [Tue, 20 Feb 2018 19:49:25 +0000 (19:49 +0000)]
[LV] Fix test checks, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325617
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Sjoerd Meijer [Tue, 20 Feb 2018 19:28:05 +0000 (19:28 +0000)]
[ARM] Lower BR_CC for f16
This case wasn't handled yet.
Differential Revision: https://reviews.llvm.org/D43508
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325616
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Stanislav Mekhanoshin [Tue, 20 Feb 2018 19:19:56 +0000 (19:19 +0000)]
[AMDGPU] Removed redundant run lines for fmuladd.f16 test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325615
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David Blaikie [Tue, 20 Feb 2018 18:48:51 +0000 (18:48 +0000)]
[llvm-objdump] Use unique_ptr to simplify memory ownership
Followup to r325099/r325100 to simplify further.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325612
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Simon Pilgrim [Tue, 20 Feb 2018 18:48:29 +0000 (18:48 +0000)]
[X86][MMX] Regenerate MMX bitcast test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325611
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Tue, 20 Feb 2018 18:44:21 +0000 (18:44 +0000)]
[X86][3DNow] Regenerate intrinsics tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325609
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Sanjay Patel [Tue, 20 Feb 2018 18:21:43 +0000 (18:21 +0000)]
[IRBuilder] fix CreateMaxNum to actually produce maxnum (PR36454)
The bug was introduced here:
https://reviews.llvm.org/rL296409
...but the patch doesn't use maxnum and nothing else in
trunk has tried since then, so the bug went unnoticed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325607
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Krzysztof Parzyszek [Tue, 20 Feb 2018 18:19:17 +0000 (18:19 +0000)]
[Hexagon] Handle *Low8 register classes in early if-conversion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325606
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Alexey Bataev [Tue, 20 Feb 2018 18:11:50 +0000 (18:11 +0000)]
[SLP] Fix tests checks, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325605
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Craig Topper [Tue, 20 Feb 2018 17:58:17 +0000 (17:58 +0000)]
[X86] Correct SHRUNKBLEND creation to work correctly when there are multiple uses of the condition.
SimplifyDemandedBits forces the demanded mask to all 1s if the node has multiple uses, unless the AssumeSingleUse flag is set.
So previously we were only really likely to simplify something if the condition had a single use. And on the off chance we did simplify with multiple uses the demanded mask being used was all ones so there was no reason to create a shrunkblend.
This patch now checks that the condition is only used by selects first, and then sets the AssumeSingleUse flag for the simplifcation. Then we convert the selects to shrunkblend, and finally replace condition.
Differential Revision: https://reviews.llvm.org/D43446
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325604
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Craig Topper [Tue, 20 Feb 2018 17:41:05 +0000 (17:41 +0000)]
[SelectionDAG] Add LegalTypes flag to getShiftAmountTy. Use it to unify and simplify DAGCombiner and simplifySetCC code and fix a bug.
DAGCombiner and SimplifySetCC both use getPointerTy for shift amounts pre-legalization. DAGCombiner uses a single helper function to hide this. SimplifySetCC does it in multiple places.
This patch adds a defaulted parameter to getShiftAmountTy that can make it return getPointerTy for scalar types. Use this parameter to simplify the SimplifySetCC and DAGCombiner.
Additionally, there were two places in SimplifySetCC that were creating shifts using the target's preferred shift amount pre-legalization. If the target uses a narrow type and the type is illegal, this can cause SimplfiySetCC to create a shift with an amount that can't represent all possible shift values for the type. To fix this we should use pointer type there too.
Alternatively we could make getScalarShiftAmountTy for each target return a safe value for large types as proposed in D43445. And maybe we should still do that, but fixing the SimplifySetCC code keeps other targets from tripping over this in the future.
Fixes PR36250.
Differential Revision: https://reviews.llvm.org/D43449
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325602
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Craig Topper [Tue, 20 Feb 2018 17:41:00 +0000 (17:41 +0000)]
[X86] Promote 16-bit cmovs to 32-bits
This allows us to avoid an opsize prefix. And forcing some move immediates to i32 avoids a length changing prefix on those instructions.
This mostly replaces the existing combine we had for zext/sext+cmov of constants. I left in a case for sign extending a 32 bit cmov of constants to 64 bits.
Differential Revision: https://reviews.llvm.org/D43327
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325601
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Jonas Devlieghere [Tue, 20 Feb 2018 17:34:29 +0000 (17:34 +0000)]
[dsymutil] Correctly handle DW_TAG_label
This patch contains logic for handling DW_TAG_label that's present in
darwin's dsymutil implementation, but not yet upstream.
Differential revision: https://reviews.llvm.org/D43438
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325600
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Mikhail Maltsev [Tue, 20 Feb 2018 17:27:44 +0000 (17:27 +0000)]
[vim] Recognize more FileCheck comments
Summary:
Currently vim syntax highlighting recognizes 'CHECK:' as a special
comment, but not CHECK-DAG, CHECK-NOT and other CHECKs. This patch
adds rules for these comments.
Reviewers: chandlerc, compnerd, rogfer01
Reviewed By: rogfer01
Subscribers: rogfer01, llvm-commits
Differential Revision: https://reviews.llvm.org/D43289
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325599
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Sanjay Patel [Tue, 20 Feb 2018 17:14:53 +0000 (17:14 +0000)]
[InstCombine] remove unneeded dyn_cast to prevent unused variable warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325597
91177308-0d34-0410-b5e6-
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Sanjay Patel [Tue, 20 Feb 2018 16:52:17 +0000 (16:52 +0000)]
[InstCombine] remove compound fdiv pattern folds
These are fdiv-with-constant-divisor, so they already become
reciprocal multiplies. The last gap for vector ops should be
closed with rL325590.
It's possible that we're missing folds for some edge cases
with denormal intermediate constants after deleting these,
but there are no tests for those patterns, and it would be
better to handle denormals more consistently (and less
conservatively) as noted in TODO comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325595
91177308-0d34-0410-b5e6-
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Sanjay Patel [Tue, 20 Feb 2018 16:08:15 +0000 (16:08 +0000)]
[InstCombine] fold fdiv with non-splat divisor to fmul: X/C --> X * (1/C)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325590
91177308-0d34-0410-b5e6-
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Simon Dardis [Tue, 20 Feb 2018 15:55:17 +0000 (15:55 +0000)]
[mips] Correct the definition of cvt.d.w
An upcoming patch D41434, changes the ordering of the matcher table
for assembly. This patch corrects the definition of the normal MIPS
cvt.d.w not to be available in microMIPS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325589
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Alexey Bataev [Tue, 20 Feb 2018 15:28:08 +0000 (15:28 +0000)]
[DEBUGINFO] Add support for emission of the inlined strings.
Summary:
Patch adds an option for emission of inlined strings rather than
.debug_str section.
Reviewers: echristo, jlebar
Subscribers: eraman, llvm-commits, JDevlieghere
Differential Revision: https://reviews.llvm.org/D43390
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325583
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Lei Huang [Tue, 20 Feb 2018 15:09:45 +0000 (15:09 +0000)]
[PowerPC] Reduce stack frame for fastcc functions by only allocating parameter save area when needed
Current implementation always allocates the parameter save area conservatively
for fastcc functions. There is no reason to allocate the parameter save area if
all the parameters can be passed via registers.
Differential Revision: https://reviews.llvm.org/D42602
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325581
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Krzysztof Parzyszek [Tue, 20 Feb 2018 14:29:43 +0000 (14:29 +0000)]
[Hexagon] Fix alignment calculation of stack objects in Hexagon bit tracker
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325580
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Tue, 20 Feb 2018 14:08:39 +0000 (14:08 +0000)]
[X86] Regenerate XOR tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325579
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Tue, 20 Feb 2018 13:24:24 +0000 (13:24 +0000)]
[VectorLegalizer] Fix uint64_t typo in ExpandUINT_TO_FLOAT (PR36391)
ExpandUINT_TO_FLOAT can accept vXi32 or vXi64 inputs, so we need to use a uint64_t shift to generate the 2^(BW/2) constant.
No test case unfortunately as no upstream target uses this, but its affecting a downstream target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325578
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David Green [Tue, 20 Feb 2018 11:07:35 +0000 (11:07 +0000)]
[ARM] Mark -1 as cheap in xor's for thumb1
We can always convert xor %a, -1 into MVN, even in thumb 1 where the -1
would not otherwise be considered a cheap constant. This prevents the
-1's from being pulled out into constants and potentially hoisted.
Differential Revision: https://reviews.llvm.org/D43451
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325573
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George Rimar [Tue, 20 Feb 2018 10:17:57 +0000 (10:17 +0000)]
[llvm-mc] - Produce R_X86_64_PLT32 for "call/jmp foo".
For instructions like call foo and jmp foo patch changes
relocation produced from R_X86_64_PC32 to R_X86_64_PLT32.
Relocation can be used as a marker for 32-bit PC-relative branches.
Linker will reduce PLT32 relocation to PC32 if function is defined locally.
Differential revision: https://reviews.llvm.org/D43383
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325569
91177308-0d34-0410-b5e6-
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Tim Renouf [Tue, 20 Feb 2018 10:03:38 +0000 (10:03 +0000)]
[AMDGPU] stop buffer_store being moved illegally
Summary:
The machine instruction scheduler was illegally moving a buffer store
past a buffer load with the same descriptor and offset. Fixed by marking
buffer ops as mayAlias and isAliased. This may be overly conservative,
and we may need to revisit.
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D43332
Change-Id: Iff3173d9e0653e830474546276ab9d30318b8ef7
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325567
91177308-0d34-0410-b5e6-
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George Rimar [Tue, 20 Feb 2018 09:04:13 +0000 (09:04 +0000)]
[MC] - Don't crash on unclosed frame.
llvm-mc can crash when
there is cfi_startproc without cfi_end_proc:
.text
.globl foo
foo:
.cfi_startproc
Testcase shows the issue, patch fixes it.
Differential revision: https://reviews.llvm.org/D43456
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325564
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Gadi Haber [Tue, 20 Feb 2018 08:00:31 +0000 (08:00 +0000)]
[X86][CET]: Adding full coverage of MC encoding for the CET instructions.<NFC>
NFC.
Adding MC regressions tests to cover the CET instructions.
This patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952
Reviewers: zvi, craig.topper, RKSimon, AndreiGrischenko, oren_ben_simhon
Differential Revision: https://reviews.llvm.org/D41329
Change-Id: I9c133d4ba07508ce8fd738a1230edd586e2c2f1b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325561
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Craig Topper [Tue, 20 Feb 2018 07:28:14 +0000 (07:28 +0000)]
[X86] Add 512-bit unmasked pmulhrsw/pmulhw/pmulhuw intrinsics. Remove and auto upgrade 128/256/512 bit masked pmulhrsw/pmulhw/pmulhuw intrinsics.
The 128 and 256 bit versions were already not used by clang. This adds an equivalent unmasked 512 bit version. Then autoupgrades all sizes to use unmasked intrinsics plus select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325559
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Craig Topper [Tue, 20 Feb 2018 05:49:22 +0000 (05:49 +0000)]
[X86] Remove GCCBuiltin from a bunch of intrinsics that aren't used by clang and should be removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325552
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Serge Pavlov [Tue, 20 Feb 2018 05:41:26 +0000 (05:41 +0000)]
Report fatal error in the case of out of memory
This is the second part of recommit of r325224. The previous part was
committed in r325426, which deals with C++ memory allocation. Solution
for C memory allocation involved functions `llvm::malloc` and similar.
This was a fragile solution because it caused ambiguity errors in some
cases. In this commit the new functions have names like `llvm::safe_malloc`.
The relevant part of original comment is below, updated for new function
names.
Analysis of fails in the case of out of memory errors can be tricky on
Windows. Such error emerges at the point where memory allocation function
fails, but manifests itself when null pointer is used. These two points
may be distant from each other. Besides, next runs may not exhibit
allocation error.
In some cases memory is allocated by a call to some of C allocation
functions, malloc, calloc and realloc. They are used for interoperability
with C code, when allocated object has variable size and when it is
necessary to avoid call of constructors. In many calls the result is not
checked for null pointer. To simplify checks, new functions are defined
in the namespace 'llvm': `safe_malloc`, `safe_calloc` and `safe_realloc`.
They behave as corresponding standard functions but produce fatal error if
allocation fails. This change replaces the standard functions like 'malloc'
in the cases when the result of the allocation function is not checked
for null pointer.
Finally, there are plain C code, that uses malloc and similar functions. If
the result is not checked, assert statement is added.
Differential Revision: https://reviews.llvm.org/D43010
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325551
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Amara Emerson [Tue, 20 Feb 2018 05:11:57 +0000 (05:11 +0000)]
[AArch64][GlobalISel] When copying from a gpr32 to an fpr16 reg, convert to fpr32 first.
This is a follow on commit to r[x] where we fix the other direction of copy.
For this case, after converting the source from gpr32 -> fpr32, we use a
subregister copy, which is essentially what EXTRACT_SUBREG does in SDAG land.
https://reviews.llvm.org/D43444
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325550
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Craig Topper [Tue, 20 Feb 2018 03:58:14 +0000 (03:58 +0000)]
[X86] Mark XOP vpmac* and vpmadc intrinsics as being commutative so that tablegen will generate patterns with the load in operand 0.
This allows loads to be folded during isel without the peephole pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325548
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