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Amaury Sechet [Sat, 11 Feb 2017 17:48:49 +0000 (17:48 +0000)]
Fix typo in test filename. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294860
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Amaury Sechet [Sat, 11 Feb 2017 17:48:48 +0000 (17:48 +0000)]
Fix indentation in X86ISelLowering. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294859
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Craig Topper [Sat, 11 Feb 2017 17:35:28 +0000 (17:35 +0000)]
[AVX-512] Add VPMINS/MINU/MAXS/MAXU instructions to load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294858
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Craig Topper [Sat, 11 Feb 2017 17:35:25 +0000 (17:35 +0000)]
[X86] Improve alphabetizing of load folding tables. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294857
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Simon Pilgrim [Sat, 11 Feb 2017 17:27:21 +0000 (17:27 +0000)]
[X86][SSE] Convert getTargetShuffleMaskIndices to use getTargetConstantBitsFromNode.
Removes duplicate constant extraction code in getTargetShuffleMaskIndices.
getTargetConstantBitsFromNode - adds support for VZEXT_MOVL(SCALAR_TO_VECTOR) and fail if the caller doesn't support undef bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294856
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Simon Pilgrim [Sat, 11 Feb 2017 16:42:07 +0000 (16:42 +0000)]
[X86] Merge repeated getScalarValueSizeInBits calls. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294852
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Daniel Berlin [Sat, 11 Feb 2017 15:20:15 +0000 (15:20 +0000)]
NewGVN: Reverse sense of this test to make it clearer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294851
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Daniel Berlin [Sat, 11 Feb 2017 15:13:49 +0000 (15:13 +0000)]
NewGVN: Add missing initialization of NumFuncArgs lost due to bad merge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294850
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Daniel Berlin [Sat, 11 Feb 2017 15:07:01 +0000 (15:07 +0000)]
NewGVN: Rank and order commutative operands consistently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294849
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Simon Pilgrim [Sat, 11 Feb 2017 14:01:37 +0000 (14:01 +0000)]
[X86][3DNow!] Add tests to ensure PFMAX/PFMIN are not commuted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294848
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Simon Pilgrim [Sat, 11 Feb 2017 13:51:14 +0000 (13:51 +0000)]
[X86][3DNow!] Enable PFSUB<->PFSUBR commutation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294847
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Simon Pilgrim [Sat, 11 Feb 2017 13:32:55 +0000 (13:32 +0000)]
[X86][3DNow!] Enable commutation for PFADD/PFMUL/PFCMPEQ/PAVGUSB/PMULHRW
All commutations confirmed to give identical results - note PFMAX/PFMIN do not
PFSUB<->PFSUBR should be commutable as well
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294846
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Simon Pilgrim [Sat, 11 Feb 2017 13:00:32 +0000 (13:00 +0000)]
[X86][3DNow!] Add tests showing missed commutation opportunities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294845
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Daniel Berlin [Sat, 11 Feb 2017 12:48:50 +0000 (12:48 +0000)]
NewGVN: Clean up how we handle the INITIAL class so that everything in
it is dead or unreachable, as it should be.
This also makes the leader of INITIAL undef, enabling us to handle
irreducibility properly.
Summary:
This lets us verify, more than we do now, that we didn't screw up
value numbering.
Reviewers: davide
Subscribers: Prazek, llvm-commits
Differential Revision: https://reviews.llvm.org/D29842
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294844
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Vitaly Buka [Sat, 11 Feb 2017 12:44:03 +0000 (12:44 +0000)]
Fix "left shift of negative value -1" introduced by r294805
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294843
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Simon Pilgrim [Sat, 11 Feb 2017 12:30:59 +0000 (12:30 +0000)]
[X86][XOP] Regenerate XOP commutation tests.
Added 32-bit tests as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294841
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Simon Pilgrim [Sat, 11 Feb 2017 12:29:56 +0000 (12:29 +0000)]
[X86][SSE] Regenerate float comparison commutation tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294840
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Simon Pilgrim [Sat, 11 Feb 2017 12:23:22 +0000 (12:23 +0000)]
[X86] Regenerate CLMUL commutation tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294839
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Benjamin Kramer [Sat, 11 Feb 2017 11:06:55 +0000 (11:06 +0000)]
Move symbols from the global namespace into (anonymous) namespaces. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294837
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Craig Topper [Sat, 11 Feb 2017 07:01:40 +0000 (07:01 +0000)]
[AVX-512] Add VPINSRB/W/D/Q instructions to load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294830
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Craig Topper [Sat, 11 Feb 2017 07:01:38 +0000 (07:01 +0000)]
[AVX-512] Fix apparent typo in instruction name VMOVSSDrr_REV->VMOVSDZrr_REV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294829
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Craig Topper [Sat, 11 Feb 2017 06:24:03 +0000 (06:24 +0000)]
[AVX-512] Add VPSADBW instructions to load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294827
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Evgeny Stupachenko [Sat, 11 Feb 2017 05:39:00 +0000 (05:39 +0000)]
The patch fixes r294821
Summary:
Update register match for windows testing
From: Evgeny Stupachenko <evstupac@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294825
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Craig Topper [Sat, 11 Feb 2017 05:32:57 +0000 (05:32 +0000)]
[X86] Don't base domain decisions on VEXTRACTF128/VINSERTF128 if only AVX1 is available.
Seems the execution dependency pass likes to use FP instructions when most of the consuming code is integer if a vextractf128 instruction produced the register. Without AVX2 we don't have the corresponding integer instruction available.
This patch suppresses the domain on these instructions to GenericDomain if AVX2 is not supported so that they are ignored by domain fixing. If AVX2 is supported we'll report the correct domain and allow them to switch between integer and fp.
Overall I think this produces better results in the modified test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294824
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Peter Collingbourne [Sat, 11 Feb 2017 03:19:22 +0000 (03:19 +0000)]
Address Mehdi's post-commit review comments on r294795.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294822
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Evgeny Stupachenko [Sat, 11 Feb 2017 02:57:43 +0000 (02:57 +0000)]
Fix PR23384 (under "-lsr-insns-cost" option)
Summary:
The patch adds instructions number generated by a solution
to LSR cost under "-lsr-insns-cost" option.
Reviewers: qcolombet, hfinkel
Differential Revision: http://reviews.llvm.org/D28307
From: Evgeny Stupachenko <evstupac@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294821
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Ahmed Bougacha [Sat, 11 Feb 2017 01:53:04 +0000 (01:53 +0000)]
[ARM] Make f16 interleaved accesses expensive.
There are no vldN/vstN f16 variants, even with +fullfp16.
We could use the i16 variants, but, in practice, even with +fullfp16,
the f16 sequence leading to the i16 shuffle usually gets scalarized.
We'd need to improve our support for f16 codegen before getting there.
Teach the cost model to consider f16 interleaved operations as
expensive. Otherwise, we are all but guaranteed to end up with
a large block of scalarized vector code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294819
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Ahmed Bougacha [Sat, 11 Feb 2017 01:53:00 +0000 (01:53 +0000)]
[ARM] Don't lower f16 interleaved accesses.
There are no vldN/vstN f16 variants, even with +fullfp16.
We could use the i16 variants, but, in practice, even with +fullfp16,
the f16 sequence leading to the i16 shuffle usually gets scalarized.
We'd need to improve our support for f16 codegen before getting there.
Reject f16 interleaved accesses. If we try to emit the f16 intrinsics,
we'll just end up with a selection failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294818
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Ahmed Bougacha [Sat, 11 Feb 2017 01:52:57 +0000 (01:52 +0000)]
[ARM] Unique some redundant CHECK lines. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294817
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Wei Mi [Sat, 11 Feb 2017 00:50:23 +0000 (00:50 +0000)]
[LSR] Recommit: Allow formula containing Reg for SCEVAddRecExpr related with outerloop.
The recommit includes some changes of testcases. No functional change to the patch.
In RateRegister of existing LSR, if a formula contains a Reg which is a SCEVAddRecExpr,
and this SCEVAddRecExpr's loop is an outerloop, the formula will be marked as Loser
and dropped.
Suppose we have an IR that %for.body is outerloop and %for.body2 is innerloop. LSR only
handle inner loop now so only %for.body2 will be handled.
Using the logic above, formula like
reg(%array) + reg({1,+, %size}<%for.body>) + 1*reg({0,+,1}<%for.body2>) will be dropped
no matter what because reg({1,+, %size}<%for.body>) is a SCEVAddRecExpr type reg related
with outerloop. Only formula like
reg(%array) + 1*reg({{1,+, %size}<%for.body>,+,1}<nuw><nsw><%for.body2>) will be kept
because the SCEVAddRecExpr related with outerloop is folded into the initial value of the
SCEVAddRecExpr related with current loop.
But in some cases, we do need to share the basic induction variable
reg{0 ,+, 1}<%for.body2> among LSR Uses to reduce the final total number of induction
variables used by LSR, so we don't want to drop the formula like
reg(%array) + reg({1,+, %size}<%for.body>) + 1*reg({0,+,1}<%for.body2>) unconditionally.
From the existing comment, it tries to avoid considering multiple level loops at the same time.
However, existing LSR only handles innermost loop, so for any SCEVAddRecExpr with a loop other
than current loop, it is an invariant and will be simple to handle, and the formula doesn't have
to be dropped.
Differential Revision: https://reviews.llvm.org/D26429
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294814
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Eugene Zelenko [Sat, 11 Feb 2017 00:27:28 +0000 (00:27 +0000)]
[MC] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294813
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Matthias Braun [Sat, 11 Feb 2017 00:14:01 +0000 (00:14 +0000)]
config-ix.cmake: Search for CMAKE_XCRUN before using it.
This was previously searched in CMakeLists.txt unconditionally but as of
r294371 it is only searched in some circumstances. Repeating the search
in config-ix.cmake to make this robust and hopefully fix the macOS
Asan+Ubsan jenkins build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294811
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Chandler Carruth [Sat, 11 Feb 2017 00:09:30 +0000 (00:09 +0000)]
[PM] Fix a bug in how I ported LoopDeletion to the new PM.
This was marking the loop for deletion after the loop was deleted. This
almost works, except that when we do any kind of debug logging it starts
reading the name of the loop from deleted memory or otherwise blowing
up. This can fail in a bunch of ways. I recently added a test that
*always* does this, and it started failing on the sanitizer bots.
The fix is to mark the loop as deleted in the loop PM infrastructure
before we remove the loop. We can do this by passing the updater into
the routine. That also lets us simplify a bunch of other interface
components here for a net win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294810
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Dan Gohman [Sat, 11 Feb 2017 00:02:23 +0000 (00:02 +0000)]
[WebAssembly] Remove old experimental disassemler code.
Remove support for disassembling an old experimental wasm binary format, which
is no longer in use anywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294809
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Saleem Abdulrasool [Fri, 10 Feb 2017 23:57:11 +0000 (23:57 +0000)]
vim: add `returned` keyword
The `returned` keyword was added in SVN r179925. Update the vim syntax
rules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294808
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Davide Italiano [Fri, 10 Feb 2017 23:49:38 +0000 (23:49 +0000)]
[LTO] Share the optimization remarks setup between Thin/Full LTO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294807
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Krzysztof Parzyszek [Fri, 10 Feb 2017 23:46:45 +0000 (23:46 +0000)]
[Hexagon] Introduce Hexagon V62
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294805
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Davide Italiano [Fri, 10 Feb 2017 22:55:37 +0000 (22:55 +0000)]
[tests] Be explicit about the files we want to remove.
Hopefully Windows will stop whining after this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294801
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Peter Collingbourne [Fri, 10 Feb 2017 22:29:38 +0000 (22:29 +0000)]
IR: Function summary extensions for whole-program devirtualization pass.
The summary information includes all uses of llvm.type.test and
llvm.type.checked.load intrinsics that can be used to devirtualize calls,
including any constant arguments for virtual constant propagation.
Differential Revision: https://reviews.llvm.org/D29734
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294795
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Benjamin Kramer [Fri, 10 Feb 2017 22:26:35 +0000 (22:26 +0000)]
[InstCombine] Move class into anonymous namespace. NFC.
This is necessary to avoid warnings from GCC.
InstCombineLoadStoreAlloca.cpp:238:7: error: 'PointerReplacer' declared
with greater visibility than the type of its field 'PointerReplacer::IC'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294794
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Davide Italiano [Fri, 10 Feb 2017 22:16:17 +0000 (22:16 +0000)]
[lib/LTO] Rework optimization remarkers setup.
This makes this code much more similar to what ThinLTO is
using (also API wise), so now we can probably use a single
code path instead of copying stuff around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294792
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Benjamin Kramer [Fri, 10 Feb 2017 22:13:34 +0000 (22:13 +0000)]
[PPC] Silence warning in Release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294791
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Davide Italiano [Fri, 10 Feb 2017 22:11:06 +0000 (22:11 +0000)]
[LTO] Make these tests robust across multiple iterations.
Same as r294784, but for regular LTO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294789
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Benjamin Kramer [Fri, 10 Feb 2017 22:04:17 +0000 (22:04 +0000)]
[InstCombine] Silence unused variable warning in Release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294788
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Nico Weber [Fri, 10 Feb 2017 21:57:30 +0000 (21:57 +0000)]
Revert r294532, it caused PR31935
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294787
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Yaxun Liu [Fri, 10 Feb 2017 21:46:07 +0000 (21:46 +0000)]
Fix invalid addrspacecast due to combining alloca with global var
For function-scope variables with large initialisation list, FE usually
generates a global variable to hold the initializer, then generates
memcpy intrinsic to initialize the alloca. InstCombiner::visitAllocaInst
identifies such allocas which are accessed only by reading and replaces
them with the global variable. This is done by casting the global variable
to the type of the alloca and replacing all references.
However, when the global variable is in a different address space which
is disjoint with addr space 0 (e.g. for IR generated from OpenCL,
global variable cannot be in private addr space i.e. addr space 0), casting
the global variable to addr space 0 results in invalid IR for certain
targets (e.g. amdgpu).
To fix this issue, when the global variable is not in addr space 0,
instead of casting it to addr space 0, this patch chases down the uses
of alloca until reaching the load instructions, then replaces load from
alloca with load from the global variable. If during the chasing
bitcast and GEP are encountered, new bitcast and GEP based on the global
variable are generated and used in the load instructions.
Differential Revision: https://reviews.llvm.org/D27283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294786
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Davide Italiano [Fri, 10 Feb 2017 21:35:31 +0000 (21:35 +0000)]
[ThinLTO] Make this test more robust across multiple runs.
The yaml emitter files are left around otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294784
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Tim Shen [Fri, 10 Feb 2017 21:17:35 +0000 (21:17 +0000)]
Fix a silly syntax error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294783
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Dehao Chen [Fri, 10 Feb 2017 21:09:07 +0000 (21:09 +0000)]
Encode duplication factor from loop vectorization and loop unrolling to discriminator.
Summary:
This patch starts the implementation as discuss in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2016-October/106532.html
When optimization duplicates code that will scale down the execution count of a basic block, we will record the duplication factor as part of discriminator so that the offline process tool can find the duplication factor and collect the accurate execution frequency of the corresponding source code. Two important optimization that fall into this category is loop vectorization and loop unroll. This patch records the duplication factor for these 2 optimizations.
The recording will be guarded by a flag encode-duplication-in-discriminators, which is off by default.
Reviewers: probinson, aprantl, davidxl, hfinkel, echristo
Reviewed By: hfinkel
Subscribers: mehdi_amini, anemet, mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D26420
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294782
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Tim Shen [Fri, 10 Feb 2017 21:03:24 +0000 (21:03 +0000)]
[XRay] Implement powerpc64le xray.
Summary:
powerpc64 big-endian is not supported, but I believe that most logic can
be shared, except for xray_powerpc64.cc.
Also add a function InvalidateInstructionCache to xray_util.h, which is
copied from llvm/Support/Memory.cpp. I'm not sure if I need to add a unittest,
and I don't know how.
Reviewers: dberris, echristo, iteratee, kbarton, hfinkel
Subscribers: mehdi_amini, nemanjai, mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D29742
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294781
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Krzysztof Parzyszek [Fri, 10 Feb 2017 19:54:00 +0000 (19:54 +0000)]
[Hexagon] Remove unused .td files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294775
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Ahmed Bougacha [Fri, 10 Feb 2017 19:51:47 +0000 (19:51 +0000)]
[X86] Bitcast subvector before broadcasting it.
Since r274013, we've been looking through bitcasts on broadcast inputs.
In the scalar-folding case (from a load, build_vector, or sc2vec),
the input type didn't matter, as we'd simply bitcast the resulting
scalar back.
However, when broadcasting a 128-bit-lane-aligned element, we create an
EXTRACT_SUBVECTOR. Use proper types, by creating an extract_subvector
of the original input type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294774
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Kevin Enderby [Fri, 10 Feb 2017 19:27:10 +0000 (19:27 +0000)]
Yet another fix llvm-objdump so it picks a good CPU based for Mach-O files,
in this case for CPU_SUBTYPE_ARM64_ALL.
For this cpusubtype it should default to a cyclone CPU
to give proper disassembly without a -mcpu= flag.
rdar://
27767188
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294771
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Tim Northover [Fri, 10 Feb 2017 19:10:38 +0000 (19:10 +0000)]
GlobalISel: drop lifetime intrinsics during translation.
We don't use them yet and they just cause problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294770
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Marcos Pividori [Fri, 10 Feb 2017 18:44:14 +0000 (18:44 +0000)]
[libFuzzer] Use stoull instead of stol to ensure 64 bits.
Differential revision: https://reviews.llvm.org/D29831
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294769
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Simon Pilgrim [Fri, 10 Feb 2017 18:06:11 +0000 (18:06 +0000)]
[X86][AVX512] Add vector rotate tests for AVX512 targets
AVX512 does have vector rotate instructions, but we don't lower to them yet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294766
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Amaury Sechet [Fri, 10 Feb 2017 17:57:48 +0000 (17:57 +0000)]
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294765
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Amaury Sechet [Fri, 10 Feb 2017 17:57:46 +0000 (17:57 +0000)]
Autogenerate results for test/CodeGen/X86/pr14314.ll . NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294764
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John Brawn [Fri, 10 Feb 2017 17:41:08 +0000 (17:41 +0000)]
[ARM] Fix incorrect mask bits in MSR encoding for write_register intrinsic
In the encoding of system registers in the M-class MSR instruction the mask bits
should be 2 for registers that don't take a _<bits> qualifier (the instruction
is unpredictable otherwise), and should also be 2 if the register takes a
_<bits> qualifier but it's not present as no _<bits> is an alias for _nzcvq.
Differential Revision: https://reviews.llvm.org/D29828
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294762
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Amaury Sechet [Fri, 10 Feb 2017 17:26:21 +0000 (17:26 +0000)]
Use autogenerate check in CodeGen/X86/pr16031.ll . NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294761
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Mehdi Amini [Fri, 10 Feb 2017 17:16:00 +0000 (17:16 +0000)]
Fix doc for `-opt-bisect-limit`: the LTO option prefix for lld is -mllvm
Thanks Davide to catch it in my previous patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294759
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Alexander Kornienko [Fri, 10 Feb 2017 17:00:27 +0000 (17:00 +0000)]
Add a virtual destructor for LegalizerInfo.
lib/Target/X86/X86TargetMachine.cpp has a code that deletes an instance of a
LegalizerInfo descendant via a pointer to base.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294757
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Amaury Sechet [Fri, 10 Feb 2017 16:34:17 +0000 (16:34 +0000)]
Check full codegen in CodeGen/X86/i256-add.ll NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294756
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Matthew Simpson [Fri, 10 Feb 2017 16:15:26 +0000 (16:15 +0000)]
[LV] Remove type restriction for vector phi creation
We previously only created a vector phi node for an induction variable if its
type matched the type of the canonical induction variable.
Differential Revision: https://reviews.llvm.org/D29776
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294755
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Krzysztof Parzyszek [Fri, 10 Feb 2017 15:33:13 +0000 (15:33 +0000)]
[Hexagon] Replace instruction definitions with auto-generated ones
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294753
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Rafael Espindola [Fri, 10 Feb 2017 15:13:12 +0000 (15:13 +0000)]
Move some error handling down to MCStreamer.
This makes sure we get the same redefinition rules regardless of who
is printing (asm parser, codegen) and to what (asm, obj).
This fixes an unintentional regression in r293936.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294752
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Simon Pilgrim [Fri, 10 Feb 2017 14:56:12 +0000 (14:56 +0000)]
[X86][SSE] Added chained FDIV test cases for D26855
Tests to demonstrate throughput-latency decision between div and rcp on faster hardware such as Haswell
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294750
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Simon Pilgrim [Fri, 10 Feb 2017 14:37:25 +0000 (14:37 +0000)]
[DAGCombine] Allow vector constant folding of any value type before type legalization
The patch comes in 2 parts:
1 - it makes use of the SelectionDAG::NewNodesMustHaveLegalTypes flag to tell when it can safely constant fold illegal types.
2 - it correctly resets SelectionDAG::NewNodesMustHaveLegalTypes at the start of each call to SelectionDAGISel::CodeGenAndEmitDAG so all the pre-legalization stages can make use of it - not just the first basic block that gets handled.
Fix for PR30760
Differential Revision: https://reviews.llvm.org/D29568
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294749
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Simon Pilgrim [Fri, 10 Feb 2017 14:27:59 +0000 (14:27 +0000)]
[X86][SSE] Use SDValue::getConstantOperandVal helper. NFCI.
Also reordered an if statement to test low cost comparisons first
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294748
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Simon Pilgrim [Fri, 10 Feb 2017 14:04:11 +0000 (14:04 +0000)]
[X86][SSE] Add support for extracting target constants from BUILD_VECTOR
In some cases we call getTargetConstantBitsFromNode for nodes that haven't been lowered from BUILD_VECTOR yet
Note: We're getting very close to being able to move most of the constant extraction code from getTargetShuffleMaskIndices into getTargetConstantBitsFromNode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294746
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Simon Pilgrim [Fri, 10 Feb 2017 13:16:01 +0000 (13:16 +0000)]
[X86][SSE] Add missing comment describing combing to SHUFPS. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294745
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Chandler Carruth [Fri, 10 Feb 2017 08:48:50 +0000 (08:48 +0000)]
[PM] Relax the patterns used in the new test I added because some
compilers don't print the typedef name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294729
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Chandler Carruth [Fri, 10 Feb 2017 08:26:58 +0000 (08:26 +0000)]
[PM] Fix a bug in the new loop PM when handling functions with no loops.
Without any loops, we don't even bother to build the standard analyses
used by loop passes. Without these, we can't run loop analyses or
invalidate them properly. Unfortunately, we did these things in the
wrong order which would allow a loop analysis manager's proxy to be
built but then not have the standard analyses built. When we went to do
the invalidation in the proxy thing would fall apart. In the test case
provided, it would actually crash.
The fix is to carefully check for loops first, and to in fact build the
standard analyses before building the proxy. This allows it to
correctly trigger invalidation for those standard analyses.
An alternative might seem to be to look at whether there are any loops
when doing invalidation, but this doesn't work when during the loop
pipeline run we delete the last loop. I've even included that as a test
case. It is both simpler and more robust to defer building the proxy
until there are definitely the standard set of analyses and indeed
loops.
This bug was uncovered by enabling GlobalsAA in the pipeline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294728
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Igor Breger [Fri, 10 Feb 2017 07:33:14 +0000 (07:33 +0000)]
add #ifdef, fix compilation error in case LLVM_BUILD_GLOBAL_ISEL=OFF
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294726
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Mehdi Amini [Fri, 10 Feb 2017 07:21:06 +0000 (07:21 +0000)]
Fix doc for `-opt-bisect-limit`: the LTO option is linker specific
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294725
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Igor Breger [Fri, 10 Feb 2017 07:05:56 +0000 (07:05 +0000)]
[X86][GlobalISel] Add general-purpose Register Bank
Summary:
[X86][GlobalISel] Add general-purpose Register Bank.
Add trivial handling of G_ADD legalization .
Add Regestry Bank selection for COPY and G_ADD instructions
Reviewers: rovka, zvi, ab, t.p.northover, qcolombet
Reviewed By: qcolombet
Subscribers: qcolombet, mgorny, dberris, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D29771
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294723
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Dean Michael Berris [Fri, 10 Feb 2017 06:59:25 +0000 (06:59 +0000)]
[XRay][graph] Disambiguate name of type from member name
Follow-up to D29005.
Differential Revision: https://reviews.llvm.org/D29005
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294722
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Dean Michael Berris [Fri, 10 Feb 2017 06:36:08 +0000 (06:36 +0000)]
[XRay] A graph Class for the llvm-xray graph
Summary:
In preparation for graph comparison and filtering, this is a library for
representing graphs in LLVM. This will enable easier encapsulation and reuse
of graphs in llvm-xray.
Depends on D28999, D28225
Reviewers: dblaikie, dberris
Reviewed By: dberris
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D29005
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294717
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Philip Reames [Fri, 10 Feb 2017 06:12:06 +0000 (06:12 +0000)]
[LoopUnswitch] Remove BFI usage (dead code)
Chandler mentioned at the last social that the need for BFI in the new pass manager was causing a slight hiccup for this pass. Given this code has been checked in, but off for over a year, it makes sense to just remove it for now.
Note that there's nothing wrong with the general idea - it's actually a quite good one - and once we have the infrastructure in place to implement this without the full recompuation on every loop, we absolutely should.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294715
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Dean Michael Berris [Fri, 10 Feb 2017 06:05:46 +0000 (06:05 +0000)]
Revert "[XRay] A graph Class for the llvm-xray graph"
Broke tests, reverting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294714
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Dean Michael Berris [Fri, 10 Feb 2017 05:40:37 +0000 (05:40 +0000)]
[XRay] A graph Class for the llvm-xray graph
Summary:
In preparation for graph comparison and filtering, this is a library for
representing graphs in LLVM. This will enable easier encapsulation and reuse
of graphs in llvm-xray.
Depends on D28999, D28225
Reviewers: dblaikie, dberris
Reviewed By: dberris
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D29005
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294713
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Craig Topper [Fri, 10 Feb 2017 05:05:57 +0000 (05:05 +0000)]
[SelectionDAG] Dump the DAG after legalizing vector ops and after the second type legalization
Summary:
With -debug, we aren't dumping the DAG after legalizing vector ops. In particular, on X86 with AVX1 only, we don't dump the DAG after we split 256-bit integer ops into pairs of 128-bit ADDs since this occurs during vector legalization.
I'm only dumping if the legalize vector ops changes something since we don't print anything during legalize vector ops. So this dump shows up right after the first type-legalization dump happens. So if nothing changed this second dump is unnecessary.
Having said that though, I think we should probably fix legalize vector ops to log what its doing.
Reviewers: RKSimon, eli.friedman, spatel, arsenm, chandlerc
Reviewed By: RKSimon
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D29554
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294711
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Adam Nemet [Fri, 10 Feb 2017 04:50:18 +0000 (04:50 +0000)]
opt-viewer: fix HtmlFormatter encoding
Summary: Small fix to HtmlFormatter, defaults to ascii encoding, so utf-8 output may get `UnicodeEncodeError: 'ascii' codec can't encode character ... ordinal not in range(128)` during write.
Patch by Brian Cain!
Reviewers: anemet, fhahn
Reviewed By: anemet
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D29802
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294710
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Eric Christopher [Fri, 10 Feb 2017 04:35:32 +0000 (04:35 +0000)]
Temporarily revert "For X86-64 linux and PPC64 linux align int128 to 16 bytes."
until we can get better TargetMachine::isCompatibleDataLayout to compare - otherwise
we can't code generate existing bitcode without a string equality data layout.
This reverts commit r294702.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294709
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Ahmed Bougacha [Fri, 10 Feb 2017 04:00:17 +0000 (04:00 +0000)]
[GlobalISel] Return an Expected<RuleMatcher> for each SDAG pattern. NFC.
Instead of emitting the matcher code directly, return the rule matcher
and the skip reason as an Expected<RuleMatcher>.
This will let us record all matchers and process them before emission.
It's a somewhat unconventional use of Error, but it's nicer than, say,
std::pair, because of the bool conversions.
Differential Revision: https://reviews.llvm.org/D29743
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294706
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Matthias Braun [Fri, 10 Feb 2017 03:48:50 +0000 (03:48 +0000)]
SubtargetFeature: Increase MAX_SUBTARGET_FEATURES
The ARM target is getting really close to the current limit of 128
subtarget features already breaking out of tree enhancements. Increase
the size once more to 196.
I filed http://llvm.org/PR31926 to request a proper solution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294704
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Eric Christopher [Fri, 10 Feb 2017 03:32:21 +0000 (03:32 +0000)]
For X86-64 linux and PPC64 linux align int128 to 16 bytes.
For other platforms we should find out what they need and likely
make the same change, however, a smaller additional change is easier
for platforms we know have it specified in the ABI. As part of this
rewrite some of the handling in the backends for data layout and update
a bunch of testcases.
Based on a patch by Simonas Kazlauskas!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294702
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Quentin Colombet [Fri, 10 Feb 2017 02:43:09 +0000 (02:43 +0000)]
[TableGen][AsmWriterEmitter] Use a deterministic order to sort InstrAliases
Inside an alias group, when ordering instruction aliases, we rely
on the priority field to sort them.
When the priority is not set or more generally when there is a tie between
two aliases, we used to rely on the lexicographic order. However, this
order can change for the anonymous records when more instruction, intrinsic,
etc. are inserted.
For instance, given two anonymous records r1 and r2 with respective name
A_999 and A_1000, their lexicography order will be r2 then r1. Now, if
an instruction is added before them, their name will become respectively
A_1000 and A_1001, thus the lexicography order will be r1 then r2, i.e.,
it changed.
If that happens in an alias group, the assembly output would prefer a
different alias for no apparent good reasons.
A way to fix that is to use proper priority for all aliases, but we
can also make the tie breaker comparison smarter and use a deterministic
ordering. This is what this patch does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294695
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Matt Arsenault [Fri, 10 Feb 2017 02:42:31 +0000 (02:42 +0000)]
AMDGPU: Fix trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294694
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Wei Ding [Fri, 10 Feb 2017 02:15:29 +0000 (02:15 +0000)]
AMDGPU : Add trap handler support.
Differential Revision: http://reviews.llvm.org/D26010
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294692
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Stanislav Mekhanoshin [Fri, 10 Feb 2017 02:07:58 +0000 (02:07 +0000)]
[AMDGPU] Override PSet for M0
This change returns empty PSet list for M0 register. Otherwise its
PSet as defined by tablegen is SReg_32. This results in incorrect
register pressure calculation every time an instruction uses M0.
Such uses count as SReg_32 PSet and inadequately increase pressure
on SGPRs.
Differential Revision: https://reviews.llvm.org/D29798
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294691
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Eric Fiselier [Fri, 10 Feb 2017 01:59:20 +0000 (01:59 +0000)]
[CMake] Fix pthread handling for out-of-tree builds
LLVM defines `PTHREAD_LIB` which is used by AddLLVM.cmake and various projects
to correctly link the threading library when needed. Unfortunately
`PTHREAD_LIB` is defined by LLVM's `config-ix.cmake` file which isn't installed
and therefore can't be used when configuring out-of-tree builds. This causes
such builds to fail since `pthread` isn't being correctly linked.
This patch attempts to fix that problem by renaming and exporting
`LLVM_PTHREAD_LIB` as part of`LLVMConfig.cmake`. I renamed `PTHREAD_LIB`
because It seemed likely to cause collisions with downstream users of
`LLVMConfig.cmake`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294690
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Marcos Pividori [Fri, 10 Feb 2017 01:40:28 +0000 (01:40 +0000)]
[libFuzzer] Export external functions on tests.
We need to export external functions so they are found when calling
GetProcAddress() on Windows. But we can't use `__declspec(dllexport)` because
we want the targets to be completely independent from the fuzz engines and don't
depend on other header files. Also, we don't want to include platform specific
code managed with conditional macros.
So, the solution is to add the exported symbols with linker flags in cmake.
Differential revision: https://reviews.llvm.org/D29752
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294688
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Marcos Pividori [Fri, 10 Feb 2017 01:35:46 +0000 (01:35 +0000)]
[libFuzzer] Use dynamic loading for External Functions on Windows.
Replace weak aliases with dynamic loading.
Weak aliases were generating some problems when linking for MT on Windows. For
MT, compiler-rt's libraries are statically linked to the main executable the
same than libFuzzer, so if we use weak aliases, we are providing two different
default implementations for the same weak function and the linker fails.
In this diff I re implement ExternalFunctions() using dynamic loading, so it
works in both cases (MD and MT). Also, dynamic loading is simpler, since we are
not defining any auxiliary external function, and we don't need to deal with
weak aliases.
This is equivalent to the implementation using dlsym(RTLD_DEFAULT, FnName) for
Posix.
Differential revision: https://reviews.llvm.org/D29751
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294687
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David L. Jones [Fri, 10 Feb 2017 01:35:31 +0000 (01:35 +0000)]
Update test/CodeGen/X86/sse-align-10.ll to use FileCheck instead of grep
Patch by Jorge Gorbe (lethalantidote).
Differential Revision: https://reviews.llvm.org/D29797
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294686
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Eugene Zelenko [Fri, 10 Feb 2017 01:33:54 +0000 (01:33 +0000)]
[MC] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294685
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Michael J. Spencer [Fri, 10 Feb 2017 00:44:08 +0000 (00:44 +0000)]
[LoadCombine] Change test to not use instcombine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294682
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Dan Gohman [Fri, 10 Feb 2017 00:14:42 +0000 (00:14 +0000)]
[WebAssembly] Pass an MCContext to WebAssemblyMCCodeEmitter. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294679
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Matthias Braun [Fri, 10 Feb 2017 00:09:20 +0000 (00:09 +0000)]
Fix syntax error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294678
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Matthias Braun [Fri, 10 Feb 2017 00:06:44 +0000 (00:06 +0000)]
ARMSubtarget.h: Change to one line per enum element; NFC
Change syntax to have enum elements sorted alphabetically and one per
line as that is more merge/cherry pick friendly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294677
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