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Ilia Mirkin [Fri, 16 Sep 2016 17:53:03 +0000 (13:53 -0400)]
mesa: add GL_OES_viewport_array to the extension string
The expectation is that drivers will set this based on
OES_geometry_shader and ARB_viewport_array support. This is a separate
enable on the same reasoning as for OES_texture_cube_map_array.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ilia Mirkin [Fri, 16 Sep 2016 17:59:27 +0000 (13:59 -0400)]
glsl: add OES_viewport_array enables and use them to expose gl_ViewportIndex
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ilia Mirkin [Fri, 16 Sep 2016 17:38:36 +0000 (13:38 -0400)]
mesa: add new entrypoints for GL_OES_viewport_array
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Dylan Baker [Thu, 22 Sep 2016 18:30:42 +0000 (11:30 -0700)]
mapi: export all GLES 3.2 functions in libGLESv2.so
See commit
5921f372c89a68fac6ddefc009442721d9df4db2 for the rational of
this commit.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Dylan Baker [Thu, 22 Sep 2016 18:38:28 +0000 (11:38 -0700)]
mapi: sort static_data.py functions
Sorted by vim's builtin "sort i" (keeping the sorting case insensitive)
v2:
- uses case insensitive sorting (Ken)
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Dylan Baker [Thu, 22 Sep 2016 17:58:45 +0000 (10:58 -0700)]
mapi: retab static_data.py to be consistent
This file currently uses a mixture of 3 and 4 space indent. I have
changed it all to 4 space indent, matching the settings in
$ROOT/.editorconfig.
This was generated with sed:
sed -i -e 's@^ "@ "@g'
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lionel Landwerlin [Mon, 19 Sep 2016 16:14:18 +0000 (17:14 +0100)]
spirv: fix AtomicLoad/Store on images
OpAtomicLoad/Store should have pointer to images just like the rest of the
atomic operators. These couple of lines were poorly copied from the
ssbo/shared_vars cases (the only ones currently tests by the CTS).
Fixes
2afb950161f8 ("spirv/nir: Add support for OpAtomicLoad/Store")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Eric Anholt [Wed, 7 Sep 2016 02:45:51 +0000 (19:45 -0700)]
nir: Allow opt_peephole_sel to be more aggressive in flattening IFs.
VC4 was running into a major performance regression from enabling control
flow in the glmark2 conditionals test, because of short if statements
containing an ffract.
This pass seems like it was was trying to ensure that we only flattened
IFs that should be entirely a win by guaranteeing that there would be
fewer bcsels than there were MOVs otherwise. However, if the number of
ALU ops is small, we can avoid the overhead of branching (which itself
costs cycles) and still get a win, even if it means moving real
instructions out of the THEN/ELSE blocks.
For now, just turn on aggressive flattening on vc4. i965 will need some
tuning to avoid regressions. It does looks like this may be useful to
replace freedreno code.
Improves glmark2 -b conditionals:fragment-steps=5:vertex-steps=0 from 47
fps to 95 fps on vc4.
vc4 shader-db:
total instructions in shared programs: 101282 -> 99543 (-1.72%)
instructions in affected programs: 17365 -> 15626 (-10.01%)
total uniforms in shared programs: 31295 -> 31172 (-0.39%)
uniforms in affected programs: 3580 -> 3457 (-3.44%)
total estimated cycles in shared programs: 225182 -> 223746 (-0.64%)
estimated cycles in affected programs: 26085 -> 24649 (-5.51%)
v2: Update shader-db output.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v1)
Kenneth Graunke [Wed, 21 Sep 2016 18:51:43 +0000 (11:51 -0700)]
docs: Mark ES 3.2 "all done" for i965/gen9+.
Kenneth Graunke [Wed, 21 Sep 2016 18:49:24 +0000 (11:49 -0700)]
docs: Add ES 3.2 to release notes.
Brian Paul [Tue, 20 Sep 2016 22:05:48 +0000 (16:05 -0600)]
gallium/util: add comment on util_is_format_compatible()
From reading the code, it's not obvious what is src/dest compatible.
The list of a->b copy-compatible formats comes from Jose's original
check-in message, with some format name updates.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Fri, 16 Sep 2016 21:22:51 +0000 (15:22 -0600)]
svga: minor simplification in svga_validate_surface_view()
Get rid of unneeded local var.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Mon, 19 Sep 2016 22:34:17 +0000 (16:34 -0600)]
svga: remove disable_shader debug variable
Never used, AFAIK.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Kenneth Graunke [Wed, 21 Sep 2016 03:33:54 +0000 (20:33 -0700)]
i965: Enable ES 3.2 on Skylake.
It's already advertised because the version.c extension checks are
fulfilled, but we didn't actually claim support, so trying to create
a ES 3.2 context would fail.
It's all done, and the CTS results look good, so let's turn it on.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Wed, 14 Sep 2016 04:10:13 +0000 (21:10 -0700)]
nir/spirv/glsl450: Add support for the InterpolateAt opcodes
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Jason Ekstrand [Wed, 14 Sep 2016 04:09:28 +0000 (21:09 -0700)]
nir/spirv: Claim support for SampleRateShading
We already support all of the decorations that require this capability.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Jason Ekstrand [Fri, 16 Sep 2016 02:47:49 +0000 (19:47 -0700)]
nir/spirv: Bring back the spirv2nir helper binary
This was something that I wrote in the early days of the spirv_to_nir code
but deleted once we had a real driver. However, in the absence of a
shader_runner equivalent, it's extremely useful for debugging the
spirv_to_nir code so let's bring it back.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Chuanbo Weng [Tue, 13 Sep 2016 17:07:18 +0000 (01:07 +0800)]
i965: implement querying __DRI_IMAGE_ATTRIB_OFFSET.
Implement querying this attribute in intelImageExtension and bump
version of intelImageExtension.
Signed-off-by: Chuanbo Weng <chuanbo.weng@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Chuanbo Weng [Tue, 13 Sep 2016 17:07:10 +0000 (01:07 +0800)]
egl: return corresponding offset of EGLImage instead of 0.
The offset should not always be 0. For example, if EGLImage is
created from a 2D texture with EGL_GL_TEXTURE_LEVEL=1, then the
offset should be the actual start of miplevel 1 in bo.
v2: Add version check of __DRIimageExtension implementation
(Suggested by Axel Davy).
v3: Don't add version check of __DRIimageExtension implementation.
Set the offset only when queryImage() succeeds. (Suggested by Emil
Velikov)
Signed-off-by: Chuanbo Weng <chuanbo.weng@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
[Emil Velikov: coding style fixes]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Chuanbo Weng [Tue, 13 Sep 2016 17:07:02 +0000 (01:07 +0800)]
dri: add offset attribute and bump version of EGLImage extensions.
Offset is useful for buffer sharing with other components, so add
it to queryImage attributes.
Signed-off-by: Chuanbo Weng <chuanbo.weng@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Francisco Jerez [Fri, 16 Sep 2016 04:43:18 +0000 (21:43 -0700)]
i965/ir: Test thread dispatch packing assumptions.
Not [originally] intended for upstream. Should cause a GPU hang if
some thread is executed with a non-contiguous dispatch mask breaking
assumptions of brw_stage_has_packed_dispatch(). Doesn't cause any
CTS, DEQP or Piglit regressions, while replacing
brw_stage_has_packed_dispatch() with a dummy implementation that
unconditionally returns true on top of this patch causes multiple GPU
hangs.
v2: Refactor into a separate function instead of emitting the test
code directly from emit_nir_code(), drop VEC4 test and clean up
slightly for upstream. (Jason)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Francisco Jerez [Fri, 16 Sep 2016 00:24:10 +0000 (17:24 -0700)]
i965/ir: Pass identity mask to brw_find_live_channel() in the packed dispatch case.
This avoids emitting a few extra instructions required to take the
dispatch mask into account when it's known to be tightly packed.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Francisco Jerez [Fri, 16 Sep 2016 00:20:23 +0000 (17:20 -0700)]
i965/ir: Skip eliminate_find_live_channel() for stages with sparse thread dispatch.
The eliminate_find_live_channel optimization eliminates
FIND_LIVE_CHANNEL instructions in cases where control flow is known to
be uniform, and replaces them with 'MOV 0', which in turn unblocks
subsequent elimination of the BROADCAST instruction frequently used on
the result of FIND_LIVE_CHANNEL. This is however not correct in
per-sample fragment shader dispatch because the PSD can dispatch a
fully unlit sample under certain conditions. Disable the optimization
in that case.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
v2: Add devinfo argument to brw_stage_has_packed_dispatch() to
implement hardware generation check.
Jason Ekstrand [Wed, 14 Sep 2016 22:09:33 +0000 (15:09 -0700)]
i965/fs: Take Dispatch/Vector mask into account in FIND_LIVE_CHANNEL
On at least Sky Lake, ce0 does not contain the full story as far as enabled
channels goes. It is possible to have completely disabled channels where
the corresponding bits in ce0 are 1. In order to get the correct execution
mask, you have to mask off those channels which were disabled from the
beginning by taking the AND of ce0 with either sr0.2 or sr0.3 depending on
the shader stage. Failure to do so can result in FIND_LIVE_CHANNEL
returning a completely dead channel.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: Francisco Jerez <currojerez@riseup.net>
[ Francisco Jerez: Fix a couple of typos, add mask register type
assertion, clarify reason why ce0 can have bits set for disabled
channels, clarify that this may only be a problem when thread
dispatch doesn't pack channels tightly in the SIMD thread. Apply
same treatment to Align16 path. ]
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Jason Ekstrand [Wed, 14 Sep 2016 22:09:32 +0000 (15:09 -0700)]
i965/reg: Make brw_sr0_reg take a subnr and return a vec1 reg
The state register sr0 is really a collection of dwords not a SIMD8
anything. It's much more convenient for brw_sr0_reg to return the
particular dword you're looking for rather than a giant blob you have to
massage into what you want.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
[ Francisco Jerez: Trivial simplification of brw_ud1_reg(). ]
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Lionel Landwerlin [Wed, 7 Sep 2016 16:28:44 +0000 (17:28 +0100)]
anv: pipeline: use correct number of thread for compute
Reproduces this commit :
commit
0fb85ac08d61d365e67c8f79d6955e9f89543560
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Mon Jun 6 21:37:34 2016 -0700
i965: Use the correct number of threads for compute shaders.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lionel Landwerlin [Wed, 7 Sep 2016 16:32:49 +0000 (17:32 +0100)]
anv: allocator: correct scratch space for haswell
This reproduces this commit :
commit
2213ffdb4bb79856f0556bdf2bfd4bdf57720232
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Mon Jun 6 21:37:34 2016 -0700
i965: Allocate scratch space for the maximum number of compute threads.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lionel Landwerlin [Wed, 7 Sep 2016 16:19:35 +0000 (17:19 +0100)]
anv: device: calculate compute thread numbers using subslices numbers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Nicolai Hähnle [Thu, 15 Sep 2016 10:17:56 +0000 (12:17 +0200)]
gallivm: support negation on 64-bit integers
This should be analogous to 32-bit integers.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Dave Airlie [Fri, 10 Jun 2016 02:11:01 +0000 (12:11 +1000)]
radeonsi: prepare 64-bit integer support. (v2)
v2:
- no PIPE_CAP_INT64 yet
- emit DIV/MOD without the divide-by-zero workaround
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Dave Airlie [Thu, 9 Jun 2016 00:19:49 +0000 (10:19 +1000)]
gallivm/llvmpipe: prepare support for ARB_gpu_shader_int64.
This enables 64-bit integer support in gallivm and
llvmpipe.
v2: add conversion opcodes.
v3:
- PIPE_CAP_INT64 is not there yet
- restrict DIV/MOD defaults to the CPU, as for 32 bits
- TGSI_OPCODE_I2U64 becomes TGSI_OPCODE_U2I64
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Dave Airlie [Thu, 9 Jun 2016 00:18:42 +0000 (10:18 +1000)]
tgsi/softpipe: prepare ARB_gpu_shader_int64 support. (v3)
This adds all the opcodes to tgsi_exec for softpipe to use.
v2: add conversion opcodes.
v3:
- no PIPE_CAP_INT64 yet
- change TGSI_OPCODE_I2U64 to TGSI_OPCODE_U2I64
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Dave Airlie [Thu, 9 Jun 2016 00:16:22 +0000 (10:16 +1000)]
gallium/tgsi: add support for 64-bit integer immediates.
This adds support to TGSI for 64-bit integer immediates.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 9 Jun 2016 00:14:51 +0000 (10:14 +1000)]
gallium: add opcode and types for 64-bit integers. (v3)
This just adds the basic support for 64-bit opcodes,
and the new types.
v2: add conversion opcodes.
add documentation.
v3:
- make docs more consistent
- change TGSI_OPCODE_I2U64 to TGSI_OPCODE_U2I64
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Kenneth Graunke [Mon, 30 Nov 2015 23:47:13 +0000 (15:47 -0800)]
i965: Rename intelScreen to screen.
"intelScreen" is wordy and also doesn't fit our style guidelines.
"screen" is shorter, which is nice, because we use it fairly often.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Tue, 1 Dec 2015 00:04:08 +0000 (16:04 -0800)]
i965: Rename __DRIScreen pointers to "dri_screen".
I want to use "screen" as the variable name for a struct intel_screen
pointer. This means that we can't use it for __DRIscreen pointers.
Sometimes we called it "screen", sometimes "sPriv", sometimes
"driScrnPriv", and sometimes "psp" (Pointer to Screen Private?).
The last one is particularly confusing because we use "psp" to refer to
the Gen4 PIPELINED_STATE_POINTERS packet as well.
Let's be consistent. "dri_screen" is clear, and it's not used often
enough that I'm worried about the verbosity.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Dylan Baker [Mon, 19 Sep 2016 22:36:09 +0000 (15:36 -0700)]
mesa: Implement ARB_shader_viewport_layer_array for i965
This extension is a combination of AMD_vertex_shader_viewport_index and
AMD_vertex_shader_layer, making it rather trivial to implement.
For gallium I *think* this needs a new cap because of the addition of
support in tessellation evaluation shaders, and since I don't have any
hardware to test it on, I've left that for someone else to wire up.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Leo Liu [Tue, 20 Sep 2016 14:09:23 +0000 (10:09 -0400)]
radeon/vce: add firmware support for version 52.8.3
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Indrajit Das [Thu, 15 Sep 2016 05:01:15 +0000 (10:31 +0530)]
st/omx/dec/h265: Correct the timestamping
(derived from commit
3b6bda665a5a890f2c98e19d2939d7de92b8cb4c)
v2: fix the tabs(Leo)
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nishanth Peethambaran <nishanth.peethambaran@amd.com>
Signed-off-by: Indrajit Das <indrajit-kumar.das@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Lionel Landwerlin [Fri, 9 Sep 2016 10:22:59 +0000 (11:22 +0100)]
aubinator: add a custom handler for immediate register load
Transforming this :
0x00c77084: 0x11000001: MI_LOAD_REGISTER_IMM
0x00c77088: 0x0000b020 : Dword 1
Register Offset: 0x0000b020
0x00c7708c: 0x00880038 : Dword 2
Data DWord:
8912952
Into this:
0x007880f0: 0x11000001: MI_LOAD_REGISTER_IMM
0x007880f4: 0x0000b020 : Dword 1
Register Offset: 0x0000b020
0x007880f8: 0x00080040 : Dword 2
Data DWord: 524352
register L3CNTLREG2 (0xb020) : 0x80040
SLM Enable: 0
URB Allocation: 32
URB Low Bandwidth: 0
RO Allocation: 32
RO Low Bandwidth: 0
DC Allocation: 0
DC Low Bandwidth: 0
v2: Drop unused arguments (Sirisha)
Print out register name
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Nayan Deshmukh [Tue, 20 Sep 2016 04:52:12 +0000 (10:22 +0530)]
st/va: flush the context before calling flush_frontbuffer(v2)
so that the texture is rendered to back buffer before calling
flush_frontbuffer and can be copied to a different buffer in
the function
v2: change comment style
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Nayan Deshmukh [Tue, 20 Sep 2016 04:52:11 +0000 (10:22 +0530)]
st/vdpau: flush the context before calling flush_frontbuffer
so that the texture is rendered to back buffer before calling
flush_frontbuffer and can be copied to a different buffer in
the function
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Nayan Deshmukh [Tue, 20 Sep 2016 04:52:10 +0000 (10:22 +0530)]
vl/dri3: handle the case of different GPU(v4.2)
In case of prime when rendering is done on GPU other then the
server GPU, use a seprate linear buffer for each back buffer
which will be displayed using present extension.
v2: Use a seprate linear buffer for each back buffer (Michel)
v3: Change variable names and fix coding style (Leo and Emil)
v4: Use PIPE_BIND_SAMPLER_VIEW for back buffer in case when
a seprate linear buffer is used (Michel)
v4.1: remove empty line
v4.2: destroy the context and handle the case when
create_context fails (Emil)
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Ilia Mirkin [Wed, 14 Sep 2016 23:16:43 +0000 (19:16 -0400)]
st/vdpau: fix argument type to vlVdpOutputSurfaceDMABuf
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tim Rowley [Mon, 12 Sep 2016 18:08:12 +0000 (13:08 -0500)]
swr: [rasterizer core] Better thread destruction
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Fri, 9 Sep 2016 21:44:21 +0000 (16:44 -0500)]
swr: [rasterizer jitter] Fix missing end-of-file newline
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Tue, 6 Sep 2016 17:36:02 +0000 (12:36 -0500)]
swr: [rasterizer core] Add macros for mapping ArchRast to buckets
Switch all RDTSC_START/STOP macros to use AR_BEGIN/END macros.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Kenneth Graunke [Thu, 15 Sep 2016 09:10:23 +0000 (02:10 -0700)]
glsl: Skip "unsized arrays aren't allowed" check for TCS/TES/GS vars.
Fixes ESEXT-CTS.draw_elements_base_vertex_tests.AEP_shader_stages and
ESEXT-CTS.texture_cube_map_array.texture_size_tesselation_con_sh.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Sun, 18 Sep 2016 21:48:05 +0000 (23:48 +0200)]
nvc0: get rid of nvc0_stage_sampler_states_bind_range()
Same thing as nvc0_stage_set_sampler_views_range().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Sun, 18 Sep 2016 21:48:04 +0000 (23:48 +0200)]
nvc0: get rid of nvc0_stage_set_sampler_views_range()
This function was quite similar to nvc0_stage_set_sampler_views()
and I don't see any reasons to not remove it.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Sun, 18 Sep 2016 10:33:12 +0000 (12:33 +0200)]
nv50/ir: optimize SUB(a, b) to MOV(a - b)
This helps shaders in UE4 demos, especially with Elemental
(+1% perf). This optimization reduces spilling usage in one
shader which explains the little gain.
GF100/GK104:
total instructions in shared programs :
2838551 ->
2838045 (-0.02%)
total gprs used in shared programs :396706 -> 396684 (-0.01%)
total local used in shared programs :34432 -> 34416 (-0.05%)
local gpr inst bytes
helped 1 19 112 112
hurt 0 0 0 0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Sun, 18 Sep 2016 12:42:20 +0000 (14:42 +0200)]
gk110/ir: fix wrong emission of OP_NOT
This should emit src0 instead of src1.
Found by inspection.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Martina Kollarova [Fri, 16 Sep 2016 15:54:53 +0000 (18:54 +0300)]
r600g/sb: fix struct/class declaration conflicts
A couple of forward-declarations were causing warnings in clang:
'value' defined as a class here but previously declared as a struct
[-Wmismatched-tags]
Signed-off-by: Martina Kollarova <martina.kollarova@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Eric Anholt [Mon, 15 Aug 2016 15:58:27 +0000 (08:58 -0700)]
i965: Drop assertion about buffer offset at draw time.
Given robust access, we should just be returning zeroes if the user gives
us a base pointer that's too big, which is what was happens on a release
build. This was caught by a webgl conformance test for out-of-bounds
draws on servo.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lars Hamre [Tue, 13 Sep 2016 19:08:00 +0000 (13:08 -0600)]
tgsi: Enable returns from within loops
Fixes the following piglit test (for softpipe):
/spec/glsl-1.10/execution/fs-loop-return
Signed-off-by: Lars Hamre <chemecse@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Fri, 16 Sep 2016 16:50:20 +0000 (09:50 -0700)]
svga: relax restriction of compressed formats for texture upload
This patch relaxes the restriction of compressed formats for texture
upload buffer. For now, 3D texture with compressed format
is still not supported in the texture upload buffer path.
As Brian noted, ETQW does many texture updates with glCompressedTexSubImage.
This patch greatly improves the performance of the ETQW trace.
Tested with ETQW, MTT piglit, glretrace, conform, viewperf
v2: Per Brian's suggestion, removed the subregion boundary check.
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Thu, 15 Sep 2016 18:07:18 +0000 (12:07 -0600)]
svga: skip query flush if we already have the query result
This reduces the number of times we flush in some situations (the
arbocclude demo is one trivial example).
Tested with Piglit, ETQW, Sauerbraten, arbocclude.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Wed, 14 Sep 2016 18:33:15 +0000 (12:33 -0600)]
svga: remove unneeded svga_context_flush() in svga_end_query()
Since commit
99d8fe20abe1f we don't have to flush the command buffer when
we end a query.
Tested with Piglit, Sauerbraten, arbocclude, ETQW (noticably faster now).
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Charmaine Lee [Tue, 6 Sep 2016 18:29:41 +0000 (11:29 -0700)]
svga: use upload buffer for upload texture.
With this patch, when running with vgpu10, instead of mapping directly to the
guest backed memory for texture update, we'll use the texture upload buffer
and use the transfer from buffer command to update the host side texture memory.
This optimization yields about 20% performance improvement with
Lightsmark2008 and about 40% with Tropics.
Tested with Lightsmark2008, Tropics, Heaven, MTT piglit, glretrace, conform.
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Fri, 2 Sep 2016 00:45:28 +0000 (17:45 -0700)]
svga: refactor svga_texture_transfer_map/unmap functions
Split the functions into separate functions for dma and direct map to make
the code more readable.
Tested with MTT piglit, glretrace, viewperf, conform, various OpenGL apps
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Thu, 1 Sep 2016 20:40:34 +0000 (13:40 -0700)]
svga: add SVGA3d_vgpu10_TransferFromBuffer()
Also add the corresponding dump function to dump the TransferFromBuffer command.
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Mon, 12 Sep 2016 21:21:40 +0000 (14:21 -0700)]
svga: single sample surface can be created as non-multisamples surface
With this patch, single sample surface will be created as non-multisamples
surface.
Tested with piglit, glretrace.
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Wed, 7 Sep 2016 18:46:26 +0000 (11:46 -0700)]
svga: fix memory leak with sampler state
This patch fixes a memory leak with sampler state when piglit
is run with HW version 11. Sampler state clean up was incorrectly skipped
in svga_cleanup_sampler_state() for vgpu9.
Tested with piglit.
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Fri, 2 Sep 2016 20:06:00 +0000 (14:06 -0600)]
svga: fix prim type check/assignment in translate_indices()
Left over test code spotted by Sinclair.
Tested with piglit, Google Earth, Lightsmark, Heaven4, glretraces, etc.
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Charmaine Lee [Thu, 1 Sep 2016 18:07:59 +0000 (11:07 -0700)]
svga: use SVGA3D_QUERYTYPE_MAX for svga query type check
Use SVGA3D_QUERYTYPE_MAX instead of SVGA_QUERY_MAX for
svga query type check.
Tested with various OpenGL apps with GALLIUM_HUD set.
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Wed, 31 Aug 2016 21:49:52 +0000 (14:49 -0700)]
svga: split the num-resources-mapped hud to textures & buffers
Replace the num-resources-mapped hud with
num-textures-mapped and num-buffers-mapped, so we can
differentiate the map counts for these two different resources.
Reviewed-by: Brian Paul <brianp@vmware.com>
Charmaine Lee [Tue, 30 Aug 2016 23:40:12 +0000 (16:40 -0700)]
svga: change svga hud defines to enums
This will make it easier to add new hud types.
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Wed, 31 Aug 2016 20:49:41 +0000 (14:49 -0600)]
svga: implement an index buffer translation cache
Some OpenGL apps, like Cinebench R15, have many glDrawElements(GL_QUADS)
calls. Since we don't directly support quads we have to convert these
calls into GL_TRIANGLES which involves generating a new index buffer.
This patch saves the new/translated index buffer in the hope that it
can be reused for a later draw call.
Cinebench R15 increases by about 20% with this change.
The NobelClinician Viewer app also hits this code.
Tested with full piglit run.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Thu, 1 Sep 2016 00:28:00 +0000 (18:28 -0600)]
svga: try to emit fewer buffer rebind commands
If a consecutive sequence of drawing commands references the same
vertex/index buffers, there should be no need to rebind the surfaces
for the second and subsequent drawing commands.
Apps that use multiple display lists benefit from this since the vertex
data for several display lists is often stored in one buffer.
In the case of the legacy E&S Glaze demo, this reduces the size of our
command buffers from 91KB to 44KB. One WSI Fusion trace shows a 33%
reduction in command buffer sizes.
Tested with full piglit run.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Mon, 15 Aug 2016 15:16:05 +0000 (09:16 -0600)]
svga: reduce unmapping/remapping of the default constant buffer
Previously, every time we put shader constants into the default constant
buffer we called u_upload_alloc(), which mapped the buffer, and
u_upload_unmap(). We had to unmap the buffer before calling
svga_buffer_handle() to get the winsys handle for the buffer. But we
really only need to do that the first time we reference the const buffer.
Now we try to keep the upload manager's buffer mapped until we fill it or
flush the command buffer.
v2: add additional comment on the buffer unmapping code in
svga_context_flush(), per Charmaine.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 12 Aug 2016 16:44:22 +0000 (10:44 -0600)]
svga: optimize memcpy() in svga_buffer_update_hw()
When we migrate a buffer from sw/malloc storage to a hardware buffer,
don't memcpy the whole buffer, just copy the part we've written to.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Neha Bhende [Thu, 1 Sep 2016 16:43:54 +0000 (09:43 -0700)]
svga: Use comparison between svga texture types to use PredCopyRegion command
PredCopyRegion support copy between same type of textures.
Instead of comparing src and dst pipe texture type, compare svga texture
type which can avoid some software fallback.
for example, it avoids a software blit with the Redway3D Aston demo.
Tested piglit tests on VGPU9 and VGPU10 on GL/DX11Renderer, Redway3D Aston demo
v2: some nit pick suggested by Charmaine.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Neha Bhende [Thu, 1 Sep 2016 16:40:43 +0000 (09:40 -0700)]
svga: Add function svga_resource_type()
This function returns svga texture type for corresponding pipe texture.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Samuel Pitoiset [Thu, 15 Sep 2016 16:11:56 +0000 (18:11 +0200)]
nvc0/ir: fix subops for IMAD
Offset was wrong, it's at bit 8, not 4. Also, uses subr instead
of sub when src2 has neg. Similar to GK110 now.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Samuel Pitoiset [Tue, 13 Sep 2016 17:37:24 +0000 (19:37 +0200)]
nvc0/ir: fix comments about instructions info
The comment for the commutative flags was wrong because OP_MUL is
before OP_MAD. While we are at it add missing opcodes, and fix
the comment about the short forms.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Kenneth Graunke [Thu, 15 Sep 2016 09:10:24 +0000 (02:10 -0700)]
mesa: Move buffers-unmapped earlier in check_valid_to_render().
This needs to be above the switch on API, as that can return true
(valid to render) before this error check even had a chance to run.
Fixes ESEXT-CTS.draw_elements_base_vertex_tests.invalid_mapped_bos,
which worked before commit
72f1566f90c434c7752d8405193eec68d6743246.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Kenneth Graunke [Thu, 15 Sep 2016 09:10:22 +0000 (02:10 -0700)]
mesa: Expose GL_CONTEXT_FLAGS in ES 3.2.
Fixes four ES32-CTS.context_flags.* tests.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tom Stellard [Wed, 20 Jul 2016 14:32:59 +0000 (14:32 +0000)]
radeonsi/compute: Use the HSA abi for non-TGSI compute shaders v3
This patch switches non-TGSI compute shaders over to using the HSA
ABI described here:
https://github.com/RadeonOpenCompute/ROCm-Docs/blob/master/AMDGPU-ABI.md
The HSA ABI provides a much cleaner interface for compute shaders and allows
us to share more code in the compiler with the HSA stack.
The main changes in this patch are:
- We now pass the scratch buffer resource into the shader via user sgprs
rather than using relocations.
- Grid/Block sizes are now passed to the shader via the dispatch packet
rather than at the beginning of the kernel arguments.
Typically for HSA, the CP firmware will create the dispatch packet and set
up the user sgprs automatically. However, in Mesa we let the driver do
this work. The main reason for this is that I haven't researched how to
get the CP to do all these things, and I'm not sure if it is supported
for all GPUs.
v2:
- Add comments explaining why we are setting certain bits of the scratch
resource descriptor.
v3:
- Use amdgcn-mesa-mesa3d triple instead of amdgcn--mesa3d.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tom Stellard [Tue, 19 Jul 2016 15:25:06 +0000 (15:25 +0000)]
radeonsi/compute: Add some more debug printfs
Marek Olšák [Fri, 9 Sep 2016 00:04:00 +0000 (02:04 +0200)]
glsl: remove interpolateAt* instructions for demoted inputs
This fixes 8 fs-interpolateat* piglit crashes on radeonsi, because it can't
handle non-input operands in interpolateAt*.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 8 Sep 2016 19:02:29 +0000 (21:02 +0200)]
mesa: fix glGetFramebufferAttachmentParameteriv w/ on-demand FRONT_BACK alloc
This fixes 66 CTS tests on st/mesa.
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Serge Martin [Tue, 30 Aug 2016 08:10:01 +0000 (10:10 +0200)]
clover: fix getting scalar args api size
This fix getting the size of a struct arg. vec3 types still work ok.
Only buit-in args need to have power of two alignment, getTypeAllocSize
reports the correct size in all cases.
Acked-by: Francisco Jerez <currojerez@riseup.net>
Ilia Mirkin [Fri, 16 Sep 2016 16:03:31 +0000 (12:03 -0400)]
docs: add GL_ARB_gl_spirv to features list
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Rob Clark [Fri, 16 Sep 2016 15:54:55 +0000 (11:54 -0400)]
ttn: fix warning after
7bf76563e
Signed-off-by: Rob Clark <robdclark@gmail.com>
Brian Paul [Thu, 15 Sep 2016 21:32:59 +0000 (15:32 -0600)]
gallium/docs: document alpha_to_coverage and alpha_to_one blend state
The gallium interface defines these like DX10. Note that OpenGL ignores
these options if MSAA is disabled or the dest buffer doesn't support
MSAA.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Thu, 15 Sep 2016 21:31:43 +0000 (15:31 -0600)]
st/mesa: update comment in st_atom_msaa.c
The old comment was a copy and paste mistake. Indent another comment.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Thu, 15 Sep 2016 21:13:07 +0000 (15:13 -0600)]
st/mesa: only enable MSAA coverage options when we have a MSAA buffer
Regardless of whether GL_MULTISAMPLE is enabled (it's enabled by default)
we should not set the alpha_to_coverage or alpha_to_one flags if the
current drawing buffer does not do MSAA.
This fixes the new piglit gl-1.3-alpha_to_coverage_nop test.
ETQW is a game that enables GL_SAMPLE_ALPHA_TO_COVERAGE without MSAA.
Shrubs along the side of roads were invisible because fragments with
alpha < 0.5 were being discarded (zero coverage).
v2: remove ctx->DrawBuffer != NULL check.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Dave Airlie [Thu, 15 Sep 2016 01:08:28 +0000 (02:08 +0100)]
spirv: use subpass image type (v1.1)
This adds support for the input attachments subpass type
to the SPIRV->NIR pass.
v1.1: drop handling from vtn_handle_texture
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 15 Sep 2016 01:08:12 +0000 (02:08 +0100)]
glsl: add subpass image type (v2)
SPIR-V/Vulkan have a special image type for input attachments
called the subpass type. It has different characteristics than
other images types.
The main one being it can only be an input image to fragment
shaders and loads from it are relative to the frag coord.
This adds support for it to the GLSL types. Unfortunately
we've run out of space in the sampler dim in types, so we
need to use another bit.
v2: Fixup subpass input name (Jason)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Kenneth Graunke [Fri, 26 Aug 2016 20:01:13 +0000 (13:01 -0700)]
isl: Finish tiling filtering for Gen6.
Gen6 only has one additional restriction over Gen7+, so we just add it
to the existing gen7 function (which actually covers later gens too).
This should stop FINISHME spew when running GL on Sandybridge.
v2: Fix bytes per block vs. bits per block confusion (Jason) and
rename function to gen6_filter_tiling (Jason and Chad).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ilia Mirkin [Sun, 28 Aug 2016 23:55:05 +0000 (19:55 -0400)]
i965: enable ARB_ES3_2_compatibility on gen8+
Note that ASTC support is not actually mandated for this extension to be
exposed.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 14 Sep 2016 17:42:42 +0000 (10:42 -0700)]
i965/nir: Roll set_default_interpolation into lower_fs_inputs
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 14 Sep 2016 17:39:52 +0000 (10:39 -0700)]
i965/fs: Use NIR for handling forced per-sample interpolation
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 14 Sep 2016 17:29:38 +0000 (10:29 -0700)]
nir: Add a flag to lower_io to force "sample" interpolation
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 14 Sep 2016 17:04:47 +0000 (10:04 -0700)]
i965/fs: Use sample interpolation for interpolateAtCentroid in persample mode
From the ARB_gpu_shader5 spec:
The built-in functions interpolateAtCentroid() and interpolateAtSample()
will sample variables as though they were declared with the "centroid"
or "sample" qualifiers, respectively.
When running with persample dispatch forced by the API, we interpolate
anything that isn't flat as if it's qualified by "sample". In order to
keep interpolateAtCentroid() consistent with the "centroid" qualifier, we
need to make interpolateAtCentroid() do sample interpolation instead.
Nothing in the GLSL spec guarantees that the result of
interpolateAtCentroid is uniform across samples in any way, so this is a
perfectly fine thing to do.
Fixes 8 of the new dEQP-VK.pipeline.multisample_interpolation.* Vulkan CTS
tests that specifically validate consistency between the "sample" qualifier
and interpolateAtSample()
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Wed, 14 Sep 2016 18:16:18 +0000 (12:16 -0600)]
mesa: check for no matrix change in _mesa_LoadMatrixf()
Some apps issue redundant glLoadMatrixf() calls with the same matrix.
Try to avoid setting dirty state in that situation.
This reduces the number of constant buffer updates by about half in
ET Quake Wars.
Tested with Piglit, ETQW, Sauerbraten, Google Earth, etc.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jon Turney [Mon, 11 Jul 2016 20:38:16 +0000 (21:38 +0100)]
direct-to-native-GL for GLX clients on Cygwin ("Windows-DRI")
Structurally, this is very similar to the existing Apple-DRI code, except I
have chosen to implement this using the __GLXDRIdisplay, etc. vtables (as
suggested originally in [1]), rather than a maze of ifdefs. This also means
that LIBGL_ALWAYS_SOFTWARE and LIBGL_ALWAYS_INDIRECT work as expected.
[1] https://lists.freedesktop.org/archives/mesa-dev/2010-May/000756.html
This adds:
* the Windows-DRI extension protocol headers and the windowsdriproto.pc
file, for use in building the Windows-DRI extension for the X server
* a Windows-DRI extension helper client library
* a Windows-specific DRI implementation for GLX clients
The server is queried for Windows-DRI extension support on the screen before
using it (to detect the case where WGL is disabled or can't be activated).
The server is queried for fbconfigID to pixelformatindex mapping, which is
used to augment glx_config.
The server is queried for a native handle for the drawable (which is of a
different type for windows, pixmaps and pbuffers), which is used to augment
__GLXDRIdrawable.
Various GLX extensions are enabled depending on if the equivalent WGL
extension is available.
Emil Velikov [Thu, 15 Sep 2016 10:31:06 +0000 (11:31 +0100)]
docs: add news item and link release notes for 12.0.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 15 Sep 2016 10:29:24 +0000 (11:29 +0100)]
docs: add sha256 checksums for 12.0.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
09460b8cf7ddac4abb46eb6439314b29954c76a6)
Emil Velikov [Thu, 15 Sep 2016 09:18:54 +0000 (10:18 +0100)]
docs: add release notes for 12.0.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
d79b2e7bf30ad6d1fa43f30940a64ed9fd0aa9c0)