OSDN Git Service
Chandler Carruth [Fri, 25 Jul 2014 09:19:23 +0000 (09:19 +0000)]
[SDAG] Enable the new assert for out-of-range result numbers in
SDValues, fixing the two bugs left in the regression suite.
The key for both of these was the use a single value type rather than
a VTList which caused an unintentionally single-result merge-value node.
Fix this by getting the appropriate VTList in place.
Doing this exposed that the comments in x86's code abouth how MUL_LOHI
operands are handle is wrong. The bug with the use of out-of-range
result numbers was hiding the bug about the order of operands here (as
best i can tell). There are more places where the code appears to get
this backwards still...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213931
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Chandler Carruth [Fri, 25 Jul 2014 09:19:18 +0000 (09:19 +0000)]
[SDAG] Don't insert the VRBase into a mapping from SDValues when the def
doesn't actually correspond to an SDValue at all. Fixes most of the
remaining asserts on out-of-range SDValue result numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213930
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Matt Arsenault [Fri, 25 Jul 2014 07:56:42 +0000 (07:56 +0000)]
Store nodes only have 1 result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213928
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Chandler Carruth [Fri, 25 Jul 2014 07:23:23 +0000 (07:23 +0000)]
[SDAG] Start plumbing an assert into SDValues that we don't form one
with a result number outside the range of results for the node.
I don't know how we managed to not really check this very basic
invariant for so long, but the code is *very* broken at this point.
I have over 270 test failures with the assert enabled. I'm committing it
disabled so that others can join in the cleanup effort and reproduce the
issues. I've also included one of the obvious fixes that I already
found. More fixes to come.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213926
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Akira Hatanaka [Fri, 25 Jul 2014 05:12:49 +0000 (05:12 +0000)]
[ARM] In thumb mode, emit directive ".code 16" before file level inline
assembly instructions.
This is necessary to ensure ARM assembler switches to Thumb mode before it
starts assembling the file level inline assembly instructions at the beginning
of a .s file.
<rdar://problem/
17757232>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213924
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Lang Hames [Fri, 25 Jul 2014 04:50:08 +0000 (04:50 +0000)]
[X86] Add comments to clarify some non-obvious lines in the stackmap-nops.ll
testcases.
Based on code review from Philip Reames. Thanks Philip!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213923
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David Majnemer [Fri, 25 Jul 2014 04:30:11 +0000 (04:30 +0000)]
llvm-vtabledump: use a std::map instead of a StringMap for VBTables
StringMap doesn't guarantee any particular iteration order,
this is suboptimal when comparing llvm-vtabledump's output for two
object files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213921
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Ehsan Akhgari [Fri, 25 Jul 2014 02:51:57 +0000 (02:51 +0000)]
Fix a warning in CoverageMappingReader.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213920
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Lang Hames [Fri, 25 Jul 2014 02:29:19 +0000 (02:29 +0000)]
[X86] Clarify some stackmap shadow optimization code as based on review
feedback from Eric Christopher.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213917
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Bill Schmidt [Fri, 25 Jul 2014 01:55:55 +0000 (01:55 +0000)]
[PATCH][PPC64LE] Correct little-endian usage of vmrgh* and vmrgl*.
Because the PowerPC vmrgh* and vmrgl* instructions have a built-in
big-endian bias, it is necessary to swap their inputs in little-endian
mode when using them to implement a vector shuffle. This was
previously missed in the vector LE implementation.
There was already logic to distinguish between unary and "normal"
vmrg* vector shuffles, so this patch extends that logic to use a third
option: "swapped" vmrg* vector shuffles that are used for little
endian in place of the "normal" ones.
I've updated the vec-shuffle-le.ll test to check for the expected
register ordering on the generated instructions.
This bug was discovered when testing the LE and ELFv2 patches for
safety if they were backported to 3.4. A different vectorization
decision was made in 3.4 than on mainline trunk, and that exposed the
problem. I've verified this fix takes care of that issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213915
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Alex Lorenz [Thu, 24 Jul 2014 23:57:54 +0000 (23:57 +0000)]
Add code coverage mapping data, reader, and writer.
This patch implements the data structures, the reader and
the writers for the new code coverage mapping system.
The new code coverage mapping system uses the instrumentation
based profiling to provide code coverage analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213910
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Alex Lorenz [Thu, 24 Jul 2014 23:55:56 +0000 (23:55 +0000)]
Add code coverage mapping data, reader, and writer.
This patch implements the data structures, the reader and
the writers for the new code coverage mapping system.
The new code coverage mapping system uses the instrumentation
based profiling to provide code coverage analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213909
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Kevin Enderby [Thu, 24 Jul 2014 23:31:52 +0000 (23:31 +0000)]
Add an implementation for llvm-nm’s -print-file-name option (aka -o and -A).
The -print-file-name option in llvm-nm is to precede each symbol
with the object file it came from. While code for the parsing of this
option and its aliases existed there was no code to implement it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213906
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David Majnemer [Thu, 24 Jul 2014 23:26:54 +0000 (23:26 +0000)]
Opportunistically fix the builders
A builder complained that it couldn't find llvm-vtabledump, this is
probably because it wasn't a dependency of the 'test' target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213905
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David Majnemer [Thu, 24 Jul 2014 23:14:40 +0000 (23:14 +0000)]
llvm-vtabledump: A vtable dumper
This tool's job is to dump the vtables inside object files. It is
currently limited to MS ABI vf- and vb-tables but it will eventually
support Itanium-style v-tables as well.
Differential Revision: http://reviews.llvm.org/D4584
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213903
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Mark Heffernan [Thu, 24 Jul 2014 22:36:40 +0000 (22:36 +0000)]
After unrolling a loop with llvm.loop.unroll.count metadata (unroll factor
hint) the loop unroller replaces the llvm.loop.unroll.count metadata with
llvm.loop.unroll.disable metadata to prevent any subsequent unrolling
passes from unrolling more than the hint indicates. This patch fixes
an issue where loop unrolling could be disabled for other loops as well which
share the same llvm.loop metadata.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213900
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Joerg Sonnenberger [Thu, 24 Jul 2014 22:20:10 +0000 (22:20 +0000)]
Don't use 128bit functions on PPC32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213899
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Chandler Carruth [Thu, 24 Jul 2014 22:15:28 +0000 (22:15 +0000)]
[SDAG] Introduce a combined set to the DAG combiner which tracks nodes
which have successfully round-tripped through the combine phase, and use
this to ensure all operands to DAG nodes are visited by the combiner,
even if they are only added during the combine phase.
This is critical to have the combiner reach nodes that are *introduced*
during combining. Previously these would sometimes be visited and
sometimes not be visited based on whether they happened to end up on the
worklist or not. Now we always run them through the combiner.
This fixes quite a few bad codegen test cases lurking in the suite while
also being more principled. Among these, the TLS codegeneration is
particularly exciting for programs that have this in the critical path
like TSan-instrumented binaries (although I think they engineer to use
a different TLS that is faster anyways).
I've tried to check for compile-time regressions here by running llc
over a merged (but not LTO-ed) clang bitcode file and observed at most
a 3% slowdown in llc. Given that this is essentially a worst case (none
of opt or clang are running at this phase) I think this is tolerable.
The actual LTO case should be even less costly, and the cost in normal
compilation should be negligible.
With this combining logic, it is possible to re-legalize as we combine
which is necessary to implement PSHUFB formation on x86 as
a post-legalize DAG combine (my ultimate goal).
Differential Revision: http://reviews.llvm.org/D4638
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213898
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Chandler Carruth [Thu, 24 Jul 2014 22:09:56 +0000 (22:09 +0000)]
[x86] Make vector legalization of extloads work more like the "normal"
vector operation legalization with support for custom target lowering
and fallback to expand when it fails, and use this to implement sext and
anyext load lowering for x86 in a more principled way.
Previously, the x86 backend relied on a target DAG combine to "combine
away" sextload and extload nodes prior to legalization, or would expand
them during legalization with terrible code. This is particularly
problematic because the DAG combine relies on running over non-canonical
DAG nodes at just the right time to match several common and important
patterns. It used a combine rather than lowering because we didn't have
good lowering support, and to expose some tricks being employed to more
combine phases.
With this change it becomes a proper lowering operation, the backend
marks that it can lower these nodes, and I've added support for handling
the canonical forms that don't have direct legal representations such as
sextload of a v4i8 -> v4i64 on AVX1. With this change, our test cases
for this behavior continue to pass even after the DAG combiner beigns
running more systematically over every node.
There is some noise caused by this in the test suite where we actually
use vector extends instead of subregister extraction. This doesn't
really seem like the right thing to do, but is unlikely to be a critical
regression. We do regress in one case where by lowering to the
target-specific patterns early we were able to combine away extraneous
legal math nodes. However, this regression is completely addressed by
switching to a widening based legalization which is what I'm working
toward anyways, so I've just switched the test to that mode.
Differential Revision: http://reviews.llvm.org/D4654
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213897
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Saleem Abdulrasool [Thu, 24 Jul 2014 22:09:06 +0000 (22:09 +0000)]
Target: invert condition for Windows
The Microsoft ABI and MSVCRT are considered the canonical C runtime and ABI.
The long double routines are not part of this environment. However, cygwin and
MinGW both provide supplementary implementations. Change the condition to
reflect this reality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213896
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Manman Ren [Thu, 24 Jul 2014 21:13:20 +0000 (21:13 +0000)]
Feedback from Hans on r213815. No functionaility change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213895
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Hans Wennborg [Thu, 24 Jul 2014 21:09:45 +0000 (21:09 +0000)]
Windows: Don't wildcard expand /? or -?
Even if there's a file called c:\a, we want /? to be preserved as
an option, not expanded to a filename.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213894
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Lang Hames [Thu, 24 Jul 2014 20:40:55 +0000 (20:40 +0000)]
[X86] Optimize stackmap shadows on X86.
This patch minimizes the number of nops that must be emitted on X86 to satisfy
stackmap shadow constraints.
To minimize the number of nops inserted, the X86AsmPrinter now records the
size of the most recent stackmap's shadow in the StackMapShadowTracker class,
and tracks the number of instruction bytes emitted since the that stackmap
instruction was encountered. Padding is emitted (if it is required at all)
immediately before the next stackmap/patchpoint instruction, or at the end of
the basic block.
This optimization should reduce code-size and improve performance for people
using the llvm stackmap intrinsic on X86.
<rdar://problem/
14959522>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213892
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Reid Kleckner [Thu, 24 Jul 2014 19:53:33 +0000 (19:53 +0000)]
Replace an assertion with a fatal error
Frontends are responsible for putting inalloca on parameters that would
be passed in memory and not registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213891
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Joerg Sonnenberger [Thu, 24 Jul 2014 19:25:16 +0000 (19:25 +0000)]
Use the same .eh_frame encoding for 32bit PPC as on i386.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213890
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Manman Ren [Thu, 24 Jul 2014 17:57:09 +0000 (17:57 +0000)]
Try to fix the bots again by moving test to X86 directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213884
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Saleem Abdulrasool [Thu, 24 Jul 2014 17:46:36 +0000 (17:46 +0000)]
X86: correct library call setup for Windows itanium
This target is identical to the Windows MSVC (and follows Microsoft ABI for C).
Correct the library call setup for this target. The same set of library calls
are missing on this environment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213883
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Matt Arsenault [Thu, 24 Jul 2014 17:41:01 +0000 (17:41 +0000)]
R600: Add FMA instructions for Evergreen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213882
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Manman Ren [Thu, 24 Jul 2014 17:18:33 +0000 (17:18 +0000)]
Try to fix the bots. If this does not work, I am going to move it to X86 directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213880
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Saleem Abdulrasool [Thu, 24 Jul 2014 17:12:06 +0000 (17:12 +0000)]
X86: silence sign comparison warning
GCC 4.8 detected a signed compare [-Wsign-compare]. Add a cast for the
destination index. Add an assert to catch a potential overflow however unlikely
it may be.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213878
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Matt Arsenault [Thu, 24 Jul 2014 17:10:35 +0000 (17:10 +0000)]
R600: Add new functions for splitting vector loads and stores.
These will be used in future patches and shouldn't change anything yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213877
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Nico Weber [Thu, 24 Jul 2014 17:08:39 +0000 (17:08 +0000)]
Let the integrated assembler understand .exitm, PR20426.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213876
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Nico Weber [Thu, 24 Jul 2014 16:29:04 +0000 (16:29 +0000)]
Remove unused field MacroInstantiation::TheMacro. No behavior change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213874
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Nico Weber [Thu, 24 Jul 2014 16:26:06 +0000 (16:26 +0000)]
Let the integrated assembler understand .warning, PR20428.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213873
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Joerg Sonnenberger [Thu, 24 Jul 2014 16:04:46 +0000 (16:04 +0000)]
Include relative path for header outside the current directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213872
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Rafael Espindola [Thu, 24 Jul 2014 16:02:28 +0000 (16:02 +0000)]
Remove dead code.
Every user has been switched to using EngineBuilder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213871
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Tim Northover [Thu, 24 Jul 2014 15:39:55 +0000 (15:39 +0000)]
AArch64: refactor ReconstructShuffle function
Quite a bit of cruft had accumulated as we realised the various different cases
it had to handle and squeezed them in where possible. This refactoring mostly
flattens the logic and special-cases. The result is slightly longer, but I
think clearer.
Should be no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213867
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Duncan P. N. Exon Smith [Thu, 24 Jul 2014 15:16:23 +0000 (15:16 +0000)]
Fix r213824 on windows
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213866
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Hal Finkel [Thu, 24 Jul 2014 14:25:39 +0000 (14:25 +0000)]
Add scoped-noalias metadata
This commit adds scoped noalias metadata. The primary motivations for this
feature are:
1. To preserve noalias function attribute information when inlining
2. To provide the ability to model block-scope C99 restrict pointers
Neither of these two abilities are added here, only the necessary
infrastructure. In fact, there should be no change to existing functionality,
only the addition of new features. The logic that converts noalias function
parameters into this metadata during inlining will come in a follow-up commit.
What is added here is the ability to generally specify noalias memory-access
sets. Regarding the metadata, alias-analysis scopes are defined similar to TBAA
nodes:
!scope0 = metadata !{ metadata !"scope of foo()" }
!scope1 = metadata !{ metadata !"scope 1", metadata !scope0 }
!scope2 = metadata !{ metadata !"scope 2", metadata !scope0 }
!scope3 = metadata !{ metadata !"scope 2.1", metadata !scope2 }
!scope4 = metadata !{ metadata !"scope 2.2", metadata !scope2 }
Loads and stores can be tagged with an alias-analysis scope, and also, with a
noalias tag for a specific scope:
... = load %ptr1, !alias.scope !{ !scope1 }
... = load %ptr2, !alias.scope !{ !scope1, !scope2 }, !noalias !{ !scope1 }
When evaluating an aliasing query, if one of the instructions is associated
with an alias.scope id that is identical to the noalias scope associated with
the other instruction, or is a descendant (in the scope hierarchy) of the
noalias scope associated with the other instruction, then the two memory
accesses are assumed not to alias.
Note that is the first element of the scope metadata is a string, then it can
be combined accross functions and translation units. The string can be replaced
by a self-reference to create globally unqiue scope identifiers.
[Note: This overview is slightly stylized, since the metadata nodes really need
to just be numbers (!0 instead of !scope0), and the scope lists are also global
unnamed metadata.]
Existing noalias metadata in a callee is "cloned" for use by the inlined code.
This is necessary because the aliasing scopes are unique to each call site
(because of possible control dependencies on the aliasing properties). For
example, consider a function: foo(noalias a, noalias b) { *a = *b; } that gets
inlined into bar() { ... if (...) foo(a1, b1); ... if (...) foo(a2, b2); } --
now just because we know that a1 does not alias with b1 at the first call site,
and a2 does not alias with b2 at the second call site, we cannot let inlining
these functons have the metadata imply that a1 does not alias with b2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213864
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Aaron Ballman [Thu, 24 Jul 2014 14:24:59 +0000 (14:24 +0000)]
Fixing an MSVC conversion warning about implicitly converting the shift results to 64-bits. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213863
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Chandler Carruth [Thu, 24 Jul 2014 12:20:53 +0000 (12:20 +0000)]
[Target] Teach the query interfaces for lowering of extloads and
truncstores to support EVTs and return expand for non-simple ones.
This makes them more consistent with the isLegal... query style methods
and makes using them simpler in many scenarios.
No functionality actually changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213860
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Hal Finkel [Thu, 24 Jul 2014 12:16:19 +0000 (12:16 +0000)]
AA metadata refactoring (introduce AAMDNodes)
In order to enable the preservation of noalias function parameter information
after inlining, and the representation of block-level __restrict__ pointer
information (etc.), additional kinds of aliasing metadata will be introduced.
This metadata needs to be carried around in AliasAnalysis::Location objects
(and MMOs at the SDAG level), and so we need to generalize the current scheme
(which is hard-coded to just one TBAA MDNode*).
This commit introduces only the necessary refactoring to allow for the
introduction of other aliasing metadata types, but does not actually introduce
any (that will come in a follow-up commit). What it does introduce is a new
AAMDNodes structure to hold all of the aliasing metadata nodes associated with
a particular memory-accessing instruction, and uses that structure instead of
the raw MDNode* in AliasAnalysis::Location, etc.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213859
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NAKAMURA Takumi [Thu, 24 Jul 2014 11:45:27 +0000 (11:45 +0000)]
Prune redundant libdeps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213857
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NAKAMURA Takumi [Thu, 24 Jul 2014 11:45:11 +0000 (11:45 +0000)]
Prune dependency to MC from each target disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213856
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NAKAMURA Takumi [Thu, 24 Jul 2014 11:44:44 +0000 (11:44 +0000)]
[CMake] tools/lto: Prune redundant libdep(s).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213855
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NAKAMURA Takumi [Thu, 24 Jul 2014 11:44:33 +0000 (11:44 +0000)]
[CMake] LineEditorTests: Add Support to link_components.
Even if LLVMSupport is added in add_unittests, LLVMSupport may be here as consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213854
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Tilmann Scheller [Thu, 24 Jul 2014 09:55:46 +0000 (09:55 +0000)]
[ARM] Make the assembler reject unpredictable pre/post-indexed ARM STRH instructions.
The ARM ARM prohibits STRH instructions with writeback into the source register. With this commit this constraint is now enforced and we stop assembling STRH instructions with unpredictable behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213850
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Daniel Sanders [Thu, 24 Jul 2014 09:47:14 +0000 (09:47 +0000)]
[mips] Fix ll and sc instructions
Summary: The ll and sc instructions for r6 and non-r6 are misplaced. This patch fixes that.
Patch by Jyun-Yan You
Differential Revision: http://reviews.llvm.org/D4578
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213847
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Matt Arsenault [Thu, 24 Jul 2014 06:59:24 +0000 (06:59 +0000)]
R600: Match rcp node on pre-SI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213844
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Matt Arsenault [Thu, 24 Jul 2014 06:59:20 +0000 (06:59 +0000)]
R600: Fix LowerSDIV24
Use ComputeNumSignBits instead of checking for i8 / i16 which only
worked when AMDIL was lying about having legal i8 / i16.
If an integer is known to fit in 24-bits, we can
do division faster with float ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213843
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Rafael Espindola [Thu, 24 Jul 2014 04:09:04 +0000 (04:09 +0000)]
Remove unused substitution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213839
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Duncan P. N. Exon Smith [Thu, 24 Jul 2014 02:56:59 +0000 (02:56 +0000)]
IR: Fix comment from r213824
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213836
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NAKAMURA Takumi [Thu, 24 Jul 2014 02:11:24 +0000 (02:11 +0000)]
Remove a stray semicolon. [-Wpedantic]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213833
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NAKAMURA Takumi [Thu, 24 Jul 2014 02:10:42 +0000 (02:10 +0000)]
Update library dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213832
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Matt Arsenault [Thu, 24 Jul 2014 02:10:17 +0000 (02:10 +0000)]
R600: Implement enableClusterLoads()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213831
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Kevin Qin [Thu, 24 Jul 2014 02:05:42 +0000 (02:05 +0000)]
[AArch64] Fix a bug generating incorrect instruction when building small vector.
This bug is introduced by r211144. The element of operand may be
smaller than the element of result, but previous commit can
only handle the contrary condition. This commit is to handle this
scenario and generate optimized codes like ZIP1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213830
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Jiangning Liu [Thu, 24 Jul 2014 01:29:59 +0000 (01:29 +0000)]
[AArch64] Disable some optimization cases for type conversion from sint to fp, because those optimization cases are micro-architecture dependent and only make sense for Cyclone. A new predicate Cyclone is introduced in .td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213827
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Filipe Cabecinhas [Thu, 24 Jul 2014 01:28:21 +0000 (01:28 +0000)]
Fixed PR20411 - bug in getINSERTPS()
When we had a vector_shuffle where we had an input from each vector, we
could miscompile it because we were assuming the input from V2 wouldn't
be moved from where it was on the vector.
Added a test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213826
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Duncan P. N. Exon Smith [Thu, 24 Jul 2014 00:53:19 +0000 (00:53 +0000)]
IR: Add Value::sortUseList()
Add `Value::sortUseList()`, templated on the comparison function to use.
The sort is an iterative merge sort that uses a binomial vector of
already-merged lists to limit the size overhead to `O(1)`.
This is part of PR5680.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213824
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Reid Kleckner [Wed, 23 Jul 2014 23:49:16 +0000 (23:49 +0000)]
Add a VS "14" msbuild toolset
This allows people to try clang inside MSBuild with the VS "14" CTP
releases.
Fixes PR20341.
Patch by Marcel Raad!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213819
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Manman Ren [Wed, 23 Jul 2014 23:13:23 +0000 (23:13 +0000)]
SimplifyCFG: fix a bug in switch to table conversion
We use gep to access the global array "switch.table", and the table index
should be treated as unsigned. When the highest bit is 1, this commit
zero-extends the index to an integer type with larger size.
For a switch on i2, we used to generate:
%switch.tableidx = sub i2 %0, -2
getelementptr inbounds [4 x i64]* @switch.table, i32 0, i2 %switch.tableidx
It is incorrect when %switch.tableidx is 2 or 3. The fix is to generate
%switch.tableidx = sub i2 %0, -2
%switch.tableidx.zext = zext i2 %switch.tableidx to i3
getelementptr inbounds [4 x i64]* @switch.table, i32 0, i3 %switch.tableidx.zext
rdar://
17735071
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213815
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Rafael Espindola [Wed, 23 Jul 2014 22:54:28 +0000 (22:54 +0000)]
Fix the build when building with only the ARM backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213814
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Rafael Espindola [Wed, 23 Jul 2014 22:43:22 +0000 (22:43 +0000)]
Document what backwards compatibility we provide for bitcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213813
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NAKAMURA Takumi [Wed, 23 Jul 2014 22:38:25 +0000 (22:38 +0000)]
Let llvm/test/CodeGen/X86/avx512*-mask-op.ll(s) aware of Win32 x64 calling convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213812
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Eric Christopher [Wed, 23 Jul 2014 22:34:13 +0000 (22:34 +0000)]
Fix indenting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213811
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Chandler Carruth [Wed, 23 Jul 2014 22:29:19 +0000 (22:29 +0000)]
[x86] Rip out some broken test cases for avx512 i1 store support.
It isn't reasonable to test storing things using undef pointers --
storing through those is at best "good luck" and really should be
transformed to "unreachable". Random changes in the combiner can
randomly break these tests for no good reason. I'm following up on the
original commit regarding the right long-term strategy here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213810
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Eric Christopher [Wed, 23 Jul 2014 22:27:10 +0000 (22:27 +0000)]
Reorganize and simplify local variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213809
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Rafael Espindola [Wed, 23 Jul 2014 22:26:07 +0000 (22:26 +0000)]
Finish inverting the MC -> Object dependency.
There were still some disassembler bits in lib/MC, but their use of Object
was only visible in the includes they used, not in the symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213808
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Juergen Ributzka [Wed, 23 Jul 2014 22:23:17 +0000 (22:23 +0000)]
[RuntimeDyld][AArch64] Update relocation tests and also add a simple GOT test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213807
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Eric Christopher [Wed, 23 Jul 2014 22:12:03 +0000 (22:12 +0000)]
Remove the query for TargetMachine and TargetInstrInfo since we're
already inside TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213806
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David Blaikie [Wed, 23 Jul 2014 22:09:29 +0000 (22:09 +0000)]
ArgPromo+DebugInfo: Handle updating debug info over multiple applications of argument promotion.
While the subprogram map cache used by Dead Argument Elimination works
there, I made a mistake when reusing it for Argument Promotion in
r212128 because ArgPromo may transform functions more than once whereas
DAE transforms each function only once, removing all the dead arguments
in one go.
To address this, ensure that the map is updated after each argument
promotion.
In retrospect it might be a little wasteful to create a map of all
subprograms when only handling a single CGSCC, but the alternative is
walking the debug info for each function in the CGSCC that gets updated.
It's not clear to me what the right tradeoff is there, but since the
current tradeoff seems to be working OK (and the code to keep things
updated is very cheap), let's stick with that for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213805
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David Blaikie [Wed, 23 Jul 2014 21:30:59 +0000 (21:30 +0000)]
Test debug info in arg promotion with an actual promotion case, rather than a degenerate arg promotion that's actually DAE performed by ArgPromo
Also the debug location I had here was bogus, describing the location of
the call site as in the callee - and unnecessary, so just drop it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213803
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Jim Grosbach [Wed, 23 Jul 2014 20:46:32 +0000 (20:46 +0000)]
Use an explicit triple in testcase.
Make the test work better on non-darwin hosts. Hopefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213801
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Jim Grosbach [Wed, 23 Jul 2014 20:41:43 +0000 (20:41 +0000)]
[X86,AArch64] Extend vcmp w/ unary op combine to work w/ more constants.
The transform to constant fold unary operations with an AND across a
vector comparison applies when the constant is not a splat of a scalar
as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213800
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Jim Grosbach [Wed, 23 Jul 2014 20:41:38 +0000 (20:41 +0000)]
X86: restrict combine to when type sizes are safe.
The folding of unary operations through a vector compare and mask operation
is only safe if the unary operation result is of the same size as its input.
For example, it's not safe for [su]itofp from v4i32 to v4f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213799
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Jim Grosbach [Wed, 23 Jul 2014 20:41:31 +0000 (20:41 +0000)]
DAG: fp->int conversion for non-splat constants.
Constant fold the lanes of the input constant build_vector individually
so we correctly handle when the vector elements are not all the same
constant value.
PR20394
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213798
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Justin Holewinski [Wed, 23 Jul 2014 20:23:49 +0000 (20:23 +0000)]
[NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213794
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Justin Holewinski [Wed, 23 Jul 2014 20:23:47 +0000 (20:23 +0000)]
[NVPTX] Silence a GCC warning found by the buildbots
The cast to NVPTXTargetLowering was missing a 'const', but let's
just access the right pointer through the subtarget anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213793
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Mark Heffernan [Wed, 23 Jul 2014 20:05:44 +0000 (20:05 +0000)]
Do not add unroll disable metadata after unrolling pass for loops with #pragma clang loop unroll(full).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213789
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Juergen Ributzka [Wed, 23 Jul 2014 20:03:13 +0000 (20:03 +0000)]
[FastISel][AArch64] Fix return type in FastLowerCall.
I used the wrong method to obtain the return type inside FinishCall. This fix
simply uses the return type from FastLowerCall, which we already determined to
be a valid type.
Reduced test case from Chad. Thanks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213788
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Justin Holewinski [Wed, 23 Jul 2014 18:46:03 +0000 (18:46 +0000)]
[NVPTX] mul.wide generation works for any smaller integer source types, not just the next smaller power of two
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213784
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Robert Khasanov [Wed, 23 Jul 2014 18:17:49 +0000 (18:17 +0000)]
[SKX] Added missed test files for rev 213757
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213780
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Saleem Abdulrasool [Wed, 23 Jul 2014 18:09:31 +0000 (18:09 +0000)]
AsmParser: remove deprecated LLIR support
linker_private and linker_private_weak were deprecated in 3.5. Remove support
for them now that the 3.5 branch has been created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213777
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Saleem Abdulrasool [Wed, 23 Jul 2014 18:09:28 +0000 (18:09 +0000)]
ExecutionEngine: remove a stray semicolon
Detected via GCC 4.8 [-Wpedantic].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213776
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Robert Khasanov [Wed, 23 Jul 2014 17:42:13 +0000 (17:42 +0000)]
[SKX] Fix lowercase "error:" in rev 213757
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213774
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Justin Holewinski [Wed, 23 Jul 2014 17:40:45 +0000 (17:40 +0000)]
[NVPTX] Make sure we do not generate MULWIDE ISD nodes when optimizations are disabled
With optimizations disabled, we disable the isel patterns for mul.wide; but we
were still generating MULWIDE ISD nodes. Now, we only try to generate MULWIDE
ISD nodes in DAGCombine if the optimization level is not zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213773
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Mark Heffernan [Wed, 23 Jul 2014 17:31:37 +0000 (17:31 +0000)]
In unroll pragma syntax and loop hint metadata, change "enable" forms to a new form using the string "full".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213772
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Alex Lorenz [Wed, 23 Jul 2014 17:18:05 +0000 (17:18 +0000)]
test commit: remove trailing space
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213770
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Chad Rosier [Wed, 23 Jul 2014 14:57:52 +0000 (14:57 +0000)]
[AArch64] Lower sdiv x, pow2 using add + select + shift.
The target-independent DAGcombiner will generate:
asr w1, X, #31 w1 = splat sign bit.
add X, X, w1, lsr #28 X = X + 0 or pow2-1
asr w0, X, asr #4 w0 = X/pow2
However, the add + shifts is expensive, so generate:
add w0, X, 15 w0 = X + pow2-1
cmp X, wzr X - 0
csel X, w0, X, lt X = (X < 0) ? X + pow2-1 : X;
asr w0, X, asr 4 w0 = X/pow2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213758
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Robert Khasanov [Wed, 23 Jul 2014 14:49:42 +0000 (14:49 +0000)]
[SKX] Enabling mask instructions: encoding, lowering
KMOVB, KMOVW, KMOVD, KMOVQ, KNOTB, KNOTW, KNOTD, KNOTQ
Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213757
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Tim Northover [Wed, 23 Jul 2014 13:59:12 +0000 (13:59 +0000)]
ARM: spot SBFX-compatbile code expressed with sign_extend_inreg
We were assuming all SBFX-like operations would have the shl/asr form, but
often when the field being extracted is an i8 or i16, we end up with a
SIGN_EXTEND_INREG acting on a shift instead. Simple enough to check for though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213754
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Tim Northover [Wed, 23 Jul 2014 13:59:07 +0000 (13:59 +0000)]
ARM: add patterns for [su]xta[bh] from just a shift.
Although the final shifter operand is a rotate, this actually only matters for
the half-word extends when the amount == 24. Otherwise folding a shift in is
just as good.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213753
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James Molloy [Wed, 23 Jul 2014 13:33:00 +0000 (13:33 +0000)]
Enable partial libcall inlining for all targets by default.
This pass attempts to speculatively use a sqrt instruction if one exists on the target, falling back to a libcall if the target instruction returned NaN.
This was enabled for MIPS and System-Z, but is well guarded and is good for most targets - GCC does this for (that I've checked) X86, ARM and AArch64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213752
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Tilmann Scheller [Wed, 23 Jul 2014 13:03:47 +0000 (13:03 +0000)]
[ARM] Make the assembler reject unpredictable pre/post-indexed ARM STRB instructions.
The ARM ARM prohibits STRB instructions with writeback into the source register. With this commit this constraint is now enforced and we stop assembling STRB instructions with unpredictable behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213750
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Daniel Sanders [Wed, 23 Jul 2014 12:59:26 +0000 (12:59 +0000)]
Added release notes for MIPS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213749
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Tim Northover [Wed, 23 Jul 2014 12:58:11 +0000 (12:58 +0000)]
AArch64: remove "arm64_be" support in favour of "aarch64_be".
There really is no arm64_be: it was a useful fiction to test big-endian support
while both backends existed in parallel, but now the only platform that uses
the name (iOS) doesn't have a big-endian variant, let alone one called
"arm64_be".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213748
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Tilmann Scheller [Wed, 23 Jul 2014 12:38:17 +0000 (12:38 +0000)]
[ARM] Make the assembler reject unpredictable pre/post-indexed ARM STR instructions.
The ARM ARM prohibits STR instructions with writeback into the source register. With this commit this constraint is now enforced and we stop assembling STR instructions with unpredictable behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213745
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Tim Northover [Wed, 23 Jul 2014 12:32:47 +0000 (12:32 +0000)]
AArch64: remove arm64 triple enumerator.
Having both Triple::arm64 and Triple::aarch64 is extremely confusing, and
invites bugs where only one is checked. In reality, the only legitimate
difference between the two (arm64 usually means iOS) is also present in the OS
part of the triple and that's what should be checked.
We still parse the "arm64" triple, just canonicalise it to Triple::aarch64, so
there aren't any LLVM-side test changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213743
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Andrea Di Biagio [Wed, 23 Jul 2014 11:20:24 +0000 (11:20 +0000)]
Revert r211771. It was: "[X86] Improve the selection of SSE3/AVX addsub instructions".
This chang fully reverts r211771.
That revision added a canonicalization rule which has the potential to causes a
combine-cycle in the target-independent canonicalizing DAG combine.
The plan is to move the logic that forms target specific addsub nodes as part of
the lowering of shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213736
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Chandler Carruth [Wed, 23 Jul 2014 09:11:48 +0000 (09:11 +0000)]
[x86] Clean up a test case to use check labels and spell out the exact
instruction sequences with CHECK-NEXT for these test cases.
This notably exposes how absolutely horrible the generated code is for
several of these test cases, and will make any future updates to the
test as our vector instruction selection gets better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213732
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