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Marek Olšák [Sat, 10 Jun 2017 18:05:24 +0000 (20:05 +0200)]
st/mesa: don't search through shader variants if there is only one
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 10 Jun 2017 17:58:06 +0000 (19:58 +0200)]
st/mesa: don't track shader variants in st_context
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 10 Jun 2017 17:36:11 +0000 (19:36 +0200)]
st/mesa: move blend color into its own state atom
This is now sensible thanks to the NewBlendColor flag.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 10 Jun 2017 00:15:34 +0000 (02:15 +0200)]
st/mesa: check correctly if multisampling is enabled
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 20 Jun 2017 19:32:28 +0000 (21:32 +0200)]
st/mesa: don't invoke st_finalize_texture & st_convert_sampler for TBOs
This is a v2 of the previous patch (v1 didn't skip st_finalize_texture).
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Sun, 11 Jun 2017 22:49:15 +0000 (00:49 +0200)]
mesa: simplify _mesa_is_image_unit_valid for buffers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 15:22:09 +0000 (17:22 +0200)]
mesa: don't flag _NEW_PROGRAM_CONSTANTS for GLSL programs for st/mesa
v2: also update _mesa_uniform_handle for bindless textures
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Reviewed-by: Brian Paul <brianp@vmware.com> (v1)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (v1)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Kenneth Graunke [Sat, 13 Sep 2014 18:13:26 +0000 (11:13 -0700)]
glsl: Track whether uniforms are active per stage
for finer granularity state flagging
v2: Marek - use a bitmask, add shader cache support
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 15:22:09 +0000 (17:22 +0200)]
mesa: don't flag _NEW_PROGRAM_CONSTANTS for non-GLSL programs for st/mesa
This has the benefit that we get to set up constants for exactly
the shader stage that needs it.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 13:41:22 +0000 (15:41 +0200)]
mesa: flush vertices before updating ctx->_Shader
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 10:38:13 +0000 (12:38 +0200)]
mesa: set driver flags for glPopAttrib(GL_ENABLE_BIT) properly
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 10:31:33 +0000 (12:31 +0200)]
mesa: don't flag _NEW_POLYGON_STIPPLE for st/mesa
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 10:25:50 +0000 (12:25 +0200)]
mesa: don't flag _NEW_LINE for st/mesa
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 10:18:34 +0000 (12:18 +0200)]
mesa: don't flag _NEW_POLYGON for st/mesa
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 10:09:43 +0000 (12:09 +0200)]
mesa: don't flag _NEW_TRANSFORM for st/mesa if possible
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 09:55:50 +0000 (11:55 +0200)]
mesa: don't flag _NEW_TRANSFORM for Transform.RasterPositionUnclipped
It's not a driver state, it's for glRasterPos.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 09:51:40 +0000 (11:51 +0200)]
mesa: don't flag _NEW_TRANSFORM for primitive restart
It's a draw state.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 00:39:06 +0000 (02:39 +0200)]
mesa: don't flag _NEW_VIEWPORT for st/mesa if possible
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 00:28:05 +0000 (02:28 +0200)]
mesa: flush vertices before changing viewports
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Sat, 10 Jun 2017 00:14:15 +0000 (02:14 +0200)]
mesa: don't flag _NEW_MULTISAMPLE for st/mesa
There are several new driver flags here so that it maps nicely to gallium.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 23:46:34 +0000 (01:46 +0200)]
mesa: don't flag _NEW_COLOR for st/mesa if possible
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 23:07:59 +0000 (01:07 +0200)]
mesa: use DriverFlags.NewAlphaTest to communicate alphatest changes to st/mesa
Now AlphaFunc avoids the blend state update in st/mesa and avoids
_mesa_update_state_locked.
The GL_ALPHA_TEST enable won't trigger blend state updates in st/mesa
after st/mesa stops relying on _NEW_COLOR.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 22:58:04 +0000 (00:58 +0200)]
mesa: don't flag _NEW_DEPTH for st/mesa
skipping _mesa_update_state_locked
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 22:52:51 +0000 (00:52 +0200)]
mesa: make _mesa_set_varying_vp_inputs a no-op in GL core profile
just don't set _NEW_VARYING_VP_INPUTS.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 22:48:53 +0000 (00:48 +0200)]
mesa: remove _NEW_BUFFER_OBJECT
not used
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 22:30:18 +0000 (00:30 +0200)]
mesa: don't flag _NEW_SCISSOR for st/mesa
Not needed and we get to bypass _mesa_update_state_locked that would be
a no-op.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 22:14:11 +0000 (00:14 +0200)]
mesa: don't execute most of _mesa_update_state_locked for GL core profile
There is plenty of legacy stuff here.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 22:01:21 +0000 (00:01 +0200)]
mesa: simplify handling the return value of update_program
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 21:54:16 +0000 (23:54 +0200)]
mesa: simplify a loop in _mesa_update_texture_state
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 21:27:41 +0000 (23:27 +0200)]
mesa: replace VP/FP/ATIfs _Enabled flags with helper functions
These are only used in the GL compatibility profile.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 20:19:33 +0000 (22:19 +0200)]
mesa: don't update draw buffer bounds in _mesa_update_state
st/mesa doesn't need the draw bounds for draw calls. I've added the call
where it's necessary in core Mesa and drivers, but I suspect that most
drivers can just move the call to the right places.
The core Mesa places aren't hot paths, so the call overhead doesn't matter
there.
For now, only st/mesa is made such that this function is invoked very
rarely.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 20:47:16 +0000 (22:47 +0200)]
mesa: remove update_framebuffer_size
For the default framebuffer, _mesa_resize_framebuffer updates it.
For FBOs, _mesa_test_framebuffer_completeness updates it.
This code is redundant.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Fri, 9 Jun 2017 19:42:12 +0000 (21:42 +0200)]
mesa: replace ctx->Polygon._FrontBit with a helper function
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 19:27:18 +0000 (21:27 +0200)]
mesa: replace ctx->VertexProgram._TwoSideEnabled with a helper function
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 18:51:20 +0000 (20:51 +0200)]
mesa: stop using _NEW_STENCIL with st/mesa, use DriverFlags.NewStencil instead
This bypasses _mesa_update_state_locked.
Before:
DrawElements ( 1 VBOs, 4 UBOs, 8 Tex) w/ stencil enable change: 3.99 million
DrawArrays ( 1 VBOs, 4 UBOs, 8 Tex) w/ stencil enable change: 4.56 million
After:
DrawElements ( 1 VBOs, 4 UBOs, 8 Tex) w/ stencil enable change: 4.93 million
DrawArrays ( 1 VBOs, 4 UBOs, 8 Tex) w/ stencil enable change: 5.84 million
It's quite a difference in the draw call rate when ctx->NewState stays
equal to 0 the whole time.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 9 Jun 2017 18:37:34 +0000 (20:37 +0200)]
mesa: replace _mesa_update_stencil() with helper functions
The idea is to remove the dependency on _mesa_update_state_locked,
so that st/mesa can skip it for stencil state updates, and then stop
setting _NEW_STENCIL in mesa/main if the driver is st/mesa.
The main motivation is to stop invoking _mesa_update_state_locked for
certain state groups.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Tue, 20 Jun 2017 11:44:31 +0000 (13:44 +0200)]
meta: do the full FBO completeness check in decompress_texture_image
_mesa_update_state will no longer recompute Width/Height if the framebuffer
is complete. We now rely on the FBO completeness check to do it.
The only code that needs to be fixed seems to be this one.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Pohjolainen, Topi [Wed, 21 Jun 2017 19:35:46 +0000 (22:35 +0300)]
i965/gen6: Use isl-based miptree also for stencil rbs
Fixes dEQP-EGL.functional.image.render_multiple_contexts.
gles2_renderbuffer_stencil_stencil_buffer
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ian Romanick [Mon, 19 Jun 2017 19:28:54 +0000 (12:28 -0700)]
i965: Remove spurious mutex frobbing around call to intel_miptree_blit
These locks were added in
2f28a0dc, but I don't see anything in the
intel_miptree_blit path that should make this necessary.
When asked, Kristian says:
I doubt it's needed now with the new blorp. If I remember correctly,
I had to drop the lock there since intel_miptree_blit() could hit
the XY blit path that requires a fast clear resolve. The fast
resolve being meta, would then try to lock the texture again.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Eric Engestrom [Sun, 18 Jun 2017 23:16:51 +0000 (00:16 +0100)]
egl: turn one more boolean `int` into a `bool`
Same as the previous commit, but this one was split out because it's
a bit more complicated: this field is given as a pointer to a function,
so the function had to be changed as well, and the function was use in
a bunch of places, which needed updating as well.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Sun, 18 Jun 2017 23:16:21 +0000 (00:16 +0100)]
egl: turn boolean `int`s into `bool`s
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Jason Ekstrand [Wed, 21 Jun 2017 18:15:25 +0000 (11:15 -0700)]
i965/miptree: Move isl_surf_get_(hiz|mcs)_surf out of the assert
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101535
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101538
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101539
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Rafael Antognolli [Tue, 13 Jun 2017 23:50:08 +0000 (16:50 -0700)]
intel/genxml: Use the same naming convention for Floating Point Mode.
In newer gens, this field has a prefix and the non-IEEEE-745 mode is called
"Alternate", instead of simply "Alt".
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Tue, 13 Jun 2017 23:47:51 +0000 (16:47 -0700)]
intel/genxml: Normalize URB Data field in WM_STATE.
On gen6+, this is called "Dispatch GRF Start Register For Constant/Setup Data
0", while on gen5 and lower it's called only "Dispatch GRF Start Register For
URB Data", but it's essentially the same thing (URB data), so rename it to
match newer gens and simplify the C code that handles it.
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Tue, 13 Jun 2017 23:46:19 +0000 (16:46 -0700)]
intel/genxml: Rename field on WM_STATE to match gen6+.
"Pixel Shader Kill Pixel" -> "Pixel Shader Kills Pixel", which is how it's
called on newer gens.
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Tue, 13 Jun 2017 23:43:59 +0000 (16:43 -0700)]
intel/genxml: Normalize fields on WM_STATE.
On gen4, WM_STATE only has one Kernel Start Pointer and one GRF Register
Count, but we can make the code that handles this on multiple gens simpler if
we add an index 0 to it too.
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Thu, 8 Jun 2017 23:03:05 +0000 (16:03 -0700)]
intel/genxml: Add missing field to CLIP_STATE.
Just because it's not set doesn't mean that it doesn't exist. And since the
field is there on newer gens, having it on gen5 simplifies the code when
porting gen5 and lower.
Also add missing value to API Mode on CLIP_STATE on gen4.
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Thu, 8 Jun 2017 22:48:02 +0000 (15:48 -0700)]
intel/genxml: Fix type of UserClipFlags ClipTest Enable Bitmask.
This is a bitmask, so it can't be a boolean. Also rename it so it matches
gen6+.
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Thu, 8 Jun 2017 19:31:10 +0000 (12:31 -0700)]
intel/genxml: Add missing fields to CLIP_STATE on gen4-5.
These fields are set by brw_clip_unit, so we need them when converting to
genxml.
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Wed, 7 Jun 2017 20:03:19 +0000 (13:03 -0700)]
intel/genxml: Normalize GS_STATE.
Rename "Rendering Enable" to "Rendering Enabled", so it matches gen6+.
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ville Syrjälä [Fri, 16 Jun 2017 20:23:41 +0000 (23:23 +0300)]
i915: Always emit W on gen3
Unlike the older gen2 hardware, gen3 performs perspective
correct interpolation even for the primary/secondary colors.
To do that it naturally needs us to emit W for the vertices.
Currently we emit W only when at least one texture coordinate
set gets emitted. This means the interpolation of color will
change depending on whether texcoords/varyings are used or not.
That's probably not what anyone would expect, so let's just
always emit W to get consistent behaviour. Trying to avoid
emitting W seems like more hassle than it's worth, especially
as bspec seems to suggest that the hardware will perform the
perspective division anyway.
This used to be broken until it was accidentally fixed it in
commit
c349031c27b7 ("i915: Fix texcoord vs. varying collision
in fragment programs") by introducing a bug that made the driver
always emit W. After fixing that bug in commit
c1eedb43f32f
("i915: Fix wpos_tex vs. -1 comparison") we went back to the
old behaviour and caused an apparent regression.
Fixes:
c1eedb43f32f ("i915: Fix wpos_tex vs. -1 comparison")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101451
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Samuel Pitoiset [Tue, 20 Jun 2017 16:41:19 +0000 (18:41 +0200)]
mesa: add KHR_no_error support for glStencilOp()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 20 Jun 2017 16:40:08 +0000 (18:40 +0200)]
mesa: add stencil_op() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 20 Jun 2017 16:35:02 +0000 (18:35 +0200)]
mesa: add KHR_no_error support for glStencilFunc()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 20 Jun 2017 16:33:30 +0000 (18:33 +0200)]
mesa: add stencil_func() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 20 Jun 2017 16:24:47 +0000 (18:24 +0200)]
mesa: add KHR_no_error support for glStencilOpSeparate()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 20 Jun 2017 16:23:07 +0000 (18:23 +0200)]
mesa: add stencil_op_separate() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 20 Jun 2017 16:17:29 +0000 (18:17 +0200)]
mesa: add KHR_no_error support for glStencilMaskSeparate()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 20 Jun 2017 16:16:05 +0000 (18:16 +0200)]
mesa: add stencil_mask_separate() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 20 Jun 2017 16:13:36 +0000 (18:13 +0200)]
mesa: add KHR_no_error support for glStencilFuncSeparate()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 20 Jun 2017 16:09:02 +0000 (18:09 +0200)]
mesa: add stencil_func_separate() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Lucas Stach [Mon, 5 Jun 2017 19:11:02 +0000 (21:11 +0200)]
etnaviv: fix blend color for RB swapped rendertargets
Same as with the colormasks, the blend color needs to be swizzled according
to the rendertarget format.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Jason Ekstrand [Tue, 20 Jun 2017 16:06:44 +0000 (09:06 -0700)]
spirv: Work around the Doom shader bug
Doom shipped with a broken version of GLSLang which handles samplers as
function arguments in a way that isn't spec-compliant. In particular,
it creates a temporary local sampler variable and copies the sampler
into it. While Dave has had a hack patch out for a while that gets it
working, we've never landed it because we've been hoping that a game
update would come out with fixed shaders. Unfortunately, no game update
appears on to be on the horizon and I've found this issue in yet another
application so I think we're stuck working around it. Hopefully, we can
delete this code one day.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99467
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ian Romanick [Wed, 21 Jun 2017 00:44:59 +0000 (17:44 -0700)]
glsl: Update build instructions for int64.glsl
Trivial
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Elie Tournier [Mon, 6 Mar 2017 15:27:56 +0000 (15:27 +0000)]
glsl: Fix indent in dump code
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Ilia Mirkin [Mon, 8 May 2017 01:45:41 +0000 (21:45 -0400)]
st/xvmc: deal with drivers wanting different texture formats
Previously, texture formats were being used unconditionally without
checking. However nv30 supports neither RGBX8 nor R4A4/A4R4 formats. Add
sufficient fallbacks so that the nv30 driver can have working OSD.
Tested on a NV44A/PCI.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Sat, 28 Jan 2017 03:14:10 +0000 (13:14 +1000)]
nvc0: fix transfer of larger rectangles with DmaCopy on gk104 and up
By treating the rectangles as 1cpp, we can run up against some internal
copy engine limits and trigger a MEM2MEM_RECT_OUT_OF_BOUNDS error check
at launch time.
This commit enables the REMAP hardware, which allows us to specify both
the component size and number of components for a transfer. We're then
able to pass in the real width/nblocksx values and not hit the limits.
There's a couple of "supported" CPPs in the list that we can't actually
hit, but are there simply because they're possible.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Sat, 28 Jan 2017 03:14:09 +0000 (13:14 +1000)]
nvc0: copy engine surface params are only relevant for tiled surfaces
Aside from reducing pushbuf usage in some situations, this commit should
have no other effect, and is just to make it somewhat obvious that those
methods have zero effect on linear surfaces.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Dave Airlie [Tue, 20 Jun 2017 05:50:37 +0000 (15:50 +1000)]
st/mesa: fix assert to be simpler
I just noticed a warning with a non-debug build, but really
this could all be one line, and I'm not even 100% the assert
makes sense here.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Lionel Landwerlin [Tue, 20 Jun 2017 10:06:24 +0000 (11:06 +0100)]
intel: compiler/i965: fix is_broxton checks
In
5f2fe9302c is_geminilake was introduced for the differenciate
broxton from geminilake. Unfortunately I failed as verifying that
is_broxton is throughout the code base to mean Gen9lp.
Fixes:
5f2fe9302c ("intel: common: add flag to identify platforms by name")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Plamena Manolova [Wed, 14 Jun 2017 16:33:12 +0000 (19:33 +0300)]
mesa/main: Move NULL pointer check.
In blit_framebuffer we're already doing a NULL
pointer check for readFb and drawFb so it makes
sense to do it before we actually use the pointers.
CID:
1412569
Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
George Kyriazis [Tue, 20 Jun 2017 15:13:16 +0000 (10:13 -0500)]
swr: Include definition of missing function
Inline function SWR_MULTISAMPLE_POS::PrecalcSampleData() was missing
definition. Include definition in core/state_funcs.h.
Fixes windows build.
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
Ben Widawsky [Mon, 1 May 2017 17:07:47 +0000 (10:07 -0700)]
i965/cnl: Add l3 configuration for Cannonlake
V2 (Anuj):
Squash the changes in one patch rebase on master.
Address the review comments made by Francisco Jerez.
Do the URB allocation per slice (not per bank).
V3 (Anuj):
Update the comment.
Format the table as other l3 config tables.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
---
V1 was sent out with the heading:
"i965/cnl: Properly handle l3 configuration"
Anuj Phogat [Sat, 10 Jun 2017 22:48:21 +0000 (15:48 -0700)]
i965: Add a variable for way size per bank in get_l3_way_size()
Adding this variable better explains the computation of L3 way
size in the function.
V2: Use const variable for way_size_per_bank.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Anuj Phogat [Wed, 7 Jun 2017 22:47:24 +0000 (15:47 -0700)]
i965: Fix broxton 2x6 l3 config
The new table added in this patch matches with the table
in gfxspecs. We were programming the wrong values earlier.
V2: Update the comment.
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Ian Romanick [Fri, 16 Jun 2017 19:50:45 +0000 (12:50 -0700)]
i965: Fall back to normal blorp clear instead of meta clear
When intel_miptree_alloc_non_msrt_mcs fails, fall back to normal blorp
color clear instead of falling back to meta. With this change,
brw_blorp_clear_color can never fail.
v2: Combine two if-statements to remove a level of indentation.
Suggested by Jason.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ian Romanick [Thu, 1 Jun 2017 22:43:08 +0000 (15:43 -0700)]
intel/blorp: Apply source offset in the TEX case
Previously the offset was only applied in the TXF case.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ian Romanick [Thu, 1 Jun 2017 22:41:52 +0000 (15:41 -0700)]
intel/blorp: Apply Gen4 coord. normalization after cubemap sizes are adjusted
Otherwise the values used for coordinate normalization use the wrong
sizes.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Wed, 31 May 2017 18:29:14 +0000 (11:29 -0700)]
intel/blorp: Set needs_(dst|src)_offset for Gen4 cubemaps
We call convert_to_single_slice so they may end up with a non-trivial
offset that needs to be taken into account.
v2 (idr): Also set needs_src_offset. Suggested by Jason.
Fixes ES2-CTS.functional.texture.specification.basic_copyteximage2d.cube_rgba
and ES2-CTS.functional.texture.specification.basic_copytexsubimage2d.cube_rgba
on G45.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101284
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ian Romanick [Wed, 31 May 2017 04:01:00 +0000 (21:01 -0700)]
meta/blit: Silence unused parameter warning
drivers/common/meta_blit.c: In function ‘setup_glsl_msaa_blit_scaled_shader’:
drivers/common/meta_blit.c:62:58: warning: unused parameter ‘filter’ [-Wunused-parameter]
GLenum target, GLenum filter)
^~~~~~
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ian Romanick [Thu, 15 Jun 2017 05:49:33 +0000 (22:49 -0700)]
meta: Silence unused parameter warning
drivers/common/meta.c:2694:71: warning: unused parameter ‘dims’ [-Wunused-parameter]
copytexsubimage_using_blit_framebuffer(struct gl_context *ctx, GLuint dims,
^~~~
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ian Romanick [Thu, 15 Jun 2017 05:11:23 +0000 (22:11 -0700)]
i965: Fix incorrect comment
There is no intel_miptree_slice_has_hiz function, but there is a
intel_miptree_level_has_hiz function. I assume that's the correct one
to use.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Pitoiset [Tue, 20 Jun 2017 13:13:15 +0000 (15:13 +0200)]
mesa: simplify _mesa_IsVertexArray()
_mesa_lookup_vao() already returns NULL if id is zero.
v2: - change the conditional (Ian)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> (v1)
Eric Engestrom [Mon, 19 Jun 2017 10:33:51 +0000 (11:33 +0100)]
mesa/format_info: use designated initialiser list
Also, make that table const, since no-one is supposed to modify it anyway.
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Mon, 6 Feb 2017 22:48:45 +0000 (14:48 -0800)]
vc4: Clean up release build warnings using MAYBE_UNUSED.
These variables are all used in an assert(), so release builds see no
usages.
Eric Anholt [Mon, 19 Jun 2017 18:53:44 +0000 (11:53 -0700)]
vc4: Allow VBOs to be mapped during execution.
There's no reason we can't -- the mappings we expose are basically
equivalent to persistent/coherent, already.
Improves mesa-demos drawoverhead (no state change) performance by
5.21362% +/- 1.25078% (n=11).
Brian Paul [Mon, 19 Jun 2017 18:22:09 +0000 (12:22 -0600)]
gallium/vbuf: avoid segfault when we get invalid glDrawRangeElements()
A common user error is to call glDrawRangeElements() with the 'end'
argument being one too large. If we use the vbuf module to translate
some vertex attributes this error can cause us to read past the end of
the mapped hardware buffer, resulting in a crash.
This patch adjusts the vertex count to avoid that issue. Typically,
the vertex_count gets decremented by one.
This fixes crashes with the Unigine Tropics and Sanctuary demos with older
VMware hardware versions. The issue isn't hit with VGPU10 because we
don't hit this fallback.
No piglit changes.
CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Mon, 19 Jun 2017 18:21:17 +0000 (12:21 -0600)]
gallium/vbuf: add some const qualifiers
Helps understandability a bit.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Mon, 19 Jun 2017 18:17:51 +0000 (12:17 -0600)]
translate: whitespace fixes in translate_generic.c
Brian Paul [Mon, 19 Jun 2017 18:15:40 +0000 (12:15 -0600)]
softpipe: remove unused softpipe_context::line_stipple_counter
Trivial.
Samuel Pitoiset [Tue, 20 Jun 2017 08:24:18 +0000 (10:24 +0200)]
radeonsi: set correct usage flag according to image access type
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Mon, 19 Jun 2017 17:39:05 +0000 (19:39 +0200)]
winsys/amdgpu: fix a deadlock when waiting for submission_in_progress
First this happens:
1) amdgpu_cs_flush (lock bo_fence_lock)
-> amdgpu_add_fence_dependency
-> os_wait_until_zero (wait for submission_in_progress) - WAITING
2) amdgpu_bo_create
-> pb_cache_reclaim_buffer (lock pb_cache::mutex)
-> pb_cache_is_buffer_compat
-> amdgpu_bo_wait (lock bo_fence_lock) - WAITING
So both bo_fence_lock and pb_cache::mutex are held. amdgpu_bo_create can't
continue. amdgpu_cs_flush is waiting for the CS ioctl to finish the job,
but the CS ioctl is trying to release a buffer:
3) amdgpu_cs_submit_ib (CS thread - job entrypoint)
-> amdgpu_cs_context_cleanup
-> pb_reference
-> pb_destroy
-> amdgpu_bo_destroy_or_cache
-> pb_cache_add_buffer (lock pb_cache::mutex) - DEADLOCK
The simple solution is not to wait for submission_in_progress, which we
need in order to create the list of dependencies for the CS ioctl. Instead
of building the list of dependencies as a direct input to the CS ioctl,
build the list of dependencies as a list of fences, and make the final list
of dependencies in the CS thread itself.
Therefore, amdgpu_cs_flush doesn't have to wait and can continue.
Then, amdgpu_bo_create can continue and return. And then amdgpu_cs_submit_ib
can continue.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101294
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Samuel Pitoiset [Mon, 19 Jun 2017 15:40:19 +0000 (17:40 +0200)]
radeonsi: update all resident texture descriptors when needed
To avoid useless DCC fetches when DCC is disabled, descriptors
have to be updated in order to reflect this change. This is
quite similar to how we update descriptors of bound textures.
As a side effect, this should also prevent VM faults when
bindless textures are invalidated, because the VA in the
descriptor has to be updated accordingly as well.
I don't see any performance improvements with DOW3.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Mon, 19 Jun 2017 15:34:45 +0000 (17:34 +0200)]
radeonsi: keep track of the sampler state for texture handles
Needed for updating all resident texture descriptors when
dirty_tex_counter changes.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Lionel Landwerlin [Mon, 24 Apr 2017 02:12:00 +0000 (19:12 -0700)]
i965: perf: use gen_device_info rather then brw_context
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lionel Landwerlin [Thu, 15 Jun 2017 22:48:49 +0000 (23:48 +0100)]
intel: common: add number of thread per eu
This will be used by to normalize OA counters.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lionel Landwerlin [Thu, 15 Jun 2017 14:22:19 +0000 (15:22 +0100)]
intel: common: express timestamps units in frequency
Rather than storing the period as a double that looses some precision.
Also fixes the Gen9LP timestamp frequency which is no
19200123 but
19200000 as pointed by Ville :
https://lists.freedesktop.org/archives/intel-gfx/2017-April/125126.html
Finally add the Cannonlake timestamp frequency.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lionel Landwerlin [Thu, 15 Jun 2017 13:47:12 +0000 (14:47 +0100)]
i965: convert MI_REPORT_PERF_COUNT to genxml
Also make it available from gen7 only to gen7+.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lionel Landwerlin [Fri, 14 Apr 2017 07:07:47 +0000 (00:07 -0700)]
i965: perf: fix codegen with single operand equation
We did support single value operand equations, but not single variable
operand ones. In particular we were failing on "$Sampler0Bottleneck".
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lionel Landwerlin [Mon, 5 Jun 2017 10:06:28 +0000 (11:06 +0100)]
intel: common: add flag to identify platforms by name
The perf infrastructure needs to identify specific platforms, not just
generations.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>