OSDN Git Service
fritsch [Wed, 24 Jun 2015 08:18:11 +0000 (10:18 +0200)]
Gen75_vpp: Don't assert on BGRA input and output
Xiang, Haihao [Wed, 24 Jun 2015 05:37:04 +0000 (13:37 +0800)]
version 1.6.0.pre2
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Qu,Pengfei [Thu, 18 Jun 2015 01:42:51 +0000 (09:42 +0800)]
FIX:HEVC enc cause GPU hang when lcu_size=32 with 720x480 and 176x144
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
0f6143e2e4bd70217887e1ad86a76200ad8b38a8)
Zhong Li [Mon, 8 Jun 2015 04:42:21 +0000 (12:42 +0800)]
VP8 HWEnc: Modify qp threshold value for mode cost calculatation
The patch is helpful to improve quality when qp is lower than the
threshold value.
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
e797089446c1f5b71b239b9046d76e054dfcba59)
Zhao Yakui [Tue, 23 Jun 2015 01:38:32 +0000 (09:38 +0800)]
VPP: Configure SURFACE_STATE based on HW requirement to fix out-of-bound access issue
Otherwise some pixles will be regarded as out-of-bound and the
access will be dropped.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Xiang haihao <haihao.xiang@intel.com>
(cherry picked from commit
d5cd551887c8f4e5408327aba993e9927dd7d297)
Zhao Yakui [Tue, 23 Jun 2015 01:38:25 +0000 (09:38 +0800)]
BDW/CHV/SKL: Follow the HW alignment requirement to access GPU buffer correctly
Otherwise the buffer access is incorrect.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Xiang haihao <haihao.xiang@intel.com>
(cherry picked from commit
fbab204929326567c876a48c0552430dd67a9852)
Zhao Yakui [Tue, 23 Jun 2015 01:38:32 +0000 (09:38 +0800)]
VPP: Configure SURFACE_STATE based on HW requirement to fix out-of-bound access issue
Otherwise some pixles will be regarded as out-of-bound and the
access will be dropped.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Xiang haihao <haihao.xiang@intel.com>
Zhao Yakui [Tue, 23 Jun 2015 01:38:25 +0000 (09:38 +0800)]
BDW/CHV/SKL: Follow the HW alignment requirement to access GPU buffer correctly
Otherwise the buffer access is incorrect.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Xiang haihao <haihao.xiang@intel.com>
Qu,Pengfei [Thu, 18 Jun 2015 01:42:51 +0000 (09:42 +0800)]
FIX:HEVC enc cause GPU hang when lcu_size=32 with 720x480 and 176x144
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
Zhong Li [Mon, 8 Jun 2015 04:42:21 +0000 (12:42 +0800)]
VP8 HWEnc: Modify qp threshold value for mode cost calculatation
The patch is helpful to improve quality when qp is lower than the
threshold value.
Signed-off-by: Zhong Li <zhong.li@intel.com>
Xiang, Haihao [Thu, 4 Jun 2015 01:41:02 +0000 (09:41 +0800)]
Update NEWS
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 4 Jun 2015 02:05:36 +0000 (10:05 +0800)]
Update the dependency on VA API
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 4 Jun 2015 05:54:18 +0000 (13:54 +0800)]
Add vp8_inter_frame_gen8.asm and vp8_intra_frame_gen8.asm to the core file list
Otherwise the packakge created by 'make dist' isn't buildable.
Remove vp8_inter_frame_gen9.asm and vp8_intra_frame_gen9.asm as they are the same
of vp8_inter_frame_gen8.asm and vp8_intra_frame_gen8.asm.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 4 Jun 2015 02:17:48 +0000 (10:17 +0800)]
Add Android.mk to the corresponding EXTRA_DIST
'make dist' can include all Android.mk files in the release package
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90541
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 20 Mar 2015 04:01:07 +0000 (12:01 +0800)]
Fix 'make dist'
Otherwise the tar package created by 'make dist' is not buildable
(cherry picked from commit
2d0ce24c66c14c3f77bef54bdc4605241e0527bd)
Xiang, Haihao [Mon, 16 Mar 2015 07:12:44 +0000 (15:12 +0800)]
Update NEWS
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
3c66aa58ccb0fcb393472eeaa6a9188216683a79)
Xiang, Haihao [Wed, 3 Jun 2015 01:42:03 +0000 (09:42 +0800)]
dec/vp8: fix segmentation update
Segment-based adjustments only occur if segmentation is enabled ($9.3).
Cc: Zhao Yakui <yakui.zhao@intel.com>
Tested-by: Charles, Daniel <daniel.charles@intel.com>
Acked-by: Zhao, Yakui <yakui.zhao@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Sean V Kelley <seanvk@posteo.de>
Sreerenj Balachandran [Wed, 27 May 2015 09:35:35 +0000 (12:35 +0300)]
HEVC/enc: Fix Multi Slice Encoding.
Fix the calculation of horizontal and vertical CTU position for next slice.
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Sreerenj Balachandran [Fri, 22 May 2015 01:46:05 +0000 (04:46 +0300)]
HEVC: encoder_utils: Fixes for packed slice header generation.
-- Write no_output_of_prior_pics_flag to bitstream header for IRAP pictures
-- The slice_temporal_mvp_enabled_flag should only presnt in non-IDR frames.
-- Write collocated_from_l0_flag to bitstream header for B slice.
-- The max_num_merge_cand should be 5 - MaxNumMergeCand
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Sreerenj Balachandran [Fri, 22 May 2015 01:46:04 +0000 (04:46 +0300)]
HEVC: Fix the nal unit type generation in packed slice header.
Generate the Nal unit type for packed slice headers based
on idr_pic_flag and reference_pic_flag.
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Sreerenj Balachandran [Fri, 22 May 2015 01:46:03 +0000 (04:46 +0300)]
HEVC: Fix the Wrong slice type usage
Don't mix the slice_type values of h264 and h265.
The SLICE_TYPE values of H264 and HEVC are different.
H264: Bslice_type = 1, Pslice_type = 0
HEVC: Bslice_type = 0, Pslice_type = 1
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Andy Furniss [Thu, 26 Mar 2015 14:34:48 +0000 (14:34 +0000)]
VPP: Enable field rate madi/mcdi. Only second hunk is tested
Signed-off-by: Andy Furniss <adf.lists@gmail.com>
Xiang, Haihao [Mon, 23 Mar 2015 01:41:52 +0000 (09:41 +0800)]
VPP: Make sure the store buffer is allocated
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Mar 2015 06:02:57 +0000 (07:02 +0100)]
VPP: Adjust the parameter settings to DI on GEN6/GEN7
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Thu, 19 Mar 2015 06:02:56 +0000 (07:02 +0100)]
vpp: add support for Motion-Compensated deinterlacing on Ivybridge.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Thu, 19 Mar 2015 06:02:55 +0000 (07:02 +0100)]
vpp: fix advanced deinterlacing on Sandybridge and Ivybridge.
This fixes support for Motion Adaptive deinterlacing mode on both
Sandybridge and Ivybridge platforms. In particular, correct field
ordering is now supported, and STMM ping-pong buffering is added.
v2: changed STMM surface format to Y800 for a single plane.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Thu, 19 Mar 2015 06:02:54 +0000 (07:02 +0100)]
vpp: fix memory leak in DNDI code path.
The original current_out_surface was never released on exit. Main
reason for that is the legacy VPP framework that did not allow the
VADriverContextP handle to be passed down to the desired .finalize()
hook. Improved that to bring it on par with the VEBOX code path.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Xiang, Haihao [Fri, 22 May 2015 08:47:19 +0000 (16:47 +0800)]
Bump version to 1.6.0.pre1
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhong Li [Fri, 22 May 2015 08:33:53 +0000 (16:33 +0800)]
VP8 HWEnc: Init CBR QP at begining of gen8_mfc_vp8_init
Initialize CBR QP at begining of gen8_mfc_vp8_init(), because this
funtion will use qp to init prob_skip_false.
Signed-off-by: Zhong Li <zhong.li@intel.com>
Zhong Li [Fri, 22 May 2015 06:06:04 +0000 (14:06 +0800)]
VP8 HWEnc: Fix CBR qp setting for vme cost
1. The q_index range of vp8 is different from h264, it's need to be
mapped to avc qp range.
2. For CBR case, qp should be set to CBR calculated value.
Signed-off-by: Zhong Li <zhong.li@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
U. Artie Eoff [Tue, 19 May 2015 21:59:26 +0000 (14:59 -0700)]
gen8_mfd: free surface used by JPEG decode
This is a follow up to previous commit:
commit
8dda0650b55c467200c34ada127b5d9b54edea5c
Author: Zhao Yakui <yakui.zhao@intel.com>
Date: Tue May 5 17:56:38 2015 +0800
Decode: Free the allocated internal surface used by JPEG to avoid memory leak
For GEN8, this code path is normally disabled by default.
However, one can enable this code path by defining JPEG_WA
during compilation. In that case, we would enable the
same memory leak. Thus, apply the same fix in gen8_mfd to
fix it.
Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Signed-off-by: Sean V Kelley <seanvk@posteo.de>
Tested-by: Sean V Kelley <seanvk@posteo.de>
Zhao Yakui [Tue, 5 May 2015 09:56:38 +0000 (17:56 +0800)]
Decode: Free the allocated internal surface used by JPEG to avoid memory leak
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Sean V Kelley <seanvk@posteo.de>
Tested-by: Sean V Kelley <seanvk@posteo.de>
Zhong Li [Mon, 4 May 2015 05:12:25 +0000 (13:12 +0800)]
VP8 HWEnc: Fix vp8 mv incorrectly stored issue
As vp8 spec, all luma motion vectors are doubled stored.
This patch has much benefit to P frame qualtity.
Signed-off-by: Zhong Li <zhong.li@intel.com>
Xiang, Haihao [Thu, 30 Apr 2015 07:55:40 +0000 (15:55 +0800)]
Fix the build on Android
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhong Li [Fri, 24 Apr 2015 08:51:00 +0000 (16:51 +0800)]
VP8 HWEnc: Alloc larger memory for internal buffer
It is to prevent the internal bitstream buffer overflow when qp is low.
Signed-off-by: Zhong Li <zhong.li@intel.com>
Zhong Li [Fri, 24 Apr 2015 06:57:50 +0000 (14:57 +0800)]
VP8 HWEnc: Add CBR Support
Add bit rate control (CBR) for vp8 hw encoding
v1->v2: follow haihao's comment to update this patch
Signed-off-by: Zhong Li <zhong.li@intel.com>
Xiang, Haihao [Wed, 22 Apr 2015 07:33:51 +0000 (15:33 +0800)]
HEVC/dec: correct the frame store index
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 22 Apr 2015 07:33:50 +0000 (15:33 +0800)]
HEVC/dec: Fix collocated_ref_idx and collocated_from_l0_flag
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 22 Apr 2015 07:33:49 +0000 (15:33 +0800)]
HEVC/dec: Make sure the derived value for ChromaLog2WeightDenom is in the the range of 0 to 7
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 22 Apr 2015 07:33:48 +0000 (15:33 +0800)]
HEVC/dec: Fix weight/offset in HCP_WEIGHTOFFSET
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 17 Apr 2015 08:41:24 +0000 (16:41 +0800)]
Fix segmentation fault
The segmentation fault occurs when CBR is selected without HRD parameter
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Qu,Pengfei [Wed, 15 Apr 2015 05:56:44 +0000 (13:56 +0800)]
HEVC enc:Added 4K&2K support; Added Profile&Level 5.1 above
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
Xiang, Haihao [Tue, 31 Mar 2015 04:48:41 +0000 (12:48 +0800)]
Allow va{Get,Put}Image() to use derived image
The surface can't be the same surface from which the image has
been derived.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Tested-by: Sean V Kelley <seanvk@posteo.de>
Sirisha Muppavarapu [Mon, 23 Mar 2015 21:16:02 +0000 (14:16 -0700)]
Fix the quality factor.
The following are added in this commit:
1) Added lower bound to the quality factor.
2) Added extensive comments on scaling and normalization of the quality factor.
Daniel Charles [Thu, 3 Jul 2014 21:28:50 +0000 (14:28 -0700)]
check that intel-gen4asm tool is actually present
intel-gen4asm tool has to be present on the host tools so that
it can actually be used. Cross compiling shows problems when the
gpu-tools version is met but the tool is not available on the PATH
So, first check that the tool is available and later check for version
before defining HAVE_GEN4ASM.
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
(cherry picked from commit
038097c00ad7b4f2e0fd572ee20f255dd378b5cb)
Conflicts:
configure.ac
Gwenole Beauchesne [Fri, 20 Mar 2015 15:09:42 +0000 (16:09 +0100)]
vpp: add support for "low-power" mode.
Add support for "low-power" mode expressed with VA_PROC_PIPELINE_FAST
flag set to VAProcPipelineParameterBuffer.pipeline_flags. The purpose
is to discard any complex operation that would consume too many HW
resources.
While doing so, also try to optimize for cases where we only want to
perform format conversion, scaling and basic bob-deinterlacing.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Olivier Crete [Mon, 9 Mar 2015 22:20:34 +0000 (18:20 -0400)]
gen7_mfd: Optimise start code search
Code inspired from GStreamer
See https://bugs.freedesktop.org/show_bug.cgi?id=89507
Signed-off-by: Olivier Crete <olivier.crete@collabora.com>
Sean V Kelley [Wed, 18 Feb 2015 16:29:55 +0000 (08:29 -0800)]
Add support for HEVC decoding on CHV
We can re-use SKL HEVC decode pipeline
Signed-off-by: Sean V Kelley <seanvk@posteo.de>
Cc: haihao.xiang@intel.com
Cc: focus.luo@intel.com
(cherry picked from commit
78171ec3b8e73071405d9ff6ecbddc05a6787001)
Zhong Li [Fri, 6 Feb 2015 08:56:07 +0000 (16:56 +0800)]
MPEG2 ENC: Remove gen9 pak pipeline code
SKL pak pipeline of mpeg2 encoding is same as gen8,
so remove the redundant code
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
ac46de469dd5eeaed34be0510631228a07748ec3)
Zhong Li [Fri, 6 Feb 2015 08:29:50 +0000 (16:29 +0800)]
VP8 DEC: Change error concealment method
Use intra prediciton as error concealment method, instead of inter P
copy.
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
8d8b4a577fbaa8d278fbc5fe213023cfeea5d57a)
Qu,Pengfei [Mon, 26 Jan 2015 05:01:23 +0000 (13:01 +0800)]
Disable the context check to avoid JPEG ENC failed
https://bugs.freedesktop.org/show_bug.cgi?id=88728
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
a8ca5f911c7c19b5ede3f96ac6113606b9dd4d95)
Qu,Pengfei [Thu, 8 Jan 2015 08:41:26 +0000 (16:41 +0800)]
Just Style alignment
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
22439f1fcebbd2c1d563503720b1123a4bb97160)
Qu,Pengfei [Thu, 8 Jan 2015 08:40:07 +0000 (16:40 +0800)]
HEVC ENC:Added HEVC support in API function
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
d4f1087a0606c7c8d2d5fd65d9f46990f41ce93a)
Qu,Pengfei [Thu, 8 Jan 2015 08:39:38 +0000 (16:39 +0800)]
HEVC ENC:Added pipeline init
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
2759cabfa57c6e78ab2033cad4e7c2cbf2b9d4e2)
Qu,Pengfei [Thu, 8 Jan 2015 08:39:18 +0000 (16:39 +0800)]
HEVC ENC:Added VME pipeline
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
2a85633e34a4e66b18634e7b53cc91aa44ad2c2b)
Conflicts:
src/gen6_mfc_common.c
Qu,Pengfei [Thu, 8 Jan 2015 08:38:52 +0000 (16:38 +0800)]
HEVC ENC:Added PAK pipeline
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
[Fix PAK-BSE data start offset in HCP_SLICE_STATE]
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
3f47222004c6c2e575b170c7c7c3be00f61df302)
Qu,Pengfei [Thu, 8 Jan 2015 08:38:25 +0000 (16:38 +0800)]
HEVC ENC:Added slice header generated internally
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
2c54b96fe89aa0839f8c34935a84b79c41fde55d)
Conflicts:
src/i965_encoder_utils.h
Qu,Pengfei [Thu, 8 Jan 2015 08:23:43 +0000 (16:23 +0800)]
HEVC ENC:Added PAK context for HEVC
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
41f23f3dcfe24ca9493b36cb00bab5317584b099)
Zhong Li [Thu, 15 Jan 2015 14:04:59 +0000 (22:04 +0800)]
VP8 HWEnc: Add BSW VP8 HWEnc support
Add BSW vp8 encoding support, and let SKL and BDW use the same PAK pipeline.
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
c2be56ae6f3628ea246a1dd02e5cac18da84df56)
Zhong Li [Thu, 15 Jan 2015 14:04:58 +0000 (22:04 +0800)]
VP8 HWEnc: declare copyright and license of vp8_probs.h
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
a52a5ffe1dc62ff12989e329860ae81ced247f00)
Zhong Li [Thu, 15 Jan 2015 14:04:57 +0000 (22:04 +0800)]
VP8 HWEnc: vp8 encode quality optimization
1. Add mv and mode cost calc
2. Support 16x16 and 4x4 intra prediction
3. Support multi-mode intar prediction
4. Support 16x16 New_MV mode inter prediction
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
a25bda914d4041a96252bd24a597558af3237b15)
Zhong Li [Thu, 15 Jan 2015 14:04:56 +0000 (22:04 +0800)]
VP8 HWEnc: Calc vp8 coded size by internal buffer
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
379282cbc79b65c994c22009412472bdeddbb4cc)
Zhong Li [Thu, 15 Jan 2015 14:04:55 +0000 (22:04 +0800)]
VP8 HWEnc: Add P frame encoding support
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
e4737bb3b29c5ac9fb01f4efccd743d260673e27)
Conflicts:
src/shaders/vme/Makefile.am
Zhong Li [Thu, 15 Jan 2015 14:04:54 +0000 (22:04 +0800)]
VP8 HWEnc: Build VP8 PAK pipeline and enabling I frame
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
a18ce4664113d5b1a9b29ed45bf137df6b7a7898)
Conflicts:
src/i965_encoder_utils.c
Zhong Li [Thu, 15 Jan 2015 14:04:53 +0000 (22:04 +0800)]
VP8 HWEnc: Build vp8 gen9 encoding vme pipeline
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
d8588862d85414ef412fd5e7ae1fb9ca78b69e84)
Conflicts:
src/i965_device_info.c
Zhong Li [Thu, 15 Jan 2015 14:04:52 +0000 (22:04 +0800)]
VP8 HWEnc: Add vp8 gen9 intra frame encoding shader
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
722fe89eae811743d7d46f9d11162aa3a5c3ba53)
Conflicts:
src/shaders/vme/Makefile.am
Xiang, Haihao [Thu, 19 Mar 2015 01:59:11 +0000 (09:59 +0800)]
1.5.2.pre1 for development
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 16 Mar 2015 02:00:07 +0000 (10:00 +0800)]
Add new SKL PCI ids
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Sreerenj Balachandran [Thu, 5 Mar 2015 11:03:45 +0000 (13:03 +0200)]
jpeg_enc: Fix the column raster conversion of quatization matrix.
Use temp array for the new raster order calculation, otherwise
it simply generate wrong values.
Note: There is opportunity for more optimization, for eg
we can avoid the usage of mulitple for loops here and there.
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Reviewed-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Sreerenj Balachandran [Thu, 5 Mar 2015 11:03:44 +0000 (13:03 +0200)]
jpeg_enc: Fix the quatisation matrix scaling.
The misplaced parentheses are causing wrong value assignment
to the quatization matrix.
This will allow the ecoding when quality > 50.
Otherwise it will simply generate garbage in encoded video
for any quality factor greater than 50
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Reviewed-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Sreerenj Balachandran [Thu, 5 Mar 2015 11:03:43 +0000 (13:03 +0200)]
jpeg_enc: Avoid integer overflow while doing quality factor scaling
For eg: The uint8_t will simple overflow if submitted
quality factor is 1 (5000/1).
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Reviewed-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Michael Müller [Wed, 4 Mar 2015 23:15:45 +0000 (00:15 +0100)]
Do not print warnings on stdout
The driver should not use stdout as this pipe is used by
a lot of programs to exchange data and should instead print
debug messages to stderr
Signed-off-by: Michael Müller <michael@fds-team.de>
Zhong Li [Wed, 28 Jan 2015 07:40:01 +0000 (15:40 +0800)]
decode/VP8: HW needs 1 extra byte for each partition
Signed-off-by: Zhong Li <zhong.li@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Tested-by: Sean V Kelley <seanvk@posteo.de>
Heng-ruey Hsu [Tue, 3 Feb 2015 21:11:30 +0000 (13:11 -0800)]
libva-intel-driver: Implement max width and height in QuerySurfaceAttributes
With this, we can get hardware supported resolution for video encode and
decode. This CL is used to prepare GetSupportedResolution in chrome.
Signed-off-by: Heng-ruey Hsu <henryhsu@chromium.org>
Reviewed-by: Wu-cheng Li <wuchengli@chromium.org>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Cc: Pawel Osciak <posciak@chromium.org>
Cc: Stéphane Marchesin <marcheu@chromium.org>
Chris Wilson [Tue, 3 Feb 2015 16:59:54 +0000 (16:59 +0000)]
dri: Update region's width/height on every PutSurface
Currently we expect that if a surface changes size, we will be given a
new buffer with a new name. This is not always true as the ddx may try
to keep the same buffer for the client if it is large enough for the new
size. Since we always know the width/height of the buffer, we can pass
that information along every time into the intel_region struct.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Cc: Dmitry Ermilov <dmitry.ermilov@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Tested-by: Sean V Kelley <seanvk@posteo.de>
Xiang, Haihao [Thu, 29 Jan 2015 15:19:41 +0000 (23:19 +0800)]
The SEND with EOT message must use R112-R127 for message payload on GEN7+
EOT message on GEN9 has used R112-R127, but the same message on GEN7-GEN8 still uses
other registers. To avoid potential issues, use R112-R127 on GEN7-GEN8 too
In additition, GEN7-GEN9 use the same 'write' message, so factor out the same
code to exa_wm_write.g7i in this patch
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 22 Jan 2015 02:59:58 +0000 (10:59 +0800)]
VC1: No overlap smoothing if the overlap flag is 0
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Mon, 2 Feb 2015 01:11:21 +0000 (09:11 +0800)]
Disable upper bound check for decoding on BDW+
We saw pixel corruption in stress test with the wrong up-bound address.
For simplicity, disable upper bound check in the driver.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Tue, 27 Jan 2015 03:09:02 +0000 (11:09 +0800)]
Use VMask instead of DMask in 3DSTATE_PS on GEN8+
Mesa uses VMask instead of DMask in 3DSTATE_PS.
"Initialize the execution mask with VMask. Otherwise, derivatives are
incorrect for subspans where some of the pixels are unlit. We believe
the bit just didn't take effect in previous generations."
To avoid potential issue, use VMask in libva too.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Michael Olbrich [Mon, 4 Aug 2014 17:05:18 +0000 (19:05 +0200)]
add missing include
Without this building without HAVE_VA_X11 fails with:
[...]
In file included from i965_drv_video.c:37:0:
i965_output_wayland.h:31:26: error: unknown type name 'VADriverContextP'
i965_output_wayland.h:34:31: error: unknown type name 'VADriverContextP'
i965_drv_video.c:5243:9: error: 'i965_output_wayland_init' undeclared here (not in a function)
i965_drv_video.c:5244:9: error: 'i965_output_wayland_terminate' undeclared here (not in a function)
[....]
Sreerenj Balachandran [Wed, 21 Jan 2015 14:04:57 +0000 (16:04 +0200)]
Fix the GetConfigAttributes() for JPEGBaseline profile
Advertise the PACKED_RAW_DATA header support for JPEGEncoding.
Xiang, Haihao [Wed, 14 Jan 2015 03:59:48 +0000 (11:59 +0800)]
Update license header for some shaders
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Joe Konno [Tue, 13 Jan 2015 22:29:21 +0000 (15:29 -0700)]
BDW+: disable SGVS
BDW introduces separate packets for controlling instancing and system
generated values (eg vertex id and instance id). We don't use
instancing, but still need to disable sgvs to avoid undefined behaviour
when some other driver (mesa) uses it.
Signed-off-by: Joe Konno <joe.konno@intel.com>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Daniel Charles <daniel.charles@intel.com>
(cherry picked from commit
4caa37b895d39af754e2b2307879752130731f56)
Zhao Yakui [Mon, 12 Jan 2015 12:33:37 +0000 (20:33 +0800)]
i965 render: Explicitly disable instancing for vertex elements on Skylake
We really should guarantee that vertex elements non-instanced,
especially since we don't use our own hardware context - other
programs can change this on us.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Sean V Kelley <seanvk@posteo.de>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
96278cab8cbc029d72ef2aa3b4728a722eceba1f)
Kenneth Graunke [Fri, 9 Jan 2015 21:39:36 +0000 (14:39 -0700)]
i965 render: Explicitly disable instancing for vertex elements on Gen8
We really should guarantee that vertex elements non-instanced,
especially since we don't use our own hardware context - other
programs can change this on us.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Sean V Kelley <seanvk@posteo.de>
(cherry picked from commit
e079591f2ed4dbfaad309c95aa1a1ddb00eb80e8)
Xiang, Haihao [Fri, 9 Jan 2015 04:05:31 +0000 (12:05 +0800)]
Fix segmentation fault caused by
4711da5
The corresponding pointer is NULL if VAProcFilterSkinToneEnhancement
isn't enabled in the pipeline
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
8596cb68e85a5708e05b9b49510ca52dd3d0a468)
Sirisha Muppavarapu [Mon, 15 Dec 2014 19:25:19 +0000 (11:25 -0800)]
STDE Optimization: Added code to support optimization of Skin Tone Detection and Enhancement for stde factors 0(default), 3, 6, and 9.
(cherry picked from commit
4711da55046cb9bd3fa26065869d8c3bcfc9f39a)
Zhao Yakui [Wed, 7 Jan 2015 04:45:34 +0000 (12:45 +0800)]
Fix the broken attribute setting of i965_GetConfigAttrib
Now the some attributes are incorrectly reported. It is not supported while
VA_ATTRIB_NOT_SUPPORTED flag is not returned.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang Haihao <haihao.xiang@intel.com>
(cherry picked from commit
dd23d450f5b2b70c36a0053a0892c0ff1e32e8cf)
Antti Seppälä [Mon, 5 Jan 2015 18:31:35 +0000 (20:31 +0200)]
Fix scaling of NV12 surfaces when no output_region is set
The code block filling destination surface target rectangle is too early
and incorrectly fills input surface width & height as final target width
and height. This results in improper scaling of the source surface.
Move the destination code block further below the point when actual
target surface is referenced and its width and height are known and use
them to fill the destination rectangle.
Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Antti Seppälä [Mon, 5 Jan 2015 07:50:30 +0000 (09:50 +0200)]
Fix forward reference requirement for Bob deinterlacing in intel-driver
Remove stray semicolon to fix condition check for forward reference surface
count in vaQueryVideoProcPipelineCaps.
This fix allows the pipeline query to return 0 forward references for Bob
deinterlacer.
Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Xiang, Haihao [Mon, 29 Dec 2014 06:55:49 +0000 (14:55 +0800)]
1.5.1.pre1 for development
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
939ef3f0031ec404a32e926471e2961bb2079fde)
Xiang, Haihao [Mon, 29 Dec 2014 04:17:14 +0000 (12:17 +0800)]
Intel driver 1.5.0
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
83b833a19ef72b07e8a103d8e8c59fcb779f2ff6)
Xiang, Haihao [Mon, 15 Dec 2014 06:07:37 +0000 (14:07 +0800)]
Update NEWS
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
8583cfa22c086f01e00bbdb3ce8883f93dcf2e37)
Xiang, Haihao [Mon, 15 Dec 2014 05:35:08 +0000 (13:35 +0800)]
Update the dependency on VAAPI and intel-gen4asm
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
3098efb04abf2dca24559bc2bb2d7ab1697484a2)
Xiang, Haihao [Fri, 14 Nov 2014 08:18:09 +0000 (16:18 +0800)]
configure: bump to 1.5.0.pre1
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
78d8bccf19ec47fb517e7d6140a5faad360a20a7)
Conflicts:
configure.ac
Zhenyu Wang [Fri, 26 Dec 2014 07:04:11 +0000 (00:04 -0700)]
Use libdrm to get device id
Instead of call ioctl by ourself, use libdrm interface to get device id.
This not only saves one ioctl call as is done when gem bufmgr init. It
also allows to use libdrm's device id override helper envionment "INTEL_DEVID_OVERRIDE".
If you override device id combined with aub dump enable, you can get aub
file to debug it under emulator for any device that you might not have real
HW metal.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
1879d37119ef65aaf0fbb63c7f5a60390ae64f27)
Zhenyu Wang [Fri, 26 Dec 2014 07:04:10 +0000 (00:04 -0700)]
Add new debug option for aub dump
New VA debug option to dump aub file.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
9509ac69a5fdb6f60b471ebc32e767cecaa72268)
Xiang, Haihao [Mon, 15 Dec 2014 04:10:12 +0000 (12:10 +0800)]
Use intel_batchbuffer_free() to free a batch buffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Mon, 15 Dec 2014 04:01:16 +0000 (12:01 +0800)]
Fix misused dri_bo_reference()
The object returned from dri_bo_alloc() has been referenced.
This commit fixes https://bugs.freedesktop.org/show_bug.cgi?id=86913
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Sun, 14 Dec 2014 16:53:01 +0000 (00:53 +0800)]
Fix the broken out of tree builds
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>