OSDN Git Service
Hans Wennborg [Tue, 14 Nov 2017 21:09:45 +0000 (21:09 +0000)]
Rename CountingFunctionInserter and use for both mcount and cygprofile calls, before and after inlining
Clang implements the -finstrument-functions flag inherited from GCC, which
inserts calls to __cyg_profile_func_{enter,exit} on function entry and exit.
This is useful for getting a trace of how the functions in a program are
executed. Normally, the calls remain even if a function is inlined into another
function, but it is useful to be able to turn this off for users who are
interested in a lower-level trace, i.e. one that reflects what functions are
called post-inlining. (We use this to generate link order files for Chromium.)
LLVM already has a pass for inserting similar instrumentation calls to
mcount(), which it does after inlining. This patch renames and extends that
pass to handle calls both to mcount and the cygprofile functions, before and/or
after inlining as controlled by function attributes.
Differential Revision: https://reviews.llvm.org/D39287
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318195
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Dinar Temirbulatov [Tue, 14 Nov 2017 20:55:08 +0000 (20:55 +0000)]
[SLPVectorizer] Failure to beneficially vectorize 'copyable' elements in integer binary ops.
Patch tries to improve vectorization of the following code:
void add1(int * __restrict dst, const int * __restrict src) {
*dst++ = *src++;
*dst++ = *src++ + 1;
*dst++ = *src++ + 2;
*dst++ = *src++ + 3;
}
Allows to vectorize even if the very first operation is not a binary add, but just a load.
Fixed issues related to previous commit.
Reviewers: spatel, mzolotukhin, mkuper, hfinkel, RKSimon, filcab, ABataev
Reviewed By: ABataev, RKSimon
Subscribers: llvm-commits, RKSimon
Differential Revision: https://reviews.llvm.org/D28907
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318193
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Jake Ehrlich [Tue, 14 Nov 2017 20:36:04 +0000 (20:36 +0000)]
[llvm-objcopy] Improve command line option help messages
I was being inconsistent with the way I was capitalizing help messages
for command line options. Additionally --remove-section wasn't using
value_desc even though it benefited from it.
Differential Revision: https://reviews.llvm.org/D39978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318190
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Matt Arsenault [Tue, 14 Nov 2017 20:33:14 +0000 (20:33 +0000)]
AMDGPU: Error on stack size overflow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318189
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Ulrich Weigand [Tue, 14 Nov 2017 20:00:34 +0000 (20:00 +0000)]
[SystemZ] Do not crash when selecting an OR of two constants
In rare cases, common code will attempt to select an OR of two
constants. This confuses the logic in splitLargeImmediate,
causing an internal error during isel. Fixed by simply leaving
this case to common code to handle.
This fixes PR34859.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318187
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Evandro Menezes [Tue, 14 Nov 2017 19:59:43 +0000 (19:59 +0000)]
[AArch64] Adjust the cost model for Exynos M1 and M2
Fix the modeling of loads and stores of registers pairs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318186
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Martin Storsjo [Tue, 14 Nov 2017 19:58:36 +0000 (19:58 +0000)]
[llvm-strings] Add support for the -a/--all options
They don't actually change nay behaviour, as llvm-strings currently
checks the whole object without looking at individual sections anyway.
This allows using llvm-strings in a context that explicitly passes
the -a option.
Differential Revision: https://reviews.llvm.org/D40020
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318185
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Martin Storsjo [Tue, 14 Nov 2017 19:57:59 +0000 (19:57 +0000)]
[ARM, AArch64] Fix an assert message, Darwin isn't the only target supporting TLS. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318184
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Hiroshi Yamauchi [Tue, 14 Nov 2017 19:48:59 +0000 (19:48 +0000)]
Simplify irreducible loop metadata test code.
Summary:
Shorten the irreducible loop metadata test code by removing insignificant
instructions.
Reviewers: davidxl
Reviewed By: davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40043
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318182
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Easwaran Raman [Tue, 14 Nov 2017 19:31:51 +0000 (19:31 +0000)]
[CodeGenPrepare] Disable div bypass when working set size is huge.
Summary:
Bypass of slow divs based on operand values is currently disabled for
-Os. Do the same when profile summary is available and the working set
size of the application is huge. This is similar to how loop peeling is
guarded by hasHugeWorkingSetSize. In the div bypass case, the generated
extra code (and the extra branch) tendss to outweigh the benefits of the
bypass. This results in noticeable performance improvement on an
internal application.
Reviewers: davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39992
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318179
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Ulrich Weigand [Tue, 14 Nov 2017 19:20:46 +0000 (19:20 +0000)]
[SystemZ] Fix invalid codegen using RISBMux on out-of-range bits
Before using the 32-bit RISBMux set of instructions we need to
verify that the input bits are actually within range of the 32-bit
instruction. This fixer PR35289.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318177
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Alex Bradbury [Tue, 14 Nov 2017 19:16:08 +0000 (19:16 +0000)]
Set hasSideEffects=0 for TargetOpcode::{CFI_INSTRUCTION,EH_LABEL,GC_LABEL,ANNOTATION_LABEL}
D37065 (committed as rL317674) explicitly set hasSideEffects for all
TargetOpcode::* instructions where it was inferred previously. This is a
follow-up to that patch, setting hasSideEffects=0 for CFI_INSTRUCTION,
EH_LABEL, GC_LABEL and ANNOTATION_LABEL. All LLVM tests pass after this
change.
This patch also modifies MachineInstr::isLabel returns true for a
TargetOpcode::ANNOTATION_LABEL, which ensures that an annotation label won't
be incorrectly considered safe to move.
Differential Revision: https://reviews.llvm.org/D39941
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318174
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Artem Belevich [Tue, 14 Nov 2017 19:14:00 +0000 (19:14 +0000)]
Mark intrinsics operating on the whole warp as IntrInaccessibleMemOnly
It's needed to model the fact that they do access data from other threads in a
warp and thus can't be CSE'd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318173
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Simon Dardis [Tue, 14 Nov 2017 19:11:45 +0000 (19:11 +0000)]
[mips] Simplify test for 5.0.1 (NFC)
Simplify testing that an emergency spill slot is used when MSA
is used so that it can be included in the 5.0.1 release.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318172
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Jake Ehrlich [Tue, 14 Nov 2017 18:50:24 +0000 (18:50 +0000)]
[llvm-objcopy] Add -strip-non-alloc option to remove all non-allocated sections
This change adds a new flag not present in GNU objcopy that we call
--strip-non-alloc.
Differential Revision: https://reviews.llvm.org/D39926
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318168
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Yaxun Liu [Tue, 14 Nov 2017 18:46:52 +0000 (18:46 +0000)]
CodeGen: Fix TargetLowering::LowerCallTo for sret value type
TargetLowering::LowerCallTo assumes that sret value type corresponds to a
pointer in default address space, which is incorrect, since sret value type
should correspond to a pointer in alloca address space, which may not
be the default address space. This causes assertion for amdgcn target
in amdgiz environment.
This patch fixes that.
Differential Revision: https://reviews.llvm.org/D39996
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318167
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Jake Ehrlich [Tue, 14 Nov 2017 18:41:47 +0000 (18:41 +0000)]
[llvm-objcopy] Support the rest of the ELF formats
We haven't been supporting anything but ELF64LE since the start. Luckily
this was always accounted for and the change is pretty trivial. B35281
requests this change for ELF32LE. This change adds support for ELF32LE,
ELF64BE, and ELF32BE with all supported features that already existed
for ELF64LE.
Differential Revision: https://reviews.llvm.org/D39977
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318166
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Mandeep Singh Grang [Tue, 14 Nov 2017 18:22:50 +0000 (18:22 +0000)]
[PredicateInfo] Stable sort ValueDFS to remove non-deterministic ordering
Summary: This fixes failure in Transforms/Util/PredicateInfo/testandor.ll uncovered by D39245.
Reviewers: dberlin
Reviewed By: dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39630
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318165
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Mandeep Singh Grang [Tue, 14 Nov 2017 18:11:08 +0000 (18:11 +0000)]
[XRay] Stable sort XRayRecord to remove non-deterministic ordering
Summary:
This fixes failure in tools/llvm-xray/X86/graph-zero-latency-calls.yaml
uncovered by D39245.
Reviewers: dberris
Reviewed By: dberris
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39943
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318163
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Serge Guelton [Tue, 14 Nov 2017 18:08:05 +0000 (18:08 +0000)]
Add missing const qualifier to AttributeSet::operator==
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318162
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Adam Nemet [Tue, 14 Nov 2017 17:12:36 +0000 (17:12 +0000)]
Adjust test after r318159
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318160
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Adam Nemet [Tue, 14 Nov 2017 16:59:18 +0000 (16:59 +0000)]
[llvm-profdata] Report if profile data file is IR- or FE-level
Differential Revision: https://reviews.llvm.org/D39997
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318159
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Craig Topper [Tue, 14 Nov 2017 16:14:00 +0000 (16:14 +0000)]
[X86] Fix typo in comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318156
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Oliver Stannard [Tue, 14 Nov 2017 15:35:15 +0000 (15:35 +0000)]
[Docs] Add tablegen backend for target opcode documentation
This is a tablegen backend to generate documentation for the opcodes that exist
for each target. For each opcode, it lists the assembly string, the names and
types of all operands, and the flags and predicates that apply to the opcode.
Differential revision: https://reviews.llvm.org/D31025
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318155
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Ilya Biryukov [Tue, 14 Nov 2017 14:26:42 +0000 (14:26 +0000)]
Use input redirection in WebAssembly/comdat.ll test.
To match how the other tests do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318153
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Simon Pilgrim [Tue, 14 Nov 2017 14:03:29 +0000 (14:03 +0000)]
[X86][AVX] Add scheduling test for vmovntdq 256-bit store
Needs to use inline asm as domain will otherwise be changed to float (vmovntps)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318151
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Gil Rapaport [Tue, 14 Nov 2017 12:09:30 +0000 (12:09 +0000)]
[LV] Introduce VPBlendRecipe, VPWidenMemoryInstructionRecipe
This patch is part of D38676.
The patch introduces two new Recipes to handle instructions whose vectorization
involves masking. These Recipes take VPlan-level masks in D38676, but still rely
on ILV's existing createEdgeMask(), createBlockInMask() in this patch.
VPBlendRecipe handles intra-loop phi nodes, which are vectorized as a sequence
of SELECTs. Its execute() code is refactored out of ILV::widenPHIInstruction(),
which now handles only loop-header phi nodes.
VPWidenMemoryInstructionRecipe handles load/store which are to be widened
(but are not part of an Interleave Group). In this patch it simply calls
ILV::vectorizeMemoryInstruction on execute().
Differential Revision: https://reviews.llvm.org/D39068
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318149
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Tim Northover [Tue, 14 Nov 2017 11:43:54 +0000 (11:43 +0000)]
ARM: correctly update CFG when splitting BB to fix branch.
Because the block-splitting code is multi-purpose, we have to meddle with the
branches when using it to fixup a conditional branch destination. We got the
code right, but forgot to update the CFG so the verifier complained when
expensive checks were on.
Probably harmless since constant-islands comes so late, but best to fix it
anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318148
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Diana Picus [Tue, 14 Nov 2017 11:20:32 +0000 (11:20 +0000)]
[ARM GlobalISel] Remove C++ code for G_CONSTANT
Get rid of the handwritten instruction selector code for handling
G_CONSTANT. This code wasn't checking all the preconditions correctly
anyway, so it's better to leave it to TableGen, which can handle at
least some cases correctly (e.g. MOVi, MOVi16, folding into binary
operations). Also add tests to cover those cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318146
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Momchil Velikov [Tue, 14 Nov 2017 10:36:52 +0000 (10:36 +0000)]
[ARM] Fix incorrect conversion of a tail call to an ordinary call
When we emit a tail call for Armv8-M, but then discover that the caller needs to
save/restore `LR`, we convert the tail call to an ordinary one, since restoring
`LR` takes extra instructions, which may negate the benefits of the tail
call. If the callee, however, takes stack arguments, this conversion is
incorrect, since nothing has been done to pass the stack arguments.
Thus the patch reverts https://reviews.llvm.org/rL294000
Also, we improve the instruction sequence for popping `LR` in the case when we
couldn't immediately find a scratch low register, but we can use as a temporary
one of the callee-saved low registers and restore `LR` before popping other
callee-saves.
Differential Revision: https://reviews.llvm.org/D39599
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318143
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Matt Arsenault [Tue, 14 Nov 2017 06:40:00 +0000 (06:40 +0000)]
AMDGPU: Fix test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318138
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Adam Nemet [Tue, 14 Nov 2017 04:48:18 +0000 (04:48 +0000)]
[opt-viewer] Truncate long remark text in source view
The table is changed to fixed layout[1] and the lines use ellipses if they
would overflow their cell.
[1] https://css-tricks.com/fixing-tables-long-strings/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318136
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Adam Nemet [Tue, 14 Nov 2017 04:37:32 +0000 (04:37 +0000)]
[opt-viewer] With hotness only show max 1000 entries on the index page
Adjustable with an option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318135
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Dylan McKay [Tue, 14 Nov 2017 04:32:49 +0000 (04:32 +0000)]
[AVR] Remove the select-mbb-placement-bug.ll test
This test was originally added when an old bug was fixed that caused
broken iterator code to break basic block placement.
The issue has an extremely low chance of every being a problem again.
This specific test is very flaky and fails often due to upstream
changes.
I have removed this test because it negates more value than it returns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318134
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Matt Arsenault [Tue, 14 Nov 2017 02:16:54 +0000 (02:16 +0000)]
AMDGPU: Fix producing saveexec when the copy is spilled
If the register from the copy from exec was spilled,
the copy before the spill was deleted leaving a spill
of undefined register verifier error and miscompiling.
Check for other use instructions of the copy register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318132
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Chandler Carruth [Tue, 14 Nov 2017 01:30:04 +0000 (01:30 +0000)]
[PM] Port BoundsChecking to the new PM.
Registers it and everything, updates all the references, etc.
Next patch will add support to Clang's `-fexperimental-new-pass-manager`
path to actually enable BoundsChecking correctly.
Differential Revision: https://reviews.llvm.org/D39084
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318128
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Rafael Espindola [Tue, 14 Nov 2017 01:21:15 +0000 (01:21 +0000)]
Use TempFile in llvm-ar. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318127
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Chandler Carruth [Tue, 14 Nov 2017 01:13:59 +0000 (01:13 +0000)]
[PM] Refactor BoundsChecking further to prepare it to be exposed both as
a legacy and new PM pass.
This essentially moves the class state to parameters and re-shuffles the
code to make that reasonable. It also does some minor cleanups along the
way and leaves some comments.
Differential Revision: https://reviews.llvm.org/D39081
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318124
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Sam Clegg [Tue, 14 Nov 2017 00:49:16 +0000 (00:49 +0000)]
[WebAssembly] Explicily disable comdat support for wasm output
For now at least. We clearly need some kind of comdat or
linkonce_odr support for wasm but currently COMDAT is not
supported.
Disable COMDAT support in the same way we do the Mach-O. This
also causes clang not to generated COMDATs.
Differential Revision: https://reviews.llvm.org/D39873
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318123
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Rafael Espindola [Tue, 14 Nov 2017 00:31:28 +0000 (00:31 +0000)]
Add a move assignment operator to TempFile. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318122
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Hans Wennborg [Mon, 13 Nov 2017 23:47:58 +0000 (23:47 +0000)]
Update some code.google.com links
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318115
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Zachary Turner [Mon, 13 Nov 2017 23:33:29 +0000 (23:33 +0000)]
Revert "Update test_debuginfo.pl script to point to new tree location."
This reverts the aforementioned patch and 2 subsequent follow-ups,
as some buildbots are still failing 2 tests because of it.
Investigation is ongoing into the cause of the failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318112
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Rafael Espindola [Mon, 13 Nov 2017 23:32:19 +0000 (23:32 +0000)]
Simplify and rename variable.
std::error_code can represent success, so we don't need a
Optional<std::error_code>.
Rename the variable to avoid confusion with the type Error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318111
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Matt Arsenault [Mon, 13 Nov 2017 23:24:26 +0000 (23:24 +0000)]
AMDGPU: Fix not converting d16 load/stores to offset
Fixes missed optimization with new MUBUF instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318106
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Rafael Espindola [Mon, 13 Nov 2017 23:06:54 +0000 (23:06 +0000)]
Simplify. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318104
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Daniel Sanders [Mon, 13 Nov 2017 23:03:47 +0000 (23:03 +0000)]
[tablegen] Handle atomic predicates for ordering inside tablegen. NFC.
Similar to r315841, GlobalISel and SelectionDAG require different code for the
common atomic predicates due to differences in the representation.
Even without that, differences in the IR (SDNode vs MachineInstr) require
differences in the C++ predicate.
This patch moves the implementation of the common atomic predicates related to
ordering into tablegen so that it can handle these differences.
It's NFC for SelectionDAG since it emits equivalent code and it's NFC for
GlobalISel since the rules involving the relevant predicates are still
rejected by the importer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318102
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Matt Arsenault [Mon, 13 Nov 2017 22:55:05 +0000 (22:55 +0000)]
AMDGPU: Implement computeKnownBitsForTargetNode for mbcnt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318100
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Daniel Sanders [Mon, 13 Nov 2017 22:26:13 +0000 (22:26 +0000)]
[tablegen] Handle atomic predicates for memory type inside tablegen. NFC.
Similar to r315841, GlobalISel and SelectionDAG require different code for the
common atomic predicates due to differences in the representation.
Even without that, differences in the IR (SDNode vs MachineInstr) require
differences in the C++ predicate.
This patch moves the implementation of the common atomic predicates related to
memory type into tablegen so that it can handle these differences.
It's NFC for SelectionDAG since it emits equivalent code and it's NFC for
GlobalISel since the rules involving the relevant predicates are still
rejected by the importer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318095
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Jake Ehrlich [Mon, 13 Nov 2017 22:13:08 +0000 (22:13 +0000)]
[llvm-objcopy] Add --strip-debug
Many projects use this option. There are two ways to use it. You can
either a) Just use --strip-debug and keep the old file with debug
content or b) you can use --strip-debug, --only-keep-debug, and
--add-gnu-debuglink all in conjunction to create two separate files, the
stripped file and the debug file. --only-keep-debug is more complicated
than --strip-debug because it keeps the section headers without keeping
section contents. That's not really supported by llvm-objcopy at the
moment but I plan on adding it. So this change just supports a) and
options to support b) will come soon.
Differential Revision: https://reviews.llvm.org/D39919
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318094
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Jake Ehrlich [Mon, 13 Nov 2017 22:02:07 +0000 (22:02 +0000)]
[llvm-objcopy] Add --strip-all option to llvm-objcopy
This change adds a slightly less extreme form of stripping. It should
remove any section that starts with ".debug" and should remove any
symbol table or relocations. In general this strips out most of the
stuff you don't need to execute but leaves a number of things around.
This behavior has been designed to be compatible with GNU strip/objcopy
--strip-all so that anywhere you currently use --strip-all you should be
able to use llvm-objcopy as a drop in replacement.
Differential Revision: https://reviews.llvm.org/D39769
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318092
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Serge Guelton [Mon, 13 Nov 2017 21:55:01 +0000 (21:55 +0000)]
Fix -Werror when compiling rL318083 (ter)
Statically assert the result and remove a runtime comparison, a direct consequence of the optimization introduced in rL318083.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318091
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Serge Guelton [Mon, 13 Nov 2017 21:40:57 +0000 (21:40 +0000)]
Fix -Werror when compiling rL318083 (bis)
Statically assert the result and remove a runtime comparison, a direct consequence of the optimization introduced in rL318083.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318090
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Serge Guelton [Mon, 13 Nov 2017 21:25:35 +0000 (21:25 +0000)]
Fix -Werror when compiling rL318083
Statically assert the result and remove a runtime comparison, a direct consequence of the optimization introduced in rL318083.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318087
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Adrian Prantl [Mon, 13 Nov 2017 21:24:54 +0000 (21:24 +0000)]
Fix an assertion in SelectionDAG::transferDbgValues()
when transferring debug info describing the lower bits of an extended SDNode.
rdar://problem/
35504722
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318086
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Serge Guelton [Mon, 13 Nov 2017 20:57:40 +0000 (20:57 +0000)]
Reorder Value.def to optimize code size
If the first values in Value.def is the range of constant, then the code
generated by `isa<Constant>` is smaller by one operation (basically, an add is
removed). It turns out this small optimization reduces the size of the
statically linked clang binary by 400ko on my laptop. The theoritical
performance gain is non visible from my benchmarks, but the size dropdown is.
Differential Revision: https://reviews.llvm.org/D39373
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318083
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Evgeniy Stepanov [Mon, 13 Nov 2017 20:45:38 +0000 (20:45 +0000)]
[arm] Fix Unnecessary reloads from GOT.
Summary:
This fixes PR35221.
Use pseudo-instructions to let MachineCSE hoist global address computation.
Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D39871
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318081
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Sanjay Patel [Mon, 13 Nov 2017 19:46:28 +0000 (19:46 +0000)]
[Reassociation] regenerate test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318076
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Reid Kleckner [Mon, 13 Nov 2017 18:43:11 +0000 (18:43 +0000)]
Fix clang -Wsometimes-uninitialized warning in SCEV code
I don't believe this was a problem in practice, as it's likely that the
boolean wasn't checked unless the backend condition was non-null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318073
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Dinar Temirbulatov [Mon, 13 Nov 2017 18:35:43 +0000 (18:35 +0000)]
NFC, Allow SystemZ SLP tests only when SystemZ is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318070
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Rafael Espindola [Mon, 13 Nov 2017 18:33:44 +0000 (18:33 +0000)]
Create a TempFile class.
This just adds a TempFile class and replaces the use in
FileOutputBuffer with it.
The only difference for now is better error handling. Followup work includes:
- Convert other user of temporary files to it.
- Add support for automatically deleting on windows.
- Add a createUnnamed method that returns a potentially unnamed
file. It would be actually unnamed on modern linux and have a
unknown name on windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318069
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Daniel Sanders [Mon, 13 Nov 2017 18:30:23 +0000 (18:30 +0000)]
[globalisel][tablegen] Add support for extload.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318068
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Petar Jovanovic [Mon, 13 Nov 2017 18:00:24 +0000 (18:00 +0000)]
fix printing of alias instructions by removing redundant spacing
Some alias instructions are printed with an extra space after the tab
character. Fix this by skipping that space when the tab character is printed
so that the instructions are aligned with the rest of the code.
Patch by Milos Stojanovic.
Differential Revision: https://reviews.llvm.org/D35946
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318059
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Sanjay Patel [Mon, 13 Nov 2017 17:56:23 +0000 (17:56 +0000)]
[ValueTracking] use 'auto' with 'dyn_cast'; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318058
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Craig Topper [Mon, 13 Nov 2017 17:53:59 +0000 (17:53 +0000)]
[X86] Allow X86ISD::Wrapper to be folded into the base of gather/scatter address
If the base of our gather corresponds to something contained in X86ISD::Wrapper we should be able to fold it into the address.
This patch refactors some of the address matching to more fully use the X86ISelAddressMode struct and the getAddressOperands helper. A new helper function matchVectorAddress is added to call matchWrapper or fall back to matchAddressBase.
We should also be able to support constant offsets from a wrapper, but I'll look into that in a future patch. We may even be able to completely reuse matchAddress here, but I wanted to start simple and work up to it.
Differential Revision: https://reviews.llvm.org/D39927
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318057
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Sanjay Patel [Mon, 13 Nov 2017 17:40:47 +0000 (17:40 +0000)]
[ValueTracking] simplify code in CannotBeNegativeZero() with match(); NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318055
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Sanjay Patel [Mon, 13 Nov 2017 17:29:11 +0000 (17:29 +0000)]
[Reassociate] add tests with 'reassoc' FMF; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318053
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Jan Vesely [Mon, 13 Nov 2017 16:46:07 +0000 (16:46 +0000)]
AMDGPU: Drop duplicate setOperationAction
These are set with other scalar int ops few lines up
Differential Revision: https://reviews.llvm.org/D39928
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318051
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Jatin Bhateja [Mon, 13 Nov 2017 16:43:24 +0000 (16:43 +0000)]
[SCEV] Handling for ICmp occuring in the evolution chain.
Summary:
If a compare instruction is same or inverse of the compare in the
branch of the loop latch, then return a constant evolution node.
This shall facilitate computations of loop exit counts in cases
where compare appears in the evolution chain of induction variables.
Will fix PR 34538
Reviewers: sanjoy, hfinkel, junryoungju
Reviewed By: sanjoy, junryoungju
Subscribers: javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D38494
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318050
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Simon Dardis [Mon, 13 Nov 2017 16:41:17 +0000 (16:41 +0000)]
Revert "[CodeGenPrepare] Check that erased sunken address are not reused"
This reverts commit r318032. The test broke some sanitizer bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318049
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Diana Picus [Mon, 13 Nov 2017 16:02:42 +0000 (16:02 +0000)]
[ARM GlobalISel] Update legalizer test
Make one of the legalizer tests a bit more robust by making sure all
values we're interested in are used (either in a store or a return) and
by using loads instead of constants for obtaining values on fewer than
32 bits. This should make the test less fragile to changes in the
legalize combiner, since those loads are legal (as opposed to the
constants, which were being widened and thus produced opportunities for
the legalize combiner).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318047
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Bill Seurer [Mon, 13 Nov 2017 15:43:19 +0000 (15:43 +0000)]
[PowerPC][msan] Update msan to handle changed memory layouts in newer kernels
In more recent Linux kernels (including those with 47 bit VMAs) the layout of
virtual memory for powerpc64 changed causing the memory sanitizer to not
work properly. This patch adjusts a bit mask in the memory sanitizer to work
on the newer kernels while continuing to work on the older ones as well.
This is the non-runtime part of the patch and finishes it. ref: r317802
Tested on several 4.x and 3.x kernel releases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318045
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Omer Paparo Bivas [Mon, 13 Nov 2017 15:02:39 +0000 (15:02 +0000)]
Inserting a base test for X86 performance nops
Change-Id: I69da08b617d7fae8024c5aee04720eb465f39b81
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318041
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Uriel Korach [Mon, 13 Nov 2017 12:51:18 +0000 (12:51 +0000)]
[X86] test/testn intrinsics lowering to IR. llvm part.
Remove builtins from llvm and add AutoUpgrade support.
Also add fast-isel tests for the TEST and TESTN instructions.
Differential Revision: https://reviews.llvm.org/D38736
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318036
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Greg Bedwell [Mon, 13 Nov 2017 12:40:05 +0000 (12:40 +0000)]
Move the setting of LLVM_BUILD_MODE to a macro so that we can re-use it in compiler-rt
Differential Revision: https://reviews.llvm.org/D38470
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318034
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Momchil Velikov [Mon, 13 Nov 2017 11:56:48 +0000 (11:56 +0000)]
[ARM] Place jump table as the first operand in additions
When generating table jump code for switch statements, place the jump
table label as the first operand in the various addition instructions
in order to enable addressing mode selectors to better match index
computation and possibly fold them into the addressing mode of the
table entry load instruction.
Differential revision: https://reviews.llvm.org/D39752
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318033
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Simon Dardis [Mon, 13 Nov 2017 11:47:21 +0000 (11:47 +0000)]
[CodeGenPrepare] Check that erased sunken address are not reused
CodeGenPrepare sinks address computations from one basic block to another
and attempts to reuse address computations that have already been sunk. If
the same address computation appears twice with the first instance as an
operand of a load whose result is an operand to a simplifable select,
CodeGenPrepare simplifies the select and recursively erases the now dead
instructions. CodeGenPrepare then attempts to use the erased address
computation for the second load.
Fix this by erasing the cached address value if it has zero uses before
looking for the address value in the sunken address map.
This partially resolves PR35209.
Thanks to Alexander Richardson for reporting the issue!
Reviewers: john.brawn
Differential Revision: https://reviews.llvm.org/D39841
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318032
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Florian Hahn [Mon, 13 Nov 2017 11:08:47 +0000 (11:08 +0000)]
[CodeExtractor] Add missing AllowVarArgs initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318029
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Florian Hahn [Mon, 13 Nov 2017 10:35:52 +0000 (10:35 +0000)]
[PartialInliner] Inline vararg functions that forward varargs.
Summary:
This patch extends the partial inliner to support inlining parts of
vararg functions, if the vararg handling is done in the outlined part.
It adds a `ForwardVarArgsTo` argument to InlineFunction. If it is
non-null, all varargs passed to the inlined function will be added to
all calls to `ForwardVarArgsTo`.
The partial inliner takes care to only pass `ForwardVarArgsTo` if the
varargs handing is done in the outlined function. It checks that vastart
is not part of the function to be inlined.
`test/Transforms/CodeExtractor/PartialInlineNoInline.ll` (already part
of the repo) checks we do not do partial inlining if vastart is used in
a basic block that will be inlined.
Reviewers: davide, davidxl, grosser
Reviewed By: davide, davidxl, grosser
Subscribers: gyiu, grosser, eraman, llvm-commits
Differential Revision: https://reviews.llvm.org/D39607
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318028
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Sander de Smalen [Mon, 13 Nov 2017 09:57:20 +0000 (09:57 +0000)]
Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318027
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Jina Nahias [Mon, 13 Nov 2017 09:16:39 +0000 (09:16 +0000)]
[x86][AVX512] Lowering shuffle i/f intrinsics to LLVM IR
This patch, together with a matching clang patch (https://reviews.llvm.org/D38672), implements the lowering of X86 shuffle i/f intrinsics to IR.
Differential Revision: https://reviews.llvm.org/D38671
Change-Id: I1e7d359a74743e995ec356237a85214ce55d3661
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318026
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Gadi Haber [Mon, 13 Nov 2017 08:42:07 +0000 (08:42 +0000)]
[X86][SKX] Adding scheduling info of non-intrinsic + commutable SKX opcodes.
Updated the scheduling information of the SKX subtarget in the file X86SchedSkylakeServer.td under lib/Target/X86 to:
1. add regular opcodes in addition to the suffixed "_Int" opcodes
2. add the (V)MAXCPD/MAXCPS/MAXCSD/MAXCSS/MINCPD/MINCPS/MINCSD/MINCSS
instructions that are equivalent to their counterparts without the 'C' as they are part of a hack to
make floating point min/max commutable under fast math.
Reviewers: zvi, RKSimon, craig.topper
Differential Revision: https://reviews.llvm.org/D39833
Change-Id: Ie13702a5ce1b1a08af91ca637a52b6962881e7d6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318024
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Craig Topper [Mon, 13 Nov 2017 08:17:30 +0000 (08:17 +0000)]
[X86] Limit NOPs to 7 bytes when 'slm' is spelled 'silvermont'.
We support 2 spelling for silvermont and we should accept both here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318023
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Craig Topper [Mon, 13 Nov 2017 08:07:33 +0000 (08:07 +0000)]
[X86] Use sse_load_f32/f64 to improve load folding of scalar vfscalefss/sd, vrcp14ss/sd, rsqrt14ss/sd instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318022
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Craig Topper [Mon, 13 Nov 2017 08:07:31 +0000 (08:07 +0000)]
[X86] Regenerate test. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318021
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Matt Arsenault [Mon, 13 Nov 2017 07:09:20 +0000 (07:09 +0000)]
MI: Print ranges on MMO
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318020
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Craig Topper [Mon, 13 Nov 2017 06:46:48 +0000 (06:46 +0000)]
[X86] Use sse_load_f32/f64 to improve load folding for scalar VFPCLASS intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318019
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Craig Topper [Mon, 13 Nov 2017 06:46:46 +0000 (06:46 +0000)]
[X86] Add tests for missed opportunities to fold a 128-bit vector load into vfpclassss and vpfpclasssd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318018
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Matt Arsenault [Mon, 13 Nov 2017 05:33:35 +0000 (05:33 +0000)]
AMDGPU: Preserve nuw in shl add ptr combine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318017
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Craig Topper [Mon, 13 Nov 2017 05:25:24 +0000 (05:25 +0000)]
[X86] Fix SQRTSS/SQRTSD/RCPSS/RCPSD intrinsics to use sse_load_f32/sse_load_f64 to increase load folding opportunities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318016
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Craig Topper [Mon, 13 Nov 2017 05:25:23 +0000 (05:25 +0000)]
[X86] Add tests for full vector loads to fold-load-unops.ll.
We should be able to fold a full vector load into a scalar intrinsic. Since it's legal to narrow a load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318015
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Craig Topper [Mon, 13 Nov 2017 05:25:21 +0000 (05:25 +0000)]
[X86] Regenerate fold-load-unops.ll and add and avx512f command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318014
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Matt Arsenault [Mon, 13 Nov 2017 05:11:54 +0000 (05:11 +0000)]
AMDGPU: Fix multi-use shl/add combine
This was using a custom function that didn't handle the
addressing modes properly for private. Use
isLegalAddressingMode to avoid duplicating this.
Additionally, skip the combine if there is only one use
since the standard combine will handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318013
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Craig Topper [Mon, 13 Nov 2017 02:19:13 +0000 (02:19 +0000)]
[X86] Attempt to fix signed and unsigned comparison warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318010
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Craig Topper [Mon, 13 Nov 2017 02:03:01 +0000 (02:03 +0000)]
[X86] Use sse_load_f32/f64 in patterns for the memory forms of VRNDSCALESS/SD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318009
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Craig Topper [Mon, 13 Nov 2017 02:03:00 +0000 (02:03 +0000)]
[X86] Use EVEX encoded VRNDSCALE instructions to implement the legacy round intrinsics.
The VRNDSCALE instructions implement a superset of the (V)ROUND instructions. They are equivalent if the upper 4-bits of the immediate are 0.
This patch lowers the legacy intrinsics to the VRNDSCALE ISD node and masks the upper bits of the immediate to 0. This allows us to take advantage of the larger register encoding space.
We should maybe consider converting VRNDSCALE back to VROUND in the EVEX to VEX pass if the extended registers are not being used.
I notice some load folding opportunities being missed for the VRNDSCALESS/SD instructions that I'll try to fix in future patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318008
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Craig Topper [Mon, 13 Nov 2017 02:02:58 +0000 (02:02 +0000)]
[X86] Split VRNDSCALE/VREDUCE/VGETMANT/VRANGE ISD nodes into versions with and without the rounding operand. NFCI
I want to reuse the VRNDSCALE node for the legacy SSE rounding intrinsics so that those intrinsics can use EVEX instructions. All of these nodes share tablegen multiclasses so I split them all so that they all remain similar in their implementations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318007
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Matt Arsenault [Mon, 13 Nov 2017 01:47:52 +0000 (01:47 +0000)]
Fix some misc. -enable-var-scope violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318006
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Matt Arsenault [Mon, 13 Nov 2017 00:22:09 +0000 (00:22 +0000)]
AMDGPU: Select d16 loads into low component of register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318005
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Matt Arsenault [Sun, 12 Nov 2017 23:53:44 +0000 (23:53 +0000)]
AMDGPU: Fix -enable-var-scope violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318004
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Matt Arsenault [Sun, 12 Nov 2017 23:40:12 +0000 (23:40 +0000)]
AMDGPU: Fix missing gfx9 atomic inc/dec tests
The global instructions weren't tested. Plus there
were also some -enable-var-scope violations and
broken check prefixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318003
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