OSDN Git Service
James Henderson [Tue, 26 Jun 2018 15:15:45 +0000 (15:15 +0000)]
[FileCheck] Add CHECK-EMPTY directive for checking for blank lines
Prior to this change, there was no clean way of getting FileCheck to
check that a line is completely empty. The expected way of using
"CHECK: {{^$}}" does not work because the '^' matches the end of the
previous match (this behaviour may be desirable in certain instances).
For the same reason, "CHECK-NEXT: {{^$}}" will fail when the previous
match was at the end of the line, as the pattern will match there.
Using the recommended [[:space:]] to match an explicit new line could
also match a space, and thus is not always desired. Literal '\n'
matches also do not work. A workaround was suggested in the review, but
it is a little clunky.
This change adds a new directive that behaves the same as CHECK-NEXT,
except that it only matches against empty lines (nothing, not even
whitespace, is allowed). As with CHECK-NEXT, it will fail if more than
one newline occurs before the next blank line. Example usage:
; test.txt
foo
bar
; CHECK: foo
; CHECK-EMPTY:
; CHECK-NEXT: bar
Differential Revision: https://reviews.llvm.org/D28896
Reviewed by: probinson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335613
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Tue, 26 Jun 2018 14:55:04 +0000 (14:55 +0000)]
Silence "unused variable" warning in LiveIntervals.cpp after r335607
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335610
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 26 Jun 2018 14:47:31 +0000 (14:47 +0000)]
[InstSimplify] add tests for srem with sext bool divisor; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335609
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Weber [Tue, 26 Jun 2018 14:42:48 +0000 (14:42 +0000)]
Fix LLVM_ENABLE_THREADS=0 builds after r335440.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335608
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Tue, 26 Jun 2018 14:37:16 +0000 (14:37 +0000)]
Account for undef values from predecessors in extendSegmentsToUses
It is legal for a PHI node not to have a live value in a predecessor
as long as the end of the predecessor is jointly dominated by an undef
value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335607
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 26 Jun 2018 14:15:31 +0000 (14:15 +0000)]
[TargetLowering] isVectorClearMaskLegal - use ArrayRef<int> instead of const SmallVectorImpl<int>&
This is more generic and matches isShuffleMaskLegal.
Differential Revision: https://reviews.llvm.org/D48591
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335605
91177308-0d34-0410-b5e6-
96231b3b80d8
Than McIntosh [Tue, 26 Jun 2018 14:11:30 +0000 (14:11 +0000)]
[X86,ARM] Retain split-stack prolog check for sibling calls
Summary:
If a routine with no stack frame makes a sibling call, we need to
preserve the stack space check even if the local stack frame is empty,
since the call target could be a "no-split" function (in which case
the linker needs to be able to fix up the prolog sequence in order to
switch to a larger stack).
This fixes PR37807.
Reviewers: cherry, javed.absar
Subscribers: srhines, llvm-commits
Differential Revision: https://reviews.llvm.org/D48444
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335604
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 26 Jun 2018 14:06:23 +0000 (14:06 +0000)]
Fix spelling mistakes in comments. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335603
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Tue, 26 Jun 2018 13:56:49 +0000 (13:56 +0000)]
[ThinLTO] Parse module summary index from assembly
Summary:
Adds assembly parsing support for the module summary index (follow on
to r333335 which added the assembly writing support).
I added support to llvm-as to invoke the index parsing, so that it can
create either a bitcode file with a Module and a per-module index, or
a combined index without a Module.
I will send follow on patches soon to do the following:
- add support to tools such as llvm-lto2 to parse the per-module indexes
from assembly instead of bitcode when testing the thin link.
- verification support.
Depends on D47844 and D47842.
Reviewers: pcc, dexonsmith, mehdi_amini
Subscribers: inglorion, eraman, steven_wu, llvm-commits
Differential Revision: https://reviews.llvm.org/D47905
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335602
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 26 Jun 2018 12:41:15 +0000 (12:41 +0000)]
[InstCombine] fold udiv with sext bool divisor
Note: I didn't add a hasOneUse() check because the existing,
related fold doesn't have that check. I suspect that the
improved analysis and codegen make these some of the rare
canonicalization cases where we allow an increase in
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335597
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Tue, 26 Jun 2018 12:28:47 +0000 (12:28 +0000)]
ARM: add binary file git swallowed.
Should fix bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335596
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Tue, 26 Jun 2018 11:39:20 +0000 (11:39 +0000)]
ARM: correctly decode VFP instructions following unpredictable t2IT
When the condition code for an IT instruction is "AL" we get strange "15"
predicates on subsequent instructions. These are dealt with for most
instructions by treating them as "ARMCC::AL", but VFP takes a different path
which didn't have this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335594
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Tue, 26 Jun 2018 11:38:41 +0000 (11:38 +0000)]
ARM: diagnose unpredictable IT instructions
IT instructions are allowed to have the 'AL' predicate, but it must never
result in an 'NV' predicated instruction. Essentially this means that all
branches must be 't' rather than 'e' if the predicate is 'AL'.
This patch adds a diagnostic for this during assembly (error because parsing
hits an assertion if allowed to continue) and an annotation during disassembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335593
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrea Di Biagio [Tue, 26 Jun 2018 11:00:21 +0000 (11:00 +0000)]
[llvm-mca] Removed wrong NDEBUG guards introduced by my last commit.
This partially reverts r335589.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335592
91177308-0d34-0410-b5e6-
96231b3b80d8
Clement Courbet [Tue, 26 Jun 2018 10:52:41 +0000 (10:52 +0000)]
[llvm-exegesis][NFC] Fix windows warning in rL335465.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335591
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 26 Jun 2018 10:45:41 +0000 (10:45 +0000)]
[X86] Just use ArrayRef instead of SmallVectorImpl in a few static method arguments. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335590
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrea Di Biagio [Tue, 26 Jun 2018 10:44:12 +0000 (10:44 +0000)]
[llvm-mca] Remove unused header files and correctly guard some include headers under NDEBUG. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335589
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Tue, 26 Jun 2018 10:15:02 +0000 (10:15 +0000)]
[IPSCCP] Change dead blocks to unreachable after visiting all executable blocks.
changeToUnreachable may remove PHI nodes from executable blocks we found values
for and we would fail to replace them. By changing dead blocks to unreachable after
we replaced constants in all executable blocks, we ensure such PHI nodes are replaced
by their known value before.
Fixes PR37780.
Reviewers: efriedma, davide
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D48421
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335588
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 26 Jun 2018 10:02:12 +0000 (10:02 +0000)]
Fix MSVC "signed/unsigned mismatch" warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335587
91177308-0d34-0410-b5e6-
96231b3b80d8
Bernard Ogden [Tue, 26 Jun 2018 09:49:31 +0000 (09:49 +0000)]
[AArch64] Tighten up directives tests
Move expected-fail cases from directive-cpu.s to
directive-cpu-err.s. This allows us to remove the 'not' from the
llvm-mc invocation in directive-cpu.s so that this test will fail
in unexpected error cases. It also means that we are not relying
on all stderr coming before any stdout, which seems fragile.
Also make use of CHECK-NEXT to ensure that multiline error messages
really are occuring together.
And add a test to verify that .cpu with an arch version as extension
is rejected.
Differential Revision: https://reviews.llvm.org/D47873
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335586
91177308-0d34-0410-b5e6-
96231b3b80d8
Bernard Ogden [Tue, 26 Jun 2018 09:36:13 +0000 (09:36 +0000)]
[AArch64] Clean up LSE directive tests
These were specifying an architecture version with .cpu directive,
which is invalid. As the error for this case outputs the problem
instruction we were still matching the expectations of FileCheck.
This patch fixes up the LSE tests to do what they seem to intend. A
follow-up patch will tighten up the directive tests.
Differential Revision: https://reviews.llvm.org/D47872
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335585
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 26 Jun 2018 09:31:18 +0000 (09:31 +0000)]
Fix MSVC "not all control paths return a value" warnings. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335584
91177308-0d34-0410-b5e6-
96231b3b80d8
Clement Courbet [Tue, 26 Jun 2018 08:49:30 +0000 (08:49 +0000)]
[llvm-exegesis] Get the BenchmarkRunner from the ExegesisTarget.
Summary:
This allows targets to override code generation for some instructions.
As an example of override, this also moves ad-hoc instruction filtering
for X86 into the X86 ExegesisTarget.
Reviewers: gchatelet
Subscribers: mgorny, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48587
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335582
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrei Elovikov [Tue, 26 Jun 2018 07:05:08 +0000 (07:05 +0000)]
[NFC] Prefer (void) to LLVM_ATTRIBUTE_UNUSED for unused var in GlobalISElemitter.cpp.
Reviewers: dsanders, craig.topper
Reviewed By: dsanders
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D48534
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335581
91177308-0d34-0410-b5e6-
96231b3b80d8
Bjorn Pettersson [Tue, 26 Jun 2018 06:17:00 +0000 (06:17 +0000)]
Improve ConvertDebugDeclareToDebugValue
Summary:
This is a follow-up to r334830 and r335031.
In the valueCoversEntireFragment check we now also handle
the situation when there is a variable length array (VLA)
involved, and the length of the array has been reduced to
a constant.
The ConvertDebugDeclareToDebugValue functions that are related
to PHI nodes and load instructions now avoid inserting dbg.value
intrinsics when the value does not, for certain, cover the
variable/fragment that should be described.
In r334830 we assumed that the value always covered the entire
var/fragment and we had assertions in the code to show that
assumption. However, those asserts failed when compiling code
with VLAs, so we removed the asserts in r335031. Now when we
know that the valueCoversEntireFragment check can fail also for
PHI/Load instructions we avoid to insert the faulty dbg.value
intrinsic in such situations. Compared to the Store instruction
scenario we simply drop the dbg.value here (as the variable does
not change its value due to PHI/Load, so an earlier dbg.value
describing the variable should still be valid).
Reviewers: aprantl, vsk, efriedma
Reviewed By: aprantl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48547
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335580
91177308-0d34-0410-b5e6-
96231b3b80d8
Gil Rapaport [Tue, 26 Jun 2018 05:31:18 +0000 (05:31 +0000)]
[InstCombine] (A + 1) + (B ^ -1) --> A - B
Turn canonicalized subtraction back into (-1 - B) and combine it with (A + 1) into (A - B).
This is similar to the folding already done for (B ^ -1) + Const into (-1 + Const) - B.
Differential Revision: https://reviews.llvm.org/D48535
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335579
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 26 Jun 2018 04:53:42 +0000 (04:53 +0000)]
[X86] Don't use getScalarShiftAmountTy to get the immediate type for target specific VSHLDQ/VSRLDQ nodes.
These opcodes have a fixed type of i8 for their immediate and shouldn't have anything to do with the scalar shift amount used by target independent shift nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335578
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Tue, 26 Jun 2018 03:18:38 +0000 (03:18 +0000)]
[WebAssembly] Fix lowering of varargs functions with non-legal fixed arguments.
CallLoweringInfo's NumFixedArgs field gives the number of fixed arguments
before legalization. The ISD::OutputArg "Outs" array holds legalized
arguments, so when indexing into it to find the non-fixed arguemn, we need
to use the number of arguments after legalization.
Fixes PR37934.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335576
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 26 Jun 2018 03:11:15 +0000 (03:11 +0000)]
[X86] Use XOR for SUB (C, X) during isel if will help fold an immediate
Summary:
Same idea as D48529, but restricted to X86 and done very late to avoid any surprises where subtract might be better for DAG combining.
This seems like the safest way to do this trick. And we consider doing it as a DAG combine later.
Reviewers: spatel, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48557
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335575
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Tue, 26 Jun 2018 03:03:41 +0000 (03:03 +0000)]
[WebAssembly] Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335574
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Tue, 26 Jun 2018 02:29:08 +0000 (02:29 +0000)]
[ThinLTO] Add string saver onto index for value names
Summary:
Adds a string saver to the ModuleSummaryIndex so it can store value
names in the case of adding a ValueInfo for a GUID when we don't
have the name stored in a Module string table. This is motivated
by the upcoming summary parser patch, where we will read value names
from the summary entry and want to store them, even when a Module
is not available.
Currently this allows us to store the name in the legacy bitcode case,
and I have added a test to show that.
Reviewers: pcc, dexonsmith
Subscribers: mehdi_amini, inglorion, eraman, steven_wu, llvm-commits
Differential Revision: https://reviews.llvm.org/D47842
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335570
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 26 Jun 2018 01:37:02 +0000 (01:37 +0000)]
[X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and implement the mask input argument using an 'and' IR instruction.
This recommits r335562 and 335563 as a single commit.
The frontend will surround the intrinsic with the appropriate marshalling to/from a scalar type to match the sigature of the builtin that software expects.
By exposing the vXi1 type directly in the llvm intrinsic we make it available to optimizers much earlier. This can enable the scalar marshalling code to be optimized away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335568
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Tue, 26 Jun 2018 01:32:58 +0000 (01:32 +0000)]
[ThinLTO] Add per-module indexes to combined index consistently
Summary:
Without this change we only add module paths to the combined index when
there is a module hash or at least one global value. Make this more
consistent by adding the module to the index whenever there is a summary
section, and it is a per-module summary (had a MODULE_CODE_SOURCE_FILENAME
record).
Since we will no longer add module paths lazily, add a new interface to get
the module info from the index that asserts it is already added.
Fixes PR37899.
Reviewers: Vlad, pcc
Subscribers: mehdi_amini, inglorion, steven_wu, llvm-commits
Differential Revision: https://reviews.llvm.org/D48511
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335567
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 26 Jun 2018 01:31:53 +0000 (01:31 +0000)]
Revert r335562 and 335563 "[X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and implement the mask input argument using an 'and' IR instruction."
These were supposed to have been squashed to a single commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335566
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Tue, 26 Jun 2018 01:22:29 +0000 (01:22 +0000)]
[ORC] Add a symbolAliases function to the Core APIs.
symbolAliases can be used to define symbol aliases within a VSO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335565
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 26 Jun 2018 00:43:46 +0000 (00:43 +0000)]
[X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and implement the mask input argument using an 'and' IR instruction.
The frontend will surround the intrinsic with the appropriate marshalling to/from a scalar type to match the sigature of the builtin that software expects.
By exposing the vXi1 type directly in the llvm intrinsic we make it available to optimizers much earlier. This can enable the scalar marshalling code to be optimized away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335563
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 26 Jun 2018 00:43:34 +0000 (00:43 +0000)]
foo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335562
91177308-0d34-0410-b5e6-
96231b3b80d8
Fangrui Song [Tue, 26 Jun 2018 00:41:49 +0000 (00:41 +0000)]
[gdb] Escape unprintable bytes in SmallString and StringRef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335561
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Tue, 26 Jun 2018 00:20:49 +0000 (00:20 +0000)]
[ThinLTO] Compute GUID directly from GV when building per-module index
Summary:
I discovered when writing the summary parsing support that the
per-module index builder and writer are computing the GUID from the
value name alone (ignoring the linkage type). This was ok since those
GUID were not emitted in the bitcode, and there are never multiple
conflicting names in a single module.
However, I don't see a reason for making the GUID computation different
for the per-module case. It also makes things simpler on the parsing
side to have the GUID computation consistent. So this patch changes the
summary analysis phase and the per-module summary writer to compute the
GUID using the facility on the GlobalValue.
Reviewers: pcc, dexonsmith
Subscribers: llvm-commits, inglorion
Differential Revision: https://reviews.llvm.org/D47844
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335560
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Mon, 25 Jun 2018 23:53:54 +0000 (23:53 +0000)]
Add a warning if someone attempts to add extra section flags to sections
with well defined semantics like .rodata.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335558
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Shen [Mon, 25 Jun 2018 23:49:20 +0000 (23:49 +0000)]
[APInt] Add helpers for rounding u/sdivs.
Reviewers: sanjoy, craig.topper
Subscribers: jlebar, hiraditya, bixia, llvm-commits
Differential Revision: https://reviews.llvm.org/D48498
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335557
91177308-0d34-0410-b5e6-
96231b3b80d8
Fangrui Song [Mon, 25 Jun 2018 23:38:48 +0000 (23:38 +0000)]
[gdb] Add pretty printer for Expected
Reviewers: dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48512
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335554
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Mon, 25 Jun 2018 23:32:54 +0000 (23:32 +0000)]
[PM/LoopUnswitch] Teach the new unswitch to handle nontrivial
unswitching of switches.
This works much like trivial unswitching of switches in that it reliably
moves the switch out of the loop. Here we potentially clone the entire
loop into each successor of the switch and re-point the cases at these
clones.
Due to the complexity of actually doing nontrivial unswitching, this
patch doesn't create a dedicated routine for handling switches -- it
would duplicate far too much code. Instead, it generalizes the existing
routine to handle both branches and switches as it largely reduces to
looping in a few places instead of doing something once. This actually
improves the results in some cases with branches due to being much more
careful about how dead regions of code are managed. With branches,
because exactly one clone is created and there are exactly two edges
considered, somewhat sloppy handling of the dead regions of code was
sufficient in most cases. But with switches, there are much more
complicated patterns of dead code and so I've had to move to a more
robust model generally. We still do as much pruning of the dead code
early as possible because that allows us to avoid even cloning the code.
This also surfaced another problem with nontrivial unswitching before
which is that we weren't as precise in reconstructing loops as we could
have been. This seems to have been mostly harmless, but resulted in
pointless LCSSA PHI nodes and other unnecessary cruft. With switches, we
have to get this *right*, and everything benefits from it.
While the testing may seem a bit light here because we only have two
real cases with actual switches, they do a surprisingly good job of
exercising numerous edge cases. Also, because we share the logic with
branches, most of the changes in this patch are reasonably well covered
by existing tests.
The new unswitch now has all of the same fundamental power as the old
one with the exception of the single unsound case of *partial* switch
unswitching -- that really is just loop specialization and not
unswitching at all. It doesn't fit into the canonicalization model in
any way. We can add a loop specialization pass that runs late based on
profile data if important test cases ever come up here.
Differential Revision: https://reviews.llvm.org/D47683
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335553
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 25 Jun 2018 23:29:47 +0000 (23:29 +0000)]
[X86] Update fpclass intrinsic tests to chain their calls to the intrinsic rather than joining them with add.
The test cases try to test masked and unmasked isntructions at the same time. Previously the masked version relies on an extra fucntion parameter. Then the two results were combined with 'add'.
This patch gets rid of the second parameter and just passes the result of the first intrinsic into the mask argument of the second call. Then there's no need for an 'add'.
This configuration works a lot better with an upcoming patch to redefine the intrinsics to use vXi1 types for the output and mask argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335551
91177308-0d34-0410-b5e6-
96231b3b80d8
Francis Visoiu Mistrih [Mon, 25 Jun 2018 23:14:08 +0000 (23:14 +0000)]
[OrcMCJIT] Fix test after r335508 causing it to fail on green dragon
http://green.lab.llvm.org/green/job/clang-stage1-configure-RA/46572/console
LLVM ERROR: unsupported relocation with subtraction expression, symbol
'__GLOBAL_OFFSET_TABLE_' can not be undefined in a subtraction
expression
Do the same thing as MCJIT/eh-lg-pic.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335548
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Mon, 25 Jun 2018 23:12:04 +0000 (23:12 +0000)]
Fix unsigned/signed comparison failure in unittest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335547
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 25 Jun 2018 22:50:26 +0000 (22:50 +0000)]
[InstCombine] cleanup udiv folds; NFCI
This removes a "UDivFoldAction" in favor of a simple constant
matcher. In theory, the existing code could do more matching,
but I don't see any evidence or need for it. I've left a TODO
about using ValueTracking in case we see any regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335545
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 25 Jun 2018 22:27:36 +0000 (22:27 +0000)]
[InstCombine] add/move tests for udiv; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335544
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Mon, 25 Jun 2018 21:43:09 +0000 (21:43 +0000)]
[Instrumentation] Remove unused include
It's also a layering violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335528
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 25 Jun 2018 21:39:41 +0000 (21:39 +0000)]
[InstCombine] fold sdiv with sext bool divisor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335527
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 25 Jun 2018 21:36:09 +0000 (21:36 +0000)]
[InstCombine] add tests for sdiv with sext bool divisor; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335526
91177308-0d34-0410-b5e6-
96231b3b80d8
Vlad Tsyrklevich [Mon, 25 Jun 2018 21:28:35 +0000 (21:28 +0000)]
UBSan blacklist workaround for bot timeouts
Summary: Workaround for PR37929
Reviewers: eugenis, vitalybuka
Reviewed By: eugenis
Subscribers: llvm-commits, kcc
Differential Revision: https://reviews.llvm.org/D48566
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335525
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Mon, 25 Jun 2018 20:55:26 +0000 (20:55 +0000)]
Revert r335513: [SCEVExp] Advance found insertion point
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335522
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 25 Jun 2018 20:45:45 +0000 (20:45 +0000)]
[LoopIdiomRecognize] Fix a couple places where it appears we were unintenionally making copies of DebugLoc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335521
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Mon, 25 Jun 2018 20:40:50 +0000 (20:40 +0000)]
Force vector width for scev-expander-debug.ll test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335520
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 25 Jun 2018 20:27:46 +0000 (20:27 +0000)]
[X86] Simplify intrinsic table binary search to not require a temporary struct.
std::lower_bound doesn't require the thing to search for to be the same type as the table entries. We just need to define an appropriate comparison function that can take an table entry and an intrinsic number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335518
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 25 Jun 2018 20:11:16 +0000 (20:11 +0000)]
[X86] Add comment about the sorting of the memory folding tables added in r335501.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335517
91177308-0d34-0410-b5e6-
96231b3b80d8
Fangrui Song [Mon, 25 Jun 2018 19:40:08 +0000 (19:40 +0000)]
[docs] Update doc after split of -gen-intrinsic in r335407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335515
91177308-0d34-0410-b5e6-
96231b3b80d8
Lei Huang [Mon, 25 Jun 2018 19:28:27 +0000 (19:28 +0000)]
[PowerPC] Fix incorrectly encoded wait instruction
Encoding for the wait instruction was wrong. Fix according to ISA 3.0.
Differential Revision: https://reviews.llvm.org/D48550
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335514
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Mon, 25 Jun 2018 19:17:29 +0000 (19:17 +0000)]
[SCEVExp] Advance found insertion point until we find a non-dbg instruction.
This avoids creating unnecessary casts if the IP used to be a dbg info
intrinsic. Fixes PR37727.
Reviewers: vsk, aprantl, sanjoy, efriedma
Reviewed By: vsk, efriedma
Differential Revision: https://reviews.llvm.org/D47874
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335513
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 25 Jun 2018 18:51:21 +0000 (18:51 +0000)]
[InstSimplify] fold div/rem of zexted bool
I was looking at an unrelated fold and noticed that
we don't have this simplification (because the other
fold would break existing tests).
Name: zext udiv
%z = zext i1 %x to i32
%r = udiv i32 %y, %z
=>
%r = %y
Name: zext urem
%z = zext i1 %x to i32
%r = urem i32 %y, %z
=>
%r = 0
Name: zext sdiv
%z = zext i1 %x to i32
%r = sdiv i32 %y, %z
=>
%r = %y
Name: zext srem
%z = zext i1 %x to i32
%r = srem i32 %y, %z
=>
%r = 0
https://rise4fun.com/Alive/LZ9
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335512
91177308-0d34-0410-b5e6-
96231b3b80d8
Kamil Rytarowski [Mon, 25 Jun 2018 18:49:13 +0000 (18:49 +0000)]
Handle NetBSD specific path in findDebugBinary()
Summary:
The NetBSD Operating System installs debuginfo
files into /usr/libdata/debug, rather than other path
like in some other popular distribution.
This change makes llvm-symbolizer functional with
the basesystem executables.
Reviewers: joerg, vitalybuka
Reviewed By: vitalybuka
Subscribers: JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D48525
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335511
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 25 Jun 2018 18:27:14 +0000 (18:27 +0000)]
[InstSimplify] add tests for div/rem with bool divisor; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335509
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Mon, 25 Jun 2018 18:16:27 +0000 (18:16 +0000)]
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
The large code model allows code and data segments to exceed 2GB, which
means that some symbol references may require a displacement that cannot
be encoded as a displacement from RIP. The large PIC model even relaxes
the assumption that the GOT itself is within 2GB of all code. Therefore,
we need a special code sequence to materialize it:
.LtmpN:
leaq .LtmpN(%rip), %rbx
movabsq $_GLOBAL_OFFSET_TABLE_-.LtmpN, %rax # Scratch
addq %rax, %rbx # GOT base reg
From that, non-local references go through the GOT base register instead
of being PC-relative loads. Local references typically use GOTOFF
symbols, like this:
movq extern_gv@GOT(%rbx), %rax
movq local_gv@GOTOFF(%rbx), %rax
All calls end up being indirect:
movabsq $local_fn@GOTOFF, %rax
addq %rbx, %rax
callq *%rax
The medium code model retains the assumption that the code segment is
less than 2GB, so calls are once again direct, and the RIP-relative
loads can be used to access the GOT. Materializing the GOT is easy:
leaq _GLOBAL_OFFSET_TABLE_(%rip), %rbx # GOT base reg
DSO local data accesses will use it:
movq local_gv@GOTOFF(%rbx), %rax
Non-local data accesses will use RIP-relative addressing, which means we
may not always need to materialize the GOT base:
movq extern_gv@GOTPCREL(%rip), %rax
Direct calls are basically the same as they are in the small code model:
They use direct, PC-relative addressing, and the PLT is used for calls
to non-local functions.
This patch adds reasonably comprehensive testing of LEA, but there are
lots of interesting folding opportunities that are unimplemented.
I restricted the MCJIT/eh-lg-pic.ll test to Linux, since the large PIC
code model is not implemented for MachO yet.
Differential Revision: https://reviews.llvm.org/D47211
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335508
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 25 Jun 2018 17:52:10 +0000 (17:52 +0000)]
[InstCombine] add tests for add-of-sext-bool; NFC
We canonicalize to select with a zext-add and either zext-sub or sext-sub,
so this shows a pattern that's not conforming to the general trend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335506
91177308-0d34-0410-b5e6-
96231b3b80d8
Aditya Nandakumar [Mon, 25 Jun 2018 17:48:48 +0000 (17:48 +0000)]
[GISel]: Update the end of GISel Opcode namespace.
G_ADDRSPACE_CAST was added at the end, but PRE_ISEL_GENERIC_OPCODE_END
is still pointing incorrectly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335505
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 25 Jun 2018 17:26:56 +0000 (17:26 +0000)]
[X86] Sort the static memory folding tables by reg opcode. Remove the reg->mem DenseMaps in favor of binary search.
With the static tables sorted we can binary search them directly for reg->mem lookups. This removes 6 DenseMaps that had to be created when X86InstrInfo is constructed.
We still have one Mem->Reg DenseMap for the reverse direction. This is created just as before by walking the reg->mem arrays to populate it.
Differential Revision: https://reviews.llvm.org/D48527
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335501
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 25 Jun 2018 17:26:51 +0000 (17:26 +0000)]
[X86] Allow base and index for gather instructions to appear in other order for Intel syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335500
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Mon, 25 Jun 2018 17:06:18 +0000 (17:06 +0000)]
[SelectionDAG] Remove debug locations from ConstantSD(FP)Nodes
This removes debug locations from ConstantSDNode and ConstantSDFPNode.
When this kind of node is materialized we no longer create a line table
entry which jumps back to the constant's first point of use. This makes
single-stepping behavior smoother, and it matches the model used by IR,
where Constants have no locations. See this thread for more context:
http://lists.llvm.org/pipermail/llvm-dev/2018-June/124164.html
I'd like to handle constant BuildVectorSDNodes and to try to eliminate
passing SDLocs to SelectionDAG::getConstant*() in follow-up commits.
Differential Revision: https://reviews.llvm.org/D48468
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335497
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Davis [Mon, 25 Jun 2018 16:53:00 +0000 (16:53 +0000)]
[llvm-mca] Rename Backend to Pipeline. NFC.
Summary:
This change renames the Backend and BackendPrinter to Pipeline and PipelinePrinter respectively.
Variables and comments have also been updated to reflect this change.
The reason for this rename, is to be slightly more correct about what MCA is modeling. MCA models a Pipeline, which implies some logical sequence of stages.
Reviewers: andreadb, courbet, RKSimon
Reviewed By: andreadb, courbet
Subscribers: mgorny, javed.absar, tschuett, gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D48496
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335496
91177308-0d34-0410-b5e6-
96231b3b80d8
Alexander Richardson [Mon, 25 Jun 2018 16:49:20 +0000 (16:49 +0000)]
Add Triple::isMIPS()/isMIPS32()/isMIPS64(). NFC
There are quite a few if statements that enumerate all these cases. It gets
even worse in our fork of LLVM where we also have a Triple::cheri (which
is mips64 + CHERI instructions) and we had to update all if statements that
check for Triple::mips64 to also handle Triple::cheri. This patch helps to
reduce our diff to upstream and should also make some checks more readable.
Reviewed By: atanasyan
Differential Revision: https://reviews.llvm.org/D48548
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335493
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 25 Jun 2018 16:17:48 +0000 (16:17 +0000)]
AMDGPU/GlobalISel: Add support for llvm.amdgcn.kernarg.segment.ptr
Note a normal select test is not currently possible because this
relies on input registers tracked in SIMachineFunctionInfo which
are not currently serializable in MIR, but this does work end-to-end
from the IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335490
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 25 Jun 2018 16:05:55 +0000 (16:05 +0000)]
StackSlotColoring: Decide colors per stack ID
I thought I fixed this in r308673, but that fix was
very broken. The assumption that any frame index can be used
in place of another was more widespread than I realized.
Even when stack slot sharing was disabled, this was still
replacing frame index uses with a different ID with a different
stack slot.
Really fix this by doing the coloring per-stack ID, so all of
the coloring logically done in a separate namespace. This is a lot
simpler than trying to figure out how to change the color if
the stack ID is different.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335488
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 25 Jun 2018 15:42:20 +0000 (15:42 +0000)]
AMDGPU: Remove commented out code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335486
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 25 Jun 2018 15:42:12 +0000 (15:42 +0000)]
AMDGPU/GlobalISel: Fix G_IMPLICIT_DEF for pointers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335485
91177308-0d34-0410-b5e6-
96231b3b80d8
Wei Mi [Mon, 25 Jun 2018 15:40:31 +0000 (15:40 +0000)]
[SampleFDO] Add an option to turn on/off warning about samples unused.
If a function has sample to use, but cannot use them because of no debug
information, currently a warning will be issued to inform the missing
opportunity.
This warning assumes the binary generating the profile and the binary using
the profile are similar enough. It is not always the case. Sometimes even
if the binaries are not quite similar, we may still get some benefit by
using sampleFDO. In those cases, we may still want to apply sampleFDO but
not want to see a lot of such warnings pop up.
The patch adds an option for the warning.
Differential Revision: https://reviews.llvm.org/D48510
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335484
91177308-0d34-0410-b5e6-
96231b3b80d8
David Green [Mon, 25 Jun 2018 15:13:26 +0000 (15:13 +0000)]
[DA] Delinearise AddRecs if we can prove they don't wrap
We can prove that some delinearized subscripts do not wrap around to become
negative by the fact that they are from inbound geps of load/store locations.
This helps improve the delinearisation in cases where we can't prove that they
are non-negative from SCEV alone.
Differential Revision: https://reviews.llvm.org/D48481
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335481
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 25 Jun 2018 14:29:04 +0000 (14:29 +0000)]
AMDGPU: Respect align argument parameter
This should avoid relying on the pointee type
to get the alignment, particularly since pointee
types are supposed to be removed at some point.
Also fixes not getting the alignment for unsized types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335478
91177308-0d34-0410-b5e6-
96231b3b80d8
Artur Pilipenko [Mon, 25 Jun 2018 13:51:11 +0000 (13:51 +0000)]
SafepointIRVerifier should ignore dead blocks and dead edges
Not only should SafepointIRVerifier ignore unreachable blocks (as suggested in https://reviews.llvm.org/D47011) but it also has to ignore dead blocks.
In @test2 (see the new tests):
br i1 true, label %right, label %left
left:
...
right:
...
merge:
%val = phi i8 addrspace(1)* [ ..., %left ], [ ..., %right ]
use %val
both left and right branches are reachable.
If they collide then SafepointIRVerifier reports an error.
Because of the foldable branch condition GVN finds the left branch dead and removes the phi node entry that merges values from right and left. Then the use comes from the right branch. This results in no collision.
So, SafepointIRVerifier ends up in different results depending on either GVN is run or not.
To solve this issue this patch adds Dead Block detection to SafepointIRVerifier which can ignore dead blocks while validating IR. The Dead Block detection algorithm is taken from GVN but modified to not split critical edges. That is needed to keep CFG unchanged by SafepointIRVerifier.
Patch by Yevgeny Rouban.
Reviewed By: anna, apilipenko, DaniilSuchkov
Differential Revision: https://reviews.llvm.org/D47441
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335473
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Mon, 25 Jun 2018 13:46:41 +0000 (13:46 +0000)]
Improve handling of COPY instructions with identical value numbers
Testcases provided by Tim Renouf.
Differential Revision: https://reviews.llvm.org/D48102
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335472
91177308-0d34-0410-b5e6-
96231b3b80d8
Clement Courbet [Mon, 25 Jun 2018 13:44:27 +0000 (13:44 +0000)]
[llvm-exegesis][NFC] Remove unnecessary member variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335470
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 25 Jun 2018 13:40:54 +0000 (13:40 +0000)]
[IR] avoid -Wdocumentation spew about HTML tags
There's probably a better solution, but adding spaces
in the IR vector examples sidesteps the problem without
uglifying the plain text.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335468
91177308-0d34-0410-b5e6-
96231b3b80d8
Clement Courbet [Mon, 25 Jun 2018 13:39:50 +0000 (13:39 +0000)]
[llvm-exegesis] Fix warning in r22752: Initialize IsSnippetSetupComplete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335467
91177308-0d34-0410-b5e6-
96231b3b80d8
Clement Courbet [Mon, 25 Jun 2018 13:12:02 +0000 (13:12 +0000)]
[llvm-exegesis] Generate snippet setup code.
Summary:
This ensures that the snippet always sees the same values for registers,
making measurements reproducible.
This will also allow exploring different values.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48542
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335465
91177308-0d34-0410-b5e6-
96231b3b80d8
Artur Pilipenko [Mon, 25 Jun 2018 12:58:13 +0000 (12:58 +0000)]
Revert change 335077 "[InlineSpiller] Fix a crash due to lack of forward progress from remat specifically for STATEPOINT"
This change caused widespread assertion failures in our downstream testing:
lib/CodeGen/LiveInterval.cpp:409: bool llvm::LiveRange::overlapsFrom(const llvm::LiveRange&, llvm::LiveRange::const_iterator) const: Assertion `!empty() && "empty range"' failed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335462
91177308-0d34-0410-b5e6-
96231b3b80d8
Artur Pilipenko [Mon, 25 Jun 2018 12:55:58 +0000 (12:55 +0000)]
Revert change 335091.
It adds extra test for the change 335077, which is also to be reverted as it causes test failures in downstream testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335461
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 25 Jun 2018 11:46:24 +0000 (11:46 +0000)]
Use APInt[] bit access to avoid "32-bit shift implicitly converted to 64 bits" MSVC warning (again). NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335457
91177308-0d34-0410-b5e6-
96231b3b80d8
Clement Courbet [Mon, 25 Jun 2018 11:44:29 +0000 (11:44 +0000)]
[llvm-exegesis][NFC] Simplify BenchmarkRunner ctor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335456
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 25 Jun 2018 11:38:27 +0000 (11:38 +0000)]
Use APInt[] bit access to avoid "32-bit shift implicitly converted to 64 bits" MSVC warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335454
91177308-0d34-0410-b5e6-
96231b3b80d8
Clement Courbet [Mon, 25 Jun 2018 11:22:23 +0000 (11:22 +0000)]
[llvm-exegesis][NFC] clang-format
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335452
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 25 Jun 2018 11:19:05 +0000 (11:19 +0000)]
Fix -Wparentheses gcc warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335451
91177308-0d34-0410-b5e6-
96231b3b80d8
Clement Courbet [Mon, 25 Jun 2018 11:12:30 +0000 (11:12 +0000)]
[llvm-exegesis][NFC] Fix `Operand` class comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335450
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 25 Jun 2018 06:05:37 +0000 (06:05 +0000)]
[X86] Block commuting operand 1 of FMA*_Int instructions in findThreeSrcCommutedOpIndices. Remove uncommutable returns from getThreeSrcCommuteCase/getFMA3OpcodeToCommuteOperands.
We should be blocking the operand while we are in the routine that tries to find commutable operand indices. Doing it later means we might have missed out on another valid set of operands we could have commuted.
The intrinsic case was the only case that could really prevent commuting in getFMA3OpcodeToCommuteOperands. All the other cases in getThreeSrcCommuteCase were not reachable conditions as they were protected by findThreeSrcCommutedOpIndices.
With that abort case pushed earlier, we can remove all the abort checks and replace with asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335446
91177308-0d34-0410-b5e6-
96231b3b80d8
George Burgess IV [Mon, 25 Jun 2018 05:30:36 +0000 (05:30 +0000)]
[MSSA] Add domination number verifier; NFC
It's easy for domination numbers to get out-of-date, and this is no more
costly than any of the other verifiers we already have, so it seems nice
to have.
A stage3 build with this Works On My Machine, so this hasn't caught any
bugs... yet. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335444
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Mon, 25 Jun 2018 04:38:03 +0000 (04:38 +0000)]
One more build fix for non MSVC compilers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335443
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Mon, 25 Jun 2018 04:35:35 +0000 (04:35 +0000)]
Try to fix build error on non MSVC compilers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335442
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Mon, 25 Jun 2018 03:13:27 +0000 (03:13 +0000)]
Fix CRLF line endings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335441
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Mon, 25 Jun 2018 03:13:09 +0000 (03:13 +0000)]
Add a TaskQueue that can serialize work on a ThreadPool.
We have ThreadPool, which can execute work asynchronously on N
background threads, but sometimes you need to make sure the work
is executed asynchronously but also serially. That is, if task
B is enqueued after task A, then task B should not begin until
task A has completed. This patch adds such a class.
Differential Revision: https://reviews.llvm.org/D48240
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335440
91177308-0d34-0410-b5e6-
96231b3b80d8
Heejin Ahn [Mon, 25 Jun 2018 01:20:21 +0000 (01:20 +0000)]
[WebAssembly] Add WebAssemblyException information analysis
Summary:
A WebAssemblyException object contains BBs that belong to a 'catch' part
of the try-catch-end structure. Because CFGSort requires all the BBs
within a catch part to be sorted together as it does for loops, this
pass calculates the nesting structure of catch part of exceptions in a
function. Now this assumes the use of Windows EH instructions.
Reviewers: dschuff, majnemer
Subscribers: jfb, mgorny, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D44134
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335439
91177308-0d34-0410-b5e6-
96231b3b80d8
Heejin Ahn [Mon, 25 Jun 2018 01:07:11 +0000 (01:07 +0000)]
[WebAssembly] Add WebAssemblyLateEHPrepare pass
Summary:
Add WebAssemblyLateEHPrepare pass that does several small jobs for
exception handling. This runs before CFGSort, and is different from
WasmEHPrepare pass that runs before ISel, even though the names are
similar.
Reviewers: dschuff, majnemer
Subscribers: sbc100, jgravelle-google, sunfish, mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D46803
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335438
91177308-0d34-0410-b5e6-
96231b3b80d8