OSDN Git Service
Chris Lattner [Thu, 8 Jul 2010 23:46:44 +0000 (23:46 +0000)]
Change LEA to have 5 operands for its memory operand, just
like all other instructions, even though a segment is not
allowed. This resolves a bunch of gross hacks in the
encoder and makes LEA more consistent with the rest of the
instruction set.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107934
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Stuart Hastings [Thu, 8 Jul 2010 23:25:39 +0000 (23:25 +0000)]
Reverting r107918 and r107919. Radar
8063111.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107930
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Jakob Stoklund Olesen [Thu, 8 Jul 2010 22:52:47 +0000 (22:52 +0000)]
Revert "Fix broken isCopy handling in TrimLiveIntervalToLastUse"
This reverts commit 107921. It broke the clang self host.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107926
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Chris Lattner [Thu, 8 Jul 2010 22:41:28 +0000 (22:41 +0000)]
add some long-overdue enums to refer to the parts of the 5-operand
X86 memory operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107925
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Devang Patel [Thu, 8 Jul 2010 22:39:20 +0000 (22:39 +0000)]
Relax assertion. In optimized code, it is possible that first instruction is coming from a inlined function.
This fixes PR7596 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107923
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Bill Wendling [Thu, 8 Jul 2010 22:38:02 +0000 (22:38 +0000)]
Extension of r107506. Make sure that we don't mark a function as having a call
if the inline ASM doesn't need a stack frame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107922
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Jakob Stoklund Olesen [Thu, 8 Jul 2010 22:30:38 +0000 (22:30 +0000)]
Fix broken isCopy handling in TrimLiveIntervalToLastUse
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107921
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Jakob Stoklund Olesen [Thu, 8 Jul 2010 22:30:35 +0000 (22:30 +0000)]
Remember the VR64 register class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107920
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Stuart Hastings [Thu, 8 Jul 2010 22:28:59 +0000 (22:28 +0000)]
Fix decl/def debug info for template functions. Radar
8063111.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107919
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Chris Lattner [Thu, 8 Jul 2010 22:28:12 +0000 (22:28 +0000)]
Rework segment prefix emission code to handle segments
in memory operands at the same type as hard coded segments.
This fixes problems where we'd emit the segment override after
the REX prefix on instructions like:
mov %gs:(%rdi), %rax
This fixes rdar://
8127102. I have several cleanup patches coming
next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107917
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Chris Lattner [Thu, 8 Jul 2010 22:27:06 +0000 (22:27 +0000)]
introduce a new X86II::getMemoryOperandNo method, which
returns the start of the memory operand for an instruction.
Introduce a new "X86AddrSegment" enum to reduce # magic numbers
referring to X86 memory operand layout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107916
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Kalle Raiskila [Thu, 8 Jul 2010 21:15:22 +0000 (21:15 +0000)]
Switch SPU calling convention (function arguments)
to a Tablegen implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107913
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Stuart Hastings [Thu, 8 Jul 2010 20:31:05 +0000 (20:31 +0000)]
Test case for r107843. Radar
8152866.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107907
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Kevin Enderby [Thu, 8 Jul 2010 20:30:44 +0000 (20:30 +0000)]
Revert some unneeded parts of the change in r107886 for the
.weak_def_can_be_hidden directive. Chris pointed out that the MCAsmInfo.h/.cpp
chunks aren't needed for this until the compiler starts generating these. And
when that happens it will be more convenient for it to be a bool than a const
char*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107906
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Evan Cheng [Thu, 8 Jul 2010 20:12:24 +0000 (20:12 +0000)]
Check for FiniteOnlyFPMath as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107904
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Devang Patel [Thu, 8 Jul 2010 20:10:35 +0000 (20:10 +0000)]
Reuse DIEInteger for 1. This is frequently used while emitting an attribute using dwarf::DW_FORM_flag form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107903
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Jakob Stoklund Olesen [Thu, 8 Jul 2010 19:46:30 +0000 (19:46 +0000)]
Teach the x86 floating point stackifier to handle COPY instructions.
This pass runs before COPY instructions are passed to copyPhysReg, so we simply
translate COPY to the proper pseudo instruction. Note that copyPhysReg does not
handle floating point stack copies.
Once COPY is used everywhere, this can be cleaned up a bit, and most of the
pseudo instructions can be removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107899
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Jakob Stoklund Olesen [Thu, 8 Jul 2010 19:46:25 +0000 (19:46 +0000)]
Implement X86InstrInfo::copyPhysReg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107898
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Bob Wilson [Thu, 8 Jul 2010 17:45:26 +0000 (17:45 +0000)]
The NEONPreAllocPass should never have to assign fixed registers anymore.
This pass can go away entirely soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107892
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Bob Wilson [Thu, 8 Jul 2010 17:44:00 +0000 (17:44 +0000)]
For big-endian systems, VLD2/VST2 with 32-bit vector elements will swap the
words within the 64-bit D registers. Use VLD1/VST1 with 64-bit elements
instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107890
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Jim Grosbach [Thu, 8 Jul 2010 17:27:23 +0000 (17:27 +0000)]
After r107880, findSurvivorReg() no longer needs to be public.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107887
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Kevin Enderby [Thu, 8 Jul 2010 17:22:42 +0000 (17:22 +0000)]
Added the darwin .weak_def_can_be_hidden directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107886
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Gabor Greif [Thu, 8 Jul 2010 16:56:18 +0000 (16:56 +0000)]
only dereference iterator once in the loop
(by caching the result we save a potentially expensive dereference)
also use typedefs to shorten type declarations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107883
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Bob Wilson [Thu, 8 Jul 2010 16:54:45 +0000 (16:54 +0000)]
Clean up a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107882
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Gabor Greif [Thu, 8 Jul 2010 16:52:57 +0000 (16:52 +0000)]
remove unneeded parens
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107881
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Jim Grosbach [Thu, 8 Jul 2010 16:49:26 +0000 (16:49 +0000)]
Clean up scavengeRegister() a bit to prefer available regs, which allows
the simplification of frame index register scavenging to not have to check
for available registers directly and instead just let scavengeRegister()
handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107880
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Jakob Stoklund Olesen [Thu, 8 Jul 2010 16:40:22 +0000 (16:40 +0000)]
Convert EXTRACT_SUBREG to COPY when emitting machine instrs.
EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.
Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107879
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Jakob Stoklund Olesen [Thu, 8 Jul 2010 16:40:15 +0000 (16:40 +0000)]
Remove references to INSERT_SUBREG after de-SSA.
Fix X86InstrInfo::convertToThreeAddressWithLEA to generate COPY instead of
INSERT_SUBREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107878
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Duncan Sands [Thu, 8 Jul 2010 13:06:08 +0000 (13:06 +0000)]
Use std::vector rather than SmallVector here because SmallVector
causes some versions of gcc to crash when building LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107869
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Benjamin Kramer [Thu, 8 Jul 2010 12:09:56 +0000 (12:09 +0000)]
Merge the duplicated iabs optimization in DAGCombiner and let it detected a few more idioms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107868
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Duncan Sands [Thu, 8 Jul 2010 11:54:27 +0000 (11:54 +0000)]
Do not use std::stack because it causes obscure failures when
compiled with MSVC 2010 (PR7367). Instead use a SmallVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107867
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Benjamin Kramer [Thu, 8 Jul 2010 11:39:10 +0000 (11:39 +0000)]
Teach instcombine to transform
(X >s -1) ? C1 : C2 and (X <s 0) ? C2 : C1
into ((X >>s 31) & (C2 - C1)) + C1, avoiding the conditional.
This optimization could be extended to take non-const C1 and C2 but we better
stay conservative to avoid code size bloat for now.
for
int sel(int n) {
return n >= 0 ? 60 : 100;
}
we now generate
sarl $31, %edi
andl $40, %edi
leal 60(%rdi), %eax
instead of
testl %edi, %edi
movl $60, %ecx
movl $100, %eax
cmovnsl %ecx, %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107866
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Duncan Sands [Thu, 8 Jul 2010 08:27:18 +0000 (08:27 +0000)]
Tweak some docs now that the default build is called Debug+Asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107862
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Eric Christopher [Thu, 8 Jul 2010 07:36:46 +0000 (07:36 +0000)]
A slight reworking of the custom patterns for x86-64 tpoff codegen and
correct the testcase for valid assembly.
Needs more tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107860
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Evan Cheng [Thu, 8 Jul 2010 06:01:49 +0000 (06:01 +0000)]
r107852 is only safe with -enable-unsafe-fp-math to account for +0.0 == -0.0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107856
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Jakob Stoklund Olesen [Thu, 8 Jul 2010 05:01:41 +0000 (05:01 +0000)]
Add TargetInstrInfo::copyPhysReg hook and use it from LowerSubregs.
This target hook is intended to replace copyRegToReg entirely, but for now it
calls copyRegToReg.
Any remaining calls to copyRegToReg wil be replaced by COPY instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107854
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Evan Cheng [Thu, 8 Jul 2010 02:08:50 +0000 (02:08 +0000)]
Optimize some vfp comparisons to integer ones. This patch implements the simplest case when the following conditions are met:
1. The arguments are f32.
2. The arguments are loads and they have no uses other than the comparison.
3. The comparison code is EQ or NE.
e.g.
vldr.32 s0, [r1]
vldr.32 s1, [r0]
vcmpe.f32 s1, s0
vmrs apsr_nzcv, fpscr
beq LBB0_2
=>
ldr r1, [r1]
ldr r0, [r0]
cmp r0, r1
beq LBB0_2
More complicated cases will be implemented in subsequent patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107852
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Dale Johannesen [Thu, 8 Jul 2010 01:18:23 +0000 (01:18 +0000)]
Changes to ARM tail calls, mostly cosmetic.
Add explicit testcases for tail calls within the same module.
Duplicate some code to humor those who think .w doesn't apply on ARM.
Leave this disabled on Thumb1, and add some comments explaining why it's hard
and won't gain much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107851
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Dan Gohman [Thu, 8 Jul 2010 01:00:56 +0000 (01:00 +0000)]
Revert 107840 107839 107813 107804 107800 107797 107791.
Debug info intrinsics win for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850
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Jim Grosbach [Thu, 8 Jul 2010 00:38:54 +0000 (00:38 +0000)]
When processing frame index virtual registers, consider all available registers
(if there are any) and use the one which remains available for the longest
rather than just using the first one. This should help enable better re-use
of the loaded frame index values. rdar://
7318760
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107847
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Chris Lattner [Thu, 8 Jul 2010 00:27:05 +0000 (00:27 +0000)]
Fix the second half of PR7437: scalarrepl wasn't preserving
address spaces when SRoA'ing memcpy's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107846
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Dan Gohman [Wed, 7 Jul 2010 23:52:58 +0000 (23:52 +0000)]
Don't forward-declare registers for static allocas, which we'll
prefer to materialize as local constants. This fixes the clang
bootstrap abort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107840
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Dan Gohman [Wed, 7 Jul 2010 23:47:25 +0000 (23:47 +0000)]
Fix -fast-isel-abort to check the right instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107839
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Chris Lattner [Wed, 7 Jul 2010 23:16:37 +0000 (23:16 +0000)]
use PrintEscapedString to handle attribute section with escapes in it,
PR7399. The asm parser already handles this. This is of dubious
utility (see the PR) but the asmprinter was clearly broken here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107834
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Jakob Stoklund Olesen [Wed, 7 Jul 2010 23:04:56 +0000 (23:04 +0000)]
fix copies to/from GR8_ABCD_H even more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107832
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Jim Grosbach [Wed, 7 Jul 2010 22:53:35 +0000 (22:53 +0000)]
grammar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107831
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Jim Grosbach [Wed, 7 Jul 2010 22:51:22 +0000 (22:51 +0000)]
Handle cases where the post-RA scheduler may move instructions between the
address calculation instructions leading up to a jump table when we're trying
to convert them into a TB[H] instruction in Thumb2. This realistically
shouldn't happen much, if at all, for well formed inputs, but it's more correct
to handle it. rdar://
7387682
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107830
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Chris Lattner [Wed, 7 Jul 2010 22:35:13 +0000 (22:35 +0000)]
finish up support for callw: PR7195
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107826
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Chris Lattner [Wed, 7 Jul 2010 22:27:31 +0000 (22:27 +0000)]
Implement the major chunk of PR7195: support for 'callw'
in the integrated assembler. Still some discussion to be
done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107825
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Bruno Cardoso Lopes [Wed, 7 Jul 2010 22:24:03 +0000 (22:24 +0000)]
Add more assembly opcodes for SSE compare instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107823
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Devang Patel [Wed, 7 Jul 2010 22:20:57 +0000 (22:20 +0000)]
One MDNode may be used to create regular DIE as well as abstract DIE.
Keep track of abstract subprogram DIEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107822
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Evan Cheng [Wed, 7 Jul 2010 22:15:37 +0000 (22:15 +0000)]
Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107820
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Devang Patel [Wed, 7 Jul 2010 21:52:21 +0000 (21:52 +0000)]
Print undefined/unknown debug value as "undef".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107818
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Dan Gohman [Wed, 7 Jul 2010 21:18:22 +0000 (21:18 +0000)]
Not all custom inserters create new basic blocks. If the inserter
didn't create a new block, don't reset the insert position.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107813
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Jim Grosbach [Wed, 7 Jul 2010 21:06:51 +0000 (21:06 +0000)]
grammar and trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107811
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Devang Patel [Wed, 7 Jul 2010 20:49:57 +0000 (20:49 +0000)]
Rename couple of maps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107810
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Jakob Stoklund Olesen [Wed, 7 Jul 2010 20:33:27 +0000 (20:33 +0000)]
Allow copies between GR8_ABCD_L and GR8_ABCD_H.
This fixes PR7540.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107809
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Reid Kleckner [Wed, 7 Jul 2010 20:16:45 +0000 (20:16 +0000)]
Update the docs for debugging JITed code with GDB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107808
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Devang Patel [Wed, 7 Jul 2010 20:12:52 +0000 (20:12 +0000)]
80 cols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107807
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Dan Gohman [Wed, 7 Jul 2010 19:20:32 +0000 (19:20 +0000)]
Implement bottom-up fast-isel. This has the advantage of not requiring
a separate DCE pass over MachineInstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107804
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Dan Gohman [Wed, 7 Jul 2010 18:32:53 +0000 (18:32 +0000)]
Add X86FastISel support for return statements. This entails refactoring
a bunch of stuff, to allow the target-independent calling convention
logic to be employed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107800
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Bruno Cardoso Lopes [Wed, 7 Jul 2010 18:24:20 +0000 (18:24 +0000)]
Add AVX AES instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107798
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Dan Gohman [Wed, 7 Jul 2010 18:22:13 +0000 (18:22 +0000)]
Update the insert position after scheduling, which may change the
position when emitting multiple blocks when executing a custom
inserter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107797
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Devang Patel [Wed, 7 Jul 2010 18:18:18 +0000 (18:18 +0000)]
Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107796
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Dan Gohman [Wed, 7 Jul 2010 17:28:45 +0000 (17:28 +0000)]
Fix debugging strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107795
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Duncan Sands [Wed, 7 Jul 2010 16:48:16 +0000 (16:48 +0000)]
Issue the warning about being slow whenever optimization is disabled,
and not just for Debug+Asserts builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107792
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Dan Gohman [Wed, 7 Jul 2010 16:47:08 +0000 (16:47 +0000)]
Give FunctionLoweringInfo an MBB member, avoiding the need to pass it
around everywhere, and also give it an InsertPt member, to enable isel
to operate at an arbitrary position within a block, rather than just
appending to a block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107791
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Dan Gohman [Wed, 7 Jul 2010 16:29:44 +0000 (16:29 +0000)]
Simplify FastISel's constructor by giving it a FunctionLoweringInfo
instance, rather than pointers to all of FunctionLoweringInfo's
members.
This eliminates an NDEBUG ABI sensitivity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107789
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Dan Gohman [Wed, 7 Jul 2010 16:01:37 +0000 (16:01 +0000)]
Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This will
allow target-specific fast-isel code to make use of it directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107787
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Dan Gohman [Wed, 7 Jul 2010 15:54:55 +0000 (15:54 +0000)]
Split the SDValue out of OutputArg so that SelectionDAG-independent
code can do calling-convention queries. This obviates OutputArgReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107786
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Chris Lattner [Wed, 7 Jul 2010 15:52:27 +0000 (15:52 +0000)]
add some triple for minix, patch by Kees van Reeuwijk from PR7582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107785
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Dan Gohman [Wed, 7 Jul 2010 15:28:42 +0000 (15:28 +0000)]
Move ArgFlagsTy, OutputArg, and InputArg out of SelectionDAGNodes.h and
into a new header, TargetCallingConv.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107782
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Dan Gohman [Wed, 7 Jul 2010 15:15:27 +0000 (15:15 +0000)]
Move CallingConvLower.cpp out of the SelectionDAG directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107781
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Jakob Stoklund Olesen [Wed, 7 Jul 2010 14:41:22 +0000 (14:41 +0000)]
Fix more places assuming subregisters have live intervals
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107780
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Gabor Greif [Wed, 7 Jul 2010 14:37:04 +0000 (14:37 +0000)]
adapt condition for changed default build mode
who knows how to cover Asserts or Debug separately
please do not hesitate to extend this
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107779
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Dan Gohman [Wed, 7 Jul 2010 14:33:51 +0000 (14:33 +0000)]
Add a getFirstNonPHI utility function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107778
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Dan Gohman [Wed, 7 Jul 2010 14:30:04 +0000 (14:30 +0000)]
Minore code simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107777
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Dan Gohman [Wed, 7 Jul 2010 14:27:09 +0000 (14:27 +0000)]
Remove interprocedural-basic-aa and associated code. The AliasAnalysis
interface needs implementations to be consistent, so any code which
wants to support different semantics must use a different interface.
It's not currently worthwhile to add a new interface for this new
concept.
Document that AliasAnalysis doesn't support cross-function queries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107776
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Dan Gohman [Wed, 7 Jul 2010 14:12:28 +0000 (14:12 +0000)]
Add Debug+Asserts and Release+Asserts to svn:ignore properties.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107775
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Gabor Greif [Wed, 7 Jul 2010 13:58:46 +0000 (13:58 +0000)]
typo in comment, regeneration not necessary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107774
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Gabor Greif [Wed, 7 Jul 2010 10:34:03 +0000 (10:34 +0000)]
conditionalize by CallInst::ArgOffset
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107767
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Gabor Greif [Wed, 7 Jul 2010 09:43:45 +0000 (09:43 +0000)]
conditionalize on CallInst::ArgOffset
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107766
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Gabor Greif [Wed, 7 Jul 2010 09:29:07 +0000 (09:29 +0000)]
minor cosmetic changes that happened to sit in my tree
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107764
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Duncan Sands [Wed, 7 Jul 2010 07:48:00 +0000 (07:48 +0000)]
Rename "Release" builds as "Release+Asserts"; rename "Release-Asserts"
builds to "Release". The default build is unchanged (optimization on,
assertions on), however it is now called Release+Asserts. The intent
is that future LLVM releases released via llvm.org will be Release builds
in the new sense, i.e. will have assertions disabled (currently they have
assertions enabled, for a more than 20% slowdown). This will bring them
in line with MacOS releases, which ship with assertions disabled. It also
means that "Release" now means the same things in make and cmake builds:
cmake already disables assertions for "Release" builds AFAICS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107758
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Bruno Cardoso Lopes [Wed, 7 Jul 2010 03:39:29 +0000 (03:39 +0000)]
Add AVX SSE4.2 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107752
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Bruno Cardoso Lopes [Wed, 7 Jul 2010 01:43:01 +0000 (01:43 +0000)]
Use only one multiclass to pinsrq instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107750
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Bruno Cardoso Lopes [Wed, 7 Jul 2010 01:33:38 +0000 (01:33 +0000)]
Now that almost all SSE4.1 AVX instructions are added, move code around to more appropriate sections. No functionality changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107749
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Bruno Cardoso Lopes [Wed, 7 Jul 2010 01:14:56 +0000 (01:14 +0000)]
Add AVX SSE4.1 insertps, ptest and movntdqa instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107747
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Bruno Cardoso Lopes [Wed, 7 Jul 2010 01:01:13 +0000 (01:01 +0000)]
Add AVX SSE4.1 extractps and pinsr instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107746
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Jakob Stoklund Olesen [Wed, 7 Jul 2010 00:32:25 +0000 (00:32 +0000)]
Revert "Remove references to INSERT_SUBREG after de-SSA" r107725.
Buildbot breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107744
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Bob Wilson [Wed, 7 Jul 2010 00:08:54 +0000 (00:08 +0000)]
Also use REG_SEQUENCE for VTBX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107743
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Jim Grosbach [Wed, 7 Jul 2010 00:07:57 +0000 (00:07 +0000)]
Mark eh.sjlj.set/longjmp custom lowerings as Darwin-only since that's where
they've been tested to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107742
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Bruno Cardoso Lopes [Wed, 7 Jul 2010 00:07:24 +0000 (00:07 +0000)]
Add AVX SSE4.1 Extract Integer instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107740
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Jim Grosbach [Tue, 6 Jul 2010 23:44:52 +0000 (23:44 +0000)]
By default, the eh.sjlj.setjmp/longjmp intrinsics should just do nothing rather
than assuming a target will custom lower them. Targets which do so should
exlicitly mark them as having custom lowerings. PR7454.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107734
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Jakob Stoklund Olesen [Tue, 6 Jul 2010 23:40:35 +0000 (23:40 +0000)]
Remove references to INSERT_SUBREG after de-SSA
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107732
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Bob Wilson [Tue, 6 Jul 2010 23:36:25 +0000 (23:36 +0000)]
Use REG_SEQUENCE nodes to make the table registers for VTBL instructions be
allocated to consecutive registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107730
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Dale Johannesen [Tue, 6 Jul 2010 23:27:00 +0000 (23:27 +0000)]
Accept RIP-relative symbols with 'i' constraint, and
print the (%rip) only if the 'a' modifier is present.
PR 7528.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107727
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Jakob Stoklund Olesen [Tue, 6 Jul 2010 23:26:25 +0000 (23:26 +0000)]
Convert INSERT_SUBREG to COPY in TwoAddressInstructionPass.
INSERT_SUBREG will now only appear in SSA machine instructions.
Fix the handling of partial redefs in ProcessImplicitDefs. This is now relevant
since partial redef COPY instructions appear.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107726
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Jakob Stoklund Olesen [Tue, 6 Jul 2010 23:26:23 +0000 (23:26 +0000)]
Track defs for all aliases in NEONMoveFix.
This means that an instruction defining an S register will affect the domain of
the parent D register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107725
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Bruno Cardoso Lopes [Tue, 6 Jul 2010 23:15:17 +0000 (23:15 +0000)]
Add the rest of AVX SSE4.1 packed move with sign/zero extend instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107723
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