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Vadim Girlin [Fri, 24 May 2013 14:07:55 +0000 (18:07 +0400)]
r600g/sb: relax register allocation for compute shaders
We have to assume that all GPRs in compute shader can be indirectly
addressed because LLVM backend doesn't provide any indirect array info.
That's why for compute shaders GPR array is created that covers all used
GPRs (0..r600_bytecode::ngpr-1), but this seriously restricts register
allocation in sb.
This patch checks for actual use of indirect access in the shader and
if it's not used then GPR array is not created, so that regalloc is not
unnecessarily restricted.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Vadim Girlin [Fri, 24 May 2013 12:45:58 +0000 (16:45 +0400)]
r600g/sb: fix gpr array handling for compute shaders
Fixes segfault with bfgminer and R600_DEBUG=sbcl.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Vadim Girlin [Fri, 24 May 2013 12:24:09 +0000 (16:24 +0400)]
r600g/sb: fix buffer overflow in sb_ostream
Fixes segfault during bytecode dump with bfgminer kernel
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Tom Stellard [Tue, 14 May 2013 15:56:25 +0000 (08:56 -0700)]
r600g/compute: Use common transfer_{map,unmap} functions for global resources
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Tom Stellard [Tue, 14 May 2013 15:56:25 +0000 (08:56 -0700)]
r600g/compute: Use common transfer_{map,unmap} functions for kernel inputs
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Kenneth Graunke [Fri, 24 May 2013 03:19:19 +0000 (20:19 -0700)]
i965: Go back to using the kernel SOL reset feature.
It turns out the MI_LOAD_REGISTER_IMM approach doesn't work on Haswell,
and regressed essentially all the transform feedback Piglit tests.
This morally reverts
eaa6fbe6d54dc99efac4ab8e800edef65ce8220d. However,
the code is still simpler than it was. On BeginTransformFeedback, we
simply flush the batch and set the SOL reset flag so that the next batch
will start with zeroed offsets. There's still no software counting.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64887
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Rob Clark [Wed, 15 May 2013 00:05:55 +0000 (20:05 -0400)]
freedreno: scissor fix
Don't assume the state-tracker will set the scissor after the
framebuffer state is changed.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 14 May 2013 17:57:06 +0000 (13:57 -0400)]
freedreno: implement pipe->resource_copy_region()
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Kenneth Graunke [Tue, 21 May 2013 06:46:16 +0000 (23:46 -0700)]
glsl linker: compare interface blocks during interstage linking
Verify that interface blocks match when linking separate shader
stages into a program.
Fixes piglit glsl-1.50 tests:
* linker/interface-blocks-vs-fs-member-count-mismatch.shader_test
* linker/interface-blocks-vs-fs-member-order-mismatch.shader_test
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Jordan Justen [Tue, 21 May 2013 06:42:49 +0000 (23:42 -0700)]
glsl linker: compare interface blocks during intrastage linking
Verify that interface blocks match when combining compilation
units at the same stage. (For example, when merging all vertex
shaders.)
Fixes piglit glsl-1.50 test:
* linker/interface-blocks-multiple-vs-member-count-mismatch.shader_test
v5 (Ken): Rename to link_interface_blocks.cpp and drop the separate .h
file for consistency with other linker code. Remove "ok" variable.
Fold cross_validate_interface_blocks into its caller.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sun, 17 Mar 2013 09:04:56 +0000 (02:04 -0700)]
glsl linker: support arrays of interface block instances
With this change we now support interface block arrays.
For example, cases like this:
out block_name {
float f;
} block_instance[2];
This allows Mesa to pass the piglit glsl-1.50 test:
* execution/interface-blocks-complex-vs-fs.shader_test
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sun, 10 Mar 2013 10:48:53 +0000 (03:48 -0700)]
glsl link_varyings: link interface blocks using the block name
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sun, 10 Mar 2013 10:20:03 +0000 (03:20 -0700)]
glsl linker: remove interface block instance names
Convert interface blocks with instance names into flat
interface blocks without an instance name.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sun, 10 Mar 2013 00:34:55 +0000 (16:34 -0800)]
glsl ast_to_hir: support in/out for interface blocks
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sun, 24 Mar 2013 00:16:28 +0000 (17:16 -0700)]
glsl ast_to_hir: reject row/column_major for in/out interface blocks
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Thu, 21 Mar 2013 18:10:04 +0000 (11:10 -0700)]
glsl ast_to_hir: move uniform block symbols to interface blocks namespace
Uniform/interface blocks are a separate namespace from types.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Thu, 21 Mar 2013 16:57:20 +0000 (09:57 -0700)]
glsl_symbol_table: add interface block namespaces
For interface blocks, there are three separate namespaces for
uniform, input and output blocks.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sat, 9 Mar 2013 22:52:14 +0000 (14:52 -0800)]
glsl parser: allow in & out for interface block members
Previously uniform blocks allowed for the 'uniform' keyword
to be used with members of a uniform blocks. With interface
blocks 'in' can be used on 'in' interface block members and
'out' can be used on 'out' interface block members.
The basic_interface_block rule will verify that the same
qualifier type is used with the block and each member.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sun, 24 Mar 2013 00:14:37 +0000 (17:14 -0700)]
glsl ast_to_hir: reject interpolation qualifiers for uniform blocks
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Thu, 21 Mar 2013 17:52:19 +0000 (10:52 -0700)]
glsl parser: handle interface block member qualifier
An interface block member may specify the type:
in {
in vec4 in_var_with_qualifier;
};
When specified with the member, it must match the same
type as interface block type.
It can also omit the qualifier:
uniform {
vec4 uniform_var_without_qualifier;
};
When the type is not specified with the member,
it will adopt the same type as the interface block.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sat, 9 Mar 2013 22:09:30 +0000 (14:09 -0800)]
glsl parser: on desktop GL require GLSL 150 for instance names
Interface blocks in GLSL 150 allow an instance name to be used.
v2:
* use state->check_version
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sat, 9 Mar 2013 21:01:13 +0000 (13:01 -0800)]
glsl parser: reject VS+in & FS+out interface blocks
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sat, 9 Mar 2013 19:36:11 +0000 (11:36 -0800)]
glsl: parse in/out types for interface blocks
Previously only 'uniform' was allowed for uniform blocks.
Now, in/out can be parsed, but it will only be allowed for
GLSL >= 150.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sat, 9 Mar 2013 19:00:59 +0000 (11:00 -0800)]
glsl parser: rename uniform block to interface block
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sat, 9 Mar 2013 18:40:41 +0000 (10:40 -0800)]
glsl: rename ast_uniform_block to ast_interface_block
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Sun, 19 May 2013 08:44:29 +0000 (20:44 +1200)]
i965: Enable guardband clipping on Gen4/5.
Enables guardband clipping when the viewport covers the entire render
target.
No piglit regressions on Ironlake.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Thu, 16 May 2013 09:21:05 +0000 (21:21 +1200)]
ARB_fp: accept duplicate precision options
Relaxes the validation of
OPTION ARB_precision_hint_{nicest,fastest};
to allow duplicate options. The spec says that both /nicest/ and
/fastest/ cannot be specified together, but could be interpreted
either way for respecification of the same option.
Other drivers (NVIDIA etc) accept this, and at least one Unity3D game
expects it to succeed (Kerbal Space Program).
V2: Add spec quote.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Vinson Lee [Thu, 23 May 2013 06:24:35 +0000 (23:24 -0700)]
ilo: Initialize need_flush in draw_vbo.
need_flush was uninitialized if hw3d->new_batch was true.
Fixes "Uninitialized scalar variable" defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Vinson Lee [Sat, 18 May 2013 07:21:52 +0000 (00:21 -0700)]
radeon: Initialize variables in radeon_llvm_context_init.
'type' was not fully initialized when calling lp_build_context_init.
Fixes "Uninitialized scalar variable" defect reported by Coverity.
NOTE: This is a candidate for the stable branches.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Eric Anholt [Tue, 21 May 2013 23:20:18 +0000 (16:20 -0700)]
intel: Count fragments in our blitter-based glBitmap() path.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59440
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 22 May 2013 00:39:58 +0000 (17:39 -0700)]
i965: Shut up more compiler warnings from vector insert/extract changes.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Roland Scheidegger [Wed, 22 May 2013 20:55:21 +0000 (22:55 +0200)]
softpipe: change TEX_TILE_SIZE and NUM_TEX_TILE_ENTRIES
Initially we had NUM_TEX_TILE_ENTRIES of 50, however this was using too much
memory (mostly because the tile cache is operating on fixed max current
sampler views which could be fixed but that's another topic). So it was
decreased to 4. However this is a ridiculously low number which can't
actually really work (the number of tiles needed for as little as
a single quad with linear_mipmap_linear is 2 to 8 for a 2d texture, and
4 to 16 for a 3d texture), as it just about guarantees there will be
cache thrashing sometimes (just about always for 3d textures in fact, since
while there are 4 entries the cache is direct mapped).
So increase that number to 16 (which is still on the low side for direct
mapped cache though I guess using something like 4-way associativity would
be more effective than increasing this further) which has at least some good
chance to avoid thrashing. Since we don't want to increase memory requirements
however in turn decrease the tile size accordingly from 64 to 32 (as a bonus
point this also decreases the cost of texture thrashing which might still
happen sometimes).
I've seen performance improvement in the order of factor ~200 (specifically,
drawing the first frame from the replay from bug 41787 needs "only" ~10s
instead of ~30min, meaning I can actually compare the output with other
drivers...) with this.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Wed, 22 May 2013 00:13:02 +0000 (02:13 +0200)]
softpipe: disambiguate TILE_SIZE / TEX_TILE_SIZE
These can be different (just like NUM_TEX_TILE_ENTRIES / NUM_ENTRIES),
though currently they aren't.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Wed, 22 May 2013 20:47:59 +0000 (22:47 +0200)]
llvmpipe: disable simple_shader optimization
This optimization disabled mask checks if the shader is simple enough.
While this should work correctly, the problem is that it can hide real issues
because shaders in practice are usually complex enough (8 instructions or 1
texture is already enough) so this doesn't get used, whereas dumbed-down
tests which should hit all the same code paths suddenly do something quite
different. This was the reason that bug 41787 could not be easily tracked as
stencil test not working correctly (piglit would in fact have failed some
tests without that optimization).
So disable it for now, it's unclear if it's much of a win in any case.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Tue, 21 May 2013 21:57:33 +0000 (23:57 +0200)]
llvmpipe: fix early depth test / late depth write stencil issues
We actually did early depth/stencil test and late depth/stencil write even
when the shader could kill the fragment (alpha test or discard). Since it
matters for the new stencil value if the fragment is killed by depth/stencil
test or by the shader (in which case it will not reach the depth/stencil
test) this simply cannot work (we also would possibly skip writing the new
stencil value due to mask checks but this is a secondary issue).
So use late depth test / late depth write instead in this case.
(No piglit changes as it doesn't seem to hit such bogus early depth test
/ late depth write path.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Wed, 22 May 2013 20:42:11 +0000 (22:42 +0200)]
llvmpipe: fix issue with not writing new stencil values
We did mask checks between depth/stencil testing and depth/stencil write.
This meant that if the depth/stencil test killed off all fragments we never
actually wrote the new stencil value. This issue affected all early/late
test/write combinations.
So move the mask check after depth/stencil write (for early depth test,
could do the same for late depth test but might not be worth it at that
point so just skip it there).
This addresses https://bugs.freedesktop.org/show_bug.cgi?id=41787.
Piglit does not hit this issue because of the simple_shader optimization
in generate_fs_loop() which means we're skipping the mask checks.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Tue, 21 May 2013 21:10:53 +0000 (23:10 +0200)]
llvmpipe: (trivial) remove confusing code in stencil test
This was meant to disable some code which isn't needed when depth/stencil
isn't written. However, there's more code which wouldn't be needed in that
case so having the condition there was just odd (llvm will drop all the code
anyway).
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Tue, 21 May 2013 20:51:15 +0000 (22:51 +0200)]
llvmpipe: fix bug in early depth test / late depth write handling
Using wrong type if the format was less than 32bits.
No piglit changes as it doesn't hit that path.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Alexander von Gluck IV [Tue, 21 May 2013 20:55:24 +0000 (15:55 -0500)]
Haiku: Add Gallium winsys and target code
* We generate a static library for Haiku
Gallium targets as our port system combines
the compiled rendering code into a modular
ar for each module (for example, our port
system combines llvm libsoftpipe.a libllvmpipe.a
into a single ar for the Haiku build system.
I'd like the Gallium hgl target scons build
system to do this some day, however how is
beyond me at the moment. This is a first step.
Chia-I Wu [Wed, 22 May 2013 04:19:13 +0000 (12:19 +0800)]
ilo: set more fields of 3DSTATE_DEPTH_BUFFER
Set lod/layer related fields of 3DSTATE_DEPTH_BUFFER. Since we always point
to a single level/layer, those fields are always zero and this commit
effectively makes no change.
While at it, make it easier to disable manual slice offset calculation.
Chia-I Wu [Wed, 22 May 2013 05:00:30 +0000 (13:00 +0800)]
ilo: correctly set view extent in SURFACE_STATE
The view extent was set to be the same as the depth while it should be set to
the number of layers. It makes a difference for 3D textures.
Also use this as a chance to clean up the code.
Chia-I Wu [Wed, 22 May 2013 07:33:15 +0000 (15:33 +0800)]
ilo: avoid unnecessary emission of SO states
No need to emit 3DSTATE_SO_BUFFER and 3DSTATE_SO_DECL_LIST when SO is
disabled. As the implicit flush done by the commands is also gone, emit an
explicit flush.
Eric Anholt [Tue, 21 May 2013 21:55:31 +0000 (14:55 -0700)]
i965: Skip etc-to-rgb transcode on BayTrail.
The hardware does it, so no need for this workaround.
Reviewed-and-tested-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 21 Mar 2013 16:50:45 +0000 (09:50 -0700)]
mesa: Remove extension checking from ChooseTexFormat.
This should already be handled by _mesa_base_tex_format() calls in
TexImage*.
Eric Anholt [Thu, 21 Mar 2013 16:45:20 +0000 (09:45 -0700)]
mesa: Add ChooseTexFormat support for the new XBGR formats.
Kenneth Graunke [Mon, 20 May 2013 22:25:28 +0000 (15:25 -0700)]
i965: Split BeginTransformFeedback hook into Gen6 and Gen7+ variants.
Most of the work in BeginTransformFeedback is only necessary on Gen6.
We may as well just skip it on Gen7+.
v2: Add an intel->gen == 6 assert.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Fri, 17 May 2013 18:53:53 +0000 (11:53 -0700)]
i965: Kill software primitive counting entirely.
Now that we have hardware contexts, we don't need to continually
reprogram the GS_SVBI_INDEX registers. They're automatically saved and
restored with the context, so they can just increment over time. We
only need to reset them when starting transform feedback.
There's also no reason to delay until the next drawing operation; we can
just emit the packet immediately. However, this means we must drop the
initialization in brw_invariant_state, as BeginTransformFeedback may
occur before the first drawing in a context.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Fri, 17 May 2013 18:46:16 +0000 (11:46 -0700)]
i965: Remove software geometry query code.
EXT_transform_feedback isn't yet supported on Gen4-5, so none of this
query code is actually used. This also means we can remove some of the
surrounding support code.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Fri, 17 May 2013 18:00:01 +0000 (11:00 -0700)]
i965: Delete unused brw->sol.offset_0_batch_start field.
This was only used for the the non-hardware context code.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Fri, 17 May 2013 17:55:35 +0000 (10:55 -0700)]
i965: Stop using the kernel SOL reset feature.
We can just do it ourselves with MI_LOAD_REGISTER_IMM.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Fri, 17 May 2013 17:51:34 +0000 (10:51 -0700)]
i965: Remove dead code for Gen7 SOL without hardware contexts.
Failing to get a hardware context now means failing to load the driver,
so this code will never get hit.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Sun, 21 Apr 2013 05:35:46 +0000 (22:35 -0700)]
i965: Add a macro for accessing the SO_WRITE_OFFSET[0-3] registers.
Using a function-like macro makes it easy to loop over all four streams.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Ian Romanick [Tue, 21 May 2013 20:16:35 +0000 (13:16 -0700)]
docs: Import 9.1.3 release notes, add news item.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Michel Dänzer [Thu, 2 May 2013 13:39:15 +0000 (15:39 +0200)]
radeonsi: Fix user clip planes
4 more little piglits.
NOTE: This is a candidate for the 9.1 branch.
Michel Dänzer [Wed, 15 May 2013 16:09:50 +0000 (18:09 +0200)]
radeonsi: Handle TGSI_SEMANTIC_CLIPVERTEX
17 more little piglits.
NOTE: This is a candidate for the 9.1 branch.
Michel Dänzer [Thu, 16 May 2013 09:50:00 +0000 (11:50 +0200)]
radeonsi: Initial support for multiple constant buffers
Just enough to support an additional internal constant buffer for the user
clip planes.
NOTE: This is a candidate for the 9.1 branch.
Michel Dänzer [Fri, 3 May 2013 15:59:34 +0000 (17:59 +0200)]
radeonsi: Fix handling of TGSI_SEMANTIC_PSIZE
Two more little piglits.
NOTE: This is a candidate for the 9.1 branch.
Marek Olšák [Tue, 14 May 2013 17:37:17 +0000 (19:37 +0200)]
radeonsi: increase array size for shader inputs and outputs
and add assertions to prevent buffer overflow. This fixes corruption
of the si_shader struct.
NOTE: This is a candidate for the 9.1 branch.
[ Cherry-pick of r600g commit
da33f9b919039442e9ab51f9b1d1c83a73607133 ]
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Brian Paul [Mon, 20 May 2013 22:15:24 +0000 (16:15 -0600)]
xlib: check for null ctx pointer in glXIsDirect()
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64745
Note: This is a candidate for the stable branches.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Mon, 20 May 2013 22:13:53 +0000 (16:13 -0600)]
st/glx/xlib: check for null ctx pointer in glXIsDirect()
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64745
Note: This is a candidate for the stable branches.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
José Fonseca [Fri, 17 May 2013 12:23:04 +0000 (13:23 +0100)]
scons: Don't force stabs debug format for Mingw.
- recent gdb handles DWARF fine (tested both with version
7.1.90.
20100730 from mingw-w64 project, and 7.5-1 from mingw project)
- http://people.freedesktop.org/~jrfonseca/bfdhelp/ was updated to
handle DWARF
- stabs requires ugly hacks to prevent compilation failures
- mixing stabs/dwarf prevents proper backtraces (which is inevitable,
given that the MinGW C runtime is pre-built with DWARF)
For example, without this change I get:
(gdb) bt
#0 _wassert (_Message=0xf925060 L"Num < NumOperands && \"Invalid child # of SDNode!\"",
_File=0xf60b488 L"llvm/include/llvm/CodeGen/SelectionDAGNodes.h", _Line=534)
at ../../../../mingw-w64-crt/misc/wassert.c:51
#1 0x0368996b in _assert (_Message=0x39d7ee4 "Num < NumOperands && \"Invalid child # of SDNode!\"",
_File=0x39d7e94 "llvm/include/llvm/CodeGen/SelectionDAGNodes.h", _Line=534)
at ../../../../mingw-w64-crt/misc/wassert.c:44
#2 0x00000004 in ?? ()
#3 0x00000004 in ?? ()
#4 0x0f60b488 in ?? ()
#5 0x00000000 in ?? ()
While with this change I get:
(gdb) bt
#0 _wassert (_Message=0xfb982e8 L"Num < NumOperands && \"Invalid child # of SDNode!\"",
_File=0xefbcb40 L"llvm/include/llvm/CodeGen/SelectionDAGNodes.h", _Line=534)
at ../../../../mingw-w64-crt/misc/wassert.c:51
#1 0x039c996b in _assert (_Message=0x3d17f24 "Num < NumOperands && \"Invalid child # of SDNode!\"",
_File=0x3d17ed4 "llvm/include/llvm/CodeGen/SelectionDAGNodes.h", _Line=534)
at ../../../../mingw-w64-crt/misc/wassert.c:44
#2 0x033111cc in getOperand (Num=4, this=<optimized out>)
at llvm/include/llvm/CodeGen/SelectionDAGNodes.h:534
#3 getOperand (i=4, this=<optimized out>)
at llvm/include/llvm/CodeGen/SelectionDAGNodes.h:779
#4 llvm::SelectionDAG::getNode (this=0xf00cb08, Opcode=79, DL=..., VT=..., N1=..., N2=...)
at llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:2859
#5 0x03377b20 in llvm::SelectionDAGBuilder::visitExtractElement (this=0xfb45028, I=...)
at llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:2803
[...]
Reviewed-by: Brian Paul <brianp@vmware.com>
Chia-I Wu [Fri, 17 May 2013 08:20:52 +0000 (16:20 +0800)]
ilo: use BLT engine to copy between textures
Emit XY_SRC_COPY_BLT to do the job. Since ETC1 textures cannot be mapped for
reading, as is required by util_copy_resource_region, this fixes copying of
ETC1 textures.
Chia-I Wu [Fri, 17 May 2013 07:54:45 +0000 (15:54 +0800)]
ilo: use BLT engine to copy between buffers
Emit (possibly multiple) SRC_COPY_BLT to copy between buffers of arbitrary
sizes.
Chia-I Wu [Fri, 17 May 2013 07:06:19 +0000 (15:06 +0800)]
ilo: refactor blitter_xy_color_blt()
Add gen6_XY_COLOR_BLT() and let blitter_xy_color_blt() call the function. Not
sure if this path is still being hit by any application.
Chia-I Wu [Mon, 20 May 2013 04:13:34 +0000 (12:13 +0800)]
ilo: replace cp hooks by cp owner and flush callback
The problem with cp hooks is that when we switch from 3D ring to 2D ring, and
when there are active queries, we will emit 3D commands to 2D ring because
the new-batch hook is called.
This commit introduces the idea of cp owner. When the cp is flushed, or when
another owner takes place, the current owner is notified, giving it a chance
to emit whatever commands there need to be. With this mechanism, we can
resume queries when the 3D pipeline owns the cp, and pause queries when it
loses the cp. Ring switch will just work.
As we still need to know when the cp bo is reallocated, a flush callback is
added.
Chia-I Wu [Fri, 17 May 2013 08:10:11 +0000 (16:10 +0800)]
ilo: harware contexts are only for the render ring
The hardware context should not be passed for bo execution when the ring is
not the render ring. Rename hw_ctx to render_ctx for clarity.
Chia-I Wu [Mon, 20 May 2013 09:32:35 +0000 (17:32 +0800)]
ilo: update format mappings
Add more PIPE_FORMAT -> BRW_SURFACEFORMAT mappings, and update
surface_format_info from i965.
Chia-I Wu [Mon, 20 May 2013 09:18:12 +0000 (17:18 +0800)]
ilo: update headers from i965
Mainly for MI_LOAD_REGISTER_IMM and BCS_SWCTRL.
Anuj Phogat [Mon, 20 May 2013 23:15:49 +0000 (16:15 -0700)]
i965: Fix build failure
meta.h should be included in brw_state_upload.c to get access to
function _mesa_meta_in_progress().
Kenneth Graunke [Thu, 16 May 2013 15:54:47 +0000 (08:54 -0700)]
i965: Implement transform feedback query support in hardware on Gen6+.
Now that we have hardware contexts and can use MI_STORE_REGISTER_MEM,
we can use the GPU's pipeline statistics counters rather than going out
of our way to count primitives in software.
Aside from being simpler, this also paves the way for Geometry Shaders,
which can output an arbitrary number of primitives on the GPU. It will
also allow us to use hardware primitive restart when these queries are
in use.
The GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN query is easy: it
corresponds to the SO_NUM_PRIMS_WRITTEN/SO_NUM_PRIMS_WRITTEN0_IVB
counters.
The GL_PRIMITIVES_GENERATED query is trickier. Gen provides several
statistics registers which /almost/ match the semantics required:
- IA_PRIMITIVES_COUNT
The number of primitives fetched by the VF or IA (input assembler).
This undercounts when GS is enabled, as it can output many primitives.
- GS_PRIMITIVES_COUNT
The number of primitives output by the GS. Unfortunately, this
doesn't increment unless the GS unit is actually enabled, and it
usually isn't.
- SO_PRIM_STORAGE_NEEDED*_IVB
The amount of space needed to write primitives output by transform
feedback. These naturally only work when transform feedback is on.
We'd also have to add the counters for all four streams.
- CL_INVOCATION_COUNT
The number of primitives processed by the clipper. This doesn't work
if the GS or SOL throw away primitives for rasterizer discard.
However, it does increment even if the clipper is in REJECT_ALL mode.
Dynamically switching between counters would be painfully complicated,
especially since GS, rasterizer discard, and transform feedback can all
be switched on and off repeatedly during a single query.
The most usable counter is CL_INVOCATION_COUNT. The previous two
patches reworked rasterizer discard support so that all primitives hit
the clipper, making this work.
v2: Occlusion query bug fixes removed and squashed in earlier patches.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Fri, 17 May 2013 15:49:52 +0000 (08:49 -0700)]
i965: Handle rasterizer discard in the clipper rather than GS on Gen6.
This has more of a negative impact than the previous patch, as on Gen6
passing primitives through to the clipper means we actually have to make
the GS thread write them to the URB.
I don't see another good solution though, and rasterizer discard is not
the most common of cases, so hopefully it won't be too terrible.
v2: Add a perf_debug; resolve rebase conflicts on the brw dirty flags;
remove the rasterizer_discard field from brw_gs_prog_key.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Fri, 17 May 2013 02:25:14 +0000 (19:25 -0700)]
i965: Handle rasterizer discard in the clipper rather than SOL on Gen7.
In order to implement the GL_PRIMITIVES_GENERATED query in a sane
fashion on our hardware, we can't discard primitives until the clipper.
The patch after next explains the rationale.
By setting the clipper to REJECT_ALL mode, all primitives get thrown away,
so rendering is still appropriately disabled.
This may negatively impact performance in the rasterizer discard case,
but it's unclear how much and this hasn't been observed to be a
bottleneck in any application we've looked at. The clipper is the very
next stage in the pipeline, so I don't think it will be terrible.
v2: Add a perf_debug; resolve rebase conflicts on the brw dirty flags.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Thu, 16 May 2013 17:27:53 +0000 (10:27 -0700)]
i965: Disable clipper statistics when meta operations are in progress.
We don't currently use the clipper statistics, but we'll soon use
CL_INVOCATIONS_COUNT to implement the GL_PRIMITIVES_GENERATED query.
The number of primitives generated is not supposed to be altered during
operations such as glGenerateMipmap.
Prevents spec/EXT_transform_feedback/generatemipmap prims_generated
from breaking when we start using pipeline statistics registers to
implement the GL_PRIMITIVES_GENERATED query in a few commits.
v2: Use the BRW_NEW_META_IN_PROGRESS flag for correct state handling.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Sat, 18 May 2013 04:17:56 +0000 (21:17 -0700)]
i965: Create a BRW_NEW_META_IN_PROGRESS state flag.
This will allow us to disable statistics during meta operations.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Thu, 28 Feb 2013 02:33:25 +0000 (18:33 -0800)]
i965: Add #defines for the pipeline statistics counter registers.
These come from the Ivybridge PRM, Volume 1, Part 3.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Thu, 16 May 2013 04:33:01 +0000 (21:33 -0700)]
i965: Rely on hardware contexts for query objects on Gen6+.
Hardware contexts greatly simplify the query object code. The pipeline
statistics counters get saved and restored with the context, which means
that we don't need to worry about other workloads polluting them.
This means that we can simply write a single pair of values (one at
BeginQuery and one at EndQuery) rather than a series of pairs. This
also means we don't need to worry about the BO getting full. We also
don't need to delay BO allocation and starting snapshot until the first
draw.
The generation split here is a little off: technically, Ironlake can also
support hardware contexts. However, the kernel currently doesn't, and
even if it were to do so someday, we'd need to wait a while before
bumping the kernel requirement to take advantage of it.
v2: Incorporate Paul's feedback.
- Clarify which functions are Gen4/5-only via assertions and comments.
- Change how driver hook initialization happens.
- Update comments.
- Squash a bug fix from a later commit here where it belongs.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
Acked-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Thu, 16 May 2013 17:39:39 +0000 (10:39 -0700)]
i965: Disable pixel statistics in BLORP.
BLORP is used for operations like glClear, glCopyTexImage, and
glBlitFramebuffer which aren't supposed to contribute fragments toward
occlusion queries.
This prevents Piglit tests from breaking in the next commit.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Thu, 16 May 2013 04:18:28 +0000 (21:18 -0700)]
i965: Require hardware contexts (and thus Kernel 3.6) on Gen6+.
Hardware contexts are necessary to reasonably support OpenGL 3.2.
In particular, we currently maintain software counters for transform
feedback buffer offsets and counters, which relies on knowing the number
of primitives generated. Geometry shaders violate that assumption.
At the time of writing, Debian has moved to Kernel 3.8, which means most
people probably have a newer kernel by now. It's also worth noting that
this patch won't land until Mesa 10 which is currently targeted for
September. By that point, even more people will have a newer kernel.
Also, don't bother trying to allocate contexts on pre-Gen6, as it
currently will always fail, and if this changes in the future, we'll
need to reevaluate our hw_ctx/gen checks.
This patch leaves the code for flagging BRW_NEW_CONTEXT on new
batchbuffers if hw_ctx == NULL since that still occurs pre-Gen6.
Also remove the Gen7+ check for kernel 3.3, since it's now redundant.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Sat, 6 Apr 2013 17:27:28 +0000 (10:27 -0700)]
i965: Bump kernel requirement to 3.3 on Ivybridge.
Kernel 3.3 introduced the SOL reset execbuf parameter, needed for GL 3.0
on Ivybridge. Bumping the requirement will give an obvious error
message rather than simply reporting GL 2.1.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Vincent Lejeune [Sat, 18 May 2013 21:42:37 +0000 (23:42 +0200)]
r600g/llvm: fix cubemap lod/bias
Vincent Lejeune [Sat, 18 May 2013 20:22:41 +0000 (22:22 +0200)]
r600g/llvm: Fix texelFetchOffset-2D
Vincent Lejeune [Sat, 18 May 2013 20:17:51 +0000 (22:17 +0200)]
r600g/llvm: Fix cubearray textureSize
Vincent Lejeune [Sun, 19 May 2013 13:40:19 +0000 (15:40 +0200)]
r600g/llvm: Factorize code loading from const buffer.
Kenneth Graunke [Fri, 17 May 2013 17:41:27 +0000 (10:41 -0700)]
i965: Add cases for ir_triop_vector_insert that assert.
brw_link_shader() unconditionally calls lower_vector_insert() with true
as the second parameter. This means that both constant and variable
indexed expressions will get lowered, so we should never see this in the
backend.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Fri, 17 May 2013 17:33:40 +0000 (10:33 -0700)]
i965: Add cases for ir_binop_vector_extract that assert.
do_vec_index_to_swizzle() should remove any vector extract operations
with a constant index. It's unconditionally called from
do_common_optimization().
do_vec_index_to_cond_assign() should remove the rest, and it is
unconditionally called from brw_link_shader(). This means that we
should never see ir_binop_vector_extract in the backend.
Silences compiler warnings.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Roland Scheidegger [Thu, 16 May 2013 16:33:21 +0000 (18:33 +0200)]
llvmpipe: enable z32s8x24 format
Now that we can handle it both for sampling and as depth/stencil enable it.
Passes nearly all additional piglit tests which are now performed, with two
exceptions (one being a framebuffer blit which fails for all other formats
including stencil too as we don't support stencil blits, the other reporting
a unexpected GL error so doesn't look to be llvmpipe's fault).
Roland Scheidegger [Fri, 17 May 2013 22:16:03 +0000 (00:16 +0200)]
llvmpipe: handle z32s8x24 depth/stencil format
We need to split up the depth and stencil values in this case, and there's
some new logic required to handle float depth and stencil simultaneously.
Also make sure we get the 64bit zs clear values and masks propagated
correctly.
Roland Scheidegger [Thu, 16 May 2013 20:58:33 +0000 (22:58 +0200)]
llvmpipe: get rid of unused tiled/linear logic
We do rendering to linear color buffers for quite some time, and since
switching to linear depth buffers all the tiled/linear logic was unused.
So get rid of (most) of it - there's still some LAYOUT_NONE things and
late allocation of resources which probably could be simplified.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Fri, 17 May 2013 21:19:05 +0000 (23:19 +0200)]
llvmpipe: fix bogus handling of first_layer when setting up texture sampling
The code avoided first_layer parameter in the sampler interface (and needing
to do another calculation at runtime) by fixing up the base texture pointer
instead. Unfortunately, this didn't actually work as we have mip-first
texture layout so fixing up the base ptr by a fixed amount is very wrong if
there are mipmaps present. The wrong offsets caused misrendering and crashes.
Fix this by just adjusting the individual mip level offsets instead.
Spotted by Jose.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Fri, 17 May 2013 21:13:51 +0000 (23:13 +0200)]
gallivm: handle z32s8x24 format for sampling
Since we can only sample either depth or stencil but not both only load
the required bits which makes things a bit easier (it requires special
handling since the format doesn't fit into 32bit).
The logic for deciding if depth or stencil should be sampled is a bit odd,
but seems to be what other drivers and statetrackers do: if it's a format with
both depth and stencil (or just with depth) then sample depth, for sampling
stencil a sampler view format with only stencil is required.
Also while here fix up stencil sampling for other formats as well, though
this isn't supported by mesa (ARB_stencil_texturing), and while blits would
use it they don't work neither since they'd also need stencil export.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Wed, 8 May 2013 22:55:22 +0000 (00:55 +0200)]
st/mesa: fix weird UCMP opcode use for bool ubo load
I don't know what this code was trying to do but whatever it was it couldn't
have worked since negation of integer boolean inputs while not specified as
outright illegal (not yet at least) won't do anything since it doesn't affect
the result of comparison with zero at all. In fact it looks like the whole
instruction can just be omitted.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Eric Anholt [Fri, 10 May 2013 19:17:52 +0000 (12:17 -0700)]
mesa: Make FinishRenderTexture just take the renderbuffer being finished.
Now that the rb has a reference to the teximage, we didn't need anything
else out of the attachment.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Fri, 10 May 2013 18:51:01 +0000 (11:51 -0700)]
mesa: Track the TexImage being rendered to in the gl_renderbuffer.
We keep having to pass the attachments around with our gl_renderbuffers
because that's the only way to find what the gl_renderbuffer actually
refers to. This is a step toward removing that (though drivers still need
the Zoffset as well).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Fri, 10 May 2013 20:36:04 +0000 (13:36 -0700)]
radeon: Remove dead radeon_wrap_texture().
I should have killed this in my previous cleanup.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Fri, 10 May 2013 19:36:43 +0000 (12:36 -0700)]
mesa: Make gl_renderbuffers backed by EGL images use FinishRenderTexture.
This is the opportunity that radeon and intel drivers rely on for flushing
render targets that may get reused as textures. Before EGL, that only
happened for GL_TEXTURE attachments.
Fixes piglits:
KHR_gl_renderbuffer_image/renderbuffer-texture
OES_EGL_image/renderbuffer-texture
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
José Fonseca [Sun, 21 Apr 2013 21:23:31 +0000 (22:23 +0100)]
gallivm: Eliminate 8.8 fixed point intermediates from AoS sampling path.
This change was meant as a stepping stone to use PMADDUBSW SSSE3
instruction, but actually this refactoring by itself yields a 10%
speedup on texture intensive shaders (e.g, Google Earth's ocean water
w/o S3TC on a Ivy Bridge machine), while giving yielding exactly the
same results, whereas PMADDUBSW only gave an extra 5%, at the expense of
2bits of precision in the interpolation.
I belive that the speedup of this change comes from the reduced register
pressure (as 8.8 fixed point intermediates take twice the space of 8bit
unorm).
Also, not dealing with 8.8 simplifies lp_bld_sample_aos.c code
substantially -- it's no longer necessary to have code duplicated for
low and high register halfs.
Note about lp_build_sample_mipmap(): the path for num_quads > 1 is never
executed (as it is faster on AVX to split the 256bit wide texture
computation into two 128bit chunks, in order to leverage integer
opcodes). This path might be useful in the future, so in order to
verify this change did not break that path I had to apply this change:
@@ -1662,11 +1662,11 @@ lp_build_sample_soa(struct gallivm_state *gallivm,
/*
* we only try 8-wide sampling with soa as it appears to
* be a loss with aos with AVX (but it should work).
* (It should be faster if we'd support avx2)
*/
- if (num_quads == 1 || !use_aos) {
+ if (/* num_quads == 1 || ! */ use_aos) {
if (num_quads > 1) {
if (mip_filter == PIPE_TEX_MIPFILTER_NONE) {
LLVMValueRef index0 = lp_build_const_int32(gallivm, 0);
/*
and then run texfilt mesademo:
LP_NATIVE_VECTOR_WIDTH=256 ./texfilt
Ran whole piglit without regressions.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
José Fonseca [Wed, 17 Apr 2013 17:03:11 +0000 (18:03 +0100)]
gallivm: Add and use lp_build_lerp_3d.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tom Stellard [Tue, 14 May 2013 15:56:25 +0000 (08:56 -0700)]
radeon/llvm: Run standard optimization passes on conpute shader modules
The SROA and function inliner passes are espically important, because
they optimize away unsupported features: functions and indirect
private memory access.
Kenneth Graunke [Thu, 16 May 2013 03:40:33 +0000 (20:40 -0700)]
intel: Don't spam "intelReadPixels: fallback to swrast" in non-PBO case.
When an application is using PBOs, we attempt to use the BLT engine to
perform ReadPixels. If that fails due to some restrictions, it's useful
to raise a performance warning.
In the non-PBO case, we always use a CPU mapping since getting the data
into client memory requires a CPU-side copy. This is a very common case,
so raising a performance warning is annoying. In particular, apitrace's
image dumping code hits this path, causing it to print hundreds of
thousands of performance warnings via ARB_debug_output. This tends to
obscure actual errors or other important messages.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Paul Berry [Thu, 16 May 2013 21:12:15 +0000 (14:12 -0700)]
intel: Do a depth resolve before copying images between miptrees.
When intel_finalize_mipmap_tree() calls intel_miptree_copy_teximage()
to reassemble a depth miptree that has been broken apart into pieces
(to deal with misalignment of levels/layers within the miptree), it
just copies the depth data, not the HiZ data. This is reasonable,
since the alignment restrictions of HiZ are a large part of the reason
why the miptree had to be broken apart in the first place. However,
in order for the depth copy to be sufficient, we need to do a depth
resolve first, to make sure any deferred depth writes that are in the
HiZ buffer get performed.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=64662 and
https://bugs.freedesktop.org/show_bug.cgi?id=64659.
NOTE: This is a candidate for stable release branches.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>